x86: replace EXqScalarS by EXqVexScalarS

There's only a single user, that that one can do fine with the
alternative, as the "Vex" aspect of the other operand kind is meaningful
only on 3-operand insns.

While doing this I noticed that I didn't need to do the same adjustment
in the EVEX tables, and voilà - there was a bug, which gets fixed at the
same time (see the testsuite changes).
This commit is contained in:
Jan Beulich
2020-07-06 13:35:38 +02:00
parent 5b872f7df7
commit 39e0f45682
10 changed files with 29 additions and 7 deletions

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@@ -1,3 +1,12 @@
2020-07-06 Jan Beulich <jbeulich@suse.com>
* testsuite/gas/i386/avx512f-opts.s: Add EVEX movq tests.
* testsuite/gas/i386/x86-64-avx512f-opts.s: Add blank line.
* testsuite/gas/i386/avx512f-opts-intel.d,
testsuite/gas/i386/avx512f-opts.d
testsuite/gas/i386/x86-64-avx512f-opts-intel.d
testsuite/gas/i386/x86-64-avx512f-opts.d: Adjust expectations.
2020-07-06 Yuri Chornoivan <yurchor@ukr.net>
PR 26204

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@@ -65,6 +65,8 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 62 f1 7c 4f 10 f5 vmovups zmm6\{k7\},zmm5
[ ]*[a-f0-9]+: 62 f1 7c cf 11 ee vmovups.s zmm6\{k7\}\{z\},zmm5
[ ]*[a-f0-9]+: 62 f1 7c cf 10 f5 vmovups zmm6\{k7\}\{z\},zmm5
[ ]*[a-f0-9]+: 62 f1 fd 08 d6 ee vmovq\.s xmm6,xmm5
[ ]*[a-f0-9]+: 62 f1 fe 08 7e f5 vmovq xmm6,xmm5
[ ]*[a-f0-9]+: 62 f1 fd 48 29 ee vmovapd.s zmm6,zmm5
[ ]*[a-f0-9]+: 62 f1 fd 48 28 f5 vmovapd zmm6,zmm5
[ ]*[a-f0-9]+: 62 f1 fd 4f 29 ee vmovapd.s zmm6\{k7\},zmm5

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@@ -64,6 +64,8 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 62 f1 7c 4f 10 f5 vmovups %zmm5,%zmm6\{%k7\}
[ ]*[a-f0-9]+: 62 f1 7c cf 11 ee vmovups.s %zmm5,%zmm6\{%k7\}\{z\}
[ ]*[a-f0-9]+: 62 f1 7c cf 10 f5 vmovups %zmm5,%zmm6\{%k7\}\{z\}
[ ]*[a-f0-9]+: 62 f1 fd 08 d6 ee vmovq\.s %xmm5,%xmm6
[ ]*[a-f0-9]+: 62 f1 fe 08 7e f5 vmovq %xmm5,%xmm6
[ ]*[a-f0-9]+: 62 f1 fd 48 29 ee vmovapd.s %zmm5,%zmm6
[ ]*[a-f0-9]+: 62 f1 fd 48 28 f5 vmovapd %zmm5,%zmm6
[ ]*[a-f0-9]+: 62 f1 fd 4f 29 ee vmovapd.s %zmm5,%zmm6\{%k7\}

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@@ -60,6 +60,9 @@ _start:
vmovups %zmm5, %zmm6{%k7} # AVX512F
vmovups.s %zmm5, %zmm6{%k7}{z} # AVX512F
vmovups %zmm5, %zmm6{%k7}{z} # AVX512F
{evex} vmovq.s %xmm5,%xmm6
{evex} vmovq %xmm5,%xmm6
.intel_syntax noprefix
vmovapd.s zmm6, zmm5 # AVX512F
vmovapd zmm6, zmm5 # AVX512F

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@@ -55,7 +55,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 62 61 fd 08 7e f0 vmovq rax,xmm30
[ ]*[a-f0-9]+: 62 41 fd 08 7e f0 vmovq r8,xmm30
[ ]*[a-f0-9]+: 62 41 fd 08 7e f0 vmovq r8,xmm30
[ ]*[a-f0-9]+: 62 01 fd 08 d6 ee vmovq xmm30,xmm29
[ ]*[a-f0-9]+: 62 01 fd 08 d6 ee vmovq\.s xmm30,xmm29
[ ]*[a-f0-9]+: 62 01 fe 08 7e f5 vmovq xmm30,xmm29
[ ]*[a-f0-9]+: 62 01 97 07 11 e6 vmovsd.s xmm30\{k7\},xmm29,xmm28
[ ]*[a-f0-9]+: 62 01 97 07 10 f4 vmovsd xmm30\{k7\},xmm29,xmm28
@@ -123,7 +123,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 62 61 fd 08 7e f0 vmovq rax,xmm30
[ ]*[a-f0-9]+: 62 41 fd 08 7e f0 vmovq r8,xmm30
[ ]*[a-f0-9]+: 62 41 fd 08 7e f0 vmovq r8,xmm30
[ ]*[a-f0-9]+: 62 01 fd 08 d6 ee vmovq xmm30,xmm29
[ ]*[a-f0-9]+: 62 01 fd 08 d6 ee vmovq\.s xmm30,xmm29
[ ]*[a-f0-9]+: 62 01 fe 08 7e f5 vmovq xmm30,xmm29
[ ]*[a-f0-9]+: 62 01 97 07 11 e6 vmovsd.s xmm30\{k7\},xmm29,xmm28
[ ]*[a-f0-9]+: 62 01 97 07 10 f4 vmovsd xmm30\{k7\},xmm29,xmm28

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@@ -54,7 +54,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 62 61 fd 08 7e f0 vmovq %xmm30,%rax
[ ]*[a-f0-9]+: 62 41 fd 08 7e f0 vmovq %xmm30,%r8
[ ]*[a-f0-9]+: 62 41 fd 08 7e f0 vmovq %xmm30,%r8
[ ]*[a-f0-9]+: 62 01 fd 08 d6 ee vmovq %xmm29,%xmm30
[ ]*[a-f0-9]+: 62 01 fd 08 d6 ee vmovq\.s %xmm29,%xmm30
[ ]*[a-f0-9]+: 62 01 fe 08 7e f5 vmovq %xmm29,%xmm30
[ ]*[a-f0-9]+: 62 01 97 07 11 e6 vmovsd.s %xmm28,%xmm29,%xmm30\{%k7\}
[ ]*[a-f0-9]+: 62 01 97 07 10 f4 vmovsd %xmm28,%xmm29,%xmm30\{%k7\}
@@ -122,7 +122,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 62 61 fd 08 7e f0 vmovq %xmm30,%rax
[ ]*[a-f0-9]+: 62 41 fd 08 7e f0 vmovq %xmm30,%r8
[ ]*[a-f0-9]+: 62 41 fd 08 7e f0 vmovq %xmm30,%r8
[ ]*[a-f0-9]+: 62 01 fd 08 d6 ee vmovq %xmm29,%xmm30
[ ]*[a-f0-9]+: 62 01 fd 08 d6 ee vmovq\.s %xmm29,%xmm30
[ ]*[a-f0-9]+: 62 01 fe 08 7e f5 vmovq %xmm29,%xmm30
[ ]*[a-f0-9]+: 62 01 97 07 11 e6 vmovsd.s %xmm28,%xmm29,%xmm30\{%k7\}
[ ]*[a-f0-9]+: 62 01 97 07 10 f4 vmovsd %xmm28,%xmm29,%xmm30\{%k7\}

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@@ -72,6 +72,7 @@ _start:
vmovups %zmm29, %zmm30{%k7} # AVX512F
vmovups.s %zmm29, %zmm30{%k7}{z} # AVX512F
vmovups %zmm29, %zmm30{%k7}{z} # AVX512F
.intel_syntax noprefix
vmovapd.s zmm30, zmm29 # AVX512F
vmovapd zmm30, zmm29 # AVX512F

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@@ -1,3 +1,9 @@
2020-07-06 Jan Beulich <jbeulich@suse.com>
* i386-dis.c (EXqScalarS): Delete.
(vex_len_table): Replace EXqScalarS by EXqVexScalarS.
* i386-dis-evex-w.h (vmovq): Use EXqVexScalarS.
2020-07-06 Jan Beulich <jbeulich@suse.com>
* i386-dis.c (safe-ctype.h): Include.

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@@ -294,7 +294,7 @@
/* EVEX_W_0FD6_P_2 */
{
{ Bad_Opcode },
{ "vmovq", { EXxmm_mq, XMScalar }, 0 },
{ "vmovq", { EXqVexScalarS, XMScalar }, 0 },
},
/* EVEX_W_0FE6_P_1 */
{

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@@ -386,7 +386,6 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr)
#define EXd { OP_EX, d_mode }
#define EXdS { OP_EX, d_swap_mode }
#define EXq { OP_EX, q_mode }
#define EXqScalarS { OP_EX, q_scalar_swap_mode }
#define EXqS { OP_EX, q_swap_mode }
#define EXx { OP_EX, x_mode }
#define EXxS { OP_EX, x_swap_mode }
@@ -9498,7 +9497,7 @@ static const struct dis386 vex_len_table[][2] = {
/* VEX_LEN_0FD6_P_2 */
{
{ "vmovq", { EXqScalarS, XMScalar }, 0 },
{ "vmovq", { EXqVexScalarS, XMScalar }, 0 },
},
/* VEX_LEN_0FF7_P_2 */