forked from Imagelibrary/binutils-gdb
* sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
(MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New. * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide separate implementations for mipsIV and mipsV. Use new macros to determine whether the restrictions apply.
This commit is contained in:
@@ -1,3 +1,12 @@
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2004-04-29 Chris Demetriou <cgd@broadcom.com>
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Richard Sandiford <rsandifo@redhat.com>
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* sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
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(MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
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* mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
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separate implementations for mipsIV and mipsV. Use new macros to
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determine whether the restrictions apply.
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2004-01-19 Chris Demetriou <cgd@broadcom.com>
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* mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
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@@ -238,13 +238,15 @@
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// On the r3900, restriction (2) is not present, and restriction (3) is not
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// present for multiplication.
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//
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// For now this code is paranoid. Historically the simulator
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// enforced restrictions (2) and (3) for more ISAs and CPU types than
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// necessary. Unfortunately, at least some MIPS IV and later parts'
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// documentation describes them as having these hazards (e.g. vr5000),
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// so they can't be removed for at leats MIPS IV. MIPS V hasn't been
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// checked (since there are no known hardware implementations).
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//
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// Unfortunately, there seems to be some confusion about whether the last
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// two restrictions should apply to "MIPS IV" as well. One edition of
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// the MIPS IV ISA says they do, but references in later ISA documents
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// suggest they don't.
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//
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// In reality, some MIPS IV parts, such as the VR5000 and VR5400, do have
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// these restrictions, while others, like the VR5500, don't. To accomodate
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// such differences, the MIPS IV and MIPS V version of these helper functions
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// use auxillary routines to determine whether the restriction applies.
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// check_mf_cycles:
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//
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@@ -274,8 +276,6 @@
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*mipsI:
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*mipsII:
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*mipsIII:
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*mipsIV:
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*mipsV:
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*vr4100:
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*vr5000:
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{
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@@ -286,6 +286,18 @@
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return ok;
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}
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:function:::int:check_mt_hilo:hilo_history *history
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*mipsIV:
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*mipsV:
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{
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signed64 time = sim_events_time (SD);
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int ok = (! MIPS_MACH_HAS_MT_HILO_HAZARD (SD)
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|| check_mf_cycles (SD_, history, time, "MT"));
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history->mt.timestamp = time;
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history->mt.cia = CIA;
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return ok;
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}
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:function:::int:check_mt_hilo:hilo_history *history
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*mips32:
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*mips64:
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@@ -350,8 +362,6 @@
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*mipsI:
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*mipsII:
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*mipsIII:
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*mipsIV:
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*mipsV:
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*vr4100:
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*vr5000:
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{
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@@ -365,6 +375,21 @@
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return ok;
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}
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:function:::int:check_mult_hilo:hilo_history *hi, hilo_history *lo
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*mipsIV:
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*mipsV:
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{
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signed64 time = sim_events_time (SD);
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int ok = (! MIPS_MACH_HAS_MULT_HILO_HAZARD (SD)
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|| (check_mf_cycles (SD_, hi, time, "OP")
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&& check_mf_cycles (SD_, lo, time, "OP")));
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hi->op.timestamp = time;
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lo->op.timestamp = time;
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hi->op.cia = CIA;
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lo->op.cia = CIA;
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return ok;
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}
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:function:::int:check_mult_hilo:hilo_history *hi, hilo_history *lo
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*mips32:
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*mips64:
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@@ -389,8 +414,6 @@
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*mipsI:
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*mipsII:
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*mipsIII:
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*mipsIV:
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*mipsV:
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*vr4100:
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*vr5000:
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*r3900:
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@@ -405,6 +428,21 @@
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return ok;
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}
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:function:::int:check_div_hilo:hilo_history *hi, hilo_history *lo
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*mipsIV:
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*mipsV:
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{
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signed64 time = sim_events_time (SD);
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int ok = (! MIPS_MACH_HAS_DIV_HILO_HAZARD (SD)
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|| (check_mf_cycles (SD_, hi, time, "OP")
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&& check_mf_cycles (SD_, lo, time, "OP")));
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hi->op.timestamp = time;
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lo->op.timestamp = time;
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hi->op.cia = CIA;
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lo->op.cia = CIA;
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return ok;
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}
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:function:::int:check_div_hilo:hilo_history *hi, hilo_history *lo
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*mips32:
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*mips64:
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@@ -953,6 +953,18 @@ extern int mips_mach_multi(SIM_DESC sd);
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#define MIPS_MACH(SD) MIPS_MACH_DEFAULT
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#endif
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/* Macros for determining whether a MIPS IV or MIPS V part is subject
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to the hi/lo restrictions described in mips.igen. */
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#define MIPS_MACH_HAS_MT_HILO_HAZARD(SD) \
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(MIPS_MACH (SD) != bfd_mach_mips5500)
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#define MIPS_MACH_HAS_MULT_HILO_HAZARD(SD) \
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(MIPS_MACH (SD) != bfd_mach_mips5500)
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#define MIPS_MACH_HAS_DIV_HILO_HAZARD(SD) \
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(MIPS_MACH (SD) != bfd_mach_mips5500)
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#if H_REVEALS_MODULE_P (SIM_MAIN_INLINE)
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#include "sim-main.c"
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#endif
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