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PR16995, m68k coldfire emac immediate to macsr incorrect disassembly

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Mode/reg bits for these insns are 000 Dy, 001 Ay, and 111 100 for the
move immediate.

	* m68k-opc.c (m68k_opcodes): Only accept 000 and 001 as mode
	for move reg to macsr/mask insns.
This commit is contained in:
Alan Modra
2022-11-24 17:24:02 +10:30
parent 0b7186b9e8
commit 0b075f1902
1 changed files with 2 additions and 2 deletions
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opcodes/m68k-opc.c
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@@ -1641,9 +1641,9 @@ const struct m68k_opcode m68k_opcodes[] =
{"movel", 6, one(0xa13c), one(0xf9ff), "#leF", mcfemac }, /* #,ACCx. */
{"movel", 2, one(0xab00), one(0xfbc0), "Rsg]", mcfemac }, /* Rx,ACCEXTx. */
{"movel", 6, one(0xab3c), one(0xfbff), "#lg]", mcfemac }, /* #,ACCEXTx. */
{"movel", 2, one(0xa900), one(0xffc0), "RsG-", mcfemac }, /* Rx,macsr. */
{"movel", 2, one(0xa900), one(0xfff0), "RsG-", mcfemac }, /* Rx,macsr. */
{"movel", 6, one(0xa93c), one(0xffff), "#lG-", mcfemac }, /* #,macsr. */
{"movel", 2, one(0xad00), one(0xffc0), "RsH-", mcfemac }, /* Rx,mask. */
{"movel", 2, one(0xad00), one(0xfff0), "RsH-", mcfemac }, /* Rx,mask. */
{"movel", 6, one(0xad3c), one(0xffff), "#lH-", mcfemac }, /* #,mask. */
{"move", 2, one(0030000), one(0170000), "*w%d", m68000up },