4846 Commits

Author SHA1 Message Date
Gerwin Klein
22f816a6de Restyle x86/config.cmake for new cmake-format
Signed-off-by: Gerwin Klein <gerwin.klein@proofcraft.systems>
2025-07-24 16:44:08 +10:00
Indan Zupancic
605eed18fc FPU: Update CHANGES.md
Signed-off-by: Indan Zupancic <indan@nul.nu>
2025-07-24 16:44:08 +10:00
Indan Zupancic
180eb4db78 Aarch32, FPU: Remove FPEXC DEX and EX checks
According to Arm documentation, the exception-handling routine
needs to zero the following bits in FPEXC:

DEX, IDF, IXF, UFF, OFF, DZF and IOF

In seL4, the user space fault handler should do this, as the kernel
doesn't know when user space is done handling the FPU trap.

In case of virtualisation, the guest kernel should clear these bits.

Now that the seL4 kernel doesn't handle FPU traps itself any more,
user space can handle asynchronous traps if it wants to.

Signed-off-by: Indan Zupancic <indan@nul.nu>
2025-07-24 16:44:08 +10:00
Indan Zupancic
77f5fab0a0 Aarch32, FPU: Init fpexc with FPU enabled
On 32-bit ARM the fpexc system register is set by loadFpuState,
which includes the FPU enable/disable bit FPEXC_EN_BIT. This
register is part of the usercontext and needs to be initialised
correctly, otherwise the FPU will be disabled by loadFpuState.

Before, this bug was hidden because the FPU was enabled lazily
after a trap. This bug just caused one extra FPU trap at first
FPU use for each task: The first handleFPUFault would fail to
enable the FPU, causing another FPU trap when user space gets
restarted.

On the second FPU fault, switchLocalFpuOwner calls enableFpu first
and then calls saveFpuState because ksActiveFPUState is set to the
current task's FPU state. Then it gets saved with FPEXC_EN_BIT set
and the task can continue with the FPU actually enabled.

This also means that with the old code, the initial FPEXC state
of each task was equal to the previous active FPU task's.

Signed-off-by: Indan Zupancic <indan@nul.nu>
2025-07-24 16:44:08 +10:00
Corey Lewis
504f1ccf00 FPU: ease verification
Signed-off-by: Corey Lewis <corey.lewis@proofcraft.systems>
2025-07-24 16:44:08 +10:00
Indan Zupancic
ed33077f54 x86: Fix Style Errors
Signed-off-by: Indan Zupancic <indan@nul.nu>
2025-07-24 16:44:08 +10:00
Indan Zupancic
4031b9db83 ARM64: Always declare disable FPU functions
disableFpu() is always called at boot and calls one of those.

Signed-off-by: Indan Zupancic <indan@nul.nu>
2025-07-24 16:44:08 +10:00
Indan Zupancic
88c25fe7fc x86, FPU: Handle obscure corner cases
Also release FPU when dissociating a vcpu, otherwise ksCurFPUOwner
may be wrong.

fpuRelease() sets ksCurFPUOwner to NULL, if this happens before
we return to the host, it may end up with the FPU disabled and no
FPU state loaded. Instead of hunting down and handling all obscure
corner cases where this might happen (dissociating vcpus, cross-core
operations), just check for this in vcpu_fpu_to_host().

Signed-off-by: Indan Zupancic <indan@nul.nu>
2025-07-24 16:44:08 +10:00
Indan Zupancic
8502701926 FPU: Rename fpuThreadDelete to fpuRelease
It's not only used when deleting a thread any more.

Swapping fpuRelease and dissociateVCPUTCB makes no practical
difference as they are independent, but it simplifies
verification slightly.

Signed-off-by: Indan Zupancic <indan@nul.nu>
2025-07-24 16:44:08 +10:00
Indan Zupancic
c4501d5ed4 FPU: Do lazyFPURestore in switchToThread
To ease verification.

Fairly trivial change, except for x86, of course.

Signed-off-by: Indan Zupancic <indan@nul.nu>
2025-07-24 16:44:08 +10:00
Indan Zupancic
134ab60ae0 FPU: Remove Unused isFpuEnable
Unused on ARM, on RISC-V it is actually the final decision and not
a cache.

Signed-off-by: Indan Zupancic <indan@nul.nu>
2025-07-24 16:44:08 +10:00
Indan Zupancic
a96982e576 x86, FPU: Fix XSAVES
Add config choice and change the default from XSAVEOPT to XSAVE.

The first config choice is used as the default option. Only XSAVE
is guaranteed to always work, the others require newer CPUs.

Get rid of dubious FPU state headers, we don't need them:
- XCOMP_BV_COMPACTED_FORMAT is set by xsavec or xsaves.
- We can init MXCSR with the ldmxcsr instruction.

Only system state should be configured in IA32_XSS_MSR,
setting FPU user state bits causes an exception.

All memory should be zeroed already, no need to do it again.

See also issue #179.

Signed-off-by: Indan Zupancic <indan@nul.nu>
2025-07-24 16:44:08 +10:00
Indan Zupancic
1bd0e3b788 FPU: ksCurFPUOwner instead of ksActiveFPUState
Trivial change, except for x86 virtualisation and bootup.

Normally the seL4_TCBFlag_fpuDisabled flag is used to decide whether
to enable or disable the FPU. However, with x86 virtualisation there
is only one TCB. Use the task flag for the host and always enable FPU
for the guest.

When either the host or the guest's FPU is loaded, ksCurFPUOwner will
point to our TCB. saveFpuState and loadFpuState check fpu_active and
do the right thing depending on the current FPU user. To make this
work it was necessary to pass tcb_t to saveFpuState and loadFpuState.
Use the idle thread to store the initial FPU state. x86KSnullFpuState
is kept to simplify verification.

However, when Arch_initFpu is called, the idle thread hasn't been
created yet, so move the initialisation to after create_idle_thread,
but before create_initial_thread, as that leads to Arch_initFpuContext
using x86KSnullFpuState.

Also initialise VCPU FPU registers correctly for x86, otherwise the
initial state is wrong and can't be loaded when XSAVES is enabled.

Signed-off-by: Indan Zupancic <indan@nul.nu>
2025-07-24 16:44:08 +10:00
Indan Zupancic
e0a50c8205 x86, HYP: Remove Lazy VCPU FPU Switching
On x86 both the VM monitor as the VM guest have their own FPU state.
The FPU of the monitor is controlled with seL4_TCBFlag_fpuDisabled
TCB flag. For the guest running on the VCPU the FPU will always be
enabled.

Signed-off-by: Indan Zupancic <indan@nul.nu>
2025-07-24 16:44:08 +10:00
Indan Zupancic
5035def0b9 FPU: Save and restore FPU state based on TCB flag
Remove fault-based FPU state saving and loading.

Signed-off-by: Indan Zupancic <indan@nul.nu>
Signed-off-by: Gerwin Klein <gerwin.klein@proofcraft.systems>
2025-07-24 16:44:08 +10:00
Indan Zupancic
1415cac443 Add seL4_TCB_SetFlags Syscall
Add flags to tcb_t and the seL4_TCBFlag_fpuDisabled flag.

Enums are signed, make TCB flags word_t to make it unsigned.

Signed-off-by: Indan Zupancic <indan@nul.nu>
Signed-off-by: Corey Lewis <corey.lewis@proofcraft.systems>
2025-07-24 16:44:08 +10:00
Indan Zupancic
8f8776a541 Domain: Split off invokeDomainSetSet
Retain the ridiculous name to make clear which invocation is being
handled.

Rename tptr to tcb for consistency within the file.

We have a dom_t type, use it as early as possible.

Signed-off-by: Indan Zupancic <indan@nul.nu>
2025-07-24 16:44:08 +10:00
Indan Zupancic
35ec2554b9 Domain: Save FPU state when changing domain
Co-authored-by: Corey Lewis <corlewis@gmail.com>
Signed-off-by: Indan Zupancic <indan@nul.nu>
2025-07-24 16:44:08 +10:00
Indan Zupancic
f1517d51d1 Domain: Avoid touching cross-domain FPU state
Save current FPU state on domain switch.

Signed-off-by: Indan Zupancic <indan@nul.nu>
2025-07-24 16:44:08 +10:00
Indan Zupancic
e00f2e2148 x86, HYP: Cleanup VCPU FPU state
Otherwise ksActiveFPUState may point to freed memory after a vcpu
with active FPU state gets deleted.

Signed-off-by: Indan Zupancic <indan@nul.nu>
2025-07-24 16:44:08 +10:00
Indan Zupancic
296638287a ARM: Move debug state to the end of user_context
Signed-off-by: Indan Zupancic <indan@nul.nu>
2025-07-24 16:44:08 +10:00
Indan Zupancic
46adf99242 Aarch64: Remove incorrect comment
It was blindly copied from Aarch32 and has never been correct.

Signed-off-by: Indan Zupancic <indan@nul.nu>
2025-07-24 16:44:08 +10:00
Indan Zupancic
35a7fecbff Aarch64: Align FPU vregs
Aligning saves one cycle per LDP/STP instruction.

Signed-off-by: Indan Zupancic <indan@nul.nu>
2025-07-24 16:44:08 +10:00
julia
db233b156d config.cmake: apply cmake-format style changes
Signed-off-by: julia <git.ts@trainwit.ch>
2025-07-23 16:46:36 +10:00
julia
b153154382 cmake: remove reference to old BI_CAP_DYN_START
This was removed in 2016 289bf92bf0.
Additionally, 5fac9e8198 removed the
section of the comment regarding having enough room for all the
untyped caps; because otherwise "enough space for 12 caps" is
somewhat uninteresting (most of the cspace is taken up by untypeds).

Signed-off-by: julia <git.ts@trainwit.ch>
2025-07-23 16:46:36 +10:00
Gerwin Klein
946a412727 CHANGES: update releases link
Signed-off-by: Gerwin Klein <gerwin.klein@proofcraft.systems>
2025-07-23 10:18:04 +10:00
Gerwin Klein
de5b553c7a README: update links for new docsite structure
Signed-off-by: Gerwin Klein <gerwin.klein@proofcraft.systems>
2025-07-23 10:18:04 +10:00
Gerwin Klein
c9d81228bd python-deps: bump cmake-format and autopep8
As decided at the most recent TSC meeting, bump cmake format to the
latest version. This will change/break style in many of the existing
cmake files, but pinning pyyaml to < 6 is not a long-term option.

Also bump patch version of autopep8, which should not lead to style
changes.

Bump overall sel4-deps version because the cmake-format change is
incompatible. Version 0.6.0 was not published because of the pyyaml
pinning/downgrade.

Signed-off-by: Gerwin Klein <gerwin.klein@proofcraft.systems>
2025-07-22 12:42:33 +01:00
June Andronick
acbe30b507 change link to Resources ot setup page
Signed-off-by: June Andronick <june.andronick@proofcraft.systems>
2025-07-15 09:07:29 +10:00
Gerwin Klein
f44f103c26 parse_doxygen_xml: non-breaking space for types
Use non-breaking space for types in markdown tables to avoid line breaks

Signed-off-by: Gerwin Klein <gerwin.klein@proofcraft.systems>
2025-07-15 08:20:45 +10:00
Gerwin Klein
d815b87ce5 parse_doxygen_xml: minor typos and python lints
Signed-off-by: Gerwin Klein <gerwin.klein@proofcraft.systems>
2025-07-15 08:20:45 +10:00
Gerwin Klein
dc66e46a62 parse_doxygen_xml: properly escape string literals
More recent Python versions complain, and they are not wrong.

Signed-off-by: Gerwin Klein <gerwin.klein@proofcraft.systems>
2025-07-15 08:20:45 +10:00
Gerwin Klein
c8ee042688 manual/README.md: include API doc generation
Migrate documentation of the API docs generation process here from the
docsite where it is too much out of view. Here it is closer to where it
is needed an more likely to get updated when things change.

Compared to the docsite version, this has applied:

- standard wrap column
- markdown lints
- adjusted headings
- `object-api-sel4-arch.xml` etc renames
- include RISC-V in structure

Signed-off-by: Gerwin Klein <gerwin.klein@proofcraft.systems>
2025-07-08 08:56:41 +10:00
Gerwin Klein
eb147cf006 bitfield_gen: remove manual table of contents
Remove manual table of contents for rendering on the docsite, which will
provide an automatic TOC.

Signed-off-by: Gerwin Klein <gerwin.klein@proofcraft.systems>
2025-07-07 11:11:53 +01:00
Gerwin Klein
606a1ea1c3 am335x,omap3,bcm2836: SGI unsupported
SGI is currently only supported on GIC platforms.

Signed-off-by: Gerwin Klein <gerwin.klein@proofcraft.systems>
2025-07-07 08:50:47 +10:00
Gerwin Klein
ae75fc3566 gen_invocations: handle undefined values
When evaluating XML condition expressions, properly treat undefined
values as undefined, not as False. Otherwise, the negation of an
undefined value may make an entire expression true and incorrectly
label some methods as MCS methods.

Signed-off-by: Gerwin Klein <gerwin.klein@proofcraft.systems>
2025-07-07 08:50:47 +10:00
Gerwin Klein
538cdfd362 arm: verification tweaks for SGI API
- introduce arch interface for IRQControlCap dependencies as well as for
  isMDBParentOf (Arch_isIRQControlDescendant, Arch_isMDBParentOf). This
  mirrors the corresponding interface in the proofs and Haskell and
  avoids #ifdef proliferation in generic code.
- Arch_isIRQControlDescendant is currently only used for SGISignalCaps
- Arch_isMDBParentOf is used for SGISignalCaps and SMCCaps
- fix argument checking in Arch_decodeIRQControlInvocation (+ style
  tweak)
- Arch_sameObjectAs must return false for SGISignalCaps to align with
  finality definition of caps, i.e. SGISignalCaps are always final. This
  has no behaviour change, because finality doesn't matter for behaviour
  for SGISignalCaps, but we require for the proofs that the concept of
  finality aligns with the spec.
- simplify checks for IRQControlCap in sameObjectAs: sameObjectAs can
  never be true for IRQControlCap.

Signed-off-by: Gerwin Klein <gerwin.klein@proofcraft.systems>
2025-07-07 08:50:47 +10:00
Kent McLeod
34725d060b arm: Add new APIs for generating SGIs
Allow SGIs to be generated from non-SMP kernels.

Signed-off-by: Kent McLeod <kent@kry10.com>
Signed-off-by: Gerwin Klein <gerwin.klein@proofcraft.systems>
2025-07-07 08:50:47 +10:00
Indan Zupancic
bcf5ab7924 ARM, GICv3: Fix GICD_CTLR_ARE_NS
See issue #1489.

Signed-off-by: Indan Zupancic <indan@nul.nu>
2025-07-03 13:16:35 +01:00
Krishnan Winter
6dbe58ef0c Fix VGIC and VPPI maintenance handling
Fix a bug in VGIC Maintenance/VPPI logic that allowed a thread to be
simultaneously BlockedOnReply and in the release queue.

Co-authored-by: Alwin Joshy <joshyalwin@gmail.com>
Signed-off-by: Krishnan Winter <krishnanwinter1@gmail.com>
2025-06-24 10:26:04 +01:00
Gerwin Klein
dec87e641a github: main l4v now on Isabelle2025
set ts-2025 for master branch l4v and leave on ts-2024 for MCS until MCS
is updated to Isabelle2025 as well.

Signed-off-by: Gerwin Klein <gerwin.klein@proofcraft.systems>
2025-06-13 11:29:05 +01:00
Michael McInerney
2417e0fc69 mcs: refactor doReplyTransfer and setMRs_fault
To ease verification.

Signed-off-by: Michael McInerney <michael.mcinerney@proofcraft.systems>
2025-06-13 15:01:14 +10:00
julia
120951221c cleanup: use rootSlot to give a name to excapref0
Non-functional change. This will probably affect verification,
so definitely not expecting this to be merged anytime soon.

But it was very weird we had this rootSlot argument mark as UNUSED,
and it took me a bit to realise exactly what excaprefs[0] was
supposed to be.

Signed-off-by: julia <git.ts@trainwit.ch>
2025-06-10 18:39:47 +10:00
Gerwin Klein
ab5192f81a github: point proof tests to Isabelle ts-2024
We're currently using AWS Arm VMs, and vanilla Isabelle2024 ships a Z3
version that does not work on Arm. Using the ts-2024 branch fixes this
until we have upgraded everything to Isabelle2025.

Signed-off-by: Gerwin Klein <gerwin.klein@proofcraft.systems>
2025-06-07 10:55:12 +02:00
Michael McInerney
ad32c2769f mcs: fix error handling for SetTimeoutEndpoint
This fixes the error message in decodeSetTimeoutEndpoint
and correctly updates current_syscall_error.

Signed-off-by: Michael McInerney <michael.mcinerney@proofcraft.systems>
2025-06-04 17:58:16 +02:00
Alwin Joshy
4ec62c89d5 TCB_SetSchedParams: Simplify bind/unbind check
We no longer need to check this as the previous commit changed
decodeSetSchedParams to only pass the thread_control_sched_update_sc
flag if these conditions are true.

Signed-off-by: Alwin Joshy <joshyalwin@gmail.com>
2025-06-04 17:34:22 +02:00
Alwin Joshy
3108ea86d1 TCB_SetSchedParams: Change to match API reference
The implementation of TCB_SetSchedParams did not follow the API
reference, as it would fail if:

a. The TCB already had a scheduling context, even if this was the same
   as the one being passed in.
b. The scheduling context was bound to a TCB, even if this was the TCB
   that was invoked.

Signed-off-by: Alwin Joshy <joshyalwin@gmail.com>
2025-06-04 17:34:22 +02:00
Gerwin Klein
2ad02a0076 remove unnecessary cast
prio_t is defined as word_t which is unsigned long on all platforms.

Signed-off-by: Gerwin Klein <gerwin.klein@proofcraft.systems>
2025-06-04 15:54:45 +02:00
Gerwin Klein
90dafb2e71 yieldTo: respect kernel reply protocol
Before:

- invokeSchedContext_Consumed and invokeSchedContext_YieldTo clobber
  the message info field in the reply from kernel, which results in a
  length 0 message.

- invokeSchedContext_Consumed and invokeSchedContext_YieldTo may crash
  the kernel for read-only IPC buffers

- invokeSchedContext_Consumed and invokeSchedContext_YieldTo generate
  a reply from kernel for syscalls that should not generate replies

- completeYieldTo does not set the badge register, which will contain
  whatever that previous syscall returned and not correctly indicate
  success/failure.

- completeYieldTo sets registers of the current thread, combined with
  IPC buffer message registers of potentially another thread.

Instead:

- pass the thread to setConsumed instead of the IPC buffer, so we can
  write to the correct registers

- look up the IPC buffer again and check for write authority

- follow the kernel reply protocol, which includes only generating a
  message for `call`. This means, we need to pass the flag through from
  higher-level decode functions.

- set thread state to Running if a reply message from the kernel was
  created, leave on Restart for default empty success message.

- set the badge register

Signed-off-by: Gerwin Klein <gerwin.klein@proofcraft.systems>
2025-06-04 15:54:45 +02:00
Ivan-Velickovic
b7d67a9389 Detect 'aarch64-elf-' toolchain
Already registered for RISC-V so makes sense to do the same for
ARM.

Signed-off-by: Ivan-Velickovic <i.velickovic@unsw.edu.au>
2025-05-26 06:01:48 +02:00