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arm: add vcpu save/restore reg range constants

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This introduces two new constants to the vcpu reg enum, with the goal of
unifying reg range saves/restores and making explicit which registers
are affected.

Signed-off-by: Ryan Barry <ryan.barry@proofcraft.systems>
This commit is contained in:
Ryan Barry
2025-03-12 15:49:26 +11:00
committed by Gerwin Klein
parent 8e18a0b558
commit f02bc94db8
5 changed files with 9 additions and 9 deletions
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2
include/arch/arm/armv/armv7-a/armv/vcpu.h
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@@ -676,7 +676,7 @@ static inline void armv_vcpu_boot_init(void)
static inline void armv_vcpu_save(vcpu_t *vcpu, bool_t active)
{
/* save registers */
vcpu_save_reg_range(vcpu, seL4_VCPUReg_ACTLR, seL4_VCPUReg_SPSRfiq);
vcpu_save_reg_range(vcpu, seL4_VCPURegSaveRange_start, seL4_VCPURegSaveRange_end);
#ifdef ARM_HYP_CP14_SAVE_AND_RESTORE_VCPU_THREADS
/* This is done when we are asked to save and restore the CP14 debug context

2
include/arch/arm/armv/armv8-a/64/armv/vcpu.h
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@@ -636,7 +636,7 @@ static inline void armv_vcpu_save(vcpu_t *vcpu, bool_t active)
if (active) {
vcpu_save_reg(vcpu, seL4_VCPUReg_CPACR);
}
vcpu_save_reg_range(vcpu, seL4_VCPUReg_TTBR0, seL4_VCPUReg_SPSR_EL1);
vcpu_save_reg_range(vcpu, seL4_VCPURegSaveRange_start, seL4_VCPURegSaveRange_end);
#ifdef ARM_HYP_CP14_SAVE_AND_RESTORE_VCPU_THREADS
/* This is done when we are asked to save and restore the CP14 debug context

4
libsel4/sel4_arch_include/aarch32/sel4/sel4_arch/constants.h
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@@ -73,7 +73,8 @@ typedef enum {
typedef enum {
seL4_VCPUReg_SCTLR = 0,
seL4_VCPUReg_ACTLR,
seL4_VCPURegSaveRange_start, /* begin vcpu save/restore reg range */
seL4_VCPUReg_ACTLR = seL4_VCPURegSaveRange_start,
seL4_VCPUReg_TTBCR,
seL4_VCPUReg_TTBR0,
seL4_VCPUReg_TTBR1,
@@ -110,6 +111,7 @@ typedef enum {
seL4_VCPUReg_SPSRund,
seL4_VCPUReg_SPSRirq,
seL4_VCPUReg_SPSRfiq,
seL4_VCPURegSaveRange_end = seL4_VCPUReg_SPSRfiq, /* end vcpu save/restore reg range */
seL4_VCPUReg_CNTV_CTL,
seL4_VCPUReg_CNTV_CVALhigh,
seL4_VCPUReg_CNTV_CVALlow,

4
libsel4/sel4_arch_include/aarch64/sel4/sel4_arch/constants.h
View File

@@ -75,7 +75,8 @@ typedef enum {
/* System control registers EL1 */
seL4_VCPUReg_SCTLR = 0,
seL4_VCPUReg_CPACR,
seL4_VCPUReg_TTBR0,
seL4_VCPURegSaveRange_start, /* begin vcpu save/restore reg range */
seL4_VCPUReg_TTBR0 = seL4_VCPURegSaveRange_start,
seL4_VCPUReg_TTBR1,
seL4_VCPUReg_TCR,
seL4_VCPUReg_MAIR,
@@ -101,6 +102,7 @@ typedef enum {
seL4_VCPUReg_SP_EL1,
seL4_VCPUReg_ELR_EL1,
seL4_VCPUReg_SPSR_EL1, // 32-bit
seL4_VCPURegSaveRange_end = seL4_VCPUReg_SPSR_EL1, /* end vcpu save/restore reg range */
/* generic timer registers, to be completed */
seL4_VCPUReg_CNTV_CTL,

6
src/arch/arm/object/vcpu.c
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@@ -99,11 +99,7 @@ void vcpu_restore(vcpu_t *vcpu)
}
/* restore registers */
#ifdef CONFIG_ARCH_AARCH64
vcpu_restore_reg_range(vcpu, seL4_VCPUReg_TTBR0, seL4_VCPUReg_SPSR_EL1);
#else
vcpu_restore_reg_range(vcpu, seL4_VCPUReg_ACTLR, seL4_VCPUReg_SPSRfiq);
#endif
vcpu_restore_reg_range(vcpu, seL4_VCPURegSaveRange_start, seL4_VCPURegSaveRange_end);
vcpu_enable(vcpu);
}