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allwinnerA20: switch to the ARM generic timer

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The memory mapping for the timer only uses 1K on AllwinnerA20, but
the minimum device mapping is 4K in seL4. Other devices within this
4K page (CCU and PIO) cannot be accessed in the userland.
Replace the kernel timer with the ARM generic timer on AllwinnerA20,
and remove the implementation for AllwinnerA20 specific timer in the
kernel. So we should have user access to those devices now.

Signed-off-by: Luca (Wei) Chen <wei@cvluca.com>
This commit is contained in:
Luca (Wei) Chen
2021-10-02 23:15:23 +08:00
committed by Kent McLeod
parent f5c60239c1
commit e9bdd85e81
6 changed files with 2 additions and 83 deletions
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26
include/drivers/timer/allwinner.h
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@@ -1,26 +0,0 @@
/*
* Copyright 2020, Data61, CSIRO (ABN 41 687 119 230)
*
* SPDX-License-Identifier: GPL-2.0-only
*/
#pragma once
#define TMR0_IRQ_PEND_FLAG BIT(0)
struct timer {
uint32_t tmr_irq_en_reg; /* Timer IRQ Enable Register 0x00 */
uint32_t tmr_irq_sta_reg; /* Timer Status Register 0x04 */
uint32_t tmr_reserved01[2];
uint32_t tmr0_ctrl_reg; /* Timer 0 Control Register 0x10 */
uint32_t tmr0_intv_value_reg; /* Timer 0 Interval Value Register 0x14 */
uint32_t tmr0_cur_value_reg; /* Timer 0 Current Value Register 0x18 */
};
typedef volatile struct timer timer_t;
extern timer_t *timer;
static inline void resetTimer(void)
{
timer->tmr_irq_sta_reg = TMR0_IRQ_PEND_FLAG;
}

36
src/drivers/timer/allwinner-timer.c
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@@ -1,36 +0,0 @@
/*
* Copyright 2015, DornerWorks, Ltd.
*
* SPDX-License-Identifier: GPL-2.0-only
*/
#include <config.h>
#include <types.h>
#include <machine/io.h>
#include <kernel/vspace.h>
#include <arch/machine.h>
#include <arch/kernel/vspace.h>
#include <plat/machine.h>
#include <linker.h>
#include <plat/machine/hardware.h>
#define TIMER_CTL_EN_FLAG BIT(0)
#define TIMER_CTL_RELOAD_FLAG BIT(1)
#define TMR0_IRQ_EN_FLAG BIT(0)
timer_t *timer = (timer_t *) TIMER0_PPTR;
/* Configure gptimer11 as kernel preemption timer */
BOOT_CODE void initTimer(void)
{
/* Set the reload value */
timer->tmr0_intv_value_reg = TIMER_RELOAD;
/* Enables interrupt */
timer->tmr_irq_en_reg = TMR0_IRQ_EN_FLAG;
/* Set autoreload and start the timer */
timer->tmr0_ctrl_reg = TIMER_CTL_EN_FLAG | TIMER_CTL_RELOAD_FLAG;
}

5
src/drivers/timer/config.cmake
View File

@@ -51,11 +51,6 @@ register_driver(
PREFIX src/drivers/timer
CFILES "generic_timer.c"
)
register_driver(
compatibility_strings "allwinner,sun4i-a10-timer"
PREFIX src/drivers/timer
CFILES "allwinner-timer.c"
)
set(KernelArmHaveGenericTimer OFF)

2
src/plat/allwinnerA20/config.cmake
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@@ -25,7 +25,7 @@ if(KernelPlatformAllwinnerA20)
TIMER_FREQUENCY 24000000
MAX_IRQ 122
NUM_PPI 32
TIMER drivers/timer/allwinner.h
TIMER drivers/timer/arm_generic.h
INTERRUPT_CONTROLLER arch/machine/gic_v2.h
)
endif()

3
src/plat/allwinnerA20/overlay-allwinnerA20.dts
View File

@@ -12,7 +12,6 @@
seL4,kernel-devices =
"serial0",
&{/soc@1c00000/interrupt-controller@1c81000},
/* This platform doesn't use the arm generic timer for the kernel timer. */
&{/soc@1c00000/timer@1c20c00};
&{/timer};
};
};

13
tools/hardware.yml
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@@ -128,19 +128,6 @@ devices:
index: 3
undef_index: 2
INTERRUPT_VTIMER_EVENT: 2
# Allwinner A10 Timer (timer/allwinner,sun4i-timer.txt)
- compatible:
- allwinner,sun4i-a10-timer
regions:
- index: 0
kernel: TIMER0_PPTR
interrupts:
# A20 also has the ARM architected timer,
# but we want to use the allwinner timer
# for now at least.
KERNEL_TIMER_IRQ:
index: 0
priority: 1
# ARM per-core timer-watchdog (timer/arm,twd.txt)
- compatible:
- arm,cortex-a9-twd-timer