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manual: adjust AArch64 VSpace section for RFC-10

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Signed-off-by: Ivan-Velickovic <i.velickovic@unsw.edu.au>
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Ivan-Velickovic
2023-08-28 11:23:25 +10:00
committed by Indan Zupancic
parent 61a8ccef44
commit a9dae74c52
1 changed files with 9 additions and 13 deletions
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manual/parts/vspace.tex
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@@ -109,23 +109,19 @@ configurations.
\subsubsection{AArch64}
Depending on configuration, Arm AArch64 processors have page-table structures with 3 or 4 levels.
The VSpace object is therefore implemented either by the \obj{PageGlobalDirectory} object (4 level
configs) or the \obj{PageUpperDirectory} object (3 level configs). To help with writing code that is
generic in this distinction, \texttt{libsel4} provides the macro \texttt{seL4\_ARM\_VSpaceObject}
that expands to the correct corresponding object. All intermediate paging structures are indexed by
9 bits of the virtual address. Depending on configuration, the top-level object is indexed by either
9 or 10 bits. The macro \texttt{seL4\_VSpaceIndexBits} makes this value available under a generic
name. The table below shows the four-level configuration. On three-level configurations, the
invocations for \texttt{seL4\_ARM\_VSpaceObject} capabilities are instead available on
\obj{PageUpperDirectory} caps.
The VSpace object is \texttt{seL4\_ARM\_VSpaceObject}, which is a distinct object type used for the
top level page table. All intermediate paging structures are indexed by 9 bits of the virtual
address and are \obj{PageTable} objects. Depending on configuration, the top-level object is
indexed by either 9 or 10 bits. The macro \texttt{seL4\_VSpaceIndexBits} makes this value available
under a generic name. The table below shows the four-level configuration.
\begin{tabularx}{\textwidth}{Xlll} \toprule
\emph{Object} & \emph{Address Bits} & \emph{Level} & \emph{Methods} \\ \midrule
\texttt{PageGlobalDirectory}/\texttt{seL4\_ARM\_VSpaceObject}
\texttt{seL4\_ARM\_VSpaceObject}
& 39---47 & 0 & \autoref{group__aarch64__seL4__ARM__VSpace} \\
\texttt{PageUpperDirectory} & 30---38 & 1 & \autoref{group__aarch64__seL4__ARM__PageUpperDirectory} \\
\texttt{PageDirectory} & 21---29 & 2 & \autoref{group__aarch64__seL4__ARM__PageDirectory} \\
\texttt{PageTable} & 12---20 & 3 & \autoref{group__arm__seL4__ARM__PageTable} \\
\texttt{PageTable} & 30---38 & 1 & \autoref{group__arm__seL4__ARM__PageTable} \\
\texttt{PageTable} & 21---29 & 2 & \autoref{group__arm__seL4__ARM__PageTable} \\
\texttt{PageTable} & 12---20 & 3 & \autoref{group__arm__seL4__ARM__PageTable} \\
\bottomrule
\end{tabularx}