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rename KDEV_PPTR/PPTR_KDEV to KDEV_BASE

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This is the virtual address for the start of the kernel device mapping
region.
This commit is contained in:
Victor Phan
2019-11-05 19:42:29 +11:00
parent e5a986af0c
commit 66bc2b1724
13 changed files with 28 additions and 28 deletions
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2
include/arch/arm/arch/32/mode/hardware.h
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@@ -33,7 +33,7 @@
#else
#define PPTR_TOP 0xfff00000
#endif /* CONFIG_BENCHMARK_USE_KERNEL_LOG_BUFFER */
#define KDEV_PPTR 0xfff00000
#define KDEV_BASE 0xfff00000
#define PADDR_TOP (PPTR_TOP - BASE_OFFSET)
#define KERNEL_ELF_BASE kernelBase

4
include/arch/arm/arch/64/mode/hardware.h
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@@ -78,10 +78,10 @@
#ifdef CONFIG_ARM_HYPERVISOR_SUPPORT
#define PPTR_TOP 0xffffc0000000lu
#define KDEV_PPTR 0xffffffe00000lu
#define KDEV_BASE 0xffffffe00000lu
#else
#define PPTR_TOP 0xffffffffc0000000
#define KDEV_PPTR 0xffffffffffe00000lu
#define KDEV_BASE 0xffffffffffe00000lu
#endif
#define PADDR_TOP (PPTR_TOP - BASE_OFFSET)

2
include/arch/riscv/arch/32/mode/hardware.h
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@@ -33,7 +33,7 @@
#define KERNEL_BASE UL_CONST(0xFF800000)
#define KERNEL_ELF_BASE KERNEL_BASE
/* Start of kernel device mapping region in highest 4MiB of memory. */
#define KDEV_PPTR UL_CONST(0xFFC00000)
#define KDEV_BASE UL_CONST(0xFFC00000)
#ifndef __ASSEMBLER__

6
include/arch/riscv/arch/64/mode/hardware.h
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@@ -42,7 +42,7 @@
*
* +-----------------------------+ 2^64
* | Kernel Devices |
* -> +-------------------KDEV_PPTR-+ 2^64 - 1GiB
* -> +-------------------KDEV_BASE-+ 2^64 - 1GiB
* | | Kernel ELF |
* ----| +-------------KERNEL_ELF_BASE-+ --+ 2^64 - 2GiB + (PADDR_LOAD % 1GiB)
* | | | |
@@ -70,7 +70,7 @@
* | User | | | | |
* | | | | | |
* | | +------+ +-------------------------+ PADDR_HIGH_TOP =
* | | kernel | | Kernel ELF | (KDEV_PPTR - KERNEL_ELF_BASE + PADDR_LOAD)
* | | kernel | | Kernel ELF | (KDEV_BASE - KERNEL_ELF_BASE + PADDR_LOAD)
* | | addressable | +-------------------------+ PADDR_LOAD
* | | | | |
* | | | | |
@@ -98,7 +98,7 @@
#define KERNEL_BASE 0xFFFFFFFF80000000lu
#define KERNEL_ELF_BASE UL_CONST(0xFFFFFFFF84000000)
/* Start of kernel device mapping region in highest 1GiB of memory. */
#define KDEV_PPTR 0xFFFFFFFFC0000000lu
#define KDEV_BASE 0xFFFFFFFFC0000000lu
#else
#error Only PT_LEVELS == 3 is supported
#endif

4
include/arch/riscv/arch/machine/hardware.h
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@@ -38,9 +38,9 @@
/* The highest valid physical address that can be indexed in the kernel window */
#define PADDR_TOP (KERNEL_BASE - PPTR_BASE + PADDR_BASE)
/* A contiguous region of physical address space at PADDR_LOAD is mapped
* to KERNEL_ELF_BASE, and the size of this region is KDEV_PPTR-KERNEL_ELF_BASE.
* to KERNEL_ELF_BASE, and the size of this region is KDEV_BASE-KERNEL_ELF_BASE.
* PADDR_HIGH_TOP is the end of this physical address region. */
#define PADDR_HIGH_TOP (KDEV_PPTR - KERNEL_ELF_BASE + PADDR_LOAD)
#define PADDR_HIGH_TOP (KDEV_BASE - KERNEL_ELF_BASE + PADDR_LOAD)
/* Translates from a physical address and a value in the kernel image */
#define KERNEL_BASE_OFFSET (KERNEL_ELF_BASE - PADDR_LOAD)

2
include/plat/pc99/plat/32/plat_mode/machine/hardware.h
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@@ -43,7 +43,7 @@
/* This then marks the end of where physical memory gets mapped */
#define PPTR_TOP KS_LOG_PPTR
#define PPTR_KDEV 0xffff0000
#define KDEV_BASE 0xffff0000
#define BASE_OFFSET (PPTR_BASE - PADDR_BASE)
#define kernelBase PPTR_USER_TOP

4
include/plat/pc99/plat/64/plat_mode/machine/hardware.h
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@@ -36,14 +36,14 @@
* 1GB. This means they are precisely after the kernel binary
* region. This is 2^48 - 2^30
*/
#define PPTR_KDEV UL_CONST(0xffffffffc0000000)
#define KDEV_BASE UL_CONST(0xffffffffc0000000)
/* PADDR_TOP is the end of our larger kernel window, just before the
* kernel image itself */
#define PADDR_TOP (KERNEL_BASE - PPTR_BASE)
/* Define the top of our static 'kernel window', which is the top 1GiB of memory */
#define PADDR_HIGH_TOP (PPTR_KDEV - KERNEL_BASE)
#define PADDR_HIGH_TOP (KDEV_BASE - KERNEL_BASE)
/* Below the main kernel window we have any slots for the TLB bitmap */
#define TLBBITMAP_PML4_RESERVED (TLBBITMAP_ROOT_ENTRIES * BIT(PML4_INDEX_OFFSET))

2
include/plat/pc99/plat/machine/devices.h
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@@ -13,7 +13,7 @@
#include <config.h>
#define PPTR_APIC PPTR_KDEV
#define PPTR_APIC KDEV_BASE
#define PPTR_IOAPIC_START (PPTR_APIC + BIT(PAGE_BITS))
#define PPTR_DRHU_START (PPTR_IOAPIC_START + BIT(PAGE_BITS) * CONFIG_MAX_NUM_IOAPIC)

2
src/arch/riscv/machine/hardware.c
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@@ -65,7 +65,7 @@ BOOT_CODE void map_kernel_devices(void)
}
for (int i = 0; i < (sizeof(kernel_devices) / sizeof(kernel_frame_t)); i++) {
map_kernel_frame(kernel_devices[i].paddr, KDEV_PPTR,
map_kernel_frame(kernel_devices[i].paddr, KDEV_BASE,
VMKernelOnly);
if (!kernel_devices[i].userAvailable) {
p_region_t reg = {

4
src/arch/x86/32/kernel/vspace.c
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@@ -304,9 +304,9 @@ BOOT_CODE bool_t map_kernel_window(
ia32KSGlobalPT[idx] = pte;
idx++;
/* null mappings up to PPTR_KDEV */
/* null mappings up to KDEV_BASE */
while (idx < (PPTR_KDEV &MASK(LARGE_PAGE_BITS)) >> PAGE_BITS) {
while (idx < (KDEV_BASE &MASK(LARGE_PAGE_BITS)) >> PAGE_BITS) {
pte = pte_new(
0, /* page_base_address */
0, /* avl */

14
src/arch/x86/64/kernel/vspace.c
View File

@@ -64,9 +64,9 @@ BOOT_CODE bool_t map_kernel_window(
* the second last entry of the PDPT, is 1gb aligned and 1gb in size */
assert(GET_PML4_INDEX(KERNEL_BASE) == BIT(PML4_INDEX_BITS) - 1);
assert(GET_PDPT_INDEX(KERNEL_BASE) == BIT(PML4_INDEX_BITS) - 2);
assert(GET_PDPT_INDEX(PPTR_KDEV) == BIT(PML4_INDEX_BITS) - 1);
assert(GET_PDPT_INDEX(KDEV_BASE) == BIT(PML4_INDEX_BITS) - 1);
assert(IS_ALIGNED(KERNEL_BASE, seL4_HugePageBits));
assert(IS_ALIGNED(PPTR_KDEV, seL4_HugePageBits));
assert(IS_ALIGNED(KDEV_BASE, seL4_HugePageBits));
/* place the PDPT into the PML4 */
x64KSKernelPML4[GET_PML4_INDEX(PPTR_BASE)] = pml4e_new(
0, /* xd */
@@ -117,7 +117,7 @@ BOOT_CODE bool_t map_kernel_window(
}
/* put the PD into the PDPT */
x64KSKernelPDPT[GET_PDPT_INDEX(PPTR_KDEV)] = pdpte_pdpte_pd_new(
x64KSKernelPDPT[GET_PDPT_INDEX(KDEV_BASE)] = pdpte_pdpte_pd_new(
0, /* xd */
kpptr_to_paddr(x64KSKernelPD),
0, /* accessed */
@@ -148,9 +148,9 @@ BOOT_CODE bool_t map_kernel_window(
* the second last entry of the PDPT, is 1gb aligned and 1gb in size */
assert(GET_PML4_INDEX(KERNEL_BASE) == BIT(PML4_INDEX_BITS) - 1);
assert(GET_PDPT_INDEX(KERNEL_BASE) == BIT(PML4_INDEX_BITS) - 2);
assert(GET_PDPT_INDEX(PPTR_KDEV) == BIT(PML4_INDEX_BITS) - 1);
assert(GET_PDPT_INDEX(KDEV_BASE) == BIT(PML4_INDEX_BITS) - 1);
assert(IS_ALIGNED(KERNEL_BASE, seL4_HugePageBits));
assert(IS_ALIGNED(PPTR_KDEV, seL4_HugePageBits));
assert(IS_ALIGNED(KDEV_BASE, seL4_HugePageBits));
/* place the PDPT into the PML4 */
x64KSKernelPML4[GET_PML4_INDEX(PPTR_BASE)] = pml4e_new(
@@ -215,7 +215,7 @@ BOOT_CODE bool_t map_kernel_window(
}
/* put the PD into the PDPT */
x64KSKernelPDPT[GET_PDPT_INDEX(PPTR_KDEV)] = pdpte_pdpte_pd_new(
x64KSKernelPDPT[GET_PDPT_INDEX(KDEV_BASE)] = pdpte_pdpte_pd_new(
0, /* xd */
kpptr_to_paddr(&x64KSKernelPDs[BIT(PDPT_INDEX_BITS) - 1][0]),
0, /* accessed */
@@ -243,7 +243,7 @@ BOOT_CODE bool_t map_kernel_window(
/* use the last PD entry as the benchmark log storage.
* the actual backing physical memory will be filled
* later by using alloc_region */
ksLog = (ks_log_entry_t *)(PPTR_KDEV + 0x200000 * (BIT(PD_INDEX_BITS) - 1));
ksLog = (ks_log_entry_t *)(KDEV_BASE + 0x200000 * (BIT(PD_INDEX_BITS) - 1));
#endif
/* now map in the kernel devices */

2
src/arch/x86/kernel/vspace.c
View File

@@ -131,7 +131,7 @@ bool_t CONST isValidVTableRoot(cap_t cap)
BOOT_CODE bool_t map_kernel_window_devices(pte_t *pt, uint32_t num_ioapic, paddr_t *ioapic_paddrs, uint32_t num_drhu,
paddr_t *drhu_list)
{
word_t idx = (PPTR_KDEV & MASK(LARGE_PAGE_BITS)) >> PAGE_BITS;
word_t idx = (KDEV_BASE & MASK(LARGE_PAGE_BITS)) >> PAGE_BITS;
paddr_t phys;
pte_t pte;
unsigned int i;

8
tools/hardware/outputs/c_header.py
View File

@@ -38,7 +38,7 @@ HEADER_TEMPLATE = '''/*
#define __PLAT_DEVICES_GEN_H
#include <linker.h>
#ifndef KDEV_PPTR
#ifndef KDEV_BASE
#include <mode/hardware.h>
#endif
@@ -67,7 +67,7 @@ HEADER_TEMPLATE = '''/*
/* KERNEL DEVICES */
{% for (addr, macro) in sorted(kernel_macros.items()) %}
#define {{ macro }} (KDEV_PPTR + {{ "0x{:x}".format(addr) }})
#define {{ macro }} (KDEV_BASE + {{ "0x{:x}".format(addr) }})
{% endfor %}
#ifndef __ASSEMBLER__
@@ -86,7 +86,7 @@ static const kernel_frame_t BOOT_RODATA kernel_devices[] = {
{{ kernel_macros[map_addr] }},
{% else %}
/* contains {{ ', '.join(group.labels.keys()) }} */
KDEV_PPTR + {{ "0x{:x}".format(map_addr) }},
KDEV_BASE + {{ "0x{:x}".format(map_addr) }},
{% endif %}
{% if args.arch == 'arm' %}
true, /* armExecuteNever */
@@ -124,7 +124,7 @@ def get_kernel_devices(tree: fdt.FdtParser, rules: rule.HardwareYaml):
''' Given a device tree and a set of rules, returns a tuple (groups, offsets).
Groups is a list of 'KernelRegionGroups', each of which represents a single contiguous region of memory that is associated with a device.
Offsets is a dict of offset -> label, where label is the name given to the kernel for that address (e.g. SERIAL_PPTR) and offset is the offset from KDEV_PPTR at which it's mapped.'''
Offsets is a dict of offset -> label, where label is the name given to the kernel for that address (e.g. SERIAL_PPTR) and offset is the offset from KDEV_BASE at which it's mapped.'''
kernel_devices = tree.get_kernel_devices()
kernel_offset = 0