forked from Imagelibrary/seL4
trivial: update cmake style
Signed-off-by: Gerwin Klein <gerwin.klein@proofcraft.systems>
This commit is contained in:
Gerwin Klein
@@ -9,17 +9,59 @@
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include(${CMAKE_CURRENT_LIST_DIR}/../../tools/helpers.cmake)
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cmake_script_build_kernel(../..)
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set(KernelSel4Arch "aarch64" CACHE STRING "")
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set(KernelArmHypervisorSupport ON CACHE BOOL "")
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set(KernelVerificationBuild ON CACHE BOOL "")
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set(KernelMaxNumNodes "1" CACHE STRING "")
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set(KernelOptimisation "-O2" CACHE STRING "")
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set(KernelRetypeFanOutLimit "256" CACHE STRING "")
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set(KernelBenchmarks "none" CACHE STRING "")
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set(KernelDangerousCodeInjection OFF CACHE BOOL "")
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set(KernelFastpath ON CACHE BOOL "")
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set(KernelPrinting OFF CACHE BOOL "")
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set(KernelNumDomains 16 CACHE STRING "")
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set(KernelMaxNumBootinfoUntypedCaps 50 CACHE STRING "")
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set(KernelArmSMMU OFF CACHE BOOL "")
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set(KernelAllowSMCCalls ON CACHE BOOL "")
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set(KernelSel4Arch
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"aarch64"
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CACHE STRING ""
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)
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set(KernelArmHypervisorSupport
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ON
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CACHE BOOL ""
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)
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set(KernelVerificationBuild
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ON
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CACHE BOOL ""
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)
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set(KernelMaxNumNodes
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"1"
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CACHE STRING ""
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)
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set(KernelOptimisation
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"-O2"
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CACHE STRING ""
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)
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set(KernelRetypeFanOutLimit
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"256"
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CACHE STRING ""
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)
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set(KernelBenchmarks
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"none"
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CACHE STRING ""
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)
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set(KernelDangerousCodeInjection
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OFF
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CACHE BOOL ""
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)
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set(KernelFastpath
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ON
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CACHE BOOL ""
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)
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set(KernelPrinting
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OFF
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CACHE BOOL ""
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)
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set(KernelNumDomains
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16
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CACHE STRING ""
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)
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set(KernelMaxNumBootinfoUntypedCaps
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50
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CACHE STRING ""
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)
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set(KernelArmSMMU
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OFF
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CACHE BOOL ""
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)
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set(KernelAllowSMCCalls
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ON
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CACHE BOOL ""
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)
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@@ -7,7 +7,11 @@
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cmake_minimum_required(VERSION 3.16.0)
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if(KernelSel4ArchAarch32)
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set_property(TARGET kernel_config_target APPEND PROPERTY TOPLEVELTYPES pde_C)
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set_property(
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TARGET kernel_config_target
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APPEND
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PROPERTY TOPLEVELTYPES pde_C
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)
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endif()
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set(KernelArmPASizeBits40 OFF)
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@@ -65,7 +69,8 @@ config_option(
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DEPENDS "KernelArchARM;KernelDebugDisableL2Cache"
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)
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config_option(
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KernelDebugDisableBranchPrediction DEBUG_DISABLE_BRANCH_PREDICTION
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KernelDebugDisableBranchPrediction
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DEBUG_DISABLE_BRANCH_PREDICTION
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"Do not enable branch prediction (also called program flow control) on startup. \
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This makes execution time more deterministic at the expense of dramatically decreasing \
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performance. Primary use is for debugging."
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@@ -98,7 +103,8 @@ else()
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endif()
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config_option(
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KernelArmHypEnableVCPUCP14SaveAndRestore ARM_HYP_ENABLE_VCPU_CP14_SAVE_AND_RESTORE
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KernelArmHypEnableVCPUCP14SaveAndRestore
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ARM_HYP_ENABLE_VCPU_CP14_SAVE_AND_RESTORE
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"Trap, but don't save/restore VCPUs' CP14 accesses \
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This allows us to turn off the save and restore of VCPU threads' CP14 \
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context for performance (or other) reasons, we can just turn them off \
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@@ -110,7 +116,8 @@ config_option(
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)
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config_option(
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KernelArmErrata430973 ARM_ERRATA_430973
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KernelArmErrata430973
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ARM_ERRATA_430973
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"Enable workaround for 430973 Cortex-A8 (r1p0..r1p2) erratum \
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Enables a workaround for the 430973 Cortex-A8 (r1p0..r1p2) erratum. Error occurs \
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if code containing ARM/Thumb interworking branch is replaced by different code \
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@@ -120,7 +127,8 @@ config_option(
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)
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config_option(
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KernelArmErrata773022 ARM_ERRATA_773022
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KernelArmErrata773022
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ARM_ERRATA_773022
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"Enable workaround for 773022 Cortex-A15 (r0p0..r0p4) erratum \
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Enables a workaround for the 773022 Cortex-A15 (r0p0..r0p4) erratum. Error occurs \
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on rare sequences of instructions and results in the loop buffer delivering \
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@@ -143,7 +151,10 @@ config_option(
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DEPENDS "KernelPlatformTK1"
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)
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config_option(KernelArmEnableA9Prefetcher ENABLE_A9_PREFETCHER "Enable Cortex-A9 prefetcher \
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config_option(
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KernelArmEnableA9Prefetcher
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ENABLE_A9_PREFETCHER
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"Enable Cortex-A9 prefetcher \
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Cortex-A9 has an L1 and L2 prefetcher. By default \
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they are disabled. This config options allows \
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them to be turned on. Enabling the prefetchers \
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@@ -151,10 +162,15 @@ config_option(KernelArmEnableA9Prefetcher ENABLE_A9_PREFETCHER "Enable Cortex-A9
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documents indicate that as of r4p1 version of \
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Cortex-A9 the bits used to enable the prefetchers \
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no longer exist, it is not clear if this is just \
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a document error or not." DEFAULT OFF DEPENDS "KernelArmCortexA9")
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a document error or not."
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DEFAULT OFF
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DEPENDS "KernelArmCortexA9"
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)
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config_option(
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KernelArmExportPMUUser EXPORT_PMU_USER "PL0 access to PMU. \
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KernelArmExportPMUUser
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EXPORT_PMU_USER
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"PL0 access to PMU. \
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Grant user access to Performance Monitoring Unit. \
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WARNING: While useful for evaluating performance, \
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this option opens timing and covert channels."
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@@ -169,16 +185,24 @@ config_option(
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DEFAULT OFF
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DEPENDS "KernelArchArmV7a OR KernelArchArmV8a;KernelArmHypervisorSupport"
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)
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config_option(KernelTk1SMMUInterruptEnable SMMU_INTERRUPT_ENABLE "Enable SMMU interrupts. \
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config_option(
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KernelTk1SMMUInterruptEnable
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SMMU_INTERRUPT_ENABLE
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"Enable SMMU interrupts. \
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SMMU interrupts currently only serve a debug purpose as \
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they are not forwarded to user level. Enabling this will \
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cause some fault types to print out a message in the kernel. \
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WARNING: Printing fault information is slow and rapid faults \
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can result in all time spent in the kernel printing fault \
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messages" DEFAULT "${KernelDebugBuild}" DEPENDS "KernelTk1SMMU" DEFAULT_DISABLED OFF)
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messages"
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DEFAULT "${KernelDebugBuild}"
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DEPENDS "KernelTk1SMMU"
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DEFAULT_DISABLED OFF
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)
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config_option(
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KernelAArch32FPUEnableContextSwitch AARCH32_FPU_ENABLE_CONTEXT_SWITCH
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KernelAArch32FPUEnableContextSwitch
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AARCH32_FPU_ENABLE_CONTEXT_SWITCH
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"Enable hardware VFP and SIMD context switch \
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This enables the VFP and SIMD context switch on platforms with \
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hardware support, allowing the user to execute hardware VFP and SIMD \
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@@ -190,7 +214,8 @@ config_option(
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)
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config_option(
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KernelAArch64UserCacheEnable AARCH64_USER_CACHE_ENABLE
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KernelAArch64UserCacheEnable
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AARCH64_USER_CACHE_ENABLE
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"Enable any attempt to execute a DC CVAU, DC CIVAC, DC CVAC, or IC IVAU \
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instruction or access to CTR_EL0 at EL0 using AArch64. \
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When disabled, these operations will be trapped."
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@@ -199,7 +224,8 @@ config_option(
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)
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config_option(
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KernelAArch64SErrorIgnore AARCH64_SERROR_IGNORE
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KernelAArch64SErrorIgnore
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AARCH64_SERROR_IGNORE
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"By default any SError interrupt will halt the kernel. SErrors may \
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be caused by e.g. writes to read-only device registers or ECC errors. \
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When this option is enabled SErrors will be ignored."
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@@ -209,7 +235,9 @@ config_option(
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mark_as_advanced(KernelAArch64SErrorIgnore)
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config_option(
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KernelAllowSMCCalls ALLOW_SMC_CALLS "Allow components to make SMC calls. \
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KernelAllowSMCCalls
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ALLOW_SMC_CALLS
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"Allow components to make SMC calls. \
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WARNING: Allowing SMC calls causes a couple of issues. Since seL4 cannot \
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pre-empt the secure monitor, the WCET is no longer guaranteed. Also, since the \
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secure monitor is a higher privilege level and can make any change in the \
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@@ -237,15 +265,14 @@ if(KernelAArch32FPUEnableContextSwitch OR KernelSel4ArchAarch64)
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set(KernelHaveFPU ON)
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endif()
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if(
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KernelArmCortexA7
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OR KernelArmCortexA8
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OR KernelArmCortexA15
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OR KernelArmCortexA35
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OR KernelArmCortexA53
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OR KernelArmCortexA55
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OR KernelArmCortexA57
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OR KernelArmCortexA72
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if(KernelArmCortexA7
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OR KernelArmCortexA8
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OR KernelArmCortexA15
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OR KernelArmCortexA35
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OR KernelArmCortexA53
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OR KernelArmCortexA55
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OR KernelArmCortexA57
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OR KernelArmCortexA72
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)
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# According to https://developer.arm.com/documentation/100095/0001/functional-description/about-the-cortex-a72-processor-functions/components-of-the-processor
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# the L1 instruction on the Cortex-A72 cache has a 64-byte cache line.
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@@ -264,24 +291,23 @@ endif()
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add_sources(
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DEP "KernelArchARM"
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PREFIX src/arch/arm
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CFILES
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c_traps.c
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api/faults.c
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benchmark/benchmark.c
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kernel/boot.c
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kernel/thread.c
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machine/cache.c
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machine/errata.c
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machine/debug.c
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machine/hardware.c
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machine/io.c
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object/interrupt.c
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object/tcb.c
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object/iospace.c
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object/vcpu.c
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object/smmu.c
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object/smc.c
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smp/ipi.c
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CFILES c_traps.c
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api/faults.c
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benchmark/benchmark.c
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kernel/boot.c
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kernel/thread.c
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machine/cache.c
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machine/errata.c
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machine/debug.c
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machine/hardware.c
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machine/io.c
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object/interrupt.c
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object/tcb.c
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object/iospace.c
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object/vcpu.c
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object/smmu.c
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object/smc.c
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smp/ipi.c
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)
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add_bf_source_old("KernelArchARM" "structures.bf" "include/arch/arm" "arch/object")
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