forked from Imagelibrary/rtems
0dd1d44582
being set to 0 to indicate that there should be no Clock Tick. This was used by the Timing Tests to avoid clock tick overhead perturbing execution times. Now the Timing Tests simply leave the Clock Tick Driver out of the Device Driver Table.
298 lines
7.0 KiB
C
298 lines
7.0 KiB
C
/*
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* This file contains the clock driver the Hitachi SH 704X
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*
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* Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and
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* Bernd Becker (becker@faw.uni-ulm.de)
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*
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* COPYRIGHT (c) 1997-1998, FAW Ulm, Germany
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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*
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*
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* COPYRIGHT (c) 1998.
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* On-Line Applications Research Corporation (OAR).
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* Copyright assigned to U.S. Government, 1994.
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*
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* Modified to reflect registers of sh7045 processor:
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* John M. Mills (jmills@tga.com)
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* TGA Technologies, Inc.
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* 100 Pinnacle Way, Suite 140
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* Norcross, GA 30071 U.S.A.
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* August, 1999
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*
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* This modified file may be copied and distributed in accordance
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* the above-referenced license. It is provided for critique and
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* developmental purposes without any warranty nor representation
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* by the authors or by TGA Technologies.
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.OARcorp.com/rtems/license.html.
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*
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* $Id$
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*/
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#include <rtems.h>
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#include <stdlib.h>
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#include <rtems/libio.h>
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#include <rtems/score/sh_io.h>
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#include <rtems/score/sh.h>
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#include <rtems/score/ispsh7045.h>
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#include <rtems/score/iosh7045.h>
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#define _MTU_COUNTER0_MICROSECOND (Clock_MHZ/4)
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#ifndef CLOCKPRIO
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#define CLOCKPRIO 10
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#endif
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#define MTU0_STARTMASK 0xfe
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#define MTU0_SYNCMASK 0xfe
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#define MTU0_MODEMASK 0xc0
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#define MTU0_TCRMASK 0x01 /* bit 7 also used, vs 703x */
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#define MTU0_STAT_MASK 0xc0
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#define MTU0_IRQMASK 0xfe
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#define MTU0_TIERMASK 0x01
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#define IPRC_MTU0_MASK 0xff0f
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#define MTU0_TIORVAL 0x08
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/*
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* The interrupt vector number associated with the clock tick device
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* driver.
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*/
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#define CLOCK_VECTOR MTUA0_ISP_V
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/*
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* Clock_driver_ticks is a monotonically increasing counter of the
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* number of clock ticks since the driver was initialized.
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*/
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volatile rtems_unsigned32 Clock_driver_ticks;
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static void Clock_exit( void );
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static rtems_isr Clock_isr( rtems_vector_number vector );
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static rtems_unsigned32 Clock_MHZ ;
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/*
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* Clock_isrs is the number of clock ISRs until the next invocation of
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* the RTEMS clock tick routine. The clock tick device driver
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* gets an interrupt once a millisecond and counts down until the
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* length of time between the user configured microseconds per tick
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* has passed.
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*/
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rtems_unsigned32 Clock_isrs; /* ISRs until next tick */
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static rtems_unsigned32 Clock_isrs_const; /* only calculated once */
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/*
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* These are set by clock driver during its init
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*/
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rtems_device_major_number rtems_clock_major = ~0;
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rtems_device_minor_number rtems_clock_minor;
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/*
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* The previous ISR on this clock tick interrupt vector.
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*/
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rtems_isr_entry Old_ticker;
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/*
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* Isr Handler
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*/
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rtems_isr Clock_isr(
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rtems_vector_number vector
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)
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{
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/*
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* bump the number of clock driver ticks since initialization
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*
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* determine if it is time to announce the passing of tick as configured
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* to RTEMS through the rtems_clock_tick directive
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*
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* perform any timer dependent tasks
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*/
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unsigned8 temp;
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/* reset the flags of the status register */
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temp = read8( MTU_TSR0) & MTU0_STAT_MASK;
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write8( temp, MTU_TSR0);
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Clock_driver_ticks++ ;
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if( Clock_isrs == 1)
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{
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rtems_clock_tick();
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Clock_isrs = Clock_isrs_const;
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}
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else
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{
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Clock_isrs-- ;
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}
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}
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/*
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* Install_clock
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*
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* Install a clock tick handler and reprograms the chip. This
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* is used to initially establish the clock tick.
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*/
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void Install_clock(
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rtems_isr_entry clock_isr
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)
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{
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unsigned8 temp8 = 0;
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/*
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* Initialize the clock tick device driver variables
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*/
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Clock_driver_ticks = 0;
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Clock_isrs_const = rtems_configuration_get_microseconds_per_tick() / 10000;
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Clock_isrs = Clock_isrs_const;
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Clock_MHZ = rtems_cpu_configuration_get_clicks_per_second() / 1000000 ;
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rtems_interrupt_catch( Clock_isr, CLOCK_VECTOR, &Old_ticker );
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/*
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* Hardware specific initialize goes here
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*/
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/* stop Timer 0 */
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temp8 = read8( MTU_TSTR) & MTU0_STARTMASK;
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write8( temp8, MTU_TSTR);
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/* set initial counter value to 0 */
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write16( 0, MTU_TCNT0);
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/* Timer 0 runs independent */
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temp8 = read8( MTU_TSYR) & MTU0_SYNCMASK;
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write8( temp8, MTU_TSYR);
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/* Timer 0 normal mode */
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temp8 = read8( MTU_TMDR0) & MTU0_MODEMASK;
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write8( temp8, MTU_TMDR0);
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/* TCNT is cleared by GRA ; internal clock /4 */
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write8( MTU0_TCRMASK , MTU_TCR0);
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/* use GRA without I/O - pins */
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write8( MTU0_TIORVAL, MTU_TIORL0);
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/* reset flags of the status register */
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temp8 = read8( MTU_TSR0) & MTU0_STAT_MASK;
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write8( temp8, MTU_TSR0);
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/* Irq if is equal GRA */
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temp8 = read8( MTU_TIER0) | MTU0_TIERMASK;
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write8( temp8, MTU_TIER0);
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/* set interrupt priority */
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if( sh_set_irq_priority( CLOCK_VECTOR, CLOCKPRIO ) != RTEMS_SUCCESSFUL)
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rtems_fatal_error_occurred( RTEMS_NOT_CONFIGURED);
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/* set counter limits */
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write16( _MTU_COUNTER0_MICROSECOND *
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rtems_configuration_get_microseconds_per_tick(), MTU_GR0A);
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/* start counter */
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temp8 = read8( MTU_TSTR) |~MTU0_STARTMASK;
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write8( temp8, MTU_TSTR);
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/*
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* Schedule the clock cleanup routine to execute if the application exits.
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*/
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atexit( Clock_exit );
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}
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/*
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* Clean up before the application exits
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*/
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void Clock_exit( void )
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{
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unsigned8 temp8 = 0;
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/* turn off the timer interrupts */
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/* set interrupt priority to 0 */
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if( sh_set_irq_priority( CLOCK_VECTOR, 0 ) != RTEMS_SUCCESSFUL)
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rtems_fatal_error_occurred( RTEMS_UNSATISFIED);
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/*
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* temp16 = read16( MTU_TIER0) & IPRC_MTU0_IRQMASK;
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* write16( temp16, MTU_TIER0);
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*/
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/* stop counter */
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temp8 = read8( MTU_TSTR) & MTU0_STARTMASK;
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write8( temp8, MTU_TSTR);
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/* old vector shall not be installed */
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}
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/*
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* Clock_initialize
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*
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* Device driver entry point for clock tick driver initialization.
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*/
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rtems_device_driver Clock_initialize(
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rtems_device_major_number major,
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rtems_device_minor_number minor,
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void *pargp
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)
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{
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Install_clock( Clock_isr );
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/*
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* make major/minor avail to others such as shared memory driver
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*/
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rtems_clock_major = major;
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rtems_clock_minor = minor;
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return RTEMS_SUCCESSFUL;
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}
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rtems_device_driver Clock_control(
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rtems_device_major_number major,
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rtems_device_minor_number minor,
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void *pargp
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)
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{
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rtems_unsigned32 isrlevel;
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rtems_libio_ioctl_args_t *args = pargp;
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if (args != 0)
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{
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/*
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* This is hokey, but until we get a defined interface
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* to do this, it will just be this simple...
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*/
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if (args->command == rtems_build_name('I', 'S', 'R', ' '))
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{
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Clock_isr(CLOCK_VECTOR);
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}
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else if (args->command == rtems_build_name('N', 'E', 'W', ' '))
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{
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rtems_isr_entry ignored ;
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rtems_interrupt_disable( isrlevel );
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rtems_interrupt_catch( args->buffer, CLOCK_VECTOR, &ignored );
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rtems_interrupt_enable( isrlevel );
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}
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}
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return RTEMS_SUCCESSFUL;
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}
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