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4.7.3 ... 4.7.1

Author SHA1 Message Date
cvs2git
6142b42c41 This commit was manufactured by cvs2svn to create tag 'rtems-4-7-1'.
Sprout from rtems-4-7-branch 2007-04-13 18:29:37 UTC Joel Sherrill <joel.sherrill@OARcorp.com> 'Upgrade to 4.7.1'
Delete:
    Makefile.maint
    contrib/apt-conf/.cvsignore
    contrib/apt-conf/COPYING
    contrib/apt-conf/ChangeLog
    contrib/apt-conf/INSTALL
    contrib/apt-conf/Makefile.am
    contrib/apt-conf/README
    contrib/apt-conf/configure.ac
    contrib/apt-conf/gpg/gpg-pubkey-eac29b6f-3fe1f458
    contrib/apt-conf/rtems-apt-conf.spec.in
    contrib/apt-conf/sources.list.d/rtems-4.6.list
    contrib/apt-conf/sources.list.d/rtems-4.7.list
    contrib/apt-conf/vendors.list.d/rtems.list
    contrib/crossrpms/.cvsignore
    contrib/crossrpms/AUTHORS
    contrib/crossrpms/COPYING
    contrib/crossrpms/ChangeLog
    contrib/crossrpms/Makefile.am
    contrib/crossrpms/NEWS
    contrib/crossrpms/README
    contrib/crossrpms/TODO
    contrib/crossrpms/acinclude.m4
    contrib/crossrpms/autotools/.cvsignore
    contrib/crossrpms/autotools/Makefile.am
    contrib/crossrpms/autotools/autoconf.add
    contrib/crossrpms/autotools/autoconf.am
    contrib/crossrpms/autotools/automake.add
    contrib/crossrpms/autotools/automake.am
    contrib/crossrpms/autotools/target-autoconf.add
    contrib/crossrpms/autotools/target-automake.add
    contrib/crossrpms/binutils/.cvsignore
    contrib/crossrpms/binutils/base-binutils.add
    contrib/crossrpms/binutils/binutils.add
    contrib/crossrpms/binutils/build.add
    contrib/crossrpms/binutils/install.add
    contrib/crossrpms/binutils/prep.add
    contrib/crossrpms/binutils/rpm-install.add
    contrib/crossrpms/binutils/target-binutils.add
    contrib/crossrpms/bootstrap
    contrib/crossrpms/common/clean.add
    contrib/crossrpms/common/common.add
    contrib/crossrpms/configure.ac
    contrib/crossrpms/gcc/base-g77.add
    contrib/crossrpms/gcc/base-gcc.add
    contrib/crossrpms/gcc/base-gcj.add
    contrib/crossrpms/gcc/base-gfortran.add
    contrib/crossrpms/gcc/base-gnat.add
    contrib/crossrpms/gcc/base-newlib.add
    contrib/crossrpms/gcc/build.add
    contrib/crossrpms/gcc/gccnewlib.add
    contrib/crossrpms/gcc/install.add
    contrib/crossrpms/gcc/prep.add
    contrib/crossrpms/gcc/rpm-install.add
    contrib/crossrpms/gcc/target-c++.add
    contrib/crossrpms/gcc/target-g77.add
    contrib/crossrpms/gcc/target-gcc.add
    contrib/crossrpms/gcc/target-gcj.add
    contrib/crossrpms/gcc/target-gfortran.add
    contrib/crossrpms/gcc/target-gnat.add
    contrib/crossrpms/gcc/target-newlib.add
    contrib/crossrpms/gcc/target-objc.add
    contrib/crossrpms/gdb/base-gdb.add
    contrib/crossrpms/gdb/build.add
    contrib/crossrpms/gdb/gdb.add
    contrib/crossrpms/gdb/install.add
    contrib/crossrpms/gdb/prep.add
    contrib/crossrpms/gdb/rpm-install.add
    contrib/crossrpms/gdb/target-gdb.add
    contrib/crossrpms/mkspec.am
    contrib/crossrpms/patches/binutils-2.16.1-rtems-20050708.diff
    contrib/crossrpms/patches/binutils-2.17-rtems4.7-20061021.diff
    contrib/crossrpms/patches/gcc-core-4.0.3-rtems-20060822.diff
    contrib/crossrpms/patches/gcc-core-4.1.1-rtems-20060720.diff
    contrib/crossrpms/patches/gcc-core-4.1.1-rtems-20060908.diff
    contrib/crossrpms/patches/gcc-core-4.1.1-rtems-20060909.diff
    contrib/crossrpms/patches/gcc-core-4.1.1-rtems4.7-20070102.diff
    contrib/crossrpms/patches/gcc-core-4.1.1-rtems4.7-20070405.diff
    contrib/crossrpms/patches/gcc-core-4.1.2-rtems4.7-20070216.diff
    contrib/crossrpms/patches/gdb-6.4-rtems-20060311.diff
    contrib/crossrpms/patches/gdb-6.4-rtems-20060712.diff
    contrib/crossrpms/patches/gdb-6.5-rtems-20060713.diff
    contrib/crossrpms/patches/gdb-6.6-rtems4.7-20070218.diff
    contrib/crossrpms/patches/gdb-6.6-rtems4.7-20070222.diff
    contrib/crossrpms/patches/newlib-1.14.0-rtems4.7-20061019.diff
    contrib/crossrpms/patches/newlib-1.15.0-rtems4.7-20070208.diff
    contrib/crossrpms/rtems4.7/.cvsignore
    contrib/crossrpms/rtems4.7/Makefile.am
    contrib/crossrpms/rtems4.7/arm/.cvsignore
    contrib/crossrpms/rtems4.7/arm/Makefile.am
    contrib/crossrpms/rtems4.7/arm/binutils-sources.add
    contrib/crossrpms/rtems4.7/arm/gcc-sources.add
    contrib/crossrpms/rtems4.7/arm/gdb-sources.add
    contrib/crossrpms/rtems4.7/avr/.cvsignore
    contrib/crossrpms/rtems4.7/avr/Makefile.am
    contrib/crossrpms/rtems4.7/avr/binutils-sources.add
    contrib/crossrpms/rtems4.7/avr/gcc-sources.add
    contrib/crossrpms/rtems4.7/avr/gdb-sources.add
    contrib/crossrpms/rtems4.7/binutils.am
    contrib/crossrpms/rtems4.7/gcc-prep.add
    contrib/crossrpms/rtems4.7/gcc.am
    contrib/crossrpms/rtems4.7/gdb.am
    contrib/crossrpms/rtems4.7/h8300/.cvsignore
    contrib/crossrpms/rtems4.7/h8300/Makefile.am
    contrib/crossrpms/rtems4.7/h8300/binutils-sources.add
    contrib/crossrpms/rtems4.7/h8300/gcc-sources.add
    contrib/crossrpms/rtems4.7/h8300/gdb-sources.add
    contrib/crossrpms/rtems4.7/i386/.cvsignore
    contrib/crossrpms/rtems4.7/i386/Makefile.am
    contrib/crossrpms/rtems4.7/i386/binutils-sources.add
    contrib/crossrpms/rtems4.7/i386/gcc-sources.add
    contrib/crossrpms/rtems4.7/i386/gdb-sources.add
    contrib/crossrpms/rtems4.7/m68k/.cvsignore
    contrib/crossrpms/rtems4.7/m68k/Makefile.am
    contrib/crossrpms/rtems4.7/m68k/binutils-sources.add
    contrib/crossrpms/rtems4.7/m68k/gcc-sources.add
    contrib/crossrpms/rtems4.7/m68k/gdb-sources.add
    contrib/crossrpms/rtems4.7/mips/.cvsignore
    contrib/crossrpms/rtems4.7/mips/Makefile.am
    contrib/crossrpms/rtems4.7/mips/binutils-sources.add
    contrib/crossrpms/rtems4.7/mips/gcc-sources.add
    contrib/crossrpms/rtems4.7/mips/gdb-sources.add
    contrib/crossrpms/rtems4.7/mipstx39/.cvsignore
    contrib/crossrpms/rtems4.7/mipstx39/Makefile.am
    contrib/crossrpms/rtems4.7/mipstx39/gdb-sources.add
    contrib/crossrpms/rtems4.7/powerpc/.cvsignore
    contrib/crossrpms/rtems4.7/powerpc/Makefile.am
    contrib/crossrpms/rtems4.7/powerpc/binutils-sources.add
    contrib/crossrpms/rtems4.7/powerpc/gcc-sources.add
    contrib/crossrpms/rtems4.7/powerpc/gdb-sources.add
    contrib/crossrpms/rtems4.7/sh/.cvsignore
    contrib/crossrpms/rtems4.7/sh/Makefile.am
    contrib/crossrpms/rtems4.7/sh/binutils-sources.add
    contrib/crossrpms/rtems4.7/sh/gcc-sources.add
    contrib/crossrpms/rtems4.7/sh/gdb-sources.add
    contrib/crossrpms/rtems4.7/sparc/.cvsignore
    contrib/crossrpms/rtems4.7/sparc/Makefile.am
    contrib/crossrpms/rtems4.7/sparc/binutils-sources.add
    contrib/crossrpms/rtems4.7/sparc/gcc-sources.add
    contrib/crossrpms/rtems4.7/sparc/gdb-sources.add
    contrib/crossrpms/specstrip
    contrib/mingw/.cvsignore
    contrib/mingw/AUTHORS
    contrib/mingw/COPYING
    contrib/mingw/ChangeLog
    contrib/mingw/README
    contrib/mingw/build-exes.sh
    contrib/mingw/build-rpms.sh
    contrib/mingw/build.sh
    contrib/mingw/rtems-license.rtf
    contrib/mingw/rtems-tools.nsi
    contrib/mingw/rtems.ini
    contrib/mingw/rtems_logo.bmp
    contrib/mingw/targets
    contrib/repo-conf/.cvsignore
    contrib/repo-conf/AUTHORS
    contrib/repo-conf/COPYING
    contrib/repo-conf/ChangeLog
    contrib/repo-conf/INSTALL
    contrib/repo-conf/Makefile.am
    contrib/repo-conf/NEWS
    contrib/repo-conf/README
    contrib/repo-conf/aclocal/version.m4
    contrib/repo-conf/apt/sources.list.d/.cvsignore
    contrib/repo-conf/apt/sources.list.d/rtems.list.in
    contrib/repo-conf/apt/vendors.list.d/rtems.list
    contrib/repo-conf/configure.ac
    contrib/repo-conf/gpg/gpg-pubkey-69ce4a83-44cc2b30
    contrib/repo-conf/gpg/gpg-pubkey-eac29b6f-3fe1f458
    contrib/repo-conf/rtems-repo-conf.spec.in
    contrib/repo-conf/yum.repos.d/.cvsignore
    contrib/repo-conf/yum.repos.d/rtems.repo.in
    contrib/rtemsrpms/.cvsignore
    contrib/rtemsrpms/AUTHORS
    contrib/rtemsrpms/COPYING
    contrib/rtemsrpms/ChangeLog
    contrib/rtemsrpms/INSTALL
    contrib/rtemsrpms/Makefile.am
    contrib/rtemsrpms/NEWS
    contrib/rtemsrpms/README
    contrib/rtemsrpms/bootstrap
    contrib/rtemsrpms/configure.ac
    contrib/rtemsrpms/rtems.spec.in
2007-04-13 18:29:38 +00:00
362 changed files with 2187 additions and 28525 deletions

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@@ -1,8 +1,3 @@
2007-09-04 Joel Sherrill <joel.sherrill@OARcorp.com>
* Makefile.maint: touch all documentation master files so the date on
the manual reflects the release date of the software.
2007-02-22 Ralf Corsépius <ralf.corsepius@rtems.org>
* Makefile.am: Use MKDIR_P instead of mkdir_p.

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@@ -1,144 +0,0 @@
#
# Maintainer Makefile
#
# WARNING:
# THIS IS EXPERIMENTAL - DO NOT USE (YET) !
# * This Makefile is only useful to RTEMS maintainers
# * You must have write access to RTEMS CVS
# * Running this Makefile modifies RTEMS CVS
# * Watch out for warning and error messages - Do NOT IGNORE them!
# MAINTAINER notes:
# Cutting a new release:
# 1. Perform a non-anonymous cvs checkout of the BRANCH
# you want to cut a release tarball from
# 2. Run "make -f Makefile.maint new-revision"
# (rsp. "make -f Makefile.maint new-minor").
# 3. Run "make -f Makefile.maint commit"
# 4. Run "make -f Makefile.maint tag"
# 5. Run "make -f Makefile.maint tarball"
# -----------------
# SECURITY: Append a string to tag to avoid accidentially screwing up cvs-tags
# For "hot runs" you will want to use "make -f Makefile.maint TAG_SUFFIX= <command>"
TAG_SUFFIX = -test1
rtems_version := $(shell cat VERSION | sed -n '/.* Version /{s/^.*Version[ ]*\([0-9\.]\+\)/\1/p};')
rtems_tag := $(shell echo "rtems-$(rtems_version)" | tr . -)
rtems_api := 4.7
PATH := /opt/rtems-$(rtems_api)/bin:$(PATH)
# -----------------
# Cleanup check out and cvs-tag the files inside
tag:
cvs -z9 up -dP >/dev/null
./bootstrap -p >/dev/null
cvs tag -c $(rtems_tag)$(TAG_SUFFIX) >/dev/null
# -----------------
# Different stages of cvs-exporting
rtems-$(rtems_version)/stamp.export.$(rtems_tag)$(TAG_SUFFIX):
rm -rf rtems-$(rtems_version)
@cvs -z9 export -d rtems-$(rtems_version) -r $(rtems_tag)$(TAG_SUFFIX) rtems >/dev/null
@if ! test -f rtems-$(rtems_version)/VERSION; then \
echo "ERROR export failed"; \
echo " Did you run 'make -f Makefile.maint tag' ?"; exit1; fi
echo "$(rtems_tag)$(TAG_SUFFIX)" > rtems-$(rtems_version)/stamp.export.$(rtems_tag)$(TAG_SUFFIX)
rtems-$(rtems_version)$(TAG_SUFFIX).tar.bz2: rtems-$(rtems_version)/stamp.autofiles \
rtems-$(rtems_version)/excludes \
rtems-$(rtems_version)/TOOL_VERSIONS
cd rtems-$(rtems_version) ; \
touch doc/ada_user/ada_user.texi doc/bsp_howto/bsp_howto.texi \
doc/cpu_supplement/cpu_supplement.texi \
doc/develenv/develenv.texi doc/filesystem/filesystem.texi \
doc/itron3.0/itron.texi doc/networking/networking.texi \
doc/new_chapters/new_chapters.texi doc/porting/porting.texi \
doc/posix1003.1/posix1003_1.texi doc/posix_users/posix_users.texi \
doc/relnotes/relnotes.texi doc/started_ada/started_ada.texi \
doc/started/started.texi doc/user/c_user.texi
tar -cj -X rtems-$(rtems_version)/excludes \
-f rtems-$(rtems_version)$(TAG_SUFFIX).tar.bz2 rtems-$(rtems_version)
rtems-$(rtems_version)/stamp.cleanup: rtems-$(rtems_version)/stamp.export.$(rtems_tag)$(TAG_SUFFIX)
find rtems-$(rtems_version) -name .cvsignore -exec rm -f {} \;
find rtems-$(rtems_version) -name preinstall.am -exec touch {} \;
touch rtems-$(rtems_version)/c/src/librdbg/src/*/*/remdeb*.[hc]
rm -rf rtems-$(rtems_version)/contrib
touch rtems-$(rtems_version)/stamp.cleanup
rtems-$(rtems_version)/stamp.autofiles: rtems-$(rtems_version)/stamp.cleanup
cd rtems-$(rtems_version) && ./bootstrap -r
touch rtems-$(rtems_version)/stamp.autofiles
rtems-$(rtems_version)/excludes: Makefile.maint
@echo "Generating $@"
@echo "excludes" > $@
@echo "stamp.*" >> $@
@echo "autom4te.cache" >> $@
@echo "Makefile.maint" >> $@
tarball: rtems-$(rtems_version)$(TAG_SUFFIX).tar.bz2
rtems-$(rtems_version)/TOOL_VERSIONS: Makefile.maint
( \
date ; \
echo ; \
echo "This file contains configuration information on the " ; \
echo "primary computer used to test and make the $(rtems_version)" ; \
echo "version of RTEMS" ; \
echo ; \
echo "OS Version: " `head -1 /etc/issue` ; \
echo ; \
echo "The following RTEMS RPMs were installed on the machine" ; \
echo "where this release was made:" ; \
echo ; \
rpm -qa 'rtems-$(rtems_api)-*' | sort | sed -e 's/^/ /' ; \
echo \
) > $@
# -----------------
# Create a new minor release
# increments the 2nd digit of the version number
# set the 3rd digit of the version number to 0
# Example: 4.6.99.4 -> 4.7.0
new-minor:
@v=$$(echo $(rtems_version) | sed 's,^\([0-9]\+\).*,\1,'); \
r=$$(echo $(rtems_version) | sed 's,^[0-9]\+\.\([0-9]\+\).*,\1,'); \
r=$$(($$r + 1)); version="$$v.$$r.0"; \
echo "New minor release: $$version"; \
sed -i -e "s|\[_RTEMS_VERSION\],\[.*\]|\[_RTEMS_VERSION\],\[$$version\]|" \
$(VERSION_FILES); \
sed -i -e "s,\(^RTEMS Version\).*,\1 $$version," VERSION
# Create a new revision release
# increments the last digit of the version number
# Examples: 4.6.99.4 -> 4.6.99.5
# 4.7.0 -> 4.7.1
new-revision:
@m=$$(echo $(rtems_version) | sed 's,^\(.*\)\.[0-9]\+,\1,'); \
n=$$(echo $(rtems_version) | sed 's,^.*\.\([0-9]\+\),\1,'); \
n=$$(($$n + 1)); version="$$m.$$n";\
echo "New revision release: $$version"; \
sed -i -e "s|\[_RTEMS_VERSION\],\[.*\]|\[_RTEMS_VERSION\],\[$$version\]|" \
$(VERSION_FILES); \
sed -i -e "s,\(^RTEMS Version\).*,\1 $$version," VERSION
VERSION_FILES += aclocal/version.m4
VERSION_FILES += cpukit/aclocal/version.m4
VERSION_FILES += c/src/aclocal/version.m4
VERSION_FILES += testsuites/aclocal/version.m4
CVS_RUN := $(shell if [ -n "$(TAG_SUFFIX)" ]; then echo "cvs -n"; else echo "cvs"; fi)
commit:
$(CVS_RUN) commit -m "Upgrade to $(rtems_version)" \
$(VERSION_FILES) VERSION
.PHONY: commit new-minor new-revision tag tarball

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@@ -4,4 +4,4 @@
# $Id$
#
RTEMS Version 4.7.3
RTEMS Version 4.7.1

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@@ -1,4 +1,4 @@
AC_DEFUN([RTEMS_VERSIONING],
m4_define([_RTEMS_VERSION],[4.7.3]))
m4_define([_RTEMS_VERSION],[4.7.1]))
m4_define([RTEMS_API],[4.7])

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@@ -1,4 +1,4 @@
AC_DEFUN([RTEMS_VERSIONING],
m4_define([_RTEMS_VERSION],[4.7.3]))
m4_define([_RTEMS_VERSION],[4.7.1]))
m4_define([RTEMS_API],[4.7])

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@@ -1,8 +1,3 @@
2007-05-28 Joel Sherrill <joel.sherrill@OARcorp.com>
PR 1244/bsps
* console/console.c: Remove definition of __assert.
2007-01-29 Ralf Corsépius <ralf.corsepius@rtems.org>
* console/fb_vga.c: Eliminate __u16, __u32.

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@@ -34,6 +34,8 @@
#include <stdlib.h>
#include <assert.h>
#include <unistd.h>
#undef __assert
void __assert (const char *file, int line, const char *msg);
#include <bsp.h>
#include <bsp/irq.h>
@@ -139,6 +141,44 @@ int kbd_poll_read( int minor )
return -1;
}
/*
static void* termios_ttyp_console = NULL;
void enq_key( char key )
{
if( termios_ttyp_console )
{
rtems_termios_enqueue_raw_characters(termios_ttyp_console, &key,1 );
}
}
*/
void __assert (const char *file, int line, const char *msg)
{
static char exit_msg[] = "EXECUTIVE SHUTDOWN! Any key to reboot...";
unsigned char ch;
/*
* Note we cannot call exit or printf from here,
* assert can fail inside ISR too
*/
/*
* Close console
*/
close(2);
close(1);
close(0);
printk("\nassert failed: %s: ", file);
printk("%d: ", line);
printk("%s\n\n", msg);
printk(exit_msg);
ch = BSP_poll_char();
printk("\n\n");
rtemsReboot();
}
/*-------------------------------------------------------------------------+
| Console device driver INITIALIZE entry point.
+--------------------------------------------------------------------------+

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@@ -1,8 +1,3 @@
2007-04-17 Joel Sherrill <joel@OARcorp.com>
* mcf5206elite/tools/runtest: Do not run pppd.exe from batch mode
script.
2006-12-02 Ralf Corsépius <ralf.corsepius@rtems.org>
* configure.ac: New BUG-REPORT address.

View File

@@ -158,7 +158,7 @@ do
case "$tname" in
# size is no longer interactive.
monitor* | termios* | fileio* | pppd*)
monitor* | termios* | fileio*)
warn "Skipping $tname; it is interactive"
continue
;;

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@@ -1,7 +1,3 @@
2007-11-26 Eric Norum <norume@aps.anl.gov>
* network/network.c: Fix LED configuration to match uCDIMM.
2007-03-12 Joel Sherrill <joel@OARcorp.com>
* clock/clock.c, console/console.c, include/bsp.h, include/coverhd.h,

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@@ -8,7 +8,7 @@
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
* http://www.rtems.com/license/LICENSE.
*/
#include <bsp.h>
@@ -308,12 +308,12 @@ mcf5282_fec_initialize_hardware(struct mcf5282_enet_struct *sc)
/*
* Set PHYS
* LED1 receive status, LED2 link status, LEDs stretched
* LED1 link status, LED2 receive status, LEDs stretched
* Advertise 100 Mb/s, full-duplex, IEEE-802.3
* Turn off auto-negotiate
* Clear status
* Cleaer status
*/
setMII(1, 20, 0x24F2);
setMII(1, 20, 0x42F2);
setMII(1, 4, 0x0181);
setMII(1, 0, 0x0);
rtems_task_wake_after(2);

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@@ -1,7 +1,3 @@
2007-04-17 Joel Sherrill <joel@OARcorp.com>
* jmr3904/tools/runtest: Do not run pppd.exe from batch mode script.
2006-12-02 Ralf Corsépius <ralf.corsepius@rtems.org>
* configure.ac: New BUG-REPORT address.

View File

@@ -147,7 +147,7 @@ do
case $tname in
# size is no longer interactive.
monitor* | termios* | fileio* | pppd*)
monitor* | termios* | fileio*)
if [ $run_to_completion = "yes" ]
then
warn "Skipping $tname; it is interactive"

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@@ -1,7 +1,3 @@
2007-04-17 Joel Sherrill <joel@OARcorp.com>
* psim/tools/runtest: Do not run pppd.exe from batch mode script.
2007-01-29 Till Straumann <strauman@slac.stanford.edu>
* shared/vme/VMEConfig.h:

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@@ -1,35 +1,3 @@
2008-02-14 Joel Sherrill <joel.sherrill@OARcorp.com>
* preinstall.am: Add vme_am_defs.h
2007-09-20 Kate Feng <feng1@bnl.gov>
* network/if_100MHz/GT64260eth.c: Add else.
2007-09-19 Kate Feng <feng1@bnl.gov>
* README: Update.
2007-09-14 Joel Sherrill <joel.sherrill@OARcorp.com>
* network/GT64260eth.c, network/GT64260eth.h, network/GT64260ethreg.h:
Removed.
2007-09-14 Kate Feng <feng1@bnl.gov>
* Makefile.am, README, README.booting, README.irq,
preinstall.am, GT64260/MVME5500I2C.c, include/bsp.h, irq/irq.c,
irq/irq.h, irq/irq_init.c, pci/pci.c, pci/pci_interface.c,
pci/pcifinddevice.c, start/preload.S, startup/bspclean.c,
startup/bspstart.c, startup/pgtbl_activate.c, startup/reboot.c:
Merge my improvements in this BSP including a new network
driver for the 1GHz NIC.
* network/if_100MHz/GT64260eth.c, network/if_100MHz/GT64260eth.h,
network/if_100MHz/GT64260ethreg.h, network/if_100MHz/Makefile.am,
network/if_1GHz/Makefile.am, network/if_1GHz/POSSIBLEBUG,
network/if_1GHz/if_wm.c, network/if_1GHz/if_wmreg.h,
network/if_1GHz/pci_map.c, network/if_1GHz/pcireg.h: New files.
2007-04-06 Ralf Corsépius <ralf.corsepius@rtems.org>
* bsp_specs: Remove lib (Now expected to exist in GCC).

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@@ -12,24 +12,23 @@
*/
#include <rtems/bspIo.h> /* printk */
#include <rtems/stdint.h>
#include "bsp/GT64260TWSI.h"
/* #define I2C_DEBUG*/
typedef unsigned int u32;
typedef unsigned char unchar;
unchar I2cAddrPack(unchar busAddr,u32 offset)
unsigned char I2cAddrPack(unsigned char busAddr,uint32_t offset)
{
return(busAddr | ((offset & 0x700) >> 7));
}
unchar I2cDevByteAddr(u32 devA2A1A0, unchar byteNum)
unsigned char I2cDevByteAddr(uint32_t devA2A1A0, unsigned char byteNum)
{
return(( devA2A1A0 >>(byteNum*8)) & 0xff);
}
/****************************************************************************
* I2Cread_eeprom - read EEPROM VPD from the I2C
*/
int I2Cread_eeprom(unchar I2cBusAddr,u32 devA2A1A0,u32 AddrBytes,unchar *pBuff,u32 numBytes)
int I2Cread_eeprom(unsigned char I2cBusAddr,uint32_t devA2A1A0,uint32_t AddrBytes,unsigned char *pBuff,uint32_t numBytes)
{
int status=0, lastByte=0;

View File

@@ -7,9 +7,6 @@ ACLOCAL_AMFLAGS = -I ../../../../aclocal
include $(top_srcdir)/../../../../automake/compile.am
include $(top_srcdir)/../../bsp.am
#prevent the compiler from generating FP instructions
AM_CFLAGS += -msoft-float
dist_project_lib_DATA = bsp_specs
include_HEADERS = include/bsp.h
@@ -32,7 +29,6 @@ EXTRA_DIST = startup/bootpstuff.c
noinst_PROGRAMS += startup.rel
startup_rel_SOURCES = startup/bspstart.c \
../../powerpc/shared/startup/pgtbl_setup.c startup/pgtbl_activate.c \
../../powerpc/shared/startup/pretaskinghook.c \
../../powerpc/shared/startup/sbrk.c ../../shared/bootcard.c \
startup/bspclean.c ../../shared/bsplibc.c ../../shared/bsppost.c \
../../shared/main.c ../../shared/gnatinstallhandler.c startup/reboot.c
@@ -46,8 +42,8 @@ pclock_rel_CPPFLAGS = $(AM_CPPFLAGS)
pclock_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
###
include_bsp_HEADERS = ../../powerpc/shared/console/uart.h
include_bsp_HEADERS += ../../powerpc/shared/console/consoleIo.h
include_bsp_HEADERS = ../../powerpc/shared/console/uart.h \
../../shared/vmeUniverse/vme_am_defs.h
noinst_PROGRAMS += console.rel
console_rel_SOURCES = ../../powerpc/shared/console/uart.c \
@@ -68,7 +64,7 @@ pci_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
include_bsp_HEADERS += irq/irq.h
noinst_PROGRAMS += irq.rel
irq_rel_SOURCES = irq/irq_init.c irq/irq.c \
irq_rel_SOURCES = irq/irq_init.c irq/GT64260Int.c irq/irq.c \
../../powerpc/shared/irq/irq_asm.S
irq_rel_CPPFLAGS = $(AM_CPPFLAGS)
irq_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
@@ -101,28 +97,27 @@ GT64260_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
##
if HAS_NETWORKING
include_bsp_HEADERS += network/if_100MHz/GT64260eth.h network/if_100MHz/GT64260ethreg.h \
network/if_1GHz/if_wmreg.h network/if_1GHz/pcireg.h
include_bsp_HEADERS += network/GT64260eth.h network/GT64260ethreg.h
network_CPPFLAGS = -D_KERNEL
noinst_PROGRAMS += network.rel
network_rel_SOURCES = network/if_100MHz/GT64260eth.c \
network/if_1GHz/if_wm.c network/if_1GHz/pci_map.c
network_rel_SOURCES = network/GT64260eth.c
network_rel_CPPFLAGS = $(AM_CPPFLAGS) $(network_CPPFLAGS)
network_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
endif
##vme
include_bsp_HEADERS += ../../shared/vmeUniverse/VME.h vme/VMEConfig.h \
../../shared/vmeUniverse/vmeUniverse.h \
##
include_bsp_HEADERS += ../../shared/vmeUniverse/VME.h vme/VMEConfig.h
include_bsp_HEADERS += ../../shared/vmeUniverse/vmeUniverse.h \
../../shared/vmeUniverse/vmeUniverseDMA.h\
../../shared/vmeUniverse/bspVmeDmaList.h\
../../shared/vmeUniverse/VMEDMA.h \
../../shared/vmeUniverse/vme_am_defs.h
../../shared/vmeUniverse/VMEDMA.h
noinst_PROGRAMS += vme.rel
vme_rel_SOURCES = ../../shared/vmeUniverse/vmeUniverse.c\
../shared/vme/vmeconfig.c ../../shared/vmeUniverse/bspVmeDmaList.c\
../shared/vme/vme_universe.c ../shared/vme/vme_universe_dma.c
vme_rel_SOURCES = ../../shared/vmeUniverse/vmeUniverse.c
vme_rel_SOURCES+= ../../shared/vmeUniverse/bspVmeDmaList.c
vme_rel_SOURCES+= ../shared/vme/vmeconfig.c
vme_rel_SOURCES+= ../shared/vme/vme_universe.c
vme_rel_SOURCES+= ../shared/vme/vme_universe_dma.c
vme_rel_CPPFLAGS = $(AM_CPPFLAGS)
vme_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)

View File

@@ -1,38 +1,7 @@
#
# $Id: README,v 1.3.1 Shuchen Kate Feng, NSLS, BNL (08/27/07)
# $Id$
#
Please reference README.booting for the boot/load process.
For the priority setting of the Interrupt Requests (IRQs), please
reference README.irq
The BSP is built and tested on the 4.7.1 and 4.7.99.2 CVS RTEMS release.
I believe in valuable real-time programming, where technical neatness,
performance and truth are. I hope I still believe. Any suggestion,
bug reports, or even bug fixes (great!) would be highly appreciated
so that I still believe what I believe.
ACKNOWLEDGEMENTS
----------------
Acknowledgements:
Valuable information was obtained from the following:
1) Marvell NDA document for the discovery system controller.
Other related documents are listed at :
http://www.aps.anl.gov/epics/meetings/2006-06/RTEMS_Primer_SIG/RTEMS_BSP_MVME5500.pdf
2) netBSD: For the two NICS and some headers :
Allegro Networks, Inc., Wasabi Systems, Inc.
3) RTEMS: This BSP also builds on top of the work of others who have
contributed to similar RTEMS powerpc shared and motorola_powerpc BSPs, most
notably Eric Valette, Till Straumann (SVGM1 BSP, too), Eric Norum and others.
LICENSE
-------
See ./LICENSE file.
BSP NAME: mvme5500
BOARD: MVME5500 by Motorola
BUS: PCI
@@ -43,6 +12,9 @@ MODE: 32/64 bit mode (support 32 bit for now)
DEBUG MONITOR: MOTLoad
SYSTEM CONTROLLER: GT64260B
OTHER README FILES: README.booting,README.rtems-4.6.0-patch,README.VME,
README.irq
PERIPHERALS
===========
TIMERS: Eight, 32 bit programmable

View File

@@ -1,15 +1,18 @@
README.booting: written by S. Kate Feng <feng1@bnl.gov>, Aug. 28, 2007
README.booting: written by S. Kate Feng <feng1@bnl.gov>, 2004/10/11
The bootloader is adapted from Till Straumann's Generic Mini-loader,
which he wrote originally for the SVGM powerpc board.
The BSP is built and tested on the 4.7 CVS RTEMS release.
which he wrote originally for the SVGM powerpc board. Part of the
BSP was derived from the "RTEMS-PowerPC BSPs" and the NetBSD projects.
As of today, the BSP is built and tested on the RTEMS-4.6.0
release with small patches I added (see README.rtems-4.6.0-patch
and rtems-4.6.0-patch/ directory).
Booting requirement :
-------------------------
1) One needs to setup BOOTP/DHCP and TFTP servers and /etc/bootptab(BOOTP)
or /etc/dhcpd.conf (DHCP) properly to boot the system.
(Note : EPICS needs a NTP server).
1) One needs to setup BOOTP/DHCP and TFTP servers and /etc/bootptab
properly to boot the system. (Note : EPICS needs a NTP server).
2) Please copy the prebuilt RTEMS binary (e.g. misc/rtems5500-cexp.bin)
and perhaps others (e.g. misc/st.sys) to the /tftpboot/epics/hostname/bin/
@@ -32,10 +35,8 @@ MVME5500>
Note : (cxx.xx.xx.xx is the client IP address and
sxx.xx.xx.xx is the server IP address)
4) Other reference web sites for mvme5500 BSP:
4) Other reference web sites:
http://lansce.lanl.gov/EPICS/presentations/KateFeng%20RTEMS-mvme55001.ppt
http://www.nsls.bnl.gov/facility/expsys/software/EPICS/
http://www.nsls.bnl.gov/facility/expsys/software/EPICS/FAQ.txt
5) When generating code (especially C++) for this system, one should
use at least gcc-3.2 (preferrably a copy downloaded from the RTEMS
@@ -52,3 +53,10 @@ other useful utilities such as telnet, nfs, and so on.
tools and BSP, I would recommend one to reference
http://www.aps.anl.gov/epics/base/RTEMS/tutorial/
in additional to the RTEMS document.
TODO lists:
1) 1 GHZ ethernet ( work in progress, to be released soon)
2) To measure the interrupt latency and context switching.
3) To implement the watchdog timer.

View File

@@ -1,20 +1,52 @@
README.irq : Shuchen Kate Feng <feng1@bnl.gov>, Sept. 2, 2007
README.irq : Shuchen Kate Feng <feng1@bnl.gov>, 10/10/04
As per implementation in shared PPC code,
the BSPirqPrioTable[96] listed in irq_init.c is where the
The BSPirqPrioTable[] listed in irq_init.c is where the
software developers can change the levels of priority
for all the interrupts based on the need of their
applications. The IRQs can be eanbled dynamically via the
BSP_enable_pic_irq(), or disbaled dynamically via the
BSP_disable_pic_irq().
for main interrupts based on the need of their
applications.
Support for run-time priority setup could be
added easily, but there is no action taken yet due to concerns
over computer security at VME CPU level.
Presently, a dynamic IRQ table (e.g. mainIrqTbl[64]), which is
arranged dynamically based on the priority levels of enabled
main interrupts, is used in C_dispatch_irq_handler() to
incorporate the handling of the software priority levels.
The software developers are forbidden to setup picIsrTable[],
as it is a powerful engine for the BSP to find the pending
highest priority IRQ at run time. It ensures the fastest/faster
interrupt service to the highest/higher priority IRQ, if pending.
The valid entries listed in mainIrqTbl[64] by the BSP are:
1. Main interrupt 59 (GPP31_24 : no enabled IRQ yet,
to enable 'watchdog timer' if needed)
2. Main interrupt 57 (GPP15_8 : VME interrupt enabled,
to enable 'PMC1' if needed)
3. Main interrupt 58 (GPP23_16 : no enabled IRQ yet,
to enable '1 GHZ ethernet' or 'PMC2'
if needed)
4. Main interrupt 32 (10/100 MHZ ethernet)
5. Main interrupt 56 (GPP7_0 : presently only COM1/COM2 enabled)
The main IRQs can be added to the mainIrqTbl[] dynamically
via the BSP_enable_main_irq(), or removed from the mainIrqTbl[]
dynamically via the BSP_disable_main_irq().
Regarding other GPP interrupts not listed in the GPP7_0IrqTbl[8],
GPP15_8IrqTbl[8], GPP23_16IrqTbl[8], or GPP31_24IrqTbl[8], they
could be enabled by being added to the correspondent of
the four aforementioned tables listed in the irq_init.c.
Caveat: Presently, the eight GPP IRQs for each BSP_MAIN_GPPx_y_IRQ group
are set at the same main priority in the BSPirqPrioTable[], while the
sub-priority levels for the eight GPP in each group are sorted
statically by developers in the GPPx_yIrqTbl[8] from the highest
priority to the lowest one.
Note :
1. GPP7-0 (Main interrupt high cause, bit 24)
2. GPP15-8 (Main interrupt high cause, bit 25)
3. GPP23-16 (Main interrupt high cause, bit 26)
4. GPP31-24 (Main interrupt high cause, bit 27)

View File

@@ -7,7 +7,7 @@
* found in found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*
* S. Kate Feng 2003-2007 : Modified it to support the mvme5500 BSP.
* S. Kate Feng 12/03 : Modified it to support the MVME5500 board.
*
*/
@@ -53,13 +53,14 @@
#define BSP_MAX_PCI_BUS (BSP_MAX_PCI_BUS_ON_PCI0+BSP_MAX_PCI_BUS_ON_PCI1)
/* The glues to Till's vmeUniverse, although the name does not
* actually reflect the relevant architect of the MVME5500.
* Till TODO ? : BSP_PCI_DO_EOI instead ?
* BSP_EXT_IRQ0 instead of BSP_PCI_IRQ0 ?
*
#if 0
/* T.S, 2007/1: in order to let the universe acknowledge the interrupt
* (this allows for VME software priorities) corresponding support
* **MUST** be present in the interrupt controller driver
* Unless that's implemented DO NOT define BSP_PIC_DO_EOI.
*/
#define BSP_PIC_DO_EOI inl(0xc34) /* PCI IACK */
#endif
#define BSP_PCI_IRQ0 BSP_GPP_IRQ_LOWEST_OFFSET
/*
@@ -110,28 +111,11 @@ extern int BSP_connect_clock_handler (void);
extern unsigned long _BSP_clear_hostbridge_errors();
extern unsigned int BSP_heap_start;
#if 1
#define RTEMS_BSP_NETWORK_DRIVER_NAME "gt1"
#define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_GT64260eth_driver_attach
#else
#define RTEMS_BSP_NETWORK_DRIVER_NAME "wmG1"
#define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_i82544EI_driver_attach
#endif
extern int
RTEMS_BSP_NETWORK_DRIVER_ATTACH(/* struct rtems_bsdnet_ifconfig * */);
#define gccMemBar() RTEMS_COMPILER_MEMORY_BARRIER()
static inline void memBar()
{
asm volatile("sync":::"memory");
}
static inline void ioBar()
{
asm volatile("eieio":::"memory");
}
#endif

View File

@@ -6,20 +6,14 @@
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
* http://www.rtems.com/license/LICENSE.
*
* Acknowledgement May 2004 : to Till Straumann <strauman@slac.stanford.edu>
* for some inputs.
* Special acknowledgement to Till Straumann <strauman@slac.stanford.edu>
* for providing inputs to the IRQ handling and optimization.
*
* Copyright 2003, 2004, 2005, 2007 Shuchen Kate Feng <feng1@bnl.gov>,
* Modified and added support for the MVME5500 board
* Copyright 2003, 2004, Shuchen Kate Feng <feng1@bnl.gov>,
* NSLS,Brookhaven National Laboratory
* 1) Modified and added support for the MVME5500 board.
* 2) The implementation of picIsrTable[] is an original work by the
* author to optimize the software IRQ priority scheduling because
* Discovery controller does not provide H/W IRQ priority schedule.
* It ensures the fastest/faster interrupt service to the
* highest/higher priority IRQ, if pendig.
* 3) _CPU_MSR_SET() needs RTEMS_COMPILER_MEMORY_BARRIER()
*
*/
@@ -29,9 +23,7 @@
#include <rtems/score/thread.h>
#include <rtems/score/apiext.h>
#include <libcpu/raw_exception.h>
#include <rtems/rtems/intr.h>
#include <libcpu/io.h>
#include <libcpu/byteorder.h>
#include <bsp/vectors.h>
#include <rtems/bspIo.h> /* for printk */
@@ -39,35 +31,20 @@
#define HI_INT_CAUSE 0x40000000
#define MAX_IRQ_LOOP 30
/*#define DEBUG*/
#define EDGE_TRIGGER
#define _MSR_GET( _mask) \
do { \
RTEMS_COMPILER_MEMORY_BARRIER(); \
_CPU_MSR_GET( _mask); \
RTEMS_COMPILER_MEMORY_BARRIER(); \
} while (0);
#define _MSR_SET( _mask) \
do { \
RTEMS_COMPILER_MEMORY_BARRIER(); \
_CPU_MSR_SET( _mask); \
RTEMS_COMPILER_MEMORY_BARRIER(); \
} while (0);
/* #define DEBUG_IRQ*/
int gpp_int_error =0;
/*
* pointer to the mask representing the additionnal irq vectors
* that must be disabled when a particular entry is activated.
* They will be dynamically computed from the table given
* They will be dynamically computed from teh prioruty table given
* in BSP_rtems_irq_mngt_set();
* CAUTION : this table is accessed directly by interrupt routine
* prologue.
*/
static unsigned int BSP_irq_prio_mask_tbl[3][BSP_PIC_IRQ_NUMBER];
static unsigned int irq_prio_maskLO_tbl[BSP_MAIN_IRQ_NUMBER];
static unsigned int irq_prio_maskHI_tbl[BSP_MAIN_IRQ_NUMBER];
/*
* default handler connected on each irq after bsp initialization
@@ -81,55 +58,26 @@ static rtems_irq_connect_data default_rtems_entry;
static rtems_irq_global_settings* internal_config;
static rtems_irq_connect_data* rtems_hdl_tbl;
static volatile unsigned *BSP_irqMask_reg[3];
static volatile unsigned *BSP_irqCause_reg[3];
static volatile unsigned BSP_irqMask_cache[3]={0,0,0};
static int picIsrTblPtr=0;
static unsigned int GPPIrqInTbl=0;
static unsigned long long MainIrqInTbl=0;
/*
* The software developers are forbidden to setup picIsrTable[],
* as it is a powerful engine for the BSP to find the pending
* highest priority IRQ at run time. It ensures the fastest/faster
* interrupt service to the highest/higher priority IRQ, if pendig.
*
* The picIsrTable[96] is updated dynamically at run time
* based on the priority levels set at BSPirqPrioTable[96],
* while the BSP_enable_pic_irq(), and BSP_disable_pic_irq()
* commands are invoked.
*
* The picIsrTable[96] lists the enabled CPU main and GPP external interrupt
* numbers [0 (lowest)- 95 (highest)] starting from the highest priority
* one to the lowest priority one. The highest priority interrupt is
* located at picIsrTable[0], and the lowest priority interrupt is located
* at picIsrTable[picIsrTblPtr-1].
*
*
*/
/* BitNums for Main Interrupt Lo/High Cause and GPP, -1 means invalid bit */
static unsigned int picIsrTable[BSP_PIC_IRQ_NUMBER]={
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1 };
static unsigned int irqCAUSE[20], irqLOW[20], irqHIGH[20];
static int irqIndex=0;
/*
* Check if IRQ is a MAIN CPU internal IRQ or GPP external IRQ
* Check if IRQ is a MAIN CPU internal IRQ
*/
static inline int is_pic_irq(const rtems_irq_number irqLine)
static inline int is_main_irq(const rtems_irq_number irqLine)
{
return (((int) irqLine <= BSP_MICH_IRQ_MAX_OFFSET) &
((int) irqLine >= BSP_MICL_IRQ_LOWEST_OFFSET)
);
}
/*
* Check if IRQ is a GPP IRQ
*/
static inline int is_gpp_irq(const rtems_irq_number irqLine)
{
return (((int) irqLine <= BSP_GPP_IRQ_MAX_OFFSET) &
((int) irqLine >= BSP_MICL_IRQ_LOWEST_OFFSET)
((int) irqLine >= BSP_GPP_IRQ_LOWEST_OFFSET)
);
}
@@ -143,14 +91,104 @@ static inline int is_processor_irq(const rtems_irq_number irqLine)
);
}
static inline unsigned int divIrq32(unsigned irq)
#define GT_GPP_Int1_Cause GT_GPP_Interrupt_Cause+1
#define GT_GPP_Int2_Cause GT_GPP_Interrupt_Cause+2
#define GT_GPP_Int3_Cause GT_GPP_Interrupt_Cause+3
void GT_GPP_IntHandler0()
{
return(irq/32);
unsigned gppCause, irqNum, bitNum;
int i, found=0;
gppCause = inb(GT_GPP_Interrupt_Cause) & GT_GPPirq_cache;
for (i=0; GPP7_0IrqTbl[i]!=-1;i++){
bitNum =GPP7_0IrqTbl[i];
if (gppCause & (1<<bitNum)) {
/* Clear the GPP interrupt cause bit */
outb( ~(1<<bitNum), GT_GPP_Interrupt_Cause);/* Till Straumann */
found = 1;
irqNum = bitNum+BSP_GPP_IRQ_LOWEST_OFFSET;
/* call the necessary interrupt handlers */
if (rtems_hdl_tbl[irqNum].hdl != default_rtems_entry.hdl)
rtems_hdl_tbl[irqNum].hdl(rtems_hdl_tbl[irqNum].handle);
else
gpp_int_error= bitNum; /*GPP interrupt bitNum not connected */
}
}
if ( !found) gpp_int_error = 33; /* spurious GPP interrupt */
}
static inline unsigned int modIrq32(unsigned irq)
void GT_GPP_IntHandler1()
{
return(irq%32);
unsigned gppCause, irqNum, bitNum;
int i, found=0;
gppCause = inb(GT_GPP_Int1_Cause) & (GT_GPPirq_cache>>8);
for (i=0; GPP15_8IrqTbl[i]!=-1;i++){
bitNum =GPP15_8IrqTbl[i];
if (gppCause & (1<<bitNum)) {
/* Clear the GPP interrupt cause bit */
outb( ~(1<<bitNum), GT_GPP_Int1_Cause); /* Till Straumann */
found = 1;
irqNum = bitNum+BSP_GPP8_IRQ_OFFSET;
/* call the necessary interrupt handlers */
if (rtems_hdl_tbl[irqNum].hdl != default_rtems_entry.hdl)
rtems_hdl_tbl[irqNum].hdl(rtems_hdl_tbl[irqNum].handle);
else
gpp_int_error= bitNum+8; /*GPP interrupt bitNum not connected */
}
}
if ( !found) gpp_int_error = 33; /* spurious GPP interrupt */
}
void GT_GPP_IntHandler2()
{
unsigned gppCause, irqNum, bitNum;
int i, found=0;
gppCause = inb(GT_GPP_Int2_Cause) & (GT_GPPirq_cache>>16);
for (i=0; GPP23_16IrqTbl[i]!=-1;i++){
bitNum =GPP23_16IrqTbl[i];
if (gppCause & (1<<bitNum)) {
/* Clear the GPP interrupt cause bit */
outb( ~(1<<bitNum), GT_GPP_Int2_Cause);
found = 1;
irqNum = bitNum+BSP_GPP16_IRQ_OFFSET;
/* call the necessary interrupt handlers */
if (rtems_hdl_tbl[irqNum].hdl != default_rtems_entry.hdl)
rtems_hdl_tbl[irqNum].hdl(rtems_hdl_tbl[irqNum].handle);
else
gpp_int_error= bitNum+16; /*GPP interrupt bitNum not connected */
}
}
if ( !found) gpp_int_error = 33; /* spurious GPP interrupt */
}
void GT_GPP_IntHandler3()
{
unsigned gppCause, irqNum, bitNum;
int i, found=0;
gppCause = inb(GT_GPP_Int3_Cause) & (GT_GPPirq_cache>>24);
for (i=0; GPP31_24IrqTbl[i]!=-1;i++){
bitNum=GPP31_24IrqTbl[i];
if (gppCause & (1<<bitNum)) {
/* Clear the GPP interrupt cause bit */
outb(~(1<<bitNum), GT_GPP_Int3_Cause);
found = 1;
irqNum = bitNum+BSP_GPP24_IRQ_OFFSET;
/* call the necessary interrupt handlers */
if (rtems_hdl_tbl[irqNum].hdl != default_rtems_entry.hdl)
rtems_hdl_tbl[irqNum].hdl(rtems_hdl_tbl[irqNum].handle);
else
gpp_int_error= bitNum+24; /*GPP interrupt bitNum not connected */
}
}
if ( !found) gpp_int_error = 33; /* spurious GPP interrupt */
}
/*
@@ -162,255 +200,35 @@ static inline unsigned int modIrq32(unsigned irq)
* is already set and that the tables it contains are still valid
* and accessible.
*/
static void compute_pic_masks_from_prio()
static void compute_GT64260int_masks_from_prio ()
{
int i,j, k;
int i,j;
unsigned long long irq_prio_mask=0;
/*
* Always mask at least current interrupt to prevent re-entrance
*/
for (i=0; i <BSP_PIC_IRQ_NUMBER; i++) {
switch(i) {
case BSP_MAIN_GPP7_0_IRQ:
case BSP_MAIN_GPP15_8_IRQ:
case BSP_MAIN_GPP23_16_IRQ:
case BSP_MAIN_GPP31_24_IRQ:
for (k=0; k< 3; k++)
BSP_irq_prio_mask_tbl[k][i]=0;
irq_prio_mask =0;
break;
default :
irq_prio_mask = (unsigned long long) (1LLU << i);
break;
}
if (irq_prio_mask) {
for (i=0; i <BSP_MAIN_IRQ_NUMBER; i++) {
irq_prio_mask = (unsigned long long) (1LLU << i);
for (j = 0; j <BSP_MAIN_IRQ_NUMBER; j++) {
/*
* Mask interrupts at PIC level that have a lower priority
* or <Till Straumann> a equal priority.
*/
if (internal_config->irqPrioTbl [i] >= internal_config->irqPrioTbl [j])
irq_prio_mask |= (unsigned long long)(1LLU << j);
/*
* Mask interrupts at GT64260int level that have a lower priority
* or <Till Straumann> a equal priority.
*/
if (internal_config->irqPrioTbl [i] >= internal_config->irqPrioTbl [j]) {
irq_prio_mask |= (unsigned long long)(1LLU << j);
}
}
BSP_irq_prio_mask_tbl[0][i] = irq_prio_mask & 0xffffffff;
BSP_irq_prio_mask_tbl[1][i] = (irq_prio_mask>>32) & 0xffffffff;
irq_prio_maskLO_tbl[i] = irq_prio_mask & 0xffffffff;
irq_prio_maskHI_tbl[i] = (irq_prio_mask>>32) & 0xffffffff;
#ifdef DEBUG
printk("irq_mask_prio_tbl[%d]:0x%8x%8x\n",i,BSP_irq_prio_mask_tbl[1][i],
BSP_irq_prio_mask_tbl[0][i]);
#endif
BSP_irq_prio_mask_tbl[2][i] = 1<<i;
/* Compute for the GPP priority interrupt mask */
for (j=BSP_GPP_IRQ_LOWEST_OFFSET; j <BSP_PROCESSOR_IRQ_LOWEST_OFFSET; j++) {
if (internal_config->irqPrioTbl [i] >= internal_config->irqPrioTbl [j])
BSP_irq_prio_mask_tbl[2][i] |= 1 << (j-BSP_GPP_IRQ_LOWEST_OFFSET);
}
}
printk("irq_mask_prio_tbl[%d]:0x%8x%8x\n",i,irq_prio_maskHI_tbl[i],
irq_prio_maskLO_tbl[i]);
#endif
}
}
static void UpdateMainIrqTbl(int irqNum)
{
int i=0, j, shifted=0;
switch (irqNum) {
case BSP_MAIN_GPP7_0_IRQ:
case BSP_MAIN_GPP15_8_IRQ:
case BSP_MAIN_GPP23_16_IRQ:
case BSP_MAIN_GPP31_24_IRQ:
return; /* Do nothing, let GPP take care of it */
break;
}
#ifdef SHOW_MORE_INIT_SETTINGS
unsigned long val2, val1;
#endif
/* If entry not in table*/
if ( ((irqNum<BSP_GPP_IRQ_LOWEST_OFFSET) &&
(!((unsigned long long)(1LLU << irqNum) & MainIrqInTbl))) ||
((irqNum>BSP_MICH_IRQ_MAX_OFFSET) &&
(!(( 1 << (irqNum-BSP_GPP_IRQ_LOWEST_OFFSET)) & GPPIrqInTbl))))
{
while ( picIsrTable[i]!=-1) {
if (internal_config->irqPrioTbl[irqNum]>internal_config->irqPrioTbl[picIsrTable[i]]) {
/* all other lower priority entries shifted right */
for (j=picIsrTblPtr;j>i; j--)
picIsrTable[j]=picIsrTable[j-1];
picIsrTable[i]=irqNum;
shifted=1;
break;
}
i++;
}
if (!shifted) picIsrTable[picIsrTblPtr]=irqNum;
if (irqNum >BSP_MICH_IRQ_MAX_OFFSET)
GPPIrqInTbl |= (1<< (irqNum-BSP_GPP_IRQ_LOWEST_OFFSET));
else
MainIrqInTbl |= (unsigned long long)(1LLU << irqNum);
picIsrTblPtr++;
}
#ifdef SHOW_MORE_INIT_SETTINGS
val2 = (MainIrqInTbl>>32) & 0xffffffff;
val1 = MainIrqInTbl&0xffffffff;
printk("irqNum %d, MainIrqInTbl 0x%x%x\n", irqNum, val2, val1);
BSP_printPicIsrTbl();
#endif
}
static void CleanMainIrqTbl(int irqNum)
{
int i, j;
switch (irqNum) {
case BSP_MAIN_GPP7_0_IRQ:
case BSP_MAIN_GPP15_8_IRQ:
case BSP_MAIN_GPP23_16_IRQ:
case BSP_MAIN_GPP31_24_IRQ:
return; /* Do nothing, let GPP take care of it */
break;
}
if ( ((irqNum<BSP_GPP_IRQ_LOWEST_OFFSET) &&
((unsigned long long)(1LLU << irqNum) & MainIrqInTbl)) ||
((irqNum>BSP_MICH_IRQ_MAX_OFFSET) &&
(( 1 << (irqNum-BSP_GPP_IRQ_LOWEST_OFFSET)) & GPPIrqInTbl)))
{ /* If entry in table*/
for (i=0; i<64; i++) {
if (picIsrTable[i]==irqNum) {/*remove it from the entry */
/* all other lower priority entries shifted left */
for (j=i;j<picIsrTblPtr; j++)
picIsrTable[j]=picIsrTable[j+1];
if (irqNum >BSP_MICH_IRQ_MAX_OFFSET)
GPPIrqInTbl &= ~(1<< (irqNum-BSP_GPP_IRQ_LOWEST_OFFSET));
else
MainIrqInTbl &= ~(1LLU << irqNum);
picIsrTblPtr--;
break;
}
}
}
}
void BSP_enable_pic_irq(const rtems_irq_number irqNum)
{
unsigned bitNum, regNum;
unsigned int level;
bitNum = modIrq32(((unsigned int)irqNum) - BSP_MICL_IRQ_LOWEST_OFFSET);
regNum = divIrq32(((unsigned int)irqNum) - BSP_MICL_IRQ_LOWEST_OFFSET);
rtems_interrupt_disable(level);
UpdateMainIrqTbl((int) irqNum);
BSP_irqMask_cache[regNum] |= (1 << bitNum);
out_le32(BSP_irqMask_reg[regNum], BSP_irqMask_cache[regNum]);
while (in_le32(BSP_irqMask_reg[regNum]) != BSP_irqMask_cache[regNum]);
rtems_interrupt_enable(level);
}
void BSP_disable_pic_irq(const rtems_irq_number irqNum)
{
unsigned bitNum, regNum;
unsigned int level;
bitNum = modIrq32(((unsigned int)irqNum) - BSP_MICL_IRQ_LOWEST_OFFSET);
regNum = divIrq32(((unsigned int)irqNum) - BSP_MICL_IRQ_LOWEST_OFFSET);
rtems_interrupt_disable(level);
CleanMainIrqTbl((int) irqNum);
BSP_irqMask_cache[regNum] &= ~(1 << bitNum);
out_le32(BSP_irqMask_reg[regNum], BSP_irqMask_cache[regNum]);
while (in_le32(BSP_irqMask_reg[regNum]) != BSP_irqMask_cache[regNum]);
rtems_interrupt_enable(level);
}
int BSP_setup_the_pic() /* adapt the same name as shared/irq */
{
int i;
/* Get ready for discovery BSP */
BSP_irqMask_reg[0]= (volatile unsigned int *) (GT64260_REG_BASE + GT_CPU_INT_MASK_LO);
BSP_irqMask_reg[1]= (volatile unsigned int *) (GT64260_REG_BASE + GT_CPU_INT_MASK_HI);
BSP_irqMask_reg[2]= (volatile unsigned int *) (GT64260_REG_BASE + GT_GPP_Interrupt_Mask);
BSP_irqCause_reg[0]= (volatile unsigned int *) (GT64260_REG_BASE + GT_MAIN_INT_CAUSE_LO);
BSP_irqCause_reg[1]= (volatile unsigned int *) (GT64260_REG_BASE + GT_MAIN_INT_CAUSE_HI);
BSP_irqCause_reg[2]= (volatile unsigned int *) (GT64260_REG_BASE + GT_GPP_Interrupt_Cause);
#ifdef EDGE_TRIGGER
/* Page 401, Table 598:
* Comm Unit Arbiter Control register :
* bit 10:GPP interrupts as level sensitive(1) or edge sensitive(0).
* We set the GPP interrupts to be edge sensitive.
* MOTload default is set as level sensitive(1).
*/
outl((inl(GT_CommUnitArb_Ctrl)& (~(1<<10))), GT_CommUnitArb_Ctrl);
#else
outl((inl(GT_CommUnitArb_Ctrl)| (1<<10)), GT_CommUnitArb_Ctrl);
#endif
#if 0
printk("BSP_irqMask_reg[0] = 0x%x, BSP_irqCause_reg[0] 0x%x\n",
in_le32(BSP_irqMask_reg[0]),
in_le32(BSP_irqCause_reg[0]));
printk("BSP_irqMask_reg[1] = 0x%x, BSP_irqCause_reg[1] 0x%x\n",
in_le32(BSP_irqMask_reg[1]),
in_le32(BSP_irqCause_reg[1]));
printk("BSP_irqMask_reg[2] = 0x%x, BSP_irqCause_reg[2] 0x%x\n",
in_le32(BSP_irqMask_reg[2]),
in_le32(BSP_irqCause_reg[2]));
#endif
/* Initialize the interrupt related GT64260 registers */
for (i=0; i<3; i++) {
out_le32(BSP_irqCause_reg[i], 0);
out_le32(BSP_irqMask_reg[i], 0);
}
in_le32(BSP_irqMask_reg[2]);
compute_pic_masks_from_prio();
#if 0
printk("BSP_irqMask_reg[0] = 0x%x, BSP_irqCause_reg[0] 0x%x\n",
in_le32(BSP_irqMask_reg[0]),
in_le32(BSP_irqCause_reg[0]));
printk("BSP_irqMask_reg[1] = 0x%x, BSP_irqCause_reg[1] 0x%x\n",
in_le32(BSP_irqMask_reg[1]),
in_le32(BSP_irqCause_reg[1]));
printk("BSP_irqMask_reg[2] = 0x%x, BSP_irqCause_reg[2] 0x%x\n",
in_le32(BSP_irqMask_reg[2]),
in_le32(BSP_irqCause_reg[2]));
#endif
/*
*
*/
for (i=BSP_MICL_IRQ_LOWEST_OFFSET; i < BSP_PROCESSOR_IRQ_LOWEST_OFFSET ; i++) {
if (rtems_hdl_tbl[i].hdl != default_rtems_entry.hdl) {
BSP_enable_pic_irq(i);
rtems_hdl_tbl[i].on(&rtems_hdl_tbl[i]);
}
else {
rtems_hdl_tbl[i].off(&rtems_hdl_tbl[i]);
BSP_disable_pic_irq(i);
}
}
return(1);
}
/*
* This function check that the value given for the irq line
* is valid.
@@ -442,9 +260,9 @@ int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq)
* RATIONALE : to always have the same transition by forcing the user
* to get the previous handler before accepting to disconnect.
*/
rtems_interrupt_disable(level);
_CPU_ISR_Disable(level);
if (rtems_hdl_tbl[irq->name].hdl != default_rtems_entry.hdl) {
rtems_interrupt_enable(level);
_CPU_ISR_Enable(level);
printk("IRQ vector %d already connected\n",irq->name);
return 0;
}
@@ -453,33 +271,35 @@ int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq)
* store the data provided by user
*/
rtems_hdl_tbl[irq->name] = *irq;
#ifdef BSP_SHARED_HANDLER_SUPPORT
rtems_hdl_tbl[irq->name].next_handler = (void *)-1;
#endif
if (is_pic_irq(irq->name)) {
if (is_main_irq(irq->name)) {
/*
* Enable PIC irq : Main Interrupt Cause Low and High & GPP external
* Enable (internal ) Main Interrupt Cause Low and High
*/
#ifdef DEBUG_IRQ
printk("PIC irq %d\n",irq->name);
printk("main irq %d\n",irq->name);
#endif
BSP_enable_pic_irq(irq->name);
BSP_enable_main_irq(irq->name);
}
if (is_gpp_irq(irq->name)) {
/*
* Enable (external) GPP[x] interrupt
*/
BSP_enable_gpp_irq((int) irq->name);
}
else {
if (is_processor_irq(irq->name)) {
/*
* Enable exception at processor level
*/
}
if (is_processor_irq(irq->name)) {
/*
* Enable exception at processor level
*/
}
/*
* Enable interrupt on device
*/
irq->on(irq);
irq->on(irq);*/
rtems_interrupt_enable(level);
_CPU_ISR_Enable(level);
return 1;
}
@@ -511,19 +331,24 @@ int BSP_remove_rtems_irq_handler (const rtems_irq_connect_data* irq)
if (rtems_hdl_tbl[irq->name].hdl != irq->hdl) {
return 0;
}
rtems_interrupt_disable(level);
_CPU_ISR_Disable(level);
/*
* disable PIC interrupt
*/
if (is_pic_irq(irq->name))
BSP_disable_pic_irq(irq->name);
else {
if (is_processor_irq(irq->name)) {
/*
* disable exception at processor level
*/
}
if (is_main_irq(irq->name)) {
/*
* disable CPU main interrupt
*/
BSP_disable_main_irq(irq->name);
}
if (is_gpp_irq(irq->name)) {
/*
* disable external interrupt
*/
BSP_disable_gpp_irq(irq->name);
}
if (is_processor_irq(irq->name)) {
/*
* disable exception at processor level
*/
}
/*
@@ -536,8 +361,7 @@ int BSP_remove_rtems_irq_handler (const rtems_irq_connect_data* irq)
*/
rtems_hdl_tbl[irq->name] = default_rtems_entry;
rtems_interrupt_enable(level);
_CPU_ISR_Enable(level);
return 1;
}
@@ -548,9 +372,8 @@ int BSP_remove_rtems_irq_handler (const rtems_irq_connect_data* irq)
int BSP_rtems_irq_mngt_set(rtems_irq_global_settings* config)
{
unsigned int level;
int i;
unsigned int level;
/*
* Store various code accelerators
*/
@@ -558,17 +381,51 @@ int BSP_rtems_irq_mngt_set(rtems_irq_global_settings* config)
default_rtems_entry = config->defaultEntry;
rtems_hdl_tbl = config->irqHdlTbl;
rtems_interrupt_disable(level);
_CPU_ISR_Disable(level);
compute_GT64260int_masks_from_prio();
if ( !BSP_setup_the_pic() ) {
printk("PIC setup failed; leaving IRQs OFF\n");
return 0;
/*
* set up internal tables used by rtems interrupt prologue
*/
/*
* start with MAIN CPU IRQ
*/
for (i=BSP_MICL_IRQ_LOWEST_OFFSET; i < BSP_GPP_IRQ_LOWEST_OFFSET ; i++) {
if (rtems_hdl_tbl[i].hdl != default_rtems_entry.hdl) {
BSP_enable_main_irq(i);
rtems_hdl_tbl[i].on(&rtems_hdl_tbl[i]);
}
else {
rtems_hdl_tbl[i].off(&rtems_hdl_tbl[i]);
BSP_disable_main_irq(i);
}
}
/*
* continue with external IRQ
*/
for (i=BSP_GPP_IRQ_LOWEST_OFFSET; i<BSP_PROCESSOR_IRQ_LOWEST_OFFSET; i++) {
if (rtems_hdl_tbl[i].hdl != default_rtems_entry.hdl) {
BSP_enable_gpp_irq(i);
rtems_hdl_tbl[i].on(&rtems_hdl_tbl[i]);
}
else {
rtems_hdl_tbl[i].off(&rtems_hdl_tbl[i]);
BSP_disable_gpp_irq(i);
}
}
for (i= BSP_MAIN_GPP7_0_IRQ; i <= BSP_MAIN_GPP31_24_IRQ; i++)
BSP_enable_pic_irq(i);
rtems_interrupt_enable(level);
/*
* finish with Processor exceptions handled like IRQ
*/
for (i=BSP_PROCESSOR_IRQ_LOWEST_OFFSET; i < BSP_PROCESSOR_IRQ_MAX_OFFSET+1; i++) {
if (rtems_hdl_tbl[i].hdl != default_rtems_entry.hdl) {
rtems_hdl_tbl[i].on(&rtems_hdl_tbl[i]);
}
else {
rtems_hdl_tbl[i].off(&rtems_hdl_tbl[i]);
}
}
_CPU_ISR_Enable(level);
return 1;
}
@@ -578,74 +435,85 @@ int BSP_rtems_irq_mngt_get(rtems_irq_global_settings** config)
return 0;
}
int _BSP_vme_bridge_irq = -1;
/*
* High level IRQ handler called from shared_raw_irq_code_entry
*/
void C_dispatch_irq_handler (CPU_Interrupt_frame *frame, unsigned int excNum)
{
register unsigned msr, new_msr;
unsigned long irqCause[3]={0, 0,0};
register unsigned long selectCause;
unsigned oldMask[3]={0,0,0};
register unsigned i=0, j, irq=0, bitmask=0, group=0;
register unsigned msr;
register unsigned new_msr;
unsigned mainCause[2];
register unsigned selectCause;
register unsigned oldMask[2]={0,0};
unsigned i, regNum, irq, bitNum, startIrqNum=0;
if (excNum == ASM_DEC_VECTOR) {
_MSR_GET(msr);
_CPU_MSR_GET(msr);
new_msr = msr | MSR_EE;
_MSR_SET(new_msr);
_CPU_MSR_SET(new_msr);
rtems_hdl_tbl[BSP_DECREMENTER].hdl(rtems_hdl_tbl[BSP_DECREMENTER].handle);
_MSR_SET(msr);
_CPU_MSR_SET(msr);
return;
}
for (j=0; j<3; j++ ) oldMask[j] = BSP_irqMask_cache[j];
if ((selectCause= in_le32((volatile unsigned *)0xf1000c70)) & HI_INT_CAUSE ){
irqCause[1] = (selectCause & BSP_irqMask_cache[1]);
irqCause[2] = in_le32(BSP_irqCause_reg[2]) & BSP_irqMask_cache[2];
selectCause = inl( GT_CPU_SEL_CAUSE);
if (selectCause & HI_INT_CAUSE ) {
mainCause[1]= selectCause & inl(GT_CPU_INT_MASK_HI);
startIrqNum=32;
}
else {
irqCause[0] = (selectCause & BSP_irqMask_cache[0]);
if ((irqCause[1] =(in_le32((volatile unsigned *)0xf1000c68)&BSP_irqMask_cache[1])))
irqCause[2] = in_le32(BSP_irqCause_reg[2]) & BSP_irqMask_cache[2];
mainCause[0] =inl(GT_MAIN_INT_CAUSE_LO)&inl(GT_CPU_INT_MASK_LO);
mainCause[1] =inl(GT_MAIN_INT_CAUSE_HI)&inl(GT_CPU_INT_MASK_HI);
}
while ((irq = picIsrTable[i++])!=-1)
{
if (irqCause[group=(irq/32)] && (irqCause[group]&(bitmask=(1<<(irq % 32))))) {
for (j=0; j<3; j++)
BSP_irqMask_cache[j] &= (~ BSP_irq_prio_mask_tbl[j][irq]);
RTEMS_COMPILER_MEMORY_BARRIER();
out_le32((volatile unsigned *)0xf1000c1c, BSP_irqMask_cache[0]);
out_le32((volatile unsigned *)0xf1000c6c, BSP_irqMask_cache[1]);
out_le32((volatile unsigned *)0xf100f10c, BSP_irqMask_cache[2]);
in_le32((volatile unsigned *)0xf100f10c);
#ifdef EDGE_TRIGGER
if (irq > BSP_MICH_IRQ_MAX_OFFSET)
out_le32(BSP_irqCause_reg[2], ~bitmask);/* Till Straumann: Ack the edge triggered GPP IRQ */
#if 0
/* very bad practice to put printk here, use only if for debug */
printk("main 0 %x, main 1 %x \n", mainCause[0],mainCause[1]);
#endif
oldMask[0]= GT_MAINirqLO_cache;
oldMask[1]= GT_MAINirqHI_cache;
_MSR_GET(msr);
for (i=0;mainIrqTbl[i]!=-1;i++) {
irq=mainIrqTbl[i];
if ( irq < startIrqNum ) continue;
regNum = irq/32;
bitNum = irq % 32;
if ( mainCause[regNum] & (1<<bitNum)) {
GT_MAINirqLO_cache=oldMask[0]&(~irq_prio_maskLO_tbl[irq]);
outl(GT_MAINirqLO_cache, GT_CPU_INT_MASK_LO);
__asm __volatile("sync");
GT_MAINirqHI_cache=oldMask[1]&(~irq_prio_maskHI_tbl[irq]);
outl(GT_MAINirqHI_cache, GT_CPU_INT_MASK_HI);
__asm __volatile("sync");
/* <skf> It seems that reading back is necessary to ensure the
* interrupt mask updated. Otherwise, spurious interrupt will
* happen. However, I do not want to use "while loop" to risk
* the CPU stuck. I wound rather keep track of the interrupt
* mask if not updated.
*/
if (((irqLOW[irqIndex]= inl(GT_CPU_INT_MASK_LO))!=GT_MAINirqLO_cache)||
((irqHIGH[irqIndex]= inl(GT_CPU_INT_MASK_HI))!=GT_MAINirqHI_cache)){
irqIndex++;
irqIndex %=20;
irqCAUSE[irqIndex] = irq;
}
_CPU_MSR_GET(msr);
new_msr = msr | MSR_EE;
_MSR_SET(new_msr);
_CPU_MSR_SET(new_msr);
rtems_hdl_tbl[irq].hdl(rtems_hdl_tbl[irq].handle);
_MSR_SET(msr);
for (j=0; j<3; j++ ) BSP_irqMask_cache[j] = oldMask[j];
_CPU_MSR_SET(msr);
break;
}
}
out_le32((volatile unsigned *)0xf1000c1c, oldMask[0]);
out_le32((volatile unsigned *)0xf1000c6c, oldMask[1]);
out_le32((volatile unsigned *)0xf100f10c, oldMask[2]);
in_le32((volatile unsigned *)0xf100f10c);
GT_MAINirqLO_cache=oldMask[0];
outl(GT_MAINirqLO_cache, GT_CPU_INT_MASK_LO);
GT_MAINirqHI_cache=oldMask[1];
outl(GT_MAINirqHI_cache, GT_CPU_INT_MASK_HI);
}
void _ThreadProcessSignalsFromIrq (BSP_Exception_frame* ctx)
@@ -667,15 +535,10 @@ void _ThreadProcessSignalsFromIrq (BSP_Exception_frame* ctx)
*/
}
/* Only print part of the entries for now */
void BSP_printPicIsrTbl()
void BSP_printIRQMask()
{
int i;
printk("picIsrTable[12]={");
for (i=0; i<12; i++)
printk("%d,", picIsrTable[i]);
printk("}\n");
printk("GPPIrqInTbl: 0x%x :\n", GPPIrqInTbl);
for (i=0; i< 20; i++)
printk("IRQ%d : 0x%x %x \n", irqCAUSE[i], irqHIGH[i],irqLOW[i]);
}

View File

@@ -15,13 +15,12 @@
* found in found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*
* Copyright 2004, 2005 Brookhaven National Laboratory and
* Copyright 2004, Brookhaven National Laboratory and
* Shuchen Kate Feng <feng1@bnl.gov>
*
* - modified shared/irq/irq.h for Mvme5500 (no ISA devices/PIC)
* - Discovery GT64260 interrupt controller instead of 8259.
* - Added support for software IRQ priority levels.
* - modified to optimize the IRQ latency and handling
*
* $Id$
*/
@@ -29,14 +28,13 @@
#ifndef LIBBSP_POWERPC_MVME5500_IRQ_IRQ_H
#define LIBBSP_POWERPC_MVME5500_IRQ_IRQ_H
/*#define BSP_SHARED_HANDLER_SUPPORT 1*/
#include <rtems/irq.h>
#define BSP_ASM_IRQ_VECTOR_BASE 0x0
#ifndef ASM
#define OneTierIrqPrioTbl 1
#define DynamicIrqTbl 1
/*
* Symbolic IRQ names and related definitions.
@@ -85,8 +83,7 @@
* Summary
*/
#define BSP_IRQ_NUMBER (BSP_MISC_IRQ_MAX_OFFSET + 1)
#define BSP_MAIN_IRQ_NUMBER (64)
#define BSP_PIC_IRQ_NUMBER (96)
#define BSP_MAIN_IRQ_NUMBER (64)
#define BSP_LOWEST_OFFSET (BSP_MICL_IRQ_LOWEST_OFFSET)
#define BSP_MAX_OFFSET (BSP_MISC_IRQ_MAX_OFFSET)
@@ -112,7 +109,6 @@
#define BSP_MAIN_GPP31_24_IRQ (BSP_MICH_IRQ_LOWEST_OFFSET+27)
/* on the MVME5500, these are the GT64260B external GPP0 interrupt */
#define BSP_PCI_IRQ_LOWEST_OFFSET (BSP_GPP_IRQ_LOWEST_OFFSET)
#define BSP_UART_COM2_IRQ (BSP_GPP_IRQ_LOWEST_OFFSET)
#define BSP_UART_COM1_IRQ (BSP_GPP_IRQ_LOWEST_OFFSET)
#define BSP_GPP8_IRQ_OFFSET (BSP_GPP_IRQ_LOWEST_OFFSET+8)
@@ -133,7 +129,29 @@
*/
#define BSP_DECREMENTER (BSP_PROCESSOR_IRQ_LOWEST_OFFSET)
typedef unsigned int rtems_GTirq_masks;
extern rtems_GTirq_masks GT_GPPirq_cache;
extern rtems_GTirq_masks GT_MAINirqLO_cache, GT_MAINirqHI_cache;
void BSP_enable_main_irq(unsigned irqNum);
void BSP_disable_main_irq(unsigned irqNum);
void BSP_enable_gpp_irq(unsigned irqNum);
void BSP_disable_gpp_irq(unsigned irqNum);
extern void BSP_rtems_irq_mng_init(unsigned cpuId);
extern int gpp_int_error;
#if DynamicIrqTbl
extern int MainIrqTblPtr;
extern unsigned long long MainIrqInTbl;
extern unsigned char GPPinMainIrqTbl[4];
#endif
extern unsigned int mainIrqTbl[64];
extern unsigned int GPP7_0IrqTbl[8];
extern unsigned int GPP15_8IrqTbl[8];
extern unsigned int GPP23_16IrqTbl[8];
extern unsigned int GPP31_24IrqTbl[8];
#endif
#endif

View File

@@ -5,13 +5,16 @@
*
* CopyRight (C) 1999 valette@crf.canon.fr
*
* Special acknowledgement to Till Straumann <strauman@slac.stanford.edu>
* for providing inputs to the IRQ optimization.
*
* Modified and added support for the MVME5500.
* Copyright 2003, 2004, 2005, Brookhaven National Laboratory and
* Copyright 2003, 2004, Brookhaven National Laboratory and
* Shuchen Kate Feng <feng1@bnl.gov>
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE
* http://www.rtems.com/license/LICENSE.
*
*/
#include <libcpu/io.h>
@@ -19,12 +22,14 @@
#include <bsp/irq.h>
#include <bsp.h>
#include <libcpu/raw_exception.h> /* ASM_EXT_VECTOR, ASM_DEC_VECTOR ... */
/*#define TRACE_IRQ_INIT*/
extern unsigned int external_exception_vector_prolog_code_size[];
extern void external_exception_vector_prolog_code();
extern unsigned int decrementer_exception_vector_prolog_code_size[];
extern void decrementer_exception_vector_prolog_code();
extern void GT_GPP_IntHandler0(), GT_GPP_IntHandler1();
extern void GT_GPP_IntHandler2(), GT_GPP_IntHandler3();
extern void BSP_GT64260INT_init();
/*
* default on/off function
@@ -42,49 +47,116 @@ static int connected() {return 1;}
static rtems_irq_connect_data rtemsIrq[BSP_IRQ_NUMBER];
static rtems_irq_global_settings initial_config;
static rtems_irq_connect_data defaultIrq = {
/* vectorIdex, hdl , handle , on , off , isOn */
0, nop_func , NULL , nop_func , nop_func , not_connected
/* vectorIdex, hdl , handle , on , off , isOn */
0, nop_func , NULL , nop_func , nop_func , not_connected
};
rtems_irq_prio BSPirqPrioTable[BSP_PIC_IRQ_NUMBER]={
rtems_irq_prio BSPirqPrioTable[BSP_MAIN_IRQ_NUMBER]={
/*
* This table is where the developers can change the levels of priority
* based on the need of their applications.
*
* actual priorities for CPU MAIN and GPP interrupts (0-95)
*
* actual priorities for CPU MAIN interrupts 0-63:
* 0 means that only current interrupt is masked (lowest priority)
* 255 is only used by bits 24, 25, 26 and 27 of the CPU high
* interrupt Mask: (e.g. GPP7_0, GPP15_8, GPP23_16, GPP31_24).
* The IRQs of those four bits are always enabled. When it's used,
* the IRQ number is never listed in the dynamic picIsrTable[96].
*
* The priorities of GPP interrupts were decided by their own
* value set at BSPirqPrioTable.
*
* 255 means all other interrupts are masked
*/
/* CPU Main cause low interrupt */
/* 0-15 */
0, 0, 0, 0, 0, 0, 0, 0, 64/*Timer*/, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 4/*Timer*/, 0, 0, 0, 0, 0, 0, 0,
/* 16-31 */
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
/* CPU Main cause high interrupt */
/* 32-47 */
2/*10/100MHz*/, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1/*10/100MHZ*/, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
/* 48-63 */
0, 0, 0, 0, 0, 0, 0, 0,
255 /*GPP0-7*/, 255/*GPP8-15*/, 255/*GPP16-23*/, 255/*GPP24-31*/, 0, 0, 0, 0,
/* GPP interrupts */
/* GPP0-7 */
1/*serial*/,0, 0, 0, 0, 0, 0, 0,
/* GPP8-15 */
47/*PMC1A*/,46/*PMC1B*/,45/*PMC1C*/,44/*PMC1D*/,30/*VME0*/, 29/*VME1*/,3,1,
/* GPP16-23 */
37/*PMC2A*/,36/*PMC2B*/,35/*PMC2C*/,34/*PMC2D*/,23/*1GHz*/, 0,0,0,
/* GPP24-31 */
7/*watchdog*/, 0,0,0,0,0,0,0
0, 0, 0, 0, 0, 0, 0, 0, 0/*serial*/, 3/*VME*/, 2/*1GHZ*/, 5/*WD*/, 0, 0, 0, 0
};
/* The mainIrqTbl[64] lists the enabled CPU main interrupt
* numbers [0-63] starting from the highest priority one
* to the lowest priority one.
*
* The highest priority interrupt is located at mainIrqTbl[0], and
* the lowest priority interrupt is located at
* mainIrqTbl[MainIrqTblPtr-1].
*/
#if DynamicIrqTbl
/* The mainIrqTbl[64] is updated dynamically based on the priority
* levels set at BSPirqPrioTable[64], as the BSP_enable_main_irq() and
* BSP_disable_main_irq() commands are invoked.
*
* Caveat: The eight GPP IRQs for each BSP_MAIN_GPPx_y_IRQ group are set
* at the same main priority in the BSPirqPrioTable, while the
* sub-priority levels for the eight GPP in each group are sorted
* statically by developers in the GPPx_yIrqTbl[8] from the highest
* priority to the lowest one.
*/
int MainIrqTblPtr=0;
unsigned long long MainIrqInTbl=0;
unsigned char GPPinMainIrqTbl[4]={0,0,0,0};
/* BitNums for Main Interrupt Lo/High Cause, -1 means invalid bit */
unsigned int mainIrqTbl[BSP_MAIN_IRQ_NUMBER]={
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1};
#else
/* Pre-sorted for IRQ optimization, and prioritization
* The interrupts sorted are :
1. Watchdog timer (GPP #25)
2. Timers 0-1 (Main interrupt low cause, bit 8)
3. VME interrupt (GPP #12)
4. 1 GHZ ethernet (GPP #20)
5. 10/100 MHZ ethernet (Main interrupt high cause, bit 0)
6. COM1/COM2 (GPP #0)
*/
/* BitNums for Main Interrupt Lo/High Cause, -1 means invalid bit */
unsigned int mainIrqTbl[64]={ BSP_MAIN_GPP31_24_IRQ, /* 59:watchdog timer */
BSP_MAIN_TIMER0_1_IRQ, /* 8:Timers 0-1 */
BSP_MAIN_GPP15_8_IRQ, /* 57:VME interrupt */
BSP_MAIN_GPP23_16_IRQ, /* 58: 1 GHZ ethernet */
BSP_MAIN_ETH0_IRQ, /* 32:10/100 MHZ ethernet */
BSP_MAIN_GPP7_0_IRQ, /* 56:COM1/COM2 */
-1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1};
#endif
unsigned int GPP7_0IrqTbl[8]={0, /* COM1/COM2 */
-1, -1, -1, -1, -1, -1, -1};
unsigned int GPP15_8IrqTbl[8]={ 4, 5, 6, 7, /* VME interrupt 0-3 */
0, 1, 2, 3 /* PMC1 INT A, B, C, D */};
unsigned int GPP23_16IrqTbl[8]={4, /* 82544 1GHZ ethernet (20-16=4)*/
0, 1, 2, 3, /* PMC2 INT A, B, C, D */
-1, -1, -1};
unsigned int GPP31_24IrqTbl[8]={1, /* watchdog timer (25-24=1) */
-1, -1, -1, -1, -1, -1, -1};
static int
doit(unsigned intNum, rtems_irq_hdl handler, int (*p)(const rtems_irq_connect_data*))
{
rtems_irq_connect_data d={0};
d.name = intNum;
d.isOn = connected;
d.hdl = handler;
return p(&d);
}
int BSP_GT64260_install_isr(unsigned intNum,rtems_irq_hdl handler)
{
return doit(intNum, handler, BSP_install_rtems_irq_handler);
}
/*
* This code assumes the exceptions management setup has already
* been done. We just need to replace the exceptions that will
@@ -102,6 +174,7 @@ void BSP_rtems_irq_mng_init(unsigned cpuId)
#ifdef TRACE_IRQ_INIT
printk("Initializing the interrupt controller of the GT64260\n");
#endif
BSP_GT64260INT_init();
#ifdef TRACE_IRQ_INIT
printk("Going to re-initialize the rtemsIrq table %d\n",BSP_IRQ_NUMBER);
@@ -113,8 +186,8 @@ void BSP_rtems_irq_mng_init(unsigned cpuId)
* re-init the rtemsIrq table
*/
for (i = 0; i < BSP_IRQ_NUMBER; i++) {
rtemsIrq[i] = defaultIrq;
rtemsIrq[i].name = i;
rtemsIrq[i] = defaultIrq;
rtemsIrq[i].name = i;
}
/*
@@ -136,10 +209,13 @@ void BSP_rtems_irq_mng_init(unsigned cpuId)
*/
BSP_panic("Unable to initialize RTEMS interrupt Management!!! System locked\n");
}
#ifdef TRACE_IRQ_INIT
printk("Done setup irq mngt configuration\n");
#endif
/* Connect the GPP int handler to each of the associated main cause bits */
BSP_GT64260_install_isr(BSP_MAIN_GPP7_0_IRQ, GT_GPP_IntHandler0); /* COM1 & COM2, .... */
BSP_GT64260_install_isr(BSP_MAIN_GPP15_8_IRQ, GT_GPP_IntHandler1);
BSP_GT64260_install_isr(BSP_MAIN_GPP23_16_IRQ, GT_GPP_IntHandler2);
BSP_GT64260_install_isr(BSP_MAIN_GPP31_24_IRQ, GT_GPP_IntHandler3);
/*
* We must connect the raw irq handler for the two
* expected interrupt sources : decrementer and external interrupts.

View File

@@ -1,28 +1,44 @@
/* GT64260eth.c : GT64260 10/100 Mb ethernet MAC driver
*
* Copyright (c) 2003,2004 Brookhaven National Laboratory
* S. Kate Feng <feng1@bnl.gov>
* All rights reserved
* Copyright (c) 2002 Allegro Networks, Inc., Wasabi Systems, Inc.
*
* Acknowledgements:
* netBSD : Copyright (c) 2002 Allegro Networks, Inc., Wasabi Systems, Inc.
* Marvell : NDA document for the discovery system controller
* The author referenced two RTEMS network drivers of other NICs.
* rtems : 1) dec21140.c, a network driver for for TULIP based Ethernet Controller
* (C) 1999 Emmanuel Raguet. raguet@crf.canon.fr
* Copyright (c) 2003,2004 RTEMS/Mvme5500 port by S. Kate Feng <feng1@bnl.gov>
*
* 2) yellowfin.c, a network driver for the SVGM5 BSP.
* Stanford Linear Accelerator Center, Till Straumann
* All rights reserved.
*
* Some notes from the author, S. Kate Feng :
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed for the NetBSD Project by
* Allegro Networks, Inc., and Wasabi Systems, Inc.
* 4. The name of Allegro Networks, Inc. may not be used to endorse
* or promote products derived from this software without specific prior
* written permission.
* 5. The name of Wasabi Systems, Inc. may not be used to endorse
* or promote products derived from this software without specific prior
* written permission.
*
* S. Kate Feng, other notes in addition to porting to RTEMS :
*
* 1) Mvme5500 uses Eth0 (controller 0) of the GT64260 to implement
* the 10/100 BaseT Ethernet with PCI Master Data Byte Swap\
* control.
* 2) Implemented hardware snoop instead of software snoop
* to ensure SDRAM cache coherency. (Copyright : NDA item)
* 3) Added S/W support for multi mbuf. (TODO : Let the H/W do it)
*
* 2) It implements hardware snoop instead of software snoop
* to ensure SDRAM cache coherency.
* 3) The origianl ISR is optimized to minimize interrupt latencies,
* and to reduce system overhead. The driver's work is done by one single
* task who blocks on an event while it is idle. This implemetation
* is heavily inspired by the modification of SVGM network driver for
* RTEMS port written by Till Straumann, whihc is licensed under the
* EPICS open source. Ditto the GT64260eth_sendpacket().
*
*/
#define BYTE_ORDER BIG_ENDIAN
@@ -140,6 +156,7 @@ static void GT64260eth_irq_on(const rtems_irq_connect_data *irq)
struct GTeth_softc *sc;
for (sc= root_GT64260eth_dev; sc; sc= sc-> next_module) {
printk("GT64260eth_irq_on\n");
outl(0x30883444,ETH0_EIMR); /* MOTLoad default interrupt mask */
return;
}
@@ -168,12 +185,6 @@ static void GT64260eth_isr()
cause = inl(ETH0_EICR);
outl( ~cause,ETH0_EICR); /* clear the ICR */
if ( (!cause) || (cause & 0x803d00)) {
sc->intr_errsts[sc->intr_err_ptr2++]=cause;
sc->intr_err_ptr2 %=INTR_ERR_SIZE; /* Till Straumann */
events |= ERR_EVENT;
}
/* ETH_IR_RxBuffer_3|ETH_IR_RxError_3 */
if (cause & 0x880000) {
sc->stats.rxInterrupts++;
@@ -195,6 +206,12 @@ static void GT64260eth_isr()
}
if ( (!cause) || (cause & 0x803d00)) {
sc->intr_errsts[sc->intr_err_ptr2++]=cause;
sc->intr_err_ptr2 %=INTR_ERR_SIZE; /* Till Straumann */
events |= ERR_EVENT;
}
rtems_event_send(sc->daemonTid, events);
}
@@ -251,7 +268,7 @@ static void GT64260eth_init_hw(struct GTeth_softc *sc)
* take care of enabling interrupts
*/
if (!BSP_install_rtems_irq_handler(&GT64260ethIrqData))
printk("GT64260eth: unable to install ISR");
rtems_panic("GT64260eth: unable to install ISR");
/* The ethernet port is ready to transmit/receive */
outl(sc->sc_pcr | ETH_EPCR_EN, ETH0_EPCR);
@@ -271,7 +288,7 @@ static void GT64260eth_stop_hw(struct GTeth_softc *sc)
* itself
*/
if (!BSP_remove_rtems_irq_handler(&GT64260ethIrqData))
printk("GT64260eth: unable to remove IRQ handler!");
rtems_panic("Yellowfin: unable to remove IRQ handler!");
outl(sc->sc_pcr, ETH0_EPCR);
outl(0, ETH0_EIMR);
@@ -366,6 +383,7 @@ int rtems_GT64260eth_driver_attach(struct rtems_bsdnet_ifconfig *config, int att
if (unit < 0) return 0;
printk("\nEthernet driver name %s unit %d \n",name, unit);
printk("Copyright (c) 2002 Allegro Networks, Inc., Wasabi Systems, Inc.\n");
printk("(c) 2004, Brookhaven National Lab. <feng1@bnl.gov> (RTEMS/mvme5500 port)\n");
/* Make certain elements e.g. descriptor lists are aligned. */
@@ -373,7 +391,7 @@ int rtems_GT64260eth_driver_attach(struct rtems_bsdnet_ifconfig *config, int att
/* Check for the very unlikely case of no memory. */
if (softc_mem == NULL)
printk("GT64260eth: OUT OF MEMORY");
rtems_panic("GT64260eth: OUT OF MEMORY");
sc = (void *)(((long)softc_mem + SOFTC_ALIGN) & ~SOFTC_ALIGN);
memset(sc, 0, sizeof(*sc));
@@ -466,7 +484,7 @@ int rtems_GT64260eth_driver_attach(struct rtems_bsdnet_ifconfig *config, int att
printk("sdcr %x \n", sdcr);
#endif
if (phyaddr== -1) printk("MII auto negotiation ?");
if (phyaddr== -1) rtems_panic("MII auto negotiation ?");
ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
@@ -491,7 +509,7 @@ int rtems_GT64260eth_driver_attach(struct rtems_bsdnet_ifconfig *config, int att
/* create the synchronization semaphore */
if (RTEMS_SUCCESSFUL != rtems_semaphore_create(
rtems_build_name('G','e','t','h'),0,0,0,&sc->daemonSync))
printk("GT64260eth: semaphore creation failed");
rtems_panic("GT64260eth: semaphore creation failed");
sc->next_module = root_GT64260eth_dev;
root_GT64260eth_dev = sc;
@@ -511,7 +529,6 @@ static void GT64260eth_stats(struct GTeth_softc *sc)
{
struct ifnet *ifp = &sc->arpcom.ac_if;
#if 0
printf(" Rx Interrupts:%-8lu\n", sc->stats.rxInterrupts);
printf(" Receive Packets:%-8lu\n", ifp->if_ipackets);
printf(" Receive errors:%-8lu\n", ifp->if_ierrors);
@@ -520,23 +537,11 @@ static void GT64260eth_stats(struct GTeth_softc *sc)
printf(" Oversized Frames:%-8lu\n", sc->stats.length_errors);
printf(" Active Rxqs:%-8u\n", sc->rxq_active);
printf(" Tx Interrupts:%-8lu\n", sc->stats.txInterrupts);
#endif
printf("Multi-BuffTx Packets:%-8lu\n", sc->stats.txMultiBuffPacket);
printf("Multi-BuffTx max len:%-8lu\n", sc->stats.txMultiMaxLen);
printf("SingleBuffTx max len:%-8lu\n", sc->stats.txSinglMaxLen);
printf("Multi-BuffTx maxloop:%-8lu\n", sc->stats.txMultiMaxLoop);
printf("Tx buffer max len :%-8lu\n", sc->stats.txBuffMaxLen);
#if 0
printf("Multi-Buffer Packets:%-8lu\n", sc->stats.txMultiBuffPacket);
printf(" Transmitt Packets:%-8lu\n", ifp->if_opackets);
printf(" Transmitt errors:%-8lu\n", ifp->if_oerrors);
printf(" Tx/Rx collisions:%-8lu\n", ifp->if_collisions);
printf(" Active Txqs:%-8u\n", sc->txq_nactive);
#endif
}
void GT64260eth_printStats()
{
GT64260eth_stats(root_GT64260eth_dev);
}
static int GTeth_ifioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
@@ -585,7 +590,6 @@ static int GTeth_ifioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
if (error == ENETRESET) {
if (ifp->if_flags & IFF_RUNNING)
GTeth_ifchange(sc);
else
error = 0;
}
break;
@@ -906,7 +910,7 @@ static int GT64260eth_sendpacket(struct GTeth_softc *sc,struct mbuf *m)
{
volatile struct GTeth_desc *txd = &sc->txq_desc[sc->txq_lo];
unsigned intrmask = sc->sc_intrmask;
unsigned loop=0, index= sc->txq_lo;
unsigned index= sc->txq_lo;
/*
* The end-of-list descriptor we put on last time is the starting point
@@ -916,10 +920,8 @@ static int GT64260eth_sendpacket(struct GTeth_softc *sc,struct mbuf *m)
*/
intrmask = sc->sc_intrmask;
if ( !(m->m_next)) {/* single buffer packet */
if ( !(m->m_next)) /* single buffer packet */
sc->txq_mbuf[index]= m;
sc->stats.txSinglMaxLen= MAX(m->m_len, sc->stats.txSinglMaxLen);
}
else /* multiple mbufs in this packet */
{
struct mbuf *mtp, *mdest;
@@ -933,23 +935,20 @@ static int GT64260eth_sendpacket(struct GTeth_softc *sc,struct mbuf *m)
MCLGET(mdest, M_WAIT);
pt = (volatile unsigned char *)mdest->m_data;
for (mtp=m,len=0;mtp;mtp=mtp->m_next) {
loop++;
if ( (y=(len+mtp->m_len)) > sizeof(union mcluster)) {
/* GT64260 allows us to chain the remaining to the next
/* GT64260 allows us to chain the remaining to the nex
* free descriptors.
*/
printk("packet size %x > mcluster %x\n", y,sizeof(union mcluster));
printk("GT64260eth : packet too large ");
rtems_panic("GT64260eth : packet too large ");
}
memcpy((void *)pt,(char *)mtp->m_data, mtp->m_len);
pt += mtp->m_len;
#if 0
printk("%d ",mtp->m_len);
printk("%d ",mtp->m_len);
#endif
len += mtp->m_len;
sc->stats.txBuffMaxLen=MAX(mtp->m_len,sc->stats.txBuffMaxLen);
}
sc->stats.txMultiMaxLoop=MAX(loop, sc->stats.txMultiMaxLoop);
#if 0
printk("\n");
#endif
@@ -958,7 +957,6 @@ static int GT64260eth_sendpacket(struct GTeth_softc *sc,struct mbuf *m)
m_freem(m);
sc->txq_mbuf[index] = m = mdest;
sc->stats.txMultiBuffPacket++;
sc->stats.txMultiMaxLen= MAX(m->m_len, sc->stats.txMultiMaxLen);
}
if (m->m_len < ET_MINLEN) m->m_len = ET_MINLEN;
@@ -966,8 +964,6 @@ static int GT64260eth_sendpacket(struct GTeth_softc *sc,struct mbuf *m)
txd->ed_lencnt = m->m_len << 16;
/*txd->ed_cmdsts = TX_CMD_L|TX_CMD_GC|TX_CMD_P|TX_CMD_O|TX_CMD_F|TX_CMD_EI;*/
txd->ed_cmdsts = 0x80c70000;
while (txd->ed_cmdsts != 0x80c70000);
memBar();
#ifdef GT_DEBUG
printk("len = %d, cmdsts 0x%x ", m->m_len,txd->ed_cmdsts);
@@ -1142,7 +1138,7 @@ static void GTeth_ifchange(struct GTeth_softc *sc)
{
if (GTeth_debug>0) printk("GTeth_ifchange(");
if (GTeth_debug>5) printk("(pcr=%#x,imr=%#x)",inl(ETH0_EPCR),inl(ETH0_EIMR));
/* printk("SIOCADDMULTI (SIOCDELMULTI): is it about rx or tx ?\n");*/
printk("SIOCADDMULTI (SIOCDELMULTI): is it about rx or tx ?\n");
outl(sc->sc_pcr | ETH_EPCR_EN, ETH0_EPCR);
outl(sc->sc_intrmask, ETH0_EIMR);
GTeth_ifstart(&sc->arpcom.ac_if);
@@ -1255,7 +1251,7 @@ static int GTeth_hash_entry_op(struct GTeth_softc *sc, enum GTeth_hash_op op,
hash = GTeth_hash_compute(sc, eaddr);
if (sc->sc_hashtable == NULL) {
printk("hashtable == NULL!");
rtems_panic("hashtable == NULL!");
}
#ifdef GT_DEBUG
printk("Hash computed %x eaddr %s\n", hash,ether_sprintf1(eaddr));
@@ -1354,7 +1350,7 @@ static int GTeth_hash_entry_op(struct GTeth_softc *sc, enum GTeth_hash_op op,
* If we couldn't find a slot, return an error.
*/
if (maybe_he_p == NULL) {
printk("GT64260eth : No slot found");
rtems_panic("GT64260eth : No slot found");
return ENOSPC;
}
@@ -1523,6 +1519,12 @@ static void GT64260eth_daemon(void *arg)
/* clean up and try sending packets */
do {
#if 0
if (gpp_int_error!=0) {
printk("GPP interrupt error %d\n", gpp_int_error);
gpp_int_error=0;
}
#endif
if (sc->txq_nactive) GTeth_txq_done(sc);
while (sc->txq_free>0) {

View File

@@ -75,9 +75,8 @@ struct GTeth_softc {
unsigned int intr_err_ptr2; /* ptr used in ISR */
struct ifqueue txq_pendq; /* these are ready to go to the GT */
unsigned int txq_pending;
unsigned int txq_lo; /* next to be given to GT DMA */
unsigned int txq_fi; /* next to be free */
unsigned int txq_to_cpu; /* next to be returned to CPU */
unsigned int txq_lo; /* next to be given to GT */
unsigned int txq_fi; /* next to be returned to CPU */
unsigned int txq_ei_gapcount; /* counter until next EI */
unsigned int txq_nactive; /* number of active descriptors */
unsigned int txq_nintr; /* number of txq desc. send TX_EVENT */
@@ -128,10 +127,6 @@ struct GTeth_softc {
volatile unsigned long txInterrupts;
unsigned long txMultiBuffPacket;
unsigned long txMultiMaxLen;
unsigned long txSinglMaxLen;
unsigned long txMultiMaxLoop;
unsigned long txBuffMaxLen;
unsigned long length_errors;
unsigned long frame_errors;
unsigned long crc_errors;

View File

@@ -1,46 +0,0 @@
##
## $Id$
##
VPATH = @srcdir@:
INCLUDES = -I @srcdir@/../GT64260
C_FILES = GT64260eth.c
include_bspdir = $(includedir)/bsp
include_bsp_HEADERS = GT64260eth.h GT64260ethreg.h
H_FILES = GT64260eth.h GT64260ethreg.h
C_O_FILES = $(C_FILES:%.c=$(ARCH)/%.$(OBJEXT))
EXTRA_DIST = GT64260eth.c
OBJS = $(C_O_FILES)
include $(top_srcdir)/../../../../../../automake/compile.am
include $(top_srcdir)/../../../../../../automake/lib.am
CFLAGS += -msoft-float
#
# (OPTIONAL) Add local stuff here using +=
#
$(PROJECT_INCLUDE)/bsp:
$(mkinstalldirs) $<
$(PROJECT_INCLUDE)/bsp/GT64260eth.h: GT64260eth.h
$(INSTALL_DATA) $< $@
$(PROJECT_INCLUDE)/bsp/GT64260ethreg.h: GT64260ethreg.h
$(INSTALL_DATA) $< $@
# the .rel file built here will be put into libbsp.a by ../wrapup/Makefile
PREINSTALL_FILES = $(PROJECT_INCLUDE)/bsp $(PROJECT_INCLUDE)/bsp/GT64260eth.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/GT64260ethreg.h
all-local: $(ARCH) $(PREINSTALL_FILES) $(OBJS)
include $(top_srcdir)/../../../../../../automake/local.am

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@@ -1,45 +0,0 @@
##
## $Id$
##
VPATH = @srcdir@:
INCLUDES = -I @srcdir@/../GT64260
C_FILES = if_wm.c pci_map.c
include_bspdir = $(includedir)/bsp
include_bsp_HEADERS = if_wmreg.h pcireg.h
H_FILES = if_wmreg.h pcireg.h
C_O_FILES = $(C_FILES:%.c=$(ARCH)/%.$(OBJEXT))
EXTRA_DIST = if_wm.c pci_map.c
OBJS = $(C_O_FILES)
include $(top_srcdir)/../../../../../../automake/compile.am
include $(top_srcdir)/../../../../../../automake/lib.am
CFLAGS += -msoft-float
#
# (OPTIONAL) Add local stuff here using +=
#
$(PROJECT_INCLUDE)/bsp:
$(mkinstalldirs) $<
$(PROJECT_INCLUDE)/bsp/if_wmreg.h: if_wmreg.h
$(INSTALL_DATA) $< $@
$(PROJECT_INCLUDE)/bsp/pcireg.h: pcireg.h
$(INSTALL_DATA) $< $@
# the .rel file built here will be put into libbsp.a by ../wrapup/Makefile
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/if_wmreg.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/pcireg.h
all-local: $(ARCH) $(PREINSTALL_FILES) $(OBJS)
include $(top_srcdir)/../../../../../../automake/local.am

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@@ -1,4 +0,0 @@
S. Kate Feng <feng1@bnl.gov>, Sept. 06, 2007
This driver boots smoothly with the 1GHZ media.
It might not boot with the 10/100MHZ media.

File diff suppressed because it is too large Load Diff

View File

@@ -1,737 +0,0 @@
/* $NetBSD: if_wmreg.h,v 1.22 2007/04/29 20:35:21 bouyer Exp $ */
/*
* Copyright (c) 2001 Wasabi Systems, Inc.
* All rights reserved.
*
* Written by Jason R. Thorpe for Wasabi Systems, Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed for the NetBSD Project by
* Wasabi Systems, Inc.
* 4. The name of Wasabi Systems, Inc. may not be used to endorse
* or promote products derived from this software without specific prior
* written permission.
*
* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Register description for the Intel i82542 (``Wiseman''),
* i82543 (``Livengood''), and i82544 (``Cordova'') Gigabit
* Ethernet chips.
*/
/*
* The wiseman supports 64-bit PCI addressing. This structure
* describes the address in descriptors.
*/
typedef struct wiseman_addr {
uint32_t wa_low; /* low-order 32 bits */
uint32_t wa_high; /* high-order 32 bits */
} __attribute__((__packed__)) wiseman_addr_t;
/*
* The Wiseman receive descriptor.
*
* The receive descriptor ring must be aligned to a 4K boundary,
* and there must be an even multiple of 8 descriptors in the ring.
*/
typedef struct wiseman_rxdesc {
wiseman_addr_t wrx_addr; /* buffer address */
uint16_t wrx_len; /* buffer length */
uint16_t wrx_cksum; /* checksum (starting at PCSS) */
uint8_t wrx_status; /* Rx status */
uint8_t wrx_errors; /* Rx errors */
uint16_t wrx_special; /* special field (VLAN, etc.) */
} __attribute__((__packed__)) wiseman_rxdesc_t;
/* wrx_status bits */
#define WRX_ST_DD (1U << 0) /* descriptor done */
#define WRX_ST_EOP (1U << 1) /* end of packet */
#define WRX_ST_IXSM (1U << 2) /* ignore checksum indication */
#define WRX_ST_VP (1U << 3) /* VLAN packet */
#define WRX_ST_BPDU (1U << 4) /* ??? */
#define WRX_ST_TCPCS (1U << 5) /* TCP checksum performed */
#define WRX_ST_IPCS (1U << 6) /* IP checksum performed */
#define WRX_ST_PIF (1U << 7) /* passed in-exact filter */
/* wrx_error bits */
#define WRX_ER_CE (1U << 0) /* CRC error */
#define WRX_ER_SE (1U << 1) /* symbol error */
#define WRX_ER_SEQ (1U << 2) /* sequence error */
#define WRX_ER_ICE (1U << 3) /* ??? */
#define WRX_ER_CXE (1U << 4) /* carrier extension error */
#define WRX_ER_TCPE (1U << 5) /* TCP checksum error */
#define WRX_ER_IPE (1U << 6) /* IP checksum error */
#define WRX_ER_RXE (1U << 7) /* Rx data error */
/* wrx_special field for VLAN packets */
#define WRX_VLAN_ID(x) ((x) & 0x0fff) /* VLAN identifier */
#define WRX_VLAN_CFI (1U << 12) /* Canonical Form Indicator */
#define WRX_VLAN_PRI(x) (((x) >> 13) & 7)/* VLAN priority field */
/*
* The Wiseman transmit descriptor.
*
* The transmit descriptor ring must be aligned to a 4K boundary,
* and there must be an even multiple of 8 descriptors in the ring.
*/
typedef struct wiseman_tx_fields {
uint8_t wtxu_status; /* Tx status */
uint8_t wtxu_options; /* options */
uint16_t wtxu_vlan; /* VLAN info */
} __attribute__((__packed__)) wiseman_txfields_t;
typedef struct wiseman_txdesc {
wiseman_addr_t wtx_addr; /* buffer address */
uint32_t wtx_cmdlen; /* command and length */
wiseman_txfields_t wtx_fields; /* fields; see below */
} __attribute__((__packed__)) wiseman_txdesc_t;
/* Commands for wtx_cmdlen */
#define WTX_CMD_EOP (1U << 24) /* end of packet */
#define WTX_CMD_IFCS (1U << 25) /* insert FCS */
#define WTX_CMD_RS (1U << 27) /* report status */
#define WTX_CMD_RPS (1U << 28) /* report packet sent */
#define WTX_CMD_DEXT (1U << 29) /* descriptor extension */
#define WTX_CMD_VLE (1U << 30) /* VLAN enable */
#define WTX_CMD_IDE (1U << 31) /* interrupt delay enable */
/* Descriptor types (if DEXT is set) */
#define WTX_DTYP_C (0U << 20) /* context */
#define WTX_DTYP_D (1U << 20) /* data */
/* wtx_fields status bits */
#define WTX_ST_DD (1U << 0) /* descriptor done */
#define WTX_ST_EC (1U << 1) /* excessive collisions */
#define WTX_ST_LC (1U << 2) /* late collision */
#define WTX_ST_TU (1U << 3) /* transmit underrun */
/* wtx_fields option bits for IP/TCP/UDP checksum offload */
#define WTX_IXSM (1U << 0) /* IP checksum offload */
#define WTX_TXSM (1U << 1) /* TCP/UDP checksum offload */
/* Maximum payload per Tx descriptor */
#define WTX_MAX_LEN 4096
/*
* The Livengood TCP/IP context descriptor.
*/
struct livengood_tcpip_ctxdesc {
uint32_t tcpip_ipcs; /* IP checksum context */
uint32_t tcpip_tucs; /* TCP/UDP checksum context */
uint32_t tcpip_cmdlen;
uint32_t tcpip_seg; /* TCP segmentation context */
};
/* commands for context descriptors */
#define WTX_TCPIP_CMD_TCP (1U << 24) /* 1 = TCP, 0 = UDP */
#define WTX_TCPIP_CMD_IP (1U << 25) /* 1 = IPv4, 0 = IPv6 */
#define WTX_TCPIP_CMD_TSE (1U << 26) /* segmentation context valid */
#define WTX_TCPIP_IPCSS(x) ((x) << 0) /* checksum start */
#define WTX_TCPIP_IPCSO(x) ((x) << 8) /* checksum value offset */
#define WTX_TCPIP_IPCSE(x) ((x) << 16) /* checksum end */
#define WTX_TCPIP_TUCSS(x) ((x) << 0) /* checksum start */
#define WTX_TCPIP_TUCSO(x) ((x) << 8) /* checksum value offset */
#define WTX_TCPIP_TUCSE(x) ((x) << 16) /* checksum end */
#define WTX_TCPIP_SEG_STATUS(x) ((x) << 0)
#define WTX_TCPIP_SEG_HDRLEN(x) ((x) << 8)
#define WTX_TCPIP_SEG_MSS(x) ((x) << 16)
/*
* PCI config registers used by the Wiseman.
*/
#define WM_PCI_MMBA PCI_MAPREG_START
/* registers for FLASH access on ICH8 */
#define WM_ICH8_FLASH 0x0014
/*
* Wiseman Control/Status Registers.
*/
#define WMREG_CTRL 0x0000 /* Device Control Register */
#define CTRL_FD (1U << 0) /* full duplex */
#define CTRL_BEM (1U << 1) /* big-endian mode */
#define CTRL_PRIOR (1U << 2) /* 0 = receive, 1 = fair */
#define CTRL_LRST (1U << 3) /* link reset */
#define CTRL_ASDE (1U << 5) /* auto speed detect enable */
#define CTRL_SLU (1U << 6) /* set link up */
#define CTRL_ILOS (1U << 7) /* invert loss of signal */
#define CTRL_SPEED(x) ((x) << 8) /* speed (Livengood) */
#define CTRL_SPEED_10 CTRL_SPEED(0)
#define CTRL_SPEED_100 CTRL_SPEED(1)
#define CTRL_SPEED_1000 CTRL_SPEED(2)
#define CTRL_SPEED_MASK CTRL_SPEED(3)
#define CTRL_FRCSPD (1U << 11) /* force speed (Livengood) */
#define CTRL_FRCFDX (1U << 12) /* force full-duplex (Livengood) */
#define CTRL_D_UD_EN (1U << 13) /* Dock/Undock enable */
#define CTRL_D_UD_POL (1U << 14) /* Defined polarity of Dock/Undock indication in SDP[0] */
#define CTRL_F_PHY_R (1U << 15) /* Reset both PHY ports, through PHYRST_N pin */
#define CTRL_EXT_LINK_EN (1U << 16) /* enable link status from external LINK_0 and LINK_1 pins */
#define CTRL_SWDPINS_SHIFT 18
#define CTRL_SWDPINS_MASK 0x0f
#define CTRL_SWDPIN(x) (1U << (CTRL_SWDPINS_SHIFT + (x)))
#define CTRL_SWDPIO_SHIFT 22
#define CTRL_SWDPIO_MASK 0x0f
#define CTRL_SWDPIO(x) (1U << (CTRL_SWDPIO_SHIFT + (x)))
#define CTRL_RST (1U << 26) /* device reset */
#define CTRL_RFCE (1U << 27) /* Rx flow control enable */
#define CTRL_TFCE (1U << 28) /* Tx flow control enable */
#define CTRL_VME (1U << 30) /* VLAN Mode Enable */
#define CTRL_PHY_RESET (1U << 31) /* PHY reset (Cordova) */
#define WMREG_CTRL_SHADOW 0x0004 /* Device Control Register (shadow) */
#define WMREG_STATUS 0x0008 /* Device Status Register */
#define STATUS_FD (1U << 0) /* full duplex */
#define STATUS_LU (1U << 1) /* link up */
#define STATUS_TCKOK (1U << 2) /* Tx clock running */
#define STATUS_RBCOK (1U << 3) /* Rx clock running */
#define STATUS_FUNCID_SHIFT 2 /* 82546 function ID */
#define STATUS_FUNCID_MASK 3 /* ... */
#define STATUS_TXOFF (1U << 4) /* Tx paused */
#define STATUS_TBIMODE (1U << 5) /* fiber mode (Livengood) */
#define STATUS_SPEED(x) ((x) << 6) /* speed indication */
#define STATUS_SPEED_10 STATUS_SPEED(0)
#define STATUS_SPEED_100 STATUS_SPEED(1)
#define STATUS_SPEED_1000 STATUS_SPEED(2)
#define STATUS_ASDV(x) ((x) << 8) /* auto speed det. val. (Livengood) */
#define STATUS_MTXCKOK (1U << 10) /* MTXD clock running */
#define STATUS_PCI66 (1U << 11) /* 66MHz bus (Livengood) */
#define STATUS_BUS64 (1U << 12) /* 64-bit bus (Livengood) */
#define STATUS_PCIX_MODE (1U << 13) /* PCIX mode (Cordova) */
#define STATUS_PCIXSPD(x) ((x) << 14) /* PCIX speed indication (Cordova) */
#define STATUS_PCIXSPD_50_66 STATUS_PCIXSPD(0)
#define STATUS_PCIXSPD_66_100 STATUS_PCIXSPD(1)
#define STATUS_PCIXSPD_100_133 STATUS_PCIXSPD(2)
#define STATUS_PCIXSPD_MASK STATUS_PCIXSPD(3)
#define WMREG_EECD 0x0010 /* EEPROM Control Register */
#define EECD_SK (1U << 0) /* clock */
#define EECD_CS (1U << 1) /* chip select */
#define EECD_DI (1U << 2) /* data in */
#define EECD_DO (1U << 3) /* data out */
#define EECD_FWE(x) ((x) << 4) /* flash write enable control */
#define EECD_FWE_DISABLED EECD_FWE(1)
#define EECD_FWE_ENABLED EECD_FWE(2)
#define EECD_EE_REQ (1U << 6) /* (shared) EEPROM request */
#define EECD_EE_GNT (1U << 7) /* (shared) EEPROM grant */
#define EECD_EE_PRES (1U << 8) /* EEPROM present */
#define EECD_EE_SIZE (1U << 9) /* EEPROM size
(0 = 64 word, 1 = 256 word) */
#define EECD_EE_AUTORD (1U << 9) /* auto read done */
#define EECD_EE_ABITS (1U << 10) /* EEPROM address bits
(based on type) */
#define EECD_EE_TYPE (1U << 13) /* EEPROM type
(0 = Microwire, 1 = SPI) */
#define EECD_SEC1VAL (1U << 22) /* Sector One Valid */
#define UWIRE_OPC_ERASE 0x04 /* MicroWire "erase" opcode */
#define UWIRE_OPC_WRITE 0x05 /* MicroWire "write" opcode */
#define UWIRE_OPC_READ 0x06 /* MicroWire "read" opcode */
#define SPI_OPC_WRITE 0x02 /* SPI "write" opcode */
#define SPI_OPC_READ 0x03 /* SPI "read" opcode */
#define SPI_OPC_A8 0x08 /* opcode bit 3 == address bit 8 */
#define SPI_OPC_WREN 0x06 /* SPI "set write enable" opcode */
#define SPI_OPC_WRDI 0x04 /* SPI "clear write enable" opcode */
#define SPI_OPC_RDSR 0x05 /* SPI "read status" opcode */
#define SPI_OPC_WRSR 0x01 /* SPI "write status" opcode */
#define SPI_MAX_RETRIES 5000 /* max wait of 5ms for RDY signal */
#define SPI_SR_RDY 0x01
#define SPI_SR_WEN 0x02
#define SPI_SR_BP0 0x04
#define SPI_SR_BP1 0x08
#define SPI_SR_WPEN 0x80
#define EEPROM_OFF_MACADDR 0x00 /* MAC address offset */
#define EEPROM_OFF_CFG1 0x0a /* config word 1 */
#define EEPROM_OFF_CFG2 0x0f /* config word 2 */
#define EEPROM_OFF_SWDPIN 0x20 /* SWD Pins (Cordova) */
#define EEPROM_CFG1_LVDID (1U << 0)
#define EEPROM_CFG1_LSSID (1U << 1)
#define EEPROM_CFG1_PME_CLOCK (1U << 2)
#define EEPROM_CFG1_PM (1U << 3)
#define EEPROM_CFG1_ILOS (1U << 4)
#define EEPROM_CFG1_SWDPIO_SHIFT 5
#define EEPROM_CFG1_SWDPIO_MASK (0xf << EEPROM_CFG1_SWDPIO_SHIFT)
#define EEPROM_CFG1_IPS1 (1U << 8)
#define EEPROM_CFG1_LRST (1U << 9)
#define EEPROM_CFG1_FD (1U << 10)
#define EEPROM_CFG1_FRCSPD (1U << 11)
#define EEPROM_CFG1_IPS0 (1U << 12)
#define EEPROM_CFG1_64_32_BAR (1U << 13)
#define EEPROM_CFG2_CSR_RD_SPLIT (1U << 1)
#define EEPROM_CFG2_APM_EN (1U << 2)
#define EEPROM_CFG2_64_BIT (1U << 3)
#define EEPROM_CFG2_MAX_READ (1U << 4)
#define EEPROM_CFG2_DMCR_MAP (1U << 5)
#define EEPROM_CFG2_133_CAP (1U << 6)
#define EEPROM_CFG2_MSI_DIS (1U << 7)
#define EEPROM_CFG2_FLASH_DIS (1U << 8)
#define EEPROM_CFG2_FLASH_SIZE(x) (((x) & 3) >> 9)
#define EEPROM_CFG2_ANE (1U << 11)
#define EEPROM_CFG2_PAUSE(x) (((x) & 3) >> 12)
#define EEPROM_CFG2_ASDE (1U << 14)
#define EEPROM_CFG2_APM_PME (1U << 15)
#define EEPROM_CFG2_SWDPIO_SHIFT 4
#define EEPROM_CFG2_SWDPIO_MASK (0xf << EEPROM_CFG2_SWDPIO_SHIFT)
#define EEPROM_SWDPIN_MASK 0xdf
#define EEPROM_SWDPIN_SWDPIN_SHIFT 0
#define EEPROM_SWDPIN_SWDPIO_SHIFT 8
#define WMREG_EERD 0x0014 /* EEPROM read */
#define EERD_DONE 0x02 /* done bit */
#define EERD_START 0x01 /* First bit for telling part to start operation */
#define EERD_ADDR_SHIFT 2 /* Shift to the address bits */
#define EERD_DATA_SHIFT 16 /* Offset to data in EEPROM read/write registers */
#define WMREG_CTRL_EXT 0x0018 /* Extended Device Control Register */
#define CTRL_EXT_GPI_EN(x) (1U << (x)) /* gpin interrupt enable */
#define CTRL_EXT_SWDPINS_SHIFT 4
#define CTRL_EXT_SWDPINS_MASK 0x0d
#define CTRL_EXT_SWDPIN(x) (1U << (CTRL_EXT_SWDPINS_SHIFT + (x) - 4))
#define CTRL_EXT_SWDPIO_SHIFT 8
#define CTRL_EXT_SWDPIO_MASK 0x0d
#define CTRL_EXT_SWDPIO(x) (1U << (CTRL_EXT_SWDPIO_SHIFT + (x) - 4))
#define CTRL_EXT_ASDCHK (1U << 12) /* ASD check */
#define CTRL_EXT_EE_RST (1U << 13) /* EEPROM reset */
#define CTRL_EXT_IPS (1U << 14) /* invert power state bit 0 */
#define CTRL_EXT_SPD_BYPS (1U << 15) /* speed select bypass */
#define CTRL_EXT_IPS1 (1U << 16) /* invert power state bit 1 */
#define CTRL_EXT_RO_DIS (1U << 17) /* relaxed ordering disabled */
#define CTRL_EXT_LINK_MODE_MASK 0x00C00000
#define CTRL_EXT_LINK_MODE_GMII 0x00000000
#define CTRL_EXT_LINK_MODE_TBI 0x00C00000
#define CTRL_EXT_LINK_MODE_KMRN 0x00000000
#define CTRL_EXT_LINK_MODE_SERDES 0x00C00000
#define WMREG_MDIC 0x0020 /* MDI Control Register */
#define MDIC_DATA(x) ((x) & 0xffff)
#define MDIC_REGADD(x) ((x) << 16)
#define MDIC_PHYADD(x) ((x) << 21)
#define MDIC_OP_WRITE (1U << 26)
#define MDIC_OP_READ (2U << 26)
#define MDIC_READY (1U << 28)
#define MDIC_I (1U << 29) /* interrupt on MDI complete */
#define MDIC_E (1U << 30) /* MDI error */
#define WMREG_FCAL 0x0028 /* Flow Control Address Low */
#define FCAL_CONST 0x00c28001 /* Flow Control MAC addr low */
#define WMREG_FCAH 0x002c /* Flow Control Address High */
#define FCAH_CONST 0x00000100 /* Flow Control MAC addr high */
#define WMREG_FCT 0x0030 /* Flow Control Type */
#define WMREG_VET 0x0038 /* VLAN Ethertype */
#define WMREG_RAL_BASE 0x0040 /* Receive Address List */
#define WMREG_CORDOVA_RAL_BASE 0x5400
#define WMREG_RAL_LO(b, x) ((b) + ((x) << 3))
#define WMREG_RAL_HI(b, x) (WMREG_RAL_LO(b, x) + 4)
/*
* Receive Address List: The LO part is the low-order 32-bits
* of the MAC address. The HI part is the high-order 16-bits
* along with a few control bits.
*/
#define RAL_AS(x) ((x) << 16) /* address select */
#define RAL_AS_DEST RAL_AS(0) /* (cordova?) */
#define RAL_AS_SOURCE RAL_AS(1) /* (cordova?) */
#define RAL_RDR1 (1U << 30) /* put packet in alt. rx ring */
#define RAL_AV (1U << 31) /* entry is valid */
#define WM_RAL_TABSIZE 16
#define WM_ICH8_RAL_TABSIZE 7
#define WMREG_ICR 0x00c0 /* Interrupt Cause Register */
#define ICR_TXDW (1U << 0) /* Tx desc written back */
#define ICR_TXQE (1U << 1) /* Tx queue empty */
#define ICR_LSC (1U << 2) /* link status change */
#define ICR_RXSEQ (1U << 3) /* receive sequence error */
#define ICR_RXDMT0 (1U << 4) /* Rx ring 0 nearly empty */
#define ICR_RXO (1U << 6) /* Rx overrun */
#define ICR_RXT0 (1U << 7) /* Rx ring 0 timer */
#define ICR_MDAC (1U << 9) /* MDIO access complete */
#define ICR_RXCFG (1U << 10) /* Receiving /C/ */
#define ICR_GPI(x) (1U << (x)) /* general purpose interrupts */
#define ICR_INT (1U << 31) /* device generated an interrupt */
#define WMREG_ITR 0x00c4 /* Interrupt Throttling Register */
#define ITR_IVAL_MASK 0xffff /* Interval mask */
#define ITR_IVAL_SHIFT 0 /* Interval shift */
#define WMREG_ICS 0x00c8 /* Interrupt Cause Set Register */
/* See ICR bits. */
#define WMREG_IMS 0x00d0 /* Interrupt Mask Set Register */
/* See ICR bits. */
#define WMREG_IMC 0x00d8 /* Interrupt Mask Clear Register */
/* See ICR bits. */
#define WMREG_RCTL 0x0100 /* Receive Control */
#define RCTL_EN (1U << 1) /* receiver enable */
#define RCTL_SBP (1U << 2) /* store bad packets */
#define RCTL_UPE (1U << 3) /* unicast promisc. enable */
#define RCTL_MPE (1U << 4) /* multicast promisc. enable */
#define RCTL_LPE (1U << 5) /* large packet enable */
#define RCTL_LBM(x) ((x) << 6) /* loopback mode */
#define RCTL_LBM_NONE RCTL_LBM(0)
#define RCTL_LBM_PHY RCTL_LBM(3)
#define RCTL_RDMTS(x) ((x) << 8) /* receive desc. min thresh size */
#define RCTL_RDMTS_1_2 RCTL_RDMTS(0)
#define RCTL_RDMTS_1_4 RCTL_RDMTS(1)
#define RCTL_RDMTS_1_8 RCTL_RDMTS(2)
#define RCTL_RDMTS_MASK RCTL_RDMTS(3)
#define RCTL_MO(x) ((x) << 12) /* multicast offset */
#define RCTL_BAM (1U << 15) /* broadcast accept mode */
#define RCTL_2k (0 << 16) /* 2k Rx buffers */
#define RCTL_1k (1 << 16) /* 1k Rx buffers */
#define RCTL_512 (2 << 16) /* 512 byte Rx buffers */
#define RCTL_256 (3 << 16) /* 256 byte Rx buffers */
#define RCTL_BSEX_16k (1 << 16) /* 16k Rx buffers (BSEX) */
#define RCTL_BSEX_8k (2 << 16) /* 8k Rx buffers (BSEX) */
#define RCTL_BSEX_4k (3 << 16) /* 4k Rx buffers (BSEX) */
#define RCTL_DPF (1U << 22) /* discard pause frames */
#define RCTL_PMCF (1U << 23) /* pass MAC control frames */
#define RCTL_BSEX (1U << 25) /* buffer size extension (Livengood) */
#define RCTL_SECRC (1U << 26) /* strip Ethernet CRC */
#define WMREG_OLD_RDTR0 0x0108 /* Receive Delay Timer (ring 0) */
#define WMREG_RDTR 0x2820
#define RDTR_FPD (1U << 31) /* flush partial descriptor */
#define WMREG_RADV 0x282c /* Receive Interrupt Absolute Delay Timer */
#define WMREG_OLD_RDBAL0 0x0110 /* Receive Descriptor Base Low (ring 0) */
#define WMREG_RDBAL 0x2800
#define WMREG_OLD_RDBAH0 0x0114 /* Receive Descriptor Base High (ring 0) */
#define WMREG_RDBAH 0x2804
#define WMREG_OLD_RDLEN0 0x0118 /* Receive Descriptor Length (ring 0) */
#define WMREG_RDLEN 0x2808
#define WMREG_OLD_RDH0 0x0120 /* Receive Descriptor Head (ring 0) */
#define WMREG_RDH 0x2810
#define WMREG_OLD_RDT0 0x0128 /* Receive Descriptor Tail (ring 0) */
#define WMREG_RDT 0x2818
#define WMREG_RXDCTL 0x2828 /* Receive Descriptor Control */
#define RXDCTL_PTHRESH(x) ((x) << 0) /* prefetch threshold */
#define RXDCTL_HTHRESH(x) ((x) << 8) /* host threshold */
#define RXDCTL_WTHRESH(x) ((x) << 16) /* write back threshold */
#define RXDCTL_GRAN (1U << 24) /* 0 = cacheline, 1 = descriptor */
#define WMREG_OLD_RDTR1 0x0130 /* Receive Delay Timer (ring 1) */
#define WMREG_OLD_RDBA1_LO 0x0138 /* Receive Descriptor Base Low (ring 1) */
#define WMREG_OLD_RDBA1_HI 0x013c /* Receive Descriptor Base High (ring 1) */
#define WMREG_OLD_RDLEN1 0x0140 /* Receive Drscriptor Length (ring 1) */
#define WMREG_OLD_RDH1 0x0148
#define WMREG_OLD_RDT1 0x0150
#define WMREG_OLD_FCRTH 0x0160 /* Flow Control Rx Threshold Hi (OLD) */
#define WMREG_FCRTL 0x2160 /* Flow Control Rx Threshold Lo */
#define FCRTH_DFLT 0x00008000
#define WMREG_OLD_FCRTL 0x0168 /* Flow Control Rx Threshold Lo (OLD) */
#define WMREG_FCRTH 0x2168 /* Flow Control Rx Threhsold Hi */
#define FCRTL_DFLT 0x00004000
#define FCRTL_XONE 0x80000000 /* Enable XON frame transmission */
#define WMREG_FCTTV 0x0170 /* Flow Control Transmit Timer Value */
#define FCTTV_DFLT 0x00000600
#define WMREG_TXCW 0x0178 /* Transmit Configuration Word (TBI mode) */
/* See MII ANAR_X bits. */
#define TXCW_TxConfig (1U << 30) /* Tx Config */
#define TXCW_ANE (1U << 31) /* Autonegotiate */
#define WMREG_RXCW 0x0180 /* Receive Configuration Word (TBI mode) */
/* See MII ANLPAR_X bits. */
#define RXCW_NC (1U << 26) /* no carrier */
#define RXCW_IV (1U << 27) /* config invalid */
#define RXCW_CC (1U << 28) /* config change */
#define RXCW_C (1U << 29) /* /C/ reception */
#define RXCW_SYNCH (1U << 30) /* synchronized */
#define RXCW_ANC (1U << 31) /* autonegotiation complete */
#define WMREG_MTA 0x0200 /* Multicast Table Array */
#define WMREG_CORDOVA_MTA 0x5200
#define WMREG_TCTL 0x0400 /* Transmit Control Register */
#define TCTL_EN (1U << 1) /* transmitter enable */
#define TCTL_PSP (1U << 3) /* pad short packets */
#define TCTL_CT(x) (((x) & 0xff) << 4) /* 4:11 - collision threshold */
#define TCTL_COLD(x) (((x) & 0x3ff) << 12) /* 12:21 - collision distance */
#define TCTL_SWXOFF (1U << 22) /* software XOFF */
#define TCTL_RTLC (1U << 24) /* retransmit on late collision */
#define TCTL_NRTU (1U << 25) /* no retransmit on underrun */
#define TCTL_MULR (1U << 28) /* multiple request */
#define TX_COLLISION_THRESHOLD 15
#define TX_COLLISION_DISTANCE_HDX 512
#define TX_COLLISION_DISTANCE_FDX 64
#define WMREG_TCTL_EXT 0x0404 /* Transmit Control Register */
#define TCTL_EXT_BST_MASK 0x000003FF /* Backoff Slot Time */
#define TCTL_EXT_GCEX_MASK 0x000FFC00 /* Gigabit Carry Extend Padding */
#define DEFAULT_80003ES2LAN_TCTL_EXT_GCEX 0x00010000
#define WMREG_TQSA_LO 0x0408
#define WMREG_TQSA_HI 0x040c
#define WMREG_TIPG 0x0410 /* Transmit IPG Register */
#define TIPG_IPGT(x) (x) /* IPG transmit time */
#define TIPG_IPGR1(x) ((x) << 10) /* IPG receive time 1 */
#define TIPG_IPGR2(x) ((x) << 20) /* IPG receive time 2 */
#define TIPG_WM_DFLT (TIPG_IPGT(0x0a) | TIPG_IPGR1(0x02) | TIPG_IPGR2(0x0a))
#define TIPG_LG_DFLT (TIPG_IPGT(0x06) | TIPG_IPGR1(0x08) | TIPG_IPGR2(0x06))
#define TIPG_1000T_DFLT (TIPG_IPGT(0x08) | TIPG_IPGR1(0x08) | TIPG_IPGR2(0x06))
#define TIPG_1000T_80003_DFLT \
(TIPG_IPGT(0x08) | TIPG_IPGR1(0x02) | TIPG_IPGR2(0x07))
#define TIPG_10_100_80003_DFLT \
(TIPG_IPGT(0x09) | TIPG_IPGR1(0x02) | TIPG_IPGR2(0x07))
#define WMREG_TQC 0x0418
#define WMREG_EEWR 0x102c /* EEPROM write */
#define WMREG_RDFH 0x2410 /* Receive Data FIFO Head */
#define WMREG_RDFT 0x2418 /* Receive Data FIFO Tail */
#define WMREG_RDFHS 0x2420 /* Receive Data FIFO Head Saved */
#define WMREG_RDFTS 0x2428 /* Receive Data FIFO Tail Saved */
#define WMREG_TDFH 0x3410 /* Transmit Data FIFO Head */
#define WMREG_TDFT 0x3418 /* Transmit Data FIFO Tail */
#define WMREG_TDFHS 0x3420 /* Transmit Data FIFO Head Saved */
#define WMREG_TDFTS 0x3428 /* Transmit Data FIFO Tail Saved */
#define WMREG_TDFPC 0x3430 /* Transmit Data FIFO Packet Count */
#define WMREG_OLD_TBDAL 0x0420 /* Transmit Descriptor Base Lo */
#define WMREG_TBDAL 0x3800
#define WMREG_OLD_TBDAH 0x0424 /* Transmit Descriptor Base Hi */
#define WMREG_TBDAH 0x3804
#define WMREG_OLD_TDLEN 0x0428 /* Transmit Descriptor Length */
#define WMREG_TDLEN 0x3808
#define WMREG_OLD_TDH 0x0430 /* Transmit Descriptor Head */
#define WMREG_TDH 0x3810
#define WMREG_OLD_TDT 0x0438 /* Transmit Descriptor Tail */
#define WMREG_TDT 0x3818
#define WMREG_OLD_TIDV 0x0440 /* Transmit Delay Interrupt Value */
#define WMREG_TIDV 0x3820
#define WMREG_TXDCTL 0x3828 /* Trandmit Descriptor Control */
#define TXDCTL_PTHRESH(x) ((x) << 0) /* prefetch threshold */
#define TXDCTL_HTHRESH(x) ((x) << 8) /* host threshold */
#define TXDCTL_WTHRESH(x) ((x) << 16) /* write back threshold */
#define WMREG_TADV 0x382c /* Transmit Absolute Interrupt Delay Timer */
#define WMREG_AIT 0x0458 /* Adaptive IFS Throttle */
#define WMREG_VFTA 0x0600
#define WM_MC_TABSIZE 128
#define WM_ICH8_MC_TABSIZE 32
#define WM_VLAN_TABSIZE 128
#define WMREG_PBA 0x1000 /* Packet Buffer Allocation */
#define PBA_BYTE_SHIFT 10 /* KB -> bytes */
#define PBA_ADDR_SHIFT 7 /* KB -> quadwords */
#define PBA_8K 0x0008
#define PBA_12K 0x000c
#define PBA_16K 0x0010 /* 16K, default Tx allocation */
#define PBA_22K 0x0016
#define PBA_24K 0x0018
#define PBA_30K 0x001e
#define PBA_32K 0x0020
#define PBA_40K 0x0028
#define PBA_48K 0x0030 /* 48K, default Rx allocation */
#define WMREG_PBS 0x1000 /* Packet Buffer Size (ICH8 only ?) */
#define WMREG_TXDMAC 0x3000 /* Transfer DMA Control */
#define TXDMAC_DPP (1U << 0) /* disable packet prefetch */
#define WMREG_TSPMT 0x3830 /* TCP Segmentation Pad and Minimum
Threshold (Cordova) */
#define TSPMT_TSMT(x) (x) /* TCP seg min transfer */
#define TSPMT_TSPBP(x) ((x) << 16) /* TCP seg pkt buf padding */
#define WMREG_RXCSUM 0x5000 /* Receive Checksum register */
#define RXCSUM_PCSS 0x000000ff /* Packet Checksum Start */
#define RXCSUM_IPOFL (1U << 8) /* IP checksum offload */
#define RXCSUM_TUOFL (1U << 9) /* TCP/UDP checksum offload */
#define RXCSUM_IPV6OFL (1U << 10) /* IPv6 checksum offload */
#define WMREG_RXERRC 0x400C /* receive error Count - R/clr */
#define WMREG_COLC 0x4028 /* collision Count - R/clr */
#define WMREG_XONRXC 0x4048 /* XON Rx Count - R/clr */
#define WMREG_XONTXC 0x404c /* XON Tx Count - R/clr */
#define WMREG_XOFFRXC 0x4050 /* XOFF Rx Count - R/clr */
#define WMREG_XOFFTXC 0x4054 /* XOFF Tx Count - R/clr */
#define WMREG_FCRUC 0x4058 /* Flow Control Rx Unsupported Count - R/clr */
#define WMREG_KUMCTRLSTA 0x0034 /* MAC-PHY interface - RW */
#define KUMCTRLSTA_MASK 0x0000FFFF
#define KUMCTRLSTA_OFFSET 0x001F0000
#define KUMCTRLSTA_OFFSET_SHIFT 16
#define KUMCTRLSTA_REN 0x00200000
#define KUMCTRLSTA_OFFSET_FIFO_CTRL 0x00000000
#define KUMCTRLSTA_OFFSET_CTRL 0x00000001
#define KUMCTRLSTA_OFFSET_INB_CTRL 0x00000002
#define KUMCTRLSTA_OFFSET_DIAG 0x00000003
#define KUMCTRLSTA_OFFSET_TIMEOUTS 0x00000004
#define KUMCTRLSTA_OFFSET_INB_PARAM 0x00000009
#define KUMCTRLSTA_OFFSET_HD_CTRL 0x00000010
#define KUMCTRLSTA_OFFSET_M2P_SERDES 0x0000001E
#define KUMCTRLSTA_OFFSET_M2P_MODES 0x0000001F
/* FIFO Control */
#define KUMCTRLSTA_FIFO_CTRL_RX_BYPASS 0x00000008
#define KUMCTRLSTA_FIFO_CTRL_TX_BYPASS 0x00000800
/* In-Band Control */
#define KUMCTRLSTA_INB_CTRL_LINK_TMOUT_DFLT 0x00000500
#define KUMCTRLSTA_INB_CTRL_DIS_PADDING 0x00000010
/* Half-Duplex Control */
#define KUMCTRLSTA_HD_CTRL_10_100_DEFAULT 0x00000004
#define KUMCTRLSTA_HD_CTRL_1000_DEFAULT 0x00000000
#define WMREG_MDPHYA 0x003C /* PHY address - RW */
#define WMREG_MANC2H 0x5860 /* Managment Control To Host - RW */
#define WMREG_SWSM 0x5b50 /* SW Semaphore */
#define SWSM_SMBI 0x00000001 /* Driver Semaphore bit */
#define SWSM_SWESMBI 0x00000002 /* FW Semaphore bit */
#define SWSM_WMNG 0x00000004 /* Wake MNG Clock */
#define SWSM_DRV_LOAD 0x00000008 /* Driver Loaded Bit */
#define WMREG_SW_FW_SYNC 0x5b5c /* software-firmware semaphore */
#define SWFW_EEP_SM 0x0001 /* eeprom access */
#define SWFW_PHY0_SM 0x0002 /* first ctrl phy access */
#define SWFW_PHY1_SM 0x0004 /* second ctrl phy access */
#define SWFW_MAC_CSR_SM 0x0008
#define SWFW_SOFT_SHIFT 0 /* software semaphores */
#define SWFW_FIRM_SHIFT 16 /* firmware semaphores */
#define WMREG_EXTCNFCTR 0x0f00 /* Extended Configuration Control */
#define EXTCNFCTR_PCIE_WRITE_ENABLE 0x00000001
#define EXTCNFCTR_PHY_WRITE_ENABLE 0x00000002
#define EXTCNFCTR_D_UD_ENABLE 0x00000004
#define EXTCNFCTR_D_UD_LATENCY 0x00000008
#define EXTCNFCTR_D_UD_OWNER 0x00000010
#define EXTCNFCTR_MDIO_SW_OWNERSHIP 0x00000020
#define EXTCNFCTR_MDIO_HW_OWNERSHIP 0x00000040
#define EXTCNFCTR_EXT_CNF_POINTER 0x0FFF0000
#define E1000_EXTCNF_CTRL_SWFLAG EXTCNFCTR_MDIO_SW_OWNERSHIP
/* ich8 flash control */
#define ICH_FLASH_COMMAND_TIMEOUT 5000 /* 5000 uSecs - adjusted */
#define ICH_FLASH_ERASE_TIMEOUT 3000000 /* Up to 3 seconds - worst case */
#define ICH_FLASH_CYCLE_REPEAT_COUNT 10 /* 10 cycles */
#define ICH_FLASH_SEG_SIZE_256 256
#define ICH_FLASH_SEG_SIZE_4K 4096
#define ICH_FLASH_SEG_SIZE_64K 65536
#define ICH_CYCLE_READ 0x0
#define ICH_CYCLE_RESERVED 0x1
#define ICH_CYCLE_WRITE 0x2
#define ICH_CYCLE_ERASE 0x3
#define ICH_FLASH_GFPREG 0x0000
#define ICH_FLASH_HSFSTS 0x0004 /* Flash Status Register */
#define HSFSTS_DONE 0x0001 /* Flash Cycle Done */
#define HSFSTS_ERR 0x0002 /* Flash Cycle Error */
#define HSFSTS_DAEL 0x0004 /* Direct Access error Log */
#define HSFSTS_ERSZ_MASK 0x0018 /* Block/Sector Erase Size */
#define HSFSTS_ERSZ_SHIFT 3
#define HSFSTS_FLINPRO 0x0020 /* flash SPI cycle in Progress */
#define HSFSTS_FLDVAL 0x4000 /* Flash Descriptor Valid */
#define HSFSTS_FLLK 0x8000 /* Flash Configuration Lock-Down */
#define ICH_FLASH_HSFCTL 0x0006 /* Flash control Register */
#define HSFCTL_GO 0x0001 /* Flash Cycle Go */
#define HSFCTL_CYCLE_MASK 0x0006 /* Flash Cycle */
#define HSFCTL_CYCLE_SHIFT 1
#define HSFCTL_BCOUNT_MASK 0x0300 /* Data Byte Count */
#define HSFCTL_BCOUNT_SHIFT 8
#define ICH_FLASH_FADDR 0x0008
#define ICH_FLASH_FDATA0 0x0010
#define ICH_FLASH_FRACC 0x0050
#define ICH_FLASH_FREG0 0x0054
#define ICH_FLASH_FREG1 0x0058
#define ICH_FLASH_FREG2 0x005C
#define ICH_FLASH_FREG3 0x0060
#define ICH_FLASH_FPR0 0x0074
#define ICH_FLASH_FPR1 0x0078
#define ICH_FLASH_SSFSTS 0x0090
#define ICH_FLASH_SSFCTL 0x0092
#define ICH_FLASH_PREOP 0x0094
#define ICH_FLASH_OPTYPE 0x0096
#define ICH_FLASH_OPMENU 0x0098
#define ICH_FLASH_REG_MAPSIZE 0x00A0
#define ICH_FLASH_SECTOR_SIZE 4096
#define ICH_GFPREG_BASE_MASK 0x1FFF
#define ICH_FLASH_LINEAR_ADDR_MASK 0x00FFFFFF
/* start of Kate Feng added */
#define WMREG_GPTC 0x4080 /* Good packets transmitted count */
#define WMREG_GPRC 0x4074 /* Good packets received count */
#define WMREG_CRCERRS 0x4000 /* CRC Error Count */
#define WMREG_RLEC 0x4040 /* Receive Length Error Count */
/* end of Kate Feng added */

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@@ -1,131 +0,0 @@
/* $NetBSD: pci_map.c,v 1.12 2002/05/30 12:06:43 drochner Exp $ */
/*-
* Copyright (c) 2004, 2005 Brookhaven National Laboratory
* S. Kate Feng <feng1@bnl.gov>
*
* Copyright (c) 1998, 2000 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Charles M. Hannum; by William R. Studenmund; by Jason R. Thorpe.
*
*/
/*
* PCI device mapping.
*/
#include <sys/cdefs.h>
#include <sys/param.h>
#include <sys/systm.h>
#include <rtems/rtems/types.h>
#include <bsp/pci.h>
#include <bsp/pcireg.h>
int pci_io_find(int b, int d, int f, int reg,unsigned *basep,unsigned *sizep)
{
uint32_t address, mask;
if (reg < PCI_MAPREG_START ||
#if 0
/*
* Can't do this check; some devices have mapping registers
* way out in left field.
*/
reg >= PCI_MAPREG_END ||
#endif
(reg & 3))
rtems_panic("pci_io_find: bad request");
/*
* Section 6.2.5.1, `Address Maps', tells us that:
*
* 1) The builtin software should have already mapped the device in a
* reasonable way.
*
* 2) A device which wants 2^n bytes of memory will hardwire the bottom
* n bits of the address to 0. As recommended, we write all 1s and see
* what we get back.
*/
pci_read_config_dword(b,d,f,reg, &address);
if ( !(address & PCI_MAPREG_TYPE_IO)) return(1);
pci_write_config_dword(b,d,f,reg, 0xffffffff);
pci_read_config_dword(b,d,f,reg,&mask);
pci_write_config_dword(b,d,f,reg, address);
if ( (*sizep = PCI_MAPREG_IO_SIZE(mask))== 0) {
printk("pci_io_find: void region\n");
return(1);
}
*basep = PCI_MAPREG_IO_ADDR(address);
return(0);
}
int pci_mem_find(int b, int d, int f, int reg, unsigned *basep,unsigned *sizep)
{
uint32_t address, mask;
if (reg < PCI_MAPREG_START ||
#if 0
/*
* Can't do this check; some devices have mapping registers
* way out in left field.
*/
reg >= PCI_MAPREG_END ||
#endif
(reg & 3))
rtems_panic("pci_mem_find: bad request");
pci_read_config_dword(b,d,f,reg, &address);
if (address & PCI_MAPREG_TYPE_IO) {
printk("pci_mem_find: expected type mem, found I/O\n");
return(1);
}
/*
* Section 6.2.5.1, `Address Maps', tells us that:
*
* 1) The builtin software should have already mapped the device in a
* reasonable way.
*
* 2) A device which wants 2^n bytes of memory will hardwire the bottom
* n bits of the address to 0. As recommended, we write all 1s and see
* what we get back.
*/
pci_write_config_dword(b,d,f,reg, 0xffffffff);
pci_read_config_dword(b,d,f,reg,&mask);
pci_write_config_dword(b,d,f,reg, address);
if ( (*sizep = PCI_MAPREG_MEM_SIZE(mask))== 0) {
printk("pci_io_find: void region\n");
return (1);
}
*basep = PCI_MAPREG_MEM_ADDR(address);
return(0);
}
int pci_get_capability(int b, int d, int f, int capid,int *offset,uint32_t *value)
{
uint32_t reg, ofs;
/* i82544EI PCI_CAPLISTPTR_REG */
pci_read_config_dword(b,d,f,PCI_CAPLISTPTR_REG, &reg);
ofs = PCI_CAPLIST_PTR(reg);
while (ofs != 0) {
#ifdef DIAGNOSTIC
if ((ofs & 3) || (ofs < 0x40))
panic("pci_get_capability");
#endif
pci_read_config_dword(b,d,f,ofs, &reg);
if (PCI_CAPLIST_CAP(reg) == capid) {
if (offset)
*offset = ofs;
if (value)
*value = reg;
return (1);
}
ofs = PCI_CAPLIST_NEXT(reg);
}
return (0);
}

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@@ -1,384 +0,0 @@
/* $NetBSD: pcireg.h,v 1.44 2003/12/02 16:31:06 briggs Exp $ */
/*
* Copyright (c) 1995, 1996, 1999, 2000
* Christopher G. Demetriou. All rights reserved.
* Copyright (c) 1994, 1996 Charles M. Hannum. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by Charles M. Hannum.
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*
* PCI Class and Revision Register; defines type and revision of device.
*/
#define PCI_CLASS_REG 0x08
#define PCI_CLASS_SHIFT 24
#define PCI_CLASS_MASK 0xff
#define PCI_CLASS(cr) \
(((cr) >> PCI_CLASS_SHIFT) & PCI_CLASS_MASK)
#define PCI_SUBCLASS_SHIFT 16
#define PCI_SUBCLASS_MASK 0xff
#define PCI_SUBCLASS(cr) \
(((cr) >> PCI_SUBCLASS_SHIFT) & PCI_SUBCLASS_MASK)
#define PCI_INTERFACE_SHIFT 8
#define PCI_INTERFACE_MASK 0xff
#define PCI_INTERFACE(cr) \
(((cr) >> PCI_INTERFACE_SHIFT) & PCI_INTERFACE_MASK)
#define PCI_REVISION_SHIFT 0
#define PCI_REVISION_MASK 0xff
#define PCI_REVISION(cr) \
(((cr) >> PCI_REVISION_SHIFT) & PCI_REVISION_MASK)
#define PCI_CLASS_CODE(mainclass, subclass, interface) \
((((mainclass) & PCI_CLASS_MASK) << PCI_CLASS_SHIFT) | \
(((subclass) & PCI_SUBCLASS_MASK) << PCI_SUBCLASS_SHIFT) | \
(((interface) & PCI_INTERFACE_MASK) << PCI_INTERFACE_SHIFT))
/* base classes */
#define PCI_CLASS_PREHISTORIC 0x00
#define PCI_CLASS_MASS_STORAGE 0x01
#define PCI_CLASS_NETWORK 0x02
#define PCI_CLASS_DISPLAY 0x03
#define PCI_CLASS_MULTIMEDIA 0x04
#define PCI_CLASS_MEMORY 0x05
#define PCI_CLASS_BRIDGE 0x06
#define PCI_CLASS_COMMUNICATIONS 0x07
#define PCI_CLASS_SYSTEM 0x08
#define PCI_CLASS_INPUT 0x09
#define PCI_CLASS_DOCK 0x0a
#define PCI_CLASS_PROCESSOR 0x0b
#define PCI_CLASS_SERIALBUS 0x0c
#define PCI_CLASS_WIRELESS 0x0d
#define PCI_CLASS_I2O 0x0e
#define PCI_CLASS_SATCOM 0x0f
#define PCI_CLASS_CRYPTO 0x10
#define PCI_CLASS_DASP 0x11
#define PCI_CLASS_UNDEFINED 0xff
/* 0x00 prehistoric subclasses */
#define PCI_SUBCLASS_PREHISTORIC_MISC 0x00
#define PCI_SUBCLASS_PREHISTORIC_VGA 0x01
/* 0x01 mass storage subclasses */
#define PCI_SUBCLASS_MASS_STORAGE_SCSI 0x00
#define PCI_SUBCLASS_MASS_STORAGE_IDE 0x01
#define PCI_SUBCLASS_MASS_STORAGE_FLOPPY 0x02
#define PCI_SUBCLASS_MASS_STORAGE_IPI 0x03
#define PCI_SUBCLASS_MASS_STORAGE_RAID 0x04
#define PCI_SUBCLASS_MASS_STORAGE_ATA 0x05
#define PCI_SUBCLASS_MASS_STORAGE_SATA 0x06
#define PCI_SUBCLASS_MASS_STORAGE_MISC 0x80
/* 0x02 network subclasses */
#define PCI_SUBCLASS_NETWORK_ETHERNET 0x00
#define PCI_SUBCLASS_NETWORK_TOKENRING 0x01
#define PCI_SUBCLASS_NETWORK_FDDI 0x02
#define PCI_SUBCLASS_NETWORK_ATM 0x03
#define PCI_SUBCLASS_NETWORK_ISDN 0x04
#define PCI_SUBCLASS_NETWORK_WORLDFIP 0x05
#define PCI_SUBCLASS_NETWORK_PCIMGMULTICOMP 0x06
#define PCI_SUBCLASS_NETWORK_MISC 0x80
/* 0x03 display subclasses */
#define PCI_SUBCLASS_DISPLAY_VGA 0x00
#define PCI_SUBCLASS_DISPLAY_XGA 0x01
#define PCI_SUBCLASS_DISPLAY_3D 0x02
#define PCI_SUBCLASS_DISPLAY_MISC 0x80
/* 0x04 multimedia subclasses */
#define PCI_SUBCLASS_MULTIMEDIA_VIDEO 0x00
#define PCI_SUBCLASS_MULTIMEDIA_AUDIO 0x01
#define PCI_SUBCLASS_MULTIMEDIA_TELEPHONY 0x02
#define PCI_SUBCLASS_MULTIMEDIA_MISC 0x80
/* 0x05 memory subclasses */
#define PCI_SUBCLASS_MEMORY_RAM 0x00
#define PCI_SUBCLASS_MEMORY_FLASH 0x01
#define PCI_SUBCLASS_MEMORY_MISC 0x80
/* 0x06 bridge subclasses */
#define PCI_SUBCLASS_BRIDGE_HOST 0x00
#define PCI_SUBCLASS_BRIDGE_ISA 0x01
#define PCI_SUBCLASS_BRIDGE_EISA 0x02
#define PCI_SUBCLASS_BRIDGE_MC 0x03 /* XXX _MCA? */
#define PCI_SUBCLASS_BRIDGE_PCI 0x04
#define PCI_SUBCLASS_BRIDGE_PCMCIA 0x05
#define PCI_SUBCLASS_BRIDGE_NUBUS 0x06
#define PCI_SUBCLASS_BRIDGE_CARDBUS 0x07
#define PCI_SUBCLASS_BRIDGE_RACEWAY 0x08
#define PCI_SUBCLASS_BRIDGE_STPCI 0x09
#define PCI_SUBCLASS_BRIDGE_INFINIBAND 0x0a
#define PCI_SUBCLASS_BRIDGE_MISC 0x80
/* 0x07 communications subclasses */
#define PCI_SUBCLASS_COMMUNICATIONS_SERIAL 0x00
#define PCI_SUBCLASS_COMMUNICATIONS_PARALLEL 0x01
#define PCI_SUBCLASS_COMMUNICATIONS_MPSERIAL 0x02
#define PCI_SUBCLASS_COMMUNICATIONS_MODEM 0x03
#define PCI_SUBCLASS_COMMUNICATIONS_GPIB 0x04
#define PCI_SUBCLASS_COMMUNICATIONS_SMARTCARD 0x05
#define PCI_SUBCLASS_COMMUNICATIONS_MISC 0x80
/* 0x08 system subclasses */
#define PCI_SUBCLASS_SYSTEM_PIC 0x00
#define PCI_SUBCLASS_SYSTEM_DMA 0x01
#define PCI_SUBCLASS_SYSTEM_TIMER 0x02
#define PCI_SUBCLASS_SYSTEM_RTC 0x03
#define PCI_SUBCLASS_SYSTEM_PCIHOTPLUG 0x04
#define PCI_SUBCLASS_SYSTEM_MISC 0x80
/* 0x09 input subclasses */
#define PCI_SUBCLASS_INPUT_KEYBOARD 0x00
#define PCI_SUBCLASS_INPUT_DIGITIZER 0x01
#define PCI_SUBCLASS_INPUT_MOUSE 0x02
#define PCI_SUBCLASS_INPUT_SCANNER 0x03
#define PCI_SUBCLASS_INPUT_GAMEPORT 0x04
#define PCI_SUBCLASS_INPUT_MISC 0x80
/* 0x0a dock subclasses */
#define PCI_SUBCLASS_DOCK_GENERIC 0x00
#define PCI_SUBCLASS_DOCK_MISC 0x80
/* 0x0b processor subclasses */
#define PCI_SUBCLASS_PROCESSOR_386 0x00
#define PCI_SUBCLASS_PROCESSOR_486 0x01
#define PCI_SUBCLASS_PROCESSOR_PENTIUM 0x02
#define PCI_SUBCLASS_PROCESSOR_ALPHA 0x10
#define PCI_SUBCLASS_PROCESSOR_POWERPC 0x20
#define PCI_SUBCLASS_PROCESSOR_MIPS 0x30
#define PCI_SUBCLASS_PROCESSOR_COPROC 0x40
/* 0x0c serial bus subclasses */
#define PCI_SUBCLASS_SERIALBUS_FIREWIRE 0x00
#define PCI_SUBCLASS_SERIALBUS_ACCESS 0x01
#define PCI_SUBCLASS_SERIALBUS_SSA 0x02
#define PCI_SUBCLASS_SERIALBUS_USB 0x03
#define PCI_SUBCLASS_SERIALBUS_FIBER 0x04 /* XXX _FIBRECHANNEL */
#define PCI_SUBCLASS_SERIALBUS_SMBUS 0x05
#define PCI_SUBCLASS_SERIALBUS_INFINIBAND 0x06
#define PCI_SUBCLASS_SERIALBUS_IPMI 0x07
#define PCI_SUBCLASS_SERIALBUS_SERCOS 0x08
#define PCI_SUBCLASS_SERIALBUS_CANBUS 0x09
/* 0x0d wireless subclasses */
#define PCI_SUBCLASS_WIRELESS_IRDA 0x00
#define PCI_SUBCLASS_WIRELESS_CONSUMERIR 0x01
#define PCI_SUBCLASS_WIRELESS_RF 0x10
#define PCI_SUBCLASS_WIRELESS_BLUETOOTH 0x11
#define PCI_SUBCLASS_WIRELESS_BROADBAND 0x12
#define PCI_SUBCLASS_WIRELESS_802_11A 0x20
#define PCI_SUBCLASS_WIRELESS_802_11B 0x21
#define PCI_SUBCLASS_WIRELESS_MISC 0x80
/* 0x0e I2O (Intelligent I/O) subclasses */
#define PCI_SUBCLASS_I2O_STANDARD 0x00
/* 0x0f satellite communication subclasses */
/* PCI_SUBCLASS_SATCOM_??? 0x00 / * XXX ??? */
#define PCI_SUBCLASS_SATCOM_TV 0x01
#define PCI_SUBCLASS_SATCOM_AUDIO 0x02
#define PCI_SUBCLASS_SATCOM_VOICE 0x03
#define PCI_SUBCLASS_SATCOM_DATA 0x04
/* 0x10 encryption/decryption subclasses */
#define PCI_SUBCLASS_CRYPTO_NETCOMP 0x00
#define PCI_SUBCLASS_CRYPTO_ENTERTAINMENT 0x10
#define PCI_SUBCLASS_CRYPTO_MISC 0x80
/* 0x11 data acquisition and signal processing subclasses */
#define PCI_SUBCLASS_DASP_DPIO 0x00
#define PCI_SUBCLASS_DASP_TIMEFREQ 0x01
#define PCI_SUBCLASS_DASP_SYNC 0x10
#define PCI_SUBCLASS_DASP_MGMT 0x20
#define PCI_SUBCLASS_DASP_MISC 0x80
/*
* PCI BIST/Header Type/Latency Timer/Cache Line Size Register.
*/
#define PCI_BHLC_REG 0x0c
#define PCI_BIST_SHIFT 24
#define PCI_BIST_MASK 0xff
#define PCI_BIST(bhlcr) \
(((bhlcr) >> PCI_BIST_SHIFT) & PCI_BIST_MASK)
#define PCI_HDRTYPE_SHIFT 16
#define PCI_HDRTYPE_MASK 0xff
#define PCI_HDRTYPE(bhlcr) \
(((bhlcr) >> PCI_HDRTYPE_SHIFT) & PCI_HDRTYPE_MASK)
#define PCI_HDRTYPE_TYPE(bhlcr) \
(PCI_HDRTYPE(bhlcr) & 0x7f)
#define PCI_HDRTYPE_MULTIFN(bhlcr) \
((PCI_HDRTYPE(bhlcr) & 0x80) != 0)
#define PCI_LATTIMER_SHIFT 8
#define PCI_LATTIMER_MASK 0xff
#define PCI_LATTIMER(bhlcr) \
(((bhlcr) >> PCI_LATTIMER_SHIFT) & PCI_LATTIMER_MASK)
#define PCI_CACHELINE_SHIFT 0
#define PCI_CACHELINE_MASK 0xff
#define PCI_CACHELINE(bhlcr) \
(((bhlcr) >> PCI_CACHELINE_SHIFT) & PCI_CACHELINE_MASK)
#define PCI_BHLC_CODE(bist,type,multi,latency,cacheline) \
((((bist) & PCI_BIST_MASK) << PCI_BIST_SHIFT) | \
(((type) & PCI_HDRTYPE_MASK) << PCI_HDRTYPE_SHIFT) | \
(((multi)?0x80:0) << PCI_HDRTYPE_SHIFT) | \
(((latency) & PCI_LATTIMER_MASK) << PCI_LATTIMER_SHIFT) | \
(((cacheline) & PCI_CACHELINE_MASK) << PCI_CACHELINE_SHIFT))
/*
* PCI header type
*/
#define PCI_HDRTYPE_DEVICE 0
#define PCI_HDRTYPE_PPB 1
#define PCI_HDRTYPE_PCB 2
/*
* Mapping registers
*/
#define PCI_MAPREG_START 0x10
#define PCI_MAPREG_END 0x28
#define PCI_MAPREG_ROM 0x30
#define PCI_MAPREG_PPB_END 0x18
#define PCI_MAPREG_PCB_END 0x14
#define PCI_MAPREG_TYPE(mr) \
((mr) & PCI_MAPREG_TYPE_MASK)
#define PCI_MAPREG_TYPE_MASK 0x00000001
#define PCI_MAPREG_TYPE_MEM 0x00000000
#define PCI_MAPREG_TYPE_IO 0x00000001
#define PCI_MAPREG_ROM_ENABLE 0x00000001
#define PCI_MAPREG_MEM_TYPE(mr) \
((mr) & PCI_MAPREG_MEM_TYPE_MASK)
#define PCI_MAPREG_MEM_TYPE_MASK 0x00000006
#define PCI_MAPREG_MEM_TYPE_32BIT 0x00000000
#define PCI_MAPREG_MEM_TYPE_32BIT_1M 0x00000002
#define PCI_MAPREG_MEM_TYPE_64BIT 0x00000004
#define PCI_MAPREG_MEM_PREFETCHABLE(mr) \
(((mr) & PCI_MAPREG_MEM_PREFETCHABLE_MASK) != 0)
#define PCI_MAPREG_MEM_PREFETCHABLE_MASK 0x00000008
#define PCI_MAPREG_MEM_ADDR(mr) \
((mr) & PCI_MAPREG_MEM_ADDR_MASK)
#define PCI_MAPREG_MEM_SIZE(mr) \
(PCI_MAPREG_MEM_ADDR(mr) & -PCI_MAPREG_MEM_ADDR(mr))
#define PCI_MAPREG_MEM_ADDR_MASK 0xfffffff0
#define PCI_MAPREG_MEM64_ADDR(mr) \
((mr) & PCI_MAPREG_MEM64_ADDR_MASK)
#define PCI_MAPREG_MEM64_SIZE(mr) \
(PCI_MAPREG_MEM64_ADDR(mr) & -PCI_MAPREG_MEM64_ADDR(mr))
#define PCI_MAPREG_MEM64_ADDR_MASK 0xfffffffffffffff0ULL
#define PCI_MAPREG_IO_ADDR(mr) \
((mr) & PCI_MAPREG_IO_ADDR_MASK)
#define PCI_MAPREG_IO_SIZE(mr) \
(PCI_MAPREG_IO_ADDR(mr) & -PCI_MAPREG_IO_ADDR(mr))
#define PCI_MAPREG_IO_ADDR_MASK 0xfffffffc
#define PCI_MAPREG_SIZE_TO_MASK(size) \
(-(size))
#define PCI_MAPREG_NUM(offset) \
(((unsigned)(offset)-PCI_MAPREG_START)/4)
/*
* Cardbus CIS pointer (PCI rev. 2.1)
*/
#define PCI_CARDBUS_CIS_REG 0x28
/*
* Subsystem identification register; contains a vendor ID and a device ID.
* Types/macros for PCI_ID_REG apply.
* (PCI rev. 2.1)
*/
#define PCI_SUBSYS_ID_REG 0x2c
/*
* capabilities link list (PCI rev. 2.2)
*/
#define PCI_CAPLISTPTR_REG 0x34 /* header type 0 */
#define PCI_CARDBUS_CAPLISTPTR_REG 0x14 /* header type 2 */
#define PCI_CAPLIST_PTR(cpr) ((cpr) & 0xff)
#define PCI_CAPLIST_NEXT(cr) (((cr) >> 8) & 0xff)
#define PCI_CAPLIST_CAP(cr) ((cr) & 0xff)
#define PCI_CAP_RESERVED0 0x00
#define PCI_CAP_PWRMGMT 0x01
#define PCI_CAP_AGP 0x02
#define PCI_CAP_VPD 0x03
#define PCI_CAP_SLOTID 0x04
#define PCI_CAP_MSI 0x05
#define PCI_CAP_CPCI_HOTSWAP 0x06
#define PCI_CAP_PCIX 0x07
#define PCI_CAP_LDT 0x08
#define PCI_CAP_VENDSPEC 0x09
#define PCI_CAP_DEBUGPORT 0x0a
#define PCI_CAP_CPCI_RSRCCTL 0x0b
#define PCI_CAP_HOTPLUG 0x0c
#define PCI_CAP_AGP8 0x0e
#define PCI_CAP_SECURE 0x0f
#define PCI_CAP_PCIEXPRESS 0x10
#define PCI_CAP_MSIX 0x11
/*
* Vital Product Data; access via capability pointer (PCI rev 2.2).
*/
#define PCI_VPD_ADDRESS_MASK 0x7fff
#define PCI_VPD_ADDRESS_SHIFT 16
#define PCI_VPD_ADDRESS(ofs) \
(((ofs) & PCI_VPD_ADDRESS_MASK) << PCI_VPD_ADDRESS_SHIFT)
#define PCI_VPD_DATAREG(ofs) ((ofs) + 4)
#define PCI_VPD_OPFLAG 0x80000000
/*
* Power Management Capability; access via capability pointer.
*/
/* Power Management Capability Register */
#define PCI_PMCR 0x02
#define PCI_PMCR_D1SUPP 0x0200
#define PCI_PMCR_D2SUPP 0x0400
/* Power Management Control Status Register */
#define PCI_PMCSR 0x04
#define PCI_PMCSR_STATE_MASK 0x03
#define PCI_PMCSR_STATE_D0 0x00
#define PCI_PMCSR_STATE_D1 0x01
#define PCI_PMCSR_STATE_D2 0x02
#define PCI_PMCSR_STATE_D3 0x03

View File

@@ -34,8 +34,8 @@
#include <stdio.h>
#include <string.h>
#define PCI_DEBUG 0
#define PCI_PRINT 0
/* #define PCI_DEBUG 1 */
/* #define PCI_PRINT 1 */
/* allow for overriding these definitions */
#ifndef PCI_CONFIG_ADDR
@@ -251,6 +251,11 @@ int pci_initialize()
unsigned char ucBusNumber, ucSlotNumber, ucFnNumber, ucNumFuncs;
unsigned int ulHeader;
unsigned int pcidata, ulClass, ulDeviceID;
#if PCI_DEBUG
unsigned short sdata;
unsigned int data;
#endif
pci_interface();

View File

@@ -1,15 +1,11 @@
/* pci_interface.c
*
* Copyright 2004, 2006, 2007 All rights reserved. (NDA items)
* Brookhaven National Laboratory and Shuchen Kate Feng <feng1@bnl.gov>
* Copyright 2004, Brookhaven National Laboratory and
* Shuchen Kate Feng <feng1@bnl.gov>
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution.
*
* 8/17/2006 : S. Kate Feng
* uses in_le32()/out_le32(), instead of inl()/outl() so that
* it is easier to be ported.
*
*/
#include <libcpu/io.h>
#include <rtems/bspIo.h> /* printk */
@@ -19,16 +15,15 @@
#include <bsp/gtreg.h>
#include <bsp/gtpcireg.h>
#define REG32_READ(reg) in_le32((volatile unsigned int *)(GT64260_REG_BASE+reg))
#define REG32_WRITE(data, reg) out_le32((volatile unsigned int *)(GT64260_REG_BASE+reg), data)
#define PCI_DEBUG 0
/* Please reference the GT64260B datasheet, for the PCI interface,
* Synchronization Barriers and PCI ordering.
*
* Some PCI devices require Synchronization Barriers or PCI ordering
* for synchronization (only one mechanism allowed. See section 11.1.2).
* for synchronization. For example, the VME-OMS58 motor controller we
* used at NSLS requires either enhanced CPU Synchronization Barrier
* or PCI-ordering (only one mechanism allowed. See section 11.1.2).
* To use the former mechanism(default), one needs to call
* CPU0_PciEnhanceSync() or CPU1_PciEnhanceSync() to perform software
* synchronization between the CPU and PCI activities.
@@ -44,12 +39,13 @@
* function correctly.
*
*/
/*#define PCI_ORDERING*/
#define EN_SYN_BAR /* take MOTLoad default for enhanced SYN Barrier mode */
#define PCI_ORDERING
/*#define PCI_DEADLOCK*/
/* So far, I do not see the need to disable the address pipelining.
#define DIS_ADDR_PIPELINE*/
#ifdef PCI_ORDERING
#define PCI_ACCCTLBASEL_VALUE 0x01009000
#else
@@ -90,18 +86,40 @@ void pciAccessInit();
void pci_interface()
{
unsigned int data;
#if (defined(PCI_ORDERING)||defined(DIS_ADDR_PIPELINE))
data = inl(0); /* needed : read to flush */
/* MOTLOad default disables Configuration and I/O Read Sync Barrier
* which is needed for enhanced CPU sync. barrier */
#ifdef PCI_ORDERING
/* enable Configuration Read Sync Barrier and IO read Sync Barrier*/
data &= ~ConfIOSBDis;
#endif
#ifdef DIS_ADDR_PIPELINE
data &= ~ADDR_PIPELINE;
#if PCI_DEBUG
printk("data %x\n", data);
#endif
#endif
outl(data, 0);
/* read polling of the register until the new data is being read */
while ( inl(0)!=data);
#endif
#ifdef PCI_DEADLOCK
REG32_WRITE(0x07fff600, CNT_SYNC_REG);
outl(0x07fff600, CNT_SYNC_REG);
#endif
#ifdef PCI_ORDERING
/* Let's leave this to be MOTLOad deafult : 0x80070000
REG32_WRITE(0xc0070000, DLOCK_ORDER_REG);*/
/* Leave the CNT_SYNC_REG b/c MOTload default had the SyncBarMode set to 1 */
outl(0xc0060002, DLOCK_ORDER_REG);
outl(0x07fff600, CNT_SYNC_REG);
#else
outl(inl(PCI_CMD_CNTL)|PCI_COMMAND_SB_DIS, PCI_CMD_CNTL);
#endif
/* asserts SERR upon various detection */
REG32_WRITE(0x3fffff, 0xc28);
outl(0x3fffff, 0xc28);
pciAccessInit();
}
@@ -115,14 +133,13 @@ void pciAccessInit()
/* MOTLoad combines the two banks of SDRAM into
* one PCI access control because the top = 0x1ff
*/
data = REG32_READ(GT_SCS0_Low_Decode) & 0xfff;
data = inl(GT_SCS0_Low_Decode) & 0xfff;
data |= PCI_ACCCTLBASEL_VALUE;
data &= ~0x300000;
REG32_WRITE(data, PCI0_ACCESS_CNTL_BASE0_LOW+(PciLocal * 0x80));
outl(data, PCI0_ACCESS_CNTL_BASE0_LOW+(PciLocal * 0x80));
#if PCI_DEBUG
printk("PCI%d_ACCESS_CNTL_BASE0_LOW 0x%x\n",PciLocal,REG32_READ(PCI_ACCESS_CNTL_BASE0_LOW+(PciLocal * 0x80)));
printk("PCI%d_ACCESS_CNTL_BASE0_LOW 0x%x\n",PciLocal,inl(PCI_ACCESS_CNTL_BASE0_LOW+(PciLocal * 0x80)));
#endif
}
}
@@ -135,14 +152,14 @@ void pciAccessInit()
*/
void CPU0_PciEnhanceSync(unsigned int syncVal)
{
REG32_WRITE(syncVal,CPU0_SYNC_TRIGGER);
while (REG32_READ(CPU0_SYNC_VIRTUAL));
outl(syncVal,CPU0_SYNC_TRIGGER);
while (inl(CPU0_SYNC_VIRTUAL));
}
void CPU1_PciEnhanceSync(unsigned int syncVal)
{
REG32_WRITE(syncVal,CPU1_SYNC_TRIGGER);
while (REG32_READ(CPU1_SYNC_VIRTUAL));
outl(syncVal,CPU1_SYNC_TRIGGER);
while (inl(CPU1_SYNC_VIRTUAL));
}
/* Currently, if PCI_ordering is used for synchronization, configuration

View File

@@ -1,11 +1,56 @@
/* pcifinddevice.c
*
* Copyright 2001, Till Straumann <strauman@slac.stanford.edu>
*
* find a particular PCI device
* (we assume, the firmware configured the PCI bus[es] for us)
*
*/
/*
* Authorship
* ----------
* This software was created by
* Till Straumann <strauman@slac.stanford.edu>, 2001,
* Stanford Linear Accelerator Center, Stanford University.
*
* Acknowledgement of sponsorship
* ------------------------------
* This software was produced by
* the Stanford Linear Accelerator Center, Stanford University,
* under Contract DE-AC03-76SFO0515 with the Department of Energy.
*
* Government disclaimer of liability
* ----------------------------------
* Neither the United States nor the United States Department of Energy,
* nor any of their employees, makes any warranty, express or implied, or
* assumes any legal liability or responsibility for the accuracy,
* completeness, or usefulness of any data, apparatus, product, or process
* disclosed, or represents that its use would not infringe privately owned
* rights.
*
* Stanford disclaimer of liability
* --------------------------------
* Stanford University makes no representations or warranties, express or
* implied, nor assumes any liability for the use of this software.
*
* Stanford disclaimer of copyright
* --------------------------------
* Stanford University, owner of the copyright, hereby disclaims its
* copyright and all other rights in this software. Hence, anyone may
* freely use it for any purpose without restriction.
*
* Maintenance of notices
* ----------------------
* In the interest of clarity regarding the origin and status of this
* SLAC software, this and all the preceding Stanford University notices
* are to remain affixed to any copy or derivative of this software made
* or distributed by the recipient and are to be affixed to any copy of
* software made or distributed by the recipient that contains a copy or
* derivative of this software.
*
* ------------------ SLAC Software Notices, Set 4 OTT.002a, 2004 FEB 03
*/
/*
* Kate Feng <feng1@bnl.gov>, modified it to support the mvme5500 board.
*
*/

View File

@@ -61,9 +61,9 @@ $(PROJECT_INCLUDE)/bsp/uart.h: ../../powerpc/shared/console/uart.h $(PROJECT_INC
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/uart.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/uart.h
$(PROJECT_INCLUDE)/bsp/consoleIo.h: ../../powerpc/shared/console/consoleIo.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/consoleIo.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/consoleIo.h
$(PROJECT_INCLUDE)/bsp/vme_am_defs.h: ../../shared/vmeUniverse/vme_am_defs.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vme_am_defs.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vme_am_defs.h
$(PROJECT_INCLUDE)/bsp/gtpcireg.h: pci/gtpcireg.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/gtpcireg.h
@@ -106,21 +106,13 @@ $(PROJECT_INCLUDE)/bsp/VPD.h: GT64260/VPD.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/VPD.h
if HAS_NETWORKING
$(PROJECT_INCLUDE)/bsp/GT64260eth.h: network/if_100MHz/GT64260eth.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(PROJECT_INCLUDE)/bsp/GT64260eth.h: network/GT64260eth.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/GT64260eth.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/GT64260eth.h
$(PROJECT_INCLUDE)/bsp/GT64260ethreg.h: network/if_100MHz/GT64260ethreg.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(PROJECT_INCLUDE)/bsp/GT64260ethreg.h: network/GT64260ethreg.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/GT64260ethreg.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/GT64260ethreg.h
$(PROJECT_INCLUDE)/bsp/if_wmreg.h: network/if_1GHz/if_wmreg.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/if_wmreg.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/if_wmreg.h
$(PROJECT_INCLUDE)/bsp/pcireg.h: network/if_1GHz/pcireg.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/pcireg.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/pcireg.h
endif
$(PROJECT_INCLUDE)/bsp/VME.h: ../../shared/vmeUniverse/VME.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/VME.h
@@ -146,10 +138,6 @@ $(PROJECT_INCLUDE)/bsp/VMEDMA.h: ../../shared/vmeUniverse/VMEDMA.h $(PROJECT_INC
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/VMEDMA.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/VMEDMA.h
$(PROJECT_INCLUDE)/bsp/vme_am_defs.h: ../../shared/vmeUniverse/vme_am_defs.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vme_am_defs.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vme_am_defs.h
$(PROJECT_LIB)/rtems_crti.$(OBJEXT): rtems_crti.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_LIB)/rtems_crti.$(OBJEXT)
TMPINSTALL_FILES += $(PROJECT_LIB)/rtems_crti.$(OBJEXT)

View File

@@ -1,8 +1,9 @@
/*
* Mini-loader for the SVGM BSP.
* Mini-loader for the SVGM and MVME5500 BSP.
*
* $Id$
*
* Copyright (C) 2003, 2004
* Author: Till Straumann, 10/2001 <strauman@slac.stanford.edu>
*
* Some ideas are borrowed from the powerpc/shared/bootloader
@@ -10,8 +11,9 @@
* Copyright (C) 1998, 1999 Gabriel Paubert, paubert@iram.es
* Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
*
* The SMON firmware is unable to load the RTEMS image below
* 0x2000 (I believe their stack is growing below 0x1000).
*
* The SVGM firmware is unable to load the RTEMS image below
* 0x2000 (I believe their stack is growing below 0x1000) ?
*
* The code provided by this file is responsible for the performing
* the following steps:
@@ -21,11 +23,13 @@
* b) will not be overwritten by the moved image
* nor the final BSS segment (rtems clears BSS
* before saving the command line).
* 2) Move the entire image (including this very file) to
* 2) Initialize and setup the memory controller to prepare the
* SDRAM before moving the image to it.
* 3) Move the entire image (including this very file) to
* its final location starting at 0x0000.
* It is important to note that _NO_STACK_ is available
* during this step. Also, there is probably no return to
* SMON because relocating RTEMS will destroy vital SMON
* Monitor because relocating RTEMS will destroy vital Monitor
* data (such as its stack).
* 3) Flush the cache to make sure the relocated image is actually
* in memory.
@@ -40,10 +44,10 @@
*
*
* Calling convention:
* R1: SMON SP
* R1: Monitor SP
* R3: command line string start
* R4: command line string end + 1
* R5: where SMON put the image
* R5: where Monitor put the image
* if R5 is 0, the preloader will use its entry point
* as the image starting address.
* See NOTE below.
@@ -70,7 +74,10 @@
*
*/
#if 0
#include <rtems/score/powerpc.h>
/* TODO: I dont know where the appropriate CPU model is to be defined
* when including this to get PPC_CACHE_ALIGNMENT I get an error...
*/
#include <rtems/score/ppc.h>
#else
#ifndef PPC_CACHE_ALIGNMENT
#define PPC_CACHE_ALIGNMENT 32
@@ -83,8 +90,8 @@
/* Note that major modifications may be needed
* if DESTINATION_ADDR is not 0
*/
#define KERNELBASE 0x0
#define INITIAL_STACK 0x78 /* 8-byte aligned */
#define KERNELBASE 0x0
#define INITIAL_STACK 0x78 /* 8-byte aligned */
#define CACHE_LINE_SIZE PPC_CACHE_ALIGNMENT /* autodetect doesn't work, see below */
#define ASSUME_RTEMS_INSTALLS_VECTORS /* assume we need not load vectors */
#define DONT_USE_R5_ENTRY /* always dynamically determine the address we're running from */
@@ -101,8 +108,10 @@ preload:
/* find out where we are */
bl here
here:
xor r0,r0,r0
mtmsr r0 /* clear MSR to known state */
/* MOTLoad had MSR_EE turned on. Disable it.*/
mfmsr r0
xori r0, r0, MSR_EE
mtmsr r0
mflr r5
addi r5,r5,-(here-preload)
lis r27,_edata@h
@@ -138,9 +147,10 @@ here:
add r16, r5, r27 /* image end + 1 */
cmpw r16, r18
bge ishighenough
mr r16,r18 /* __rtems_end is higher than the image end
* (without bss)
*/
mr r16,r18 /* __rtems_end is higher than
* the image end
* (without bss)
*/
ishighenough:
cmpw r16, r3 /* destination start > current string start ? */
ble leaveparms /* string already after dst, leave it */
@@ -155,7 +165,7 @@ leaveparms:
add r7, r6, r17 /* destination + strlen */
#ifndef CACHE_LINE_SIZE
/* Oh well, SMON has inhibited the cache, so this
/* Oh well, Monitor firmware has inhibited the cache, so this
* nice routine doesn't work...
*/
/* figure out the cache line size */
@@ -177,7 +187,7 @@ leaveparms:
li r16,CACHE_LINE_SIZE
#endif
lis r3,preload@h
lis r3,preload@h
ori r3,r3,preload@l
mr r4,r5 /* from-addr */
li r5,_preload_size/* this is never > 16k */
@@ -208,19 +218,19 @@ return_here:
/* OK, now everything should be in place.
* we are ready to start...
*/
/* R6: start of command line */
/* R7: end of command line +1 */
/* setup initial stack for rtems early boot */
li r1,INITIAL_STACK
lis r1, INITIAL_STACK
/* disable the MMU and fire up rtems */
mfmsr r0
ori r0,r0,MSR_IR|MSR_DR|MSR_IP|MSR_ME
ori r0,r0,MSR_IR|MSR_DR|MSR_IP
xori r0,r0,MSR_IR|MSR_DR
mtsrr1 r0
lis r0,__rtems_entry_point@h
ori r0,r0,__rtems_entry_point@l
mtsrr0 r0
/* R6: start of command line */
/* R7: end of command line +1 */
rfi
/* domove(to, from, nbytes):
@@ -228,7 +238,7 @@ return_here:
* move a R5 bytes from R4 to R3 and flush
* the caches for the destination memory
* region. R16 provides the cache line size.
* DESTROYS: R0, R17, R18, CTR, CR
* DESTROYS: R0, R17, R18, CTR, CR
*/
domove:
addi r0,r5,3 /* convert to word count */
@@ -248,18 +258,18 @@ domove:
beq 3f /* nothing to do */
#endif
#if defined(CACHE_LINE_SIZE) && CACHE_LINE_SIZE > 0
add r17,r3,r5 /* target end pointer */
add r17,r3,r5 /* target end pointer */
subi r0,r16,1
add r17,r17,r0
add r17,r17,r0
andc r17,r17,r0 /* cache aligned target end pointer */
mr r18,r3
mr r18,r3
2: cmpw r18,r17
dcbst 0,r18 /* write out data cache line */
icbi 0,r18 /* invalidate corresponding i-cache line */
add r18,r18,r16
blt 2b
sync /* make sure data is written back */
isync /* invalidate possibly preloaded instructions */
add r18,r18,r16
blt 2b
sync /* make sure data is written back */
isync /* invalidate possibly preloaded instructions */
#endif
3:
blr

View File

@@ -7,12 +7,10 @@
void bsp_cleanup(void)
{
#if AUTO_BOOT
/* Till Straumann <strauman@slac.stanford.edu> for SVGM */
void rtemsReboot();
rtemsReboot();
#else
/* Kate Feng <feng1@bnl.gov> for the MVME5500 */
printk("\nPrinting a stack trace for your convenience :-)\n");
CPU_print_stack();
printk("RTEMS terminated; Boot manually or turn on AUTO_BOOT.\n");

View File

@@ -14,13 +14,14 @@
* Modified to support the MCP750.
* Modifications Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
*
* Modified to support the Synergy VGM & Motorola PowerPC boards
* (C) by Till Straumann, <strauman@slac.stanford.edu>, 2002, 2004, 2005
* Modified to support the Synergy VGM & Motorola PowerPC boards.
* Many thanks to Till Straumann for providing assistance to port the
* BSP_pgtbl_xxx().
* (C) by Till Straumann, <strauman@slac.stanford.edu>, 2002, 2004
*
* Modified to support the MVME5500 board
* (C) by S. Kate Feng <feng1@bnl.gov>, 2003, 2004
*
* Modified to support the MVME5500 board.
* Also, the settings of L1, L2, and L3 caches is not necessary here.
* (C) by Brookhaven National Lab., S. Kate Feng <feng1@bnl.gov>, 2003, 2004, 2005
*
* $Id$
*/
@@ -61,11 +62,19 @@
/* there is no public Workspace_Free() variant :-( */
#include <rtems/score/wkspace.h>
uint32_t
_bsp_sbrk_init(uint32_t heap_start, uint32_t *heap_size_p);
/* provide access to the command line parameters */
char *BSP_commandline_string = 0;
BSP_output_char_function_type BSP_output_char = BSP_output_char_via_serial;
extern void _return_to_ppcbug();
extern unsigned long __rtems_end[];
extern void L1_caches_enables();
extern unsigned get_L1CR(), get_L2CR(), get_L3CR();
extern unsigned set_L2CR(unsigned);
extern void bsp_cleanup(void);
extern Triv121PgTbl BSP_pgtbl_setup();
extern void BSP_pgtbl_activate();
@@ -103,11 +112,6 @@ unsigned int BSP_mem_size;
/*
* PCI Bus Frequency
*/
/*
* Start of the heap
*/
unsigned int BSP_heap_start;
unsigned int BSP_bus_frequency;
/*
* processor clock frequency
@@ -119,17 +123,23 @@ unsigned int BSP_processor_frequency;
unsigned int BSP_time_base_divisor;
unsigned char ConfVPD_buff[200];
#define CMDLINE_BUF_SIZE 2048
static char cmdline_buf[CMDLINE_BUF_SIZE];
char *BSP_commandline_string = cmdline_buf;
/*
* system init stack and soft ir stack size
*/
#define INIT_STACK_SIZE 0x1000
#define INTR_STACK_SIZE CONFIGURE_INTERRUPT_STACK_MEMORY
/* calculate the heap start */
static unsigned long
heapStart(void)
{
unsigned long rval;
rval = ((uint32_t) __rtems_end) +INIT_STACK_SIZE + INTR_STACK_SIZE;
if (rval & (CPU_ALIGNMENT-1))
rval = (rval + CPU_ALIGNMENT) & ~(CPU_ALIGNMENT-1);
return rval;
}
void BSP_panic(char *s)
{
printk("%s PANIC %s\n",_RTEMS_version, s);
@@ -163,7 +173,40 @@ extern void bsp_postdriver_hook(void); /* see c/src/lib/libbsp/shared/bsppost.c
extern void bsp_libc_init( void *, uint32_t, int );
extern void bsp_pretasking_hook(void);
/*
* Function: bsp_pretasking_hook
* Created: 95/03/10
*
* Description:
* BSP pretasking hook. Called just before drivers are initialized.
* Used to setup libc and install any BSP extensions.
*
* NOTES:
* Must not use libc (to do io) from here, since drivers are
* not yet initialized.
*
*/
void bsp_pretasking_hook(void)
{
uint32_t heap_start=heapStart();
uint32_t heap_size,heap_sbrk_spared;
extern uint32_t _bsp_sbrk_init(uint32_t, uint32_t*);
heap_size = (BSP_mem_size - heap_start) - BSP_Configuration.work_space_size;
heap_sbrk_spared=_bsp_sbrk_init(heap_start, &heap_size);
#ifdef SHOW_MORE_INIT_SETTINGS
printk(" HEAP start %x size %x (%x bytes spared for sbrk)\n", heap_start, heap_size, heap_sbrk_spared);
#endif
bsp_libc_init((void *) 0, heap_size, heap_sbrk_spared);
#ifdef RTEMS_DEBUG
rtems_debug_enable( RTEMS_DEBUG_ALL_MASK );
#endif
}
void zero_bss()
{
@@ -214,12 +257,65 @@ void
save_boot_params(void *r3, void *r4, void* r5, char *cmdline_start, char *cmdline_end)
{
int i=cmdline_end-cmdline_start;
if ( i >= CMDLINE_BUF_SIZE )
i = CMDLINE_BUF_SIZE-1;
else if ( i < 0 )
i = 0;
memmove(cmdline_buf, cmdline_start, i);
cmdline_buf[i]=0;
CmdLine future_heap=(CmdLine)heapStart();
/* get the string out of the stack area into the future heap region;
* assume there's enough memory...
*/
memmove(future_heap->buf,cmdline_start,i);
/* make sure there's an end of string marker */
future_heap->buf[i++]=0;
future_heap->size=i;
}
/* Configure and enable the L3CR */
void config_enable_L3CR(unsigned l3cr)
{
unsigned x;
/* By The Book (numbered steps from section 3.7.3.1 of MPC7450UM) */
/*
* 1: Set all L3CR bits for final config except L3E, L3I, L3PE, and
* L3CLKEN. (also mask off reserved bits in case they were included
* in L3CR_CONFIG)
*/
l3cr &= ~(L3CR_L3E|L3CR_L3I|L3CR_LOCK_745x|L3CR_L3PE|L3CR_L3CLKEN|L3CR_RESERVED);
mtspr(L3CR, l3cr);
/* 2: Set L3CR[5] (otherwise reserved bit) to 1 */
l3cr |= 0x04000000;
mtspr(L3CR, l3cr);
/* 3: Set L3CLKEN to 1*/
l3cr |= L3CR_L3CLKEN;
mtspr(L3CR, l3cr);
/* 4/5: Perform a global cache invalidate (ref section 3.7.3.6) */
__asm __volatile("dssall;sync");
/* L3 cache is already disabled, no need to clear L3E */
mtspr(L3CR, l3cr|L3CR_L3I);
do {
x = mfspr(L3CR);
} while (x & L3CR_L3I);
/* 6: Clear L3CLKEN to 0 */
l3cr &= ~L3CR_L3CLKEN;
mtspr(L3CR, l3cr);
/* 7: Perform a 'sync' and wait at least 100 CPU cycles */
__asm __volatile("sync");
rtems_bsp_delay_in_bus_cycles(100);
/* 8: Set L3E and L3CLKEN */
l3cr |= (L3CR_L3E|L3CR_L3CLKEN);
mtspr(L3CR, l3cr);
/* 9: Perform a 'sync' and wait at least 100 CPU cycles */
__asm __volatile("sync");
rtems_bsp_delay_in_bus_cycles(100);
}
/*
@@ -250,24 +346,6 @@ void bsp_start( void )
ppc_cpu_id_t myCpu;
ppc_cpu_revision_t myCpuRevision;
Triv121PgTbl pt=0;
/* Till Straumann: 4/2005
* Need to map the system registers early, so we can printk...
* (otherwise we silently die)
*/
/*
* Kate Feng : PCI 0 domain memory space, want to leave room for the VME window
*/
setdbat(2, PCI0_MEM_BASE, PCI0_MEM_BASE, 0x10000000, IO_PAGE);
/* Till Straumann: 2004
* map the PCI 0, 1 Domain I/O space, GT64260B registers
* and the reserved area so that the size is the power of 2.
*
*/
setdbat(3,PCI0_IO_BASE, PCI0_IO_BASE, 0x2000000, IO_PAGE);
/*
* Get CPU identification dynamically. Note that the get_ppc_cpu_type() function
* store the result in global variables so that it can be used latter...
@@ -275,6 +353,15 @@ void bsp_start( void )
myCpu = get_ppc_cpu_type();
myCpuRevision = get_ppc_cpu_revision();
/*
* enables L1 Cache. Note that the L1_caches_enables() codes checks for
* relevant CPU type so that the reason why there is no use of myCpu...
*
* MOTLoad default is good. Otherwise, one would have to disable L2, L3
* first before settting L1. Then L1->L2->L3.
*
L1_caches_enables();*/
#ifdef SHOW_LCR1_REGISTER
l1cr = get_L1CR();
printk("Initial L1CR value = %x\n", l1cr);
@@ -303,8 +390,8 @@ void bsp_start( void )
* This could be done latter (e.g in IRQ_INIT) but it helps to understand
* some settings below...
*/
BSP_heap_start = ((uint32_t) __rtems_end) + INIT_STACK_SIZE + INTR_STACK_SIZE;
intrStack = BSP_heap_start - PPC_MINIMUM_STACK_FRAME_SIZE;
intrStack = ((uint32_t) __rtems_end) +
INIT_STACK_SIZE + INTR_STACK_SIZE - PPC_MINIMUM_STACK_FRAME_SIZE;
/* make sure it's properly aligned */
intrStack &= ~(CPU_STACK_ALIGNMENT-1);
@@ -327,6 +414,16 @@ void bsp_start( void )
* access
* More PCI1 memory mapping to be done after BSP_pgtbl_activate.
*/
/*
* PCI 0 domain memory space, want to leave room for the VME window
*/
setdbat(2, PCI0_MEM_BASE, PCI0_MEM_BASE, 0x10000000, IO_PAGE);
/* map the PCI 0, 1 Domain I/O space, GT64260B registers
* and the reserved area so that the size is the power of 2.
*/
setdbat(3,PCI0_IO_BASE, PCI0_IO_BASE, 0x2000000, IO_PAGE);
printk("-----------------------------------------\n");
printk("Welcome to %s on MVME5500-0163\n", _RTEMS_version );
printk("-----------------------------------------\n");
@@ -388,7 +485,7 @@ void bsp_start( void )
/* P94 : 7455 TB/DECR is clocked by the system bus clock frequency */
Cpu_table.clicks_per_usec = BSP_bus_frequency/(BSP_time_base_divisor * 1000);
Cpu_table.exceptions_in_RAM = TRUE;
_CPU_Table = Cpu_table;/* S. Kate Feng <feng1@bnl.gov>, for rtems_bsp_delay() */
_CPU_Table = Cpu_table;/* <skf> for rtems_bsp_delay() */
printk("BSP_Configuration.work_space_size = %x\n", BSP_Configuration.work_space_size);
work_space_start =
@@ -406,10 +503,50 @@ void bsp_start( void )
*/
BSP_rtems_irq_mng_init(0);
/*
* Enable L2 Cache. Note that the set_L2CR(L2CR) codes checks for
* relevant CPU type (mpc750)...
*
* It also takes care of flushing the cache under certain conditions:
* current going to (E==enable, I==invalidate)
* E E | I -> __NOT_FLUSHED_, invalidated, stays E
* E I -> flush & disable, invalidate
* E E -> nothing, stays E
* 0 E | I -> not flushed, invalidated, enabled
* 0 | I -> not flushed, invalidated, stays off
* 0 E -> not flushed, _NO_INVALIDATE, enabled
*
* The first and the last combinations are potentially dangerous!
*
* NOTE: we assume the essential cache parameters (speed, size etc.)
* have been set correctly by the firmware!
*
*/
#ifdef SHOW_LCR2_REGISTER
l2cr = get_L2CR();
printk("Initial L2CR value = %x\n", l2cr);
#endif
#if 0
/* Again, MOTload setup seems to be fine. Otherwise, one would
* have to disable the L3 cahce, then R2 ->R3
*/
if ( -1 != (int)l2cr ) {
/* -1 would mean that this machine doesn't support L2 */
l2cr &= ~( L2CR_LOCK_745x); /* clear 'data only' and 'instruction only' */
l2cr |= L2CR_L3OH0; /* L3 output hold 0 should be set */
if ( ! (l2cr & L2CR_L2E) ) {
/* we are going to enable the L2 - hence we
* MUST invalidate it first; however, if
* it was enabled already, we MUST NOT
* invalidate it!!
*/
l2cr |= L2CR_L2E | L2CR_L2I;
l2cr=set_L2CR(l2cr);
}
l2cr=set_L2CR(l2cr);
}
#endif
#ifdef SHOW_LCR3_REGISTER
/* L3CR needs DEC int. handler installed for bsp_delay()*/
@@ -417,6 +554,22 @@ void bsp_start( void )
printk("Initial L3CR value = %x\n", l3cr);
#endif
#if 0
/* Again, use the MOTLoad default for L3CR again */
if ( -1 != (int)l3cr ) {
/* -1 would mean that this machine doesn't support L3 */
/* BSD : %2 , SDRAM late wirte
l3cr |= L3SIZ_2M|L3CLK_20|L3RT_PIPELINE_LATE; */
/* MOTLOad :0xDF826000-> %5, 4 clocks sample point,3 p-clocks SP */
l3cr |= L3CR_L3PE| L3SIZ_2M|L3CLK_50|L3CKSP_4|L3PSP_3;
/* TOCHECK MOTload had L2 cache enabled, try to set nothing first */
if ( !(l3cr & L3CR_L3E)) {
l3cr |= L3CR_L3E | L3CR_L3I;
config_enable_L3CR(l3cr);
}
}
#endif
/* Activate the page table mappings only after
* initializing interrupts because the irq_mng_init()
@@ -451,6 +604,19 @@ void bsp_start( void )
*/
_BSP_clear_hostbridge_errors(0, 1 /*quiet*/);
/*
* Initialize VME bridge - needs working PCI
* and IRQ subsystems...
*/
#ifdef SHOW_MORE_INIT_SETTINGS
printk("Going to initialize VME bridge\n");
#endif
/* VME initialization is in a separate file so apps which don't use
* VME or want a different configuration may link against a customized
* routine.
*/
BSP_vme_config();
/* Read Configuration Vital Product Data (VPD) */
if ( I2Cread_eeprom(0xa8, 4,2, &ConfVPD_buff[0], 150))
printk("I2Cread_eeprom() error \n");

View File

@@ -9,8 +9,52 @@
* default activation procedure.
*/
/* Author: Till Straumann, <strauman@slac.stanford.edu>, 4/2002
* Kate Feng <feng1@bnl.gov> ported it to MVME5500, 4/2004
/*
* Authorship
* ----------
* This software was created by
* Till Straumann <strauman@slac.stanford.edu>, 4/2002,
* Stanford Linear Accelerator Center, Stanford University.
*
* Acknowledgement of sponsorship
* ------------------------------
* This software was produced by
* the Stanford Linear Accelerator Center, Stanford University,
* under Contract DE-AC03-76SFO0515 with the Department of Energy.
*
* Government disclaimer of liability
* ----------------------------------
* Neither the United States nor the United States Department of Energy,
* nor any of their employees, makes any warranty, express or implied, or
* assumes any legal liability or responsibility for the accuracy,
* completeness, or usefulness of any data, apparatus, product, or process
* disclosed, or represents that its use would not infringe privately owned
* rights.
*
* Stanford disclaimer of liability
* --------------------------------
* Stanford University makes no representations or warranties, express or
* implied, nor assumes any liability for the use of this software.
*
* Stanford disclaimer of copyright
* --------------------------------
* Stanford University, owner of the copyright, hereby disclaims its
* copyright and all other rights in this software. Hence, anyone may
* freely use it for any purpose without restriction.
*
* Maintenance of notices
* ----------------------
* In the interest of clarity regarding the origin and status of this
* SLAC software, this and all the preceding Stanford University notices
* are to remain affixed to any copy or derivative of this software made
* or distributed by the recipient and are to be affixed to any copy of
* software made or distributed by the recipient that contains a copy or
* derivative of this software.
*
* ------------------ SLAC Software Notices, Set 4 OTT.002a, 2004 FEB 03
*/
/* Kate Feng <feng1@bnl.gov> ported it to MVME5500, 4/2004
*/
void

View File

@@ -7,10 +7,10 @@
void rtemsReboot()
{
printk("Printing a stack trace for your convenience :-)\n");
printk("\nPrinting a stack trace for your convenience :-)\n");
CPU_print_stack();
printk("RTEMS terminated; Rebooting ...\n");
/* Mvme5500 board reset : 2004 S. Kate Feng <feng1@bnl.gov> */
/* Mvme5500 board reset <skf> */
out_8((volatile unsigned char*) (GT64260_DEV1_BASE +2), 0x80);
}

View File

@@ -151,7 +151,7 @@ do
case $tname in
# size is no longer interactive.
monitor* | termios* | fileio* | pppd*)
monitor*| termios*| fileio*)
if [ $run_to_completion = "yes" ]
then
warn "Skipping $tname; it is interactive"

View File

@@ -1,7 +1,3 @@
2007-04-17 Joel Sherrill <joel@OARcorp.com>
* simsh4/tools/runtest.in: Do not run pppd.exe from batch mode script.
2006-12-02 Ralf Corsépius <ralf.corsepius@rtems.org>
* configure.ac: New BUG-REPORT address.

View File

@@ -133,7 +133,7 @@ do
case "$tname" in
# size is no longer interactive.
monitor* | termios* | fileio* | pppd*)
monitor* | termios* | fileio*)
warn "Skipping $tname; it is interactive"
continue
;;

View File

@@ -1,7 +1,3 @@
2007-07-15 Till Straumann <strauman@slac.stanford.edu>
* vmeUniverse/vmeTsi148.c: Use size_t for sizes.
2007-04-02 Joel Sherrill <joel@OARcorp.com>
* dummy_printk_support.c: New file.

View File

@@ -1904,7 +1904,7 @@ rtems_id q = 0;
int installed = 0;
int i, err = 0;
int doDisable = 0;
size_t size;
uint32_t size;
unsigned long msg;
char * irqfmt = "VME IRQ @vector %3i %s";
char * iackfmt = "VME IACK %s";

View File

@@ -1,8 +1,3 @@
2007-04-17 Joel Sherrill <joel@OARcorp.com>
* erc32/tools/runtest.in, leon2/tools/runtest.in,
leon3/tools/runtest.in: Do not run pppd.exe from batch mode script.
2006-12-02 Ralf Corsépius <ralf.corsepius@rtems.org>
* configure.ac: New BUG-REPORT address.

View File

@@ -1,15 +1,3 @@
2008-08-08 Joel Sherrill <joel.sherrill@OARcorp.com>
* startup/linkcmds: All SPARC executables should include
rtems_get_version_string so the monitor used can provide RTEMS
awareness based upon the version.
2008-08-04 Joel Sherrill <joel.sherrill@OARcorp.com>
PR 1294/bsps
* startup/spurious.c: Correct prototype and usage of
sparc_disable_interrupts.
2007-03-28 Joel Sherrill <joel@OARcorp.com>
PR 1233/bsps

View File

@@ -81,11 +81,6 @@ MEMORY
ram : ORIGIN = 0x02000000, LENGTH = 32M
}
/*
* SPARC monitor assumes this is present to provide proper RTEMS awareness.
*/
EXTERN(rtems_get_version_string);
/*
* stick everything in ram (of course)
*/

View File

@@ -161,11 +161,11 @@ rtems_isr bsp_spurious_handler(
void bsp_spurious_initialize()
{
uint32_t trap;
uint32_t trap;
uint32_t level = 15;
uint32_t mask;
level = sparc_disable_interrupts();
sparc_disable_interrupts(level);
mask = ERC32_MEC.Interrupt_Mask;
for ( trap=0 ; trap<256 ; trap++ ) {

View File

@@ -2,7 +2,7 @@
#
# $Id$
#
# Run rtems tests on the SPARC simulator includeed with GDB
# Run rtems tests on the hppa simulator
# This program generates a simulator script to run each test
# Typically the test is then run, although it can be generated
# and left as a file using -s
@@ -131,7 +131,7 @@ do
TEST_TYPE="single"
case $tname in
monitor* | termios* | fileio* | pppd*)
monitor* | termios* | fileio*)
if [ $run_to_completion = "yes" ]
then
warn "Skipping $tname; it is interactive"

View File

@@ -1,9 +1,3 @@
2008-08-08 Joel Sherrill <joel.sherrill@OARcorp.com>
* startup/linkcmds: All SPARC executables should include
rtems_get_version_string so the monitor used can provide RTEMS
awareness based upon the version.
2007-03-10 Joel Sherrill <joel@OARcorp.com>
PR 1227/bsps

View File

@@ -81,11 +81,6 @@ MEMORY
ram : ORIGIN = 0x40000000, LENGTH = 1024M
}
/*
* SPARC monitor assumes this is present to provide proper RTEMS awareness.
*/
EXTERN(rtems_get_version_string);
/*
* stick everything in ram (of course)
*/

View File

@@ -131,7 +131,7 @@ do
TEST_TYPE="single"
case $tname in
monitor* | termios* | fileio* | pppd*)
monitor* | termios* | fileio*)
if [ $run_to_completion = "yes" ]
then
warn "Skipping $tname; it is interactive"

View File

@@ -1,14 +1,3 @@
2008-08-08 Joel Sherrill <joel.sherrill@OARcorp.com>
* console/debugputs.c: Correct use of sparc_disable_interrupt and
sparc_enable_interrupt.
2008-08-08 Joel Sherrill <joel.sherrill@OARcorp.com>
* startup/linkcmds: All SPARC executables should include
rtems_get_version_string so the monitor used can provide RTEMS
awareness based upon the version.
2007-03-10 Joel Sherrill <joel@OARcorp.com>
PR 1227/bsps

View File

@@ -89,16 +89,16 @@ void DEBUG_puts(
)
{
char *s;
uint32_t level;
/* unsigned32 old_level; */
/* LEON_Disable_interrupt( LEON_INTERRUPT_UART_1_RX_TX, old_level ); */
level = sparc_disable_interrupts();
sparc_disable_interrupts();
LEON3_Console_Uart[0]->ctrl = LEON_REG_UART_CTRL_TE;
for ( s = string ; *s ; s++ )
console_outbyte_polled( 0, *s );
console_outbyte_polled( 0, '\r' );
console_outbyte_polled( 0, '\n' );
sparc_enable_interrupts(level);
sparc_enable_interrupts();
/* LEON_Restore_interrupt( LEON_INTERRUPT_UART_1_RX_TX, old_level ); */
}

View File

@@ -81,11 +81,6 @@ MEMORY
ram : ORIGIN = 0x40000000, LENGTH = 1024M
}
/*
* SPARC monitor assumes this is present to provide proper RTEMS awareness.
*/
EXTERN(rtems_get_version_string);
/*
* stick everything in ram (of course)
*/

View File

@@ -131,7 +131,7 @@ do
TEST_TYPE="single"
case $tname in
monitor* | termios* | fileio* | pppd*)
monitor* | termios* | fileio*)
if [ $run_to_completion = "yes" ]
then
warn "Skipping $tname; it is interactive"

View File

@@ -1,7 +1,3 @@
2007-04-17 Joel Sherrill <joel@OARcorp.com>
* posix/tools/runtest.in: Do not run pppd.exe from batch mode script.
2006-12-02 Ralf Corsépius <ralf.corsepius@rtems.org>
* configure.ac: New BUG-REPORT address.

View File

@@ -132,7 +132,7 @@ do
TEST_TYPE="single"
case $tname in
monitor* | termios* | fileio* | pppd*)
monitor* | termios* | fileio*)
if [ $run_to_completion = "yes" ]
then
warn "Skipping $tname; it is interactive"

View File

@@ -1,10 +1,3 @@
2007-07-31 Joel Sherrill <joel.sherrill@OARcorp.com>
PR 1249/build
* configure.ac: Jerry Needell <jerry.needell@unh.edu> reported that the
leon3 was left out of the cache enable logic. Thus the cache
management support code was empty on LEON3 CPUs.
2006-12-02 Ralf Corsépius <ralf.corsepius@rtems.org>
* configure.ac: New BUG-REPORT address.

View File

@@ -22,7 +22,7 @@ RTEMS_CANONICALIZE_TOOLS
RTEMS_PROG_CCAS
AM_CONDITIONAL(has_instruction_cache, test "$RTEMS_CPU_MODEL" = "leon1" \
|| test "$RTEMS_CPU_MODEL" = "leon2" || test "$RTEMS_CPU_MODEL" = "leon3" )
|| test "$RTEMS_CPU_MODEL" = "leon2" )
RTEMS_AMPOLISH3

View File

@@ -1,8 +1,3 @@
2008-08-04 Joel Sherrill <joel.sherrill@OARcorp.com>
PR 1282/misc
* src/rtemsInterrupt.cc: Correct vec/vector variable confusion.
2007-02-06 Joel Sherrill <joel@OARcorp.com>
* include/rtems++/rtemsMessageQueue.h, src/rtemsMessageQueue.cc: Make

View File

@@ -52,7 +52,7 @@ rtemsInterrupt::rtemsInterrupt()
vec < CPU_INTERRUPT_NUMBER_OF_VECTORS;
vec++)
{
interrupt_table[vec] = 0;
interrupt_table[vector] = 0;
}
initialised = true;
}
@@ -71,8 +71,8 @@ const rtems_status_code rtemsInterrupt::isr_catch(const rtems_vector_number vec)
if (caught)
return set_status_code(RTEMS_RESOURCE_IN_USE);
old_interrupt = interrupt_table[vec];
interrupt_table[vec] = this;
old_interrupt = interrupt_table[vector];
interrupt_table[vector] = this;
vector = vec;
set_status_code(rtems_interrupt_catch(redirector,

View File

@@ -1,11 +0,0 @@
aclocal.m4
autom4te*
config.log
config.status
configure
install-sh
Makefile
Makefile.in
missing
*.spec
*.tar.bz2

View File

@@ -1,340 +0,0 @@
GNU GENERAL PUBLIC LICENSE
Version 2, June 1991
Copyright (C) 1989, 1991 Free Software Foundation, Inc.
59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
Everyone is permitted to copy and distribute verbatim copies
of this license document, but changing it is not allowed.
Preamble
The licenses for most software are designed to take away your
freedom to share and change it. By contrast, the GNU General Public
License is intended to guarantee your freedom to share and change free
software--to make sure the software is free for all its users. This
General Public License applies to most of the Free Software
Foundation's software and to any other program whose authors commit to
using it. (Some other Free Software Foundation software is covered by
the GNU Library General Public License instead.) You can apply it to
your programs, too.
When we speak of free software, we are referring to freedom, not
price. Our General Public Licenses are designed to make sure that you
have the freedom to distribute copies of free software (and charge for
this service if you wish), that you receive source code or can get it
if you want it, that you can change the software or use pieces of it
in new free programs; and that you know you can do these things.
To protect your rights, we need to make restrictions that forbid
anyone to deny you these rights or to ask you to surrender the rights.
These restrictions translate to certain responsibilities for you if you
distribute copies of the software, or if you modify it.
For example, if you distribute copies of such a program, whether
gratis or for a fee, you must give the recipients all the rights that
you have. You must make sure that they, too, receive or can get the
source code. And you must show them these terms so they know their
rights.
We protect your rights with two steps: (1) copyright the software, and
(2) offer you this license which gives you legal permission to copy,
distribute and/or modify the software.
Also, for each author's protection and ours, we want to make certain
that everyone understands that there is no warranty for this free
software. If the software is modified by someone else and passed on, we
want its recipients to know that what they have is not the original, so
that any problems introduced by others will not reflect on the original
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Finally, any free program is threatened constantly by software
patents. We wish to avoid the danger that redistributors of a free
program will individually obtain patent licenses, in effect making the
program proprietary. To prevent this, we have made it clear that any
patent must be licensed for everyone's free use or not licensed at all.
The precise terms and conditions for copying, distribution and
modification follow.
GNU GENERAL PUBLIC LICENSE
TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
0. This License applies to any program or other work which contains
a notice placed by the copyright holder saying it may be distributed
under the terms of this General Public License. The "Program", below,
refers to any such program or work, and a "work based on the Program"
means either the Program or any derivative work under copyright law:
that is to say, a work containing the Program or a portion of it,
either verbatim or with modifications and/or translated into another
language. (Hereinafter, translation is included without limitation in
the term "modification".) Each licensee is addressed as "you".
Activities other than copying, distribution and modification are not
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running the Program is not restricted, and the output from the Program
is covered only if its contents constitute a work based on the
Program (independent of having been made by running the Program).
Whether that is true depends on what the Program does.
1. You may copy and distribute verbatim copies of the Program's
source code as you receive it, in any medium, provided that you
conspicuously and appropriately publish on each copy an appropriate
copyright notice and disclaimer of warranty; keep intact all the
notices that refer to this License and to the absence of any warranty;
and give any other recipients of the Program a copy of this License
along with the Program.
You may charge a fee for the physical act of transferring a copy, and
you may at your option offer warranty protection in exchange for a fee.
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c) If the modified program normally reads commands interactively
when run, you must cause it, when started running for such
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announcement including an appropriate copyright notice and a
notice that there is no warranty (or else, saying that you provide
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the Program is not required to print an announcement.)
These requirements apply to the modified work as a whole. If
identifiable sections of that work are not derived from the Program,
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In addition, mere aggregation of another work not based on the Program
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except as expressly provided under this License. Any attempt
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implemented by public license practices. Many people have made
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This section is intended to make thoroughly clear what is believed to
be a consequence of the rest of this License.
8. If the distribution and/or use of the Program is restricted in
certain countries either by patents or by copyrighted interfaces, the
original copyright holder who places the Program under this License
may add an explicit geographical distribution limitation excluding
those countries, so that distribution is permitted only in or among
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of the General Public License from time to time. Such new versions will
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Each version is given a distinguishing version number. If the Program
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NO WARRANTY
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WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR
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YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER
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END OF TERMS AND CONDITIONS
How to Apply These Terms to Your New Programs
If you develop a new program, and you want it to be of the greatest
possible use to the public, the best way to achieve this is to make it
free software which everyone can redistribute and change under these terms.
To do so, attach the following notices to the program. It is safest
to attach them to the start of each source file to most effectively
convey the exclusion of warranty; and each file should have at least
the "copyright" line and a pointer to where the full notice is found.
<one line to give the program's name and a brief idea of what it does.>
Copyright (C) <year> <name of author>
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
Also add information on how to contact you by electronic and paper mail.
If the program is interactive, make it output a short notice like this
when it starts in an interactive mode:
Gnomovision version 69, Copyright (C) year name of author
Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
This is free software, and you are welcome to redistribute it
under certain conditions; type `show c' for details.
The hypothetical commands `show w' and `show c' should show the appropriate
parts of the General Public License. Of course, the commands you use may
be called something other than `show w' and `show c'; they could even be
mouse-clicks or menu items--whatever suits your program.
You should also get your employer (if you work as a programmer) or your
school, if any, to sign a "copyright disclaimer" for the program, if
necessary. Here is a sample; alter the names:
Yoyodyne, Inc., hereby disclaims all copyright interest in the program
`Gnomovision' (which makes passes at compilers) written by James Hacker.
<signature of Ty Coon>, 1 April 1989
Ty Coon, President of Vice
This General Public License does not permit incorporating your program into
proprietary programs. If your program is a subroutine library, you may
consider it more useful to permit linking proprietary applications with the
library. If this is what you want to do, use the GNU Library General
Public License instead of this License.

View File

@@ -1,23 +0,0 @@
2006-12-02 Ralf Corsépius <ralf.corsepius@rtems.org>
* configure.ac: New BUG-REPORT address.
2004-09-24 Ralf Corsepius <ralf_corsepius@rtems.org>
* configure.ac: Require automake > 1.9.
2004-02-21 Joel Sherrill <joel@OARcorp.com>
* README: New file.
2004-02-20 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* rtems-apt-conf.spec.in: Add @VERSION@ to Source0.
2004-02-20 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* Makefile.am, gpg/gpg-pubkey-eac29b6f-3fe1f458, ChangeLog,
vendors.list.d/rtems.list, sources.list.d/rtems-4.6.list,
sources.list.d/rtems-4.7.list, configure.ac, .cvsignore, COPYING,
rtems-apt-conf.spec.in, INSTALL: New.

View File

@@ -1,229 +0,0 @@
Copyright (C) 1994, 1995, 1996, 1999, 2000, 2001, 2002 Free Software
Foundation, Inc.
This file is free documentation; the Free Software Foundation gives
unlimited permission to copy, distribute and modify it.
Basic Installation
==================
These are generic installation instructions.
The `configure' shell script attempts to guess correct values for
various system-dependent variables used during compilation. It uses
those values to create a `Makefile' in each directory of the package.
It may also create one or more `.h' files containing system-dependent
definitions. Finally, it creates a shell script `config.status' that
you can run in the future to recreate the current configuration, and a
file `config.log' containing compiler output (useful mainly for
debugging `configure').
It can also use an optional file (typically called `config.cache'
and enabled with `--cache-file=config.cache' or simply `-C') that saves
the results of its tests to speed up reconfiguring. (Caching is
disabled by default to prevent problems with accidental use of stale
cache files.)
If you need to do unusual things to compile the package, please try
to figure out how `configure' could check whether to do them, and mail
diffs or instructions to the address given in the `README' so they can
be considered for the next release. If you are using the cache, and at
some point `config.cache' contains results you don't want to keep, you
may remove or edit it.
The file `configure.ac' (or `configure.in') is used to create
`configure' by a program called `autoconf'. You only need
`configure.ac' if you want to change it or regenerate `configure' using
a newer version of `autoconf'.
The simplest way to compile this package is:
1. `cd' to the directory containing the package's source code and type
`./configure' to configure the package for your system. If you're
using `csh' on an old version of System V, you might need to type
`sh ./configure' instead to prevent `csh' from trying to execute
`configure' itself.
Running `configure' takes awhile. While running, it prints some
messages telling which features it is checking for.
2. Type `make' to compile the package.
3. Optionally, type `make check' to run any self-tests that come with
the package.
4. Type `make install' to install the programs and any data files and
documentation.
5. You can remove the program binaries and object files from the
source code directory by typing `make clean'. To also remove the
files that `configure' created (so you can compile the package for
a different kind of computer), type `make distclean'. There is
also a `make maintainer-clean' target, but that is intended mainly
for the package's developers. If you use it, you may have to get
all sorts of other programs in order to regenerate files that came
with the distribution.
Compilers and Options
=====================
Some systems require unusual options for compilation or linking that
the `configure' script does not know about. Run `./configure --help'
for details on some of the pertinent environment variables.
You can give `configure' initial values for configuration parameters
by setting variables in the command line or in the environment. Here
is an example:
./configure CC=c89 CFLAGS=-O2 LIBS=-lposix
*Note Defining Variables::, for more details.
Compiling For Multiple Architectures
====================================
You can compile the package for more than one kind of computer at the
same time, by placing the object files for each architecture in their
own directory. To do this, you must use a version of `make' that
supports the `VPATH' variable, such as GNU `make'. `cd' to the
directory where you want the object files and executables to go and run
the `configure' script. `configure' automatically checks for the
source code in the directory that `configure' is in and in `..'.
If you have to use a `make' that does not support the `VPATH'
variable, you have to compile the package for one architecture at a
time in the source code directory. After you have installed the
package for one architecture, use `make distclean' before reconfiguring
for another architecture.
Installation Names
==================
By default, `make install' will install the package's files in
`/usr/local/bin', `/usr/local/man', etc. You can specify an
installation prefix other than `/usr/local' by giving `configure' the
option `--prefix=PATH'.
You can specify separate installation prefixes for
architecture-specific files and architecture-independent files. If you
give `configure' the option `--exec-prefix=PATH', the package will use
PATH as the prefix for installing programs and libraries.
Documentation and other data files will still use the regular prefix.
In addition, if you use an unusual directory layout you can give
options like `--bindir=PATH' to specify different values for particular
kinds of files. Run `configure --help' for a list of the directories
you can set and what kinds of files go in them.
If the package supports it, you can cause programs to be installed
with an extra prefix or suffix on their names by giving `configure' the
option `--program-prefix=PREFIX' or `--program-suffix=SUFFIX'.
Optional Features
=================
Some packages pay attention to `--enable-FEATURE' options to
`configure', where FEATURE indicates an optional part of the package.
They may also pay attention to `--with-PACKAGE' options, where PACKAGE
is something like `gnu-as' or `x' (for the X Window System). The
`README' should mention any `--enable-' and `--with-' options that the
package recognizes.
For packages that use the X Window System, `configure' can usually
find the X include and library files automatically, but if it doesn't,
you can use the `configure' options `--x-includes=DIR' and
`--x-libraries=DIR' to specify their locations.
Specifying the System Type
==========================
There may be some features `configure' cannot figure out
automatically, but needs to determine by the type of machine the package
will run on. Usually, assuming the package is built to be run on the
_same_ architectures, `configure' can figure that out, but if it prints
a message saying it cannot guess the machine type, give it the
`--build=TYPE' option. TYPE can either be a short name for the system
type, such as `sun4', or a canonical name which has the form:
CPU-COMPANY-SYSTEM
where SYSTEM can have one of these forms:
OS KERNEL-OS
See the file `config.sub' for the possible values of each field. If
`config.sub' isn't included in this package, then this package doesn't
need to know the machine type.
If you are _building_ compiler tools for cross-compiling, you should
use the `--target=TYPE' option to select the type of system they will
produce code for.
If you want to _use_ a cross compiler, that generates code for a
platform different from the build platform, you should specify the
"host" platform (i.e., that on which the generated programs will
eventually be run) with `--host=TYPE'.
Sharing Defaults
================
If you want to set default values for `configure' scripts to share,
you can create a site shell script called `config.site' that gives
default values for variables like `CC', `cache_file', and `prefix'.
`configure' looks for `PREFIX/share/config.site' if it exists, then
`PREFIX/etc/config.site' if it exists. Or, you can set the
`CONFIG_SITE' environment variable to the location of the site script.
A warning: not all `configure' scripts look for a site script.
Defining Variables
==================
Variables not defined in a site shell script can be set in the
environment passed to `configure'. However, some packages may run
configure again during the build, and the customized values of these
variables may be lost. In order to avoid this problem, you should set
them in the `configure' command line, using `VAR=value'. For example:
./configure CC=/usr/local2/bin/gcc
will cause the specified gcc to be used as the C compiler (unless it is
overridden in the site shell script).
`configure' Invocation
======================
`configure' recognizes the following options to control how it
operates.
`--help'
`-h'
Print a summary of the options to `configure', and exit.
`--version'
`-V'
Print the version of Autoconf used to generate the `configure'
script, and exit.
`--cache-file=FILE'
Enable the cache: use and save the results of the tests in FILE,
traditionally `config.cache'. FILE defaults to `/dev/null' to
disable caching.
`--config-cache'
`-C'
Alias for `--cache-file=config.cache'.
`--quiet'
`--silent'
`-q'
Do not print messages saying which checks are being made. To
suppress all normal output, redirect it to `/dev/null' (any error
messages will still be shown).
`--srcdir=DIR'
Look for the package's source code in directory DIR. Usually
`configure' can determine that directory automatically.
`configure' also accepts some other, not widely useful, options. Run
`configure --help' for more details.

View File

@@ -1,13 +0,0 @@
aptconfdir = $(sysconfdir)/apt
sources_list_ddir = $(aptconfdir)/sources.list.d
dist_sources_list_d_DATA = sources.list.d/rtems-4.6.list
dist_sources_list_d_DATA += sources.list.d/rtems-4.7.list
vendors_list_ddir = $(aptconfdir)/vendors.list.d
dist_vendors_list_d_DATA = vendors.list.d/rtems.list
gpgdir = $(aptconfdir)/gpg
dist_gpg_DATA = gpg/gpg-pubkey-eac29b6f-3fe1f458
noinst_HEADERS = rtems-apt-conf.spec

View File

@@ -1,18 +0,0 @@
#
# $Id$
#
Instructions on building:
To build them:
1. Check out the source from cvs.
2. Make sure to have automake >= 1.8 in $PATH (eg. rtems-4.7-automake)
3. autoreconf -i
4. ./configure
5. make dist
6. rpmbuild -ta rtems-apt-conf-0.0.tar.bz2
This generates 2 *.noarch.rpms,
one containing the setup for RH-7.3 + rtems-4.6
and one containing the setup for RH-7.3 + rtems-4.7

View File

@@ -1,12 +0,0 @@
# -*- Autoconf -*-
# Process this file with autoconf to produce a configure script.
AC_PREREQ(2.59)
AC_INIT([rtems-apt-conf],[0.0],[http://www.rtems.org/bugzilla])
AC_CONFIG_SRCDIR([sources.list.d/rtems-4.6.list])
AC_CONFIG_AUX_DIR([.])
AM_INIT_AUTOMAKE([foreign dist-bzip2 no-dist-gzip 1.9])
AC_CONFIG_FILES([Makefile
rtems-apt-conf.spec
])
AC_OUTPUT

View File

@@ -1,25 +0,0 @@
-----BEGIN PGP PUBLIC KEY BLOCK-----
Version: GnuPG v1.2.3 (GNU/Linux)
mQGiBD/h9FgRBACIvWgCQP+mXUroVHIYCjPegO2RnTAW5Czpbi97eBcR/mb4U+5K
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View File

@@ -1,71 +0,0 @@
Name: @PACKAGE_NAME@
Version: @VERSION@
Release: 0
Epoch: 0
License: GPL
Source0: @PACKAGE_NAME@-@VERSION@.tar.bz2
BuildRoot: %{_tmppath}/%{name}-%{version}-%{release}-root-%(%{__id_u} -n)
BuildArch: noarch
Group: RTEMS
Summary: Apt configuration for RTEMS
%description
Apt configuration files to access the apt repositories at ftp://ftp.rtems.com
%prep
%setup -q
%build
%configure
%install
rm -rf $RPM_BUILD_ROOT
make install DESTDIR=$RPM_BUILD_ROOT
%clean
rm -rf $RPM_BUILD_ROOT
%package -n rtems-4.6-apt-conf
Summary: Apt configuration for RTEMS/4.6
Group: RTEMS/4.6
Requires: apt >= 0.5.15cnc1
%description -n rtems-4.6-apt-conf
Apt configuration for RTEMS/4.6
%files -n rtems-4.6-apt-conf
%defattr(-,root,root,-)
%{_sysconfdir}/apt/gpg
%{_sysconfdir}/apt/sources.list.d/rtems-4.6.list
%{_sysconfdir}/apt/vendors.list.d/rtems.list
%post -n rtems-4.6-apt-conf
if test -f %{_sysconfdir}/apt/sources.list; then
cp %{_sysconfdir}/apt/sources.list %{_sysconfdir}/apt/sources.list.rpmsave
sed '/rpm.*ftp:\/\/ftp\.rtems\.com.*redhat.*7\.3.*apt.*rtems-4\.6/d' \
< %{_sysconfdir}/apt/sources.list.rpmsave \
> %{_sysconfdir}/apt/sources.list
fi
%package -n rtems-4.7-apt-conf
Summary: Apt configuration for RTEMS/4.7
Group: RTEMS/4.7
Requires: apt >= 0.5.15cnc1
%description -n rtems-4.7-apt-conf
Apt configuration for RTEMS/4.7
%files -n rtems-4.7-apt-conf
%defattr(-,root,root,-)
%{_sysconfdir}/apt/gpg
%{_sysconfdir}/apt/sources.list.d/rtems-4.7.list
%{_sysconfdir}/apt/vendors.list.d/rtems.list
%post -n rtems-4.7-apt-conf
if test -f %{_sysconfdir}/apt/sources.list; then
cp %{_sysconfdir}/apt/sources.list %{_sysconfdir}/apt/sources.list.rpmsave
sed '/rpm.*ftp:\/\/ftp\.rtems\.com.*redhat.*7\.3.*apt.*rtems-4\.7/d' \
< %{_sysconfdir}/apt/sources.list.rpmsave \
> %{_sysconfdir}/apt/sources.list
fi

View File

@@ -1,4 +0,0 @@
# Repository for RTEMS-4.6 rpms
rpm ftp://ftp.rtems.com/pub/rtems/linux redhat/7.3/i386/apt rtems-4.6
rpm-src ftp://ftp.rtems.com/pub/rtems/linux redhat/7.3/i386/apt rtems-4.6

View File

@@ -1,4 +0,0 @@
# Repository for RTEMS-4.7 rpms
rpm ftp://ftp.rtems.com/pub/rtems/linux redhat/7.3/i386/apt rtems-4.7
rpm-src ftp://ftp.rtems.com/pub/rtems/linux redhat/7.3/i386/apt rtems-4.7

View File

@@ -1,4 +0,0 @@
simple-key "rtems" {
Fingerprint "CD738F4967B9B2F95EEA2FE846A926C2EAC29B6F";
Name "RTEMS Packager (RTEMS Packager) <rtems.packager@rtems.com>";
}

View File

@@ -1,10 +0,0 @@
INSTALL
Makefile
Makefile.in
aclocal.m4
configure
config.*
autom4te*
missing
install-sh

View File

@@ -1,9 +0,0 @@
Ralf Corsépius <ralf.corsepius@rtems.org>
Chris Johns <chrisj@rtems.org>
- Testing.
- Bugfixes.
- mingw32.
Joel Sherrill <joel@oarcorp.com>
- Testing.

View File

@@ -1,340 +0,0 @@
GNU GENERAL PUBLIC LICENSE
Version 2, June 1991
Copyright (C) 1989, 1991 Free Software Foundation, Inc.
51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
Everyone is permitted to copy and distribute verbatim copies
of this license document, but changing it is not allowed.
Preamble
The licenses for most software are designed to take away your
freedom to share and change it. By contrast, the GNU General Public
License is intended to guarantee your freedom to share and change free
software--to make sure the software is free for all its users. This
General Public License applies to most of the Free Software
Foundation's software and to any other program whose authors commit to
using it. (Some other Free Software Foundation software is covered by
the GNU Library General Public License instead.) You can apply it to
your programs, too.
When we speak of free software, we are referring to freedom, not
price. Our General Public Licenses are designed to make sure that you
have the freedom to distribute copies of free software (and charge for
this service if you wish), that you receive source code or can get it
if you want it, that you can change the software or use pieces of it
in new free programs; and that you know you can do these things.
To protect your rights, we need to make restrictions that forbid
anyone to deny you these rights or to ask you to surrender the rights.
These restrictions translate to certain responsibilities for you if you
distribute copies of the software, or if you modify it.
For example, if you distribute copies of such a program, whether
gratis or for a fee, you must give the recipients all the rights that
you have. You must make sure that they, too, receive or can get the
source code. And you must show them these terms so they know their
rights.
We protect your rights with two steps: (1) copyright the software, and
(2) offer you this license which gives you legal permission to copy,
distribute and/or modify the software.
Also, for each author's protection and ours, we want to make certain
that everyone understands that there is no warranty for this free
software. If the software is modified by someone else and passed on, we
want its recipients to know that what they have is not the original, so
that any problems introduced by others will not reflect on the original
authors' reputations.
Finally, any free program is threatened constantly by software
patents. We wish to avoid the danger that redistributors of a free
program will individually obtain patent licenses, in effect making the
program proprietary. To prevent this, we have made it clear that any
patent must be licensed for everyone's free use or not licensed at all.
The precise terms and conditions for copying, distribution and
modification follow.
GNU GENERAL PUBLIC LICENSE
TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
0. This License applies to any program or other work which contains
a notice placed by the copyright holder saying it may be distributed
under the terms of this General Public License. The "Program", below,
refers to any such program or work, and a "work based on the Program"
means either the Program or any derivative work under copyright law:
that is to say, a work containing the Program or a portion of it,
either verbatim or with modifications and/or translated into another
language. (Hereinafter, translation is included without limitation in
the term "modification".) Each licensee is addressed as "you".
Activities other than copying, distribution and modification are not
covered by this License; they are outside its scope. The act of
running the Program is not restricted, and the output from the Program
is covered only if its contents constitute a work based on the
Program (independent of having been made by running the Program).
Whether that is true depends on what the Program does.
1. You may copy and distribute verbatim copies of the Program's
source code as you receive it, in any medium, provided that you
conspicuously and appropriately publish on each copy an appropriate
copyright notice and disclaimer of warranty; keep intact all the
notices that refer to this License and to the absence of any warranty;
and give any other recipients of the Program a copy of this License
along with the Program.
You may charge a fee for the physical act of transferring a copy, and
you may at your option offer warranty protection in exchange for a fee.
2. You may modify your copy or copies of the Program or any portion
of it, thus forming a work based on the Program, and copy and
distribute such modifications or work under the terms of Section 1
above, provided that you also meet all of these conditions:
a) You must cause the modified files to carry prominent notices
stating that you changed the files and the date of any change.
b) You must cause any work that you distribute or publish, that in
whole or in part contains or is derived from the Program or any
part thereof, to be licensed as a whole at no charge to all third
parties under the terms of this License.
c) If the modified program normally reads commands interactively
when run, you must cause it, when started running for such
interactive use in the most ordinary way, to print or display an
announcement including an appropriate copyright notice and a
notice that there is no warranty (or else, saying that you provide
a warranty) and that users may redistribute the program under
these conditions, and telling the user how to view a copy of this
License. (Exception: if the Program itself is interactive but
does not normally print such an announcement, your work based on
the Program is not required to print an announcement.)
These requirements apply to the modified work as a whole. If
identifiable sections of that work are not derived from the Program,
and can be reasonably considered independent and separate works in
themselves, then this License, and its terms, do not apply to those
sections when you distribute them as separate works. But when you
distribute the same sections as part of a whole which is a work based
on the Program, the distribution of the whole must be on the terms of
this License, whose permissions for other licensees extend to the
entire whole, and thus to each and every part regardless of who wrote it.
Thus, it is not the intent of this section to claim rights or contest
your rights to work written entirely by you; rather, the intent is to
exercise the right to control the distribution of derivative or
collective works based on the Program.
In addition, mere aggregation of another work not based on the Program
with the Program (or with a work based on the Program) on a volume of
a storage or distribution medium does not bring the other work under
the scope of this License.
3. You may copy and distribute the Program (or a work based on it,
under Section 2) in object code or executable form under the terms of
Sections 1 and 2 above provided that you also do one of the following:
a) Accompany it with the complete corresponding machine-readable
source code, which must be distributed under the terms of Sections
1 and 2 above on a medium customarily used for software interchange; or,
b) Accompany it with a written offer, valid for at least three
years, to give any third party, for a charge no more than your
cost of physically performing source distribution, a complete
machine-readable copy of the corresponding source code, to be
distributed under the terms of Sections 1 and 2 above on a medium
customarily used for software interchange; or,
c) Accompany it with the information you received as to the offer
to distribute corresponding source code. (This alternative is
allowed only for noncommercial distribution and only if you
received the program in object code or executable form with such
an offer, in accord with Subsection b above.)
The source code for a work means the preferred form of the work for
making modifications to it. For an executable work, complete source
code means all the source code for all modules it contains, plus any
associated interface definition files, plus the scripts used to
control compilation and installation of the executable. However, as a
special exception, the source code distributed need not include
anything that is normally distributed (in either source or binary
form) with the major components (compiler, kernel, and so on) of the
operating system on which the executable runs, unless that component
itself accompanies the executable.
If distribution of executable or object code is made by offering
access to copy from a designated place, then offering equivalent
access to copy the source code from the same place counts as
distribution of the source code, even though third parties are not
compelled to copy the source along with the object code.
4. You may not copy, modify, sublicense, or distribute the Program
except as expressly provided under this License. Any attempt
otherwise to copy, modify, sublicense or distribute the Program is
void, and will automatically terminate your rights under this License.
However, parties who have received copies, or rights, from you under
this License will not have their licenses terminated so long as such
parties remain in full compliance.
5. You are not required to accept this License, since you have not
signed it. However, nothing else grants you permission to modify or
distribute the Program or its derivative works. These actions are
prohibited by law if you do not accept this License. Therefore, by
modifying or distributing the Program (or any work based on the
Program), you indicate your acceptance of this License to do so, and
all its terms and conditions for copying, distributing or modifying
the Program or works based on it.
6. Each time you redistribute the Program (or any work based on the
Program), the recipient automatically receives a license from the
original licensor to copy, distribute or modify the Program subject to
these terms and conditions. You may not impose any further
restrictions on the recipients' exercise of the rights granted herein.
You are not responsible for enforcing compliance by third parties to
this License.
7. If, as a consequence of a court judgment or allegation of patent
infringement or for any other reason (not limited to patent issues),
conditions are imposed on you (whether by court order, agreement or
otherwise) that contradict the conditions of this License, they do not
excuse you from the conditions of this License. If you cannot
distribute so as to satisfy simultaneously your obligations under this
License and any other pertinent obligations, then as a consequence you
may not distribute the Program at all. For example, if a patent
license would not permit royalty-free redistribution of the Program by
all those who receive copies directly or indirectly through you, then
the only way you could satisfy both it and this License would be to
refrain entirely from distribution of the Program.
If any portion of this section is held invalid or unenforceable under
any particular circumstance, the balance of the section is intended to
apply and the section as a whole is intended to apply in other
circumstances.
It is not the purpose of this section to induce you to infringe any
patents or other property right claims or to contest validity of any
such claims; this section has the sole purpose of protecting the
integrity of the free software distribution system, which is
implemented by public license practices. Many people have made
generous contributions to the wide range of software distributed
through that system in reliance on consistent application of that
system; it is up to the author/donor to decide if he or she is willing
to distribute software through any other system and a licensee cannot
impose that choice.
This section is intended to make thoroughly clear what is believed to
be a consequence of the rest of this License.
8. If the distribution and/or use of the Program is restricted in
certain countries either by patents or by copyrighted interfaces, the
original copyright holder who places the Program under this License
may add an explicit geographical distribution limitation excluding
those countries, so that distribution is permitted only in or among
countries not thus excluded. In such case, this License incorporates
the limitation as if written in the body of this License.
9. The Free Software Foundation may publish revised and/or new versions
of the General Public License from time to time. Such new versions will
be similar in spirit to the present version, but may differ in detail to
address new problems or concerns.
Each version is given a distinguishing version number. If the Program
specifies a version number of this License which applies to it and "any
later version", you have the option of following the terms and conditions
either of that version or of any later version published by the Free
Software Foundation. If the Program does not specify a version number of
this License, you may choose any version ever published by the Free Software
Foundation.
10. If you wish to incorporate parts of the Program into other free
programs whose distribution conditions are different, write to the author
to ask for permission. For software which is copyrighted by the Free
Software Foundation, write to the Free Software Foundation; we sometimes
make exceptions for this. Our decision will be guided by the two goals
of preserving the free status of all derivatives of our free software and
of promoting the sharing and reuse of software generally.
NO WARRANTY
11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY
FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN
OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES
PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED
OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK AS
TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU. SHOULD THE
PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING,
REPAIR OR CORRECTION.
12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR
REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES,
INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING
OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED
TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY
YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER
PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE
POSSIBILITY OF SUCH DAMAGES.
END OF TERMS AND CONDITIONS
How to Apply These Terms to Your New Programs
If you develop a new program, and you want it to be of the greatest
possible use to the public, the best way to achieve this is to make it
free software which everyone can redistribute and change under these terms.
To do so, attach the following notices to the program. It is safest
to attach them to the start of each source file to most effectively
convey the exclusion of warranty; and each file should have at least
the "copyright" line and a pointer to where the full notice is found.
<one line to give the program's name and a brief idea of what it does.>
Copyright (C) <year> <name of author>
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
Also add information on how to contact you by electronic and paper mail.
If the program is interactive, make it output a short notice like this
when it starts in an interactive mode:
Gnomovision version 69, Copyright (C) year name of author
Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
This is free software, and you are welcome to redistribute it
under certain conditions; type `show c' for details.
The hypothetical commands `show w' and `show c' should show the appropriate
parts of the General Public License. Of course, the commands you use may
be called something other than `show w' and `show c'; they could even be
mouse-clicks or menu items--whatever suits your program.
You should also get your employer (if you work as a programmer) or your
school, if any, to sign a "copyright disclaimer" for the program, if
necessary. Here is a sample; alter the names:
Yoyodyne, Inc., hereby disclaims all copyright interest in the program
`Gnomovision' (which makes passes at compilers) written by James Hacker.
<signature of Ty Coon>, 1 April 1989
Ty Coon, President of Vice
This General Public License does not permit incorporating your program into
proprietary programs. If your program is a subroutine library, you may
consider it more useful to permit linking proprietary applications with the
library. If this is what you want to do, use the GNU Library General
Public License instead of this License.

View File

@@ -1,97 +0,0 @@
2006-12-02 Ralf Corsépius <ralf.corsepius@rtems.org>
* configure.ac: New BUG-REPORT address.
2006-11-14 Ralf Corsépius <ralf.corsepius@rtems.org>
* configure.ac, Makefile.am, rtems-4.7/Makefile.am: Remove tic4x.
* rtems-4.7/tic4x/: Remove.
2006-10-19 Ralf Corsépius <ralf.corsepius@rtems.org>
* autotools/Makefile.am, autotools/automake.add: Update to
automake-1.10.
2006-10-19 Ralf Corsépius <ralf.corsepius@rtems.org>
* rtems-4.7/bfin/Makefile.am, rtems-4.7/bfin/.cvsignore:
Remove (Development in CVS-HEAD, only).
2006-10-09 Ralf Corsépius <ralf.corsepius@rtems.org>
* configure.ac, rtems-4.7/Makefile.am: Remove bfin.
2006-08-23 Ralf Corsépius <ralf.corsepius@rtems.org>
* rtems4.7/arm/gcc-sources.add, rtems4.7/h8300/gcc-sources.add,
rtems4.7/i386/gcc-sources.add, rtems4.7/m68k/gcc-sources.add,
rtems4.7/mips/gcc-sources.add, rtems4.7/powerpc/gcc-sources.add
rtems4.7/sh/gcc-sources.add, rtems4.7/sparc/gcc-sources.add
rtems4.7/tic4x/gcc-sources.add: Add gcc-4.0.3.
2006-08-23 Ralf Corsépius <ralf.corsepius@rtems.org>
* gcc/build.add: Revert --disable-libssp etc. hacks.
2006-08-22 Chris Johns <chrisj@rtems.org>
* rtems4.7/avr/gcc-sources.add: Add the 4.0.3 patch.
* patches/gcc-core-4.0.3-rtems-20060822.diff:
The .exe for the versioned execuable for MinGW.
2006-08-21 Joel Sherrill <joel@OARcorp.com>
* rtems4.7/h8300/binutils-sources.add,
rtems4.7/m68k/binutils-sources.add: Add h8300 _tinydata patch and
bump patch for targets needing it.
* patches/binutils-2.17-rtems-20060815.diff: New file.
2006-08-11 Joel Sherrill <joel@oarcorp.com>
* configure.ac, gcc/build.add, gcc/target-gcc.add: Add bfin target
prior to merge. Add ability to disable libssp and libstdcxx-pch which
apparently are required to build the Blackfin port.
* patches/binutils-2.17-rtems-bfin-20060810.diff,
patches/gcc-4.1.1-bfinrtems-20060810a.diff,
patches/gdb-6.5-bfinrtems-20060810a.diff,
patches/newlib-1.14.0-bfinrtems-20060810a.diff,
rtems4.7/bfin/.cvsignore, rtems4.7/bfin/Makefile.am,
rtems4.7/bfin/binutils-sources.add, rtems4.7/bfin/gcc-sources.add,
rtems4.7/bfin/gdb-sources.add: New files.
2006-08-09 Joel Sherrill <joel@OARcorp.com>
* .cvsignore: Add INSTALL.
2006-07-19 Chris Johns <chrisj@rtems.org>
* patches/gcc-core-4.1.1-rtems-20060720.diff:
Added patch to fix GCC bug PR28400.
2006-07-13 Joel Sherrill <joel@oarcorp.com>
* configure.ac, rtems4.7/Makefile.am, rtems4.7/arm/Makefile.am,
rtems4.7/arm/gdb-sources.add, rtems4.7/avr/Makefile.am,
rtems4.7/avr/gdb-sources.add, rtems4.7/h8300/Makefile.am,
rtems4.7/h8300/gdb-sources.add, rtems4.7/i386/Makefile.am,
rtems4.7/i386/gdb-sources.add, rtems4.7/m68k/Makefile.am,
rtems4.7/m68k/gdb-sources.add, rtems4.7/mips/Makefile.am,
rtems4.7/mips/gdb-sources.add, rtems4.7/powerpc/Makefile.am,
rtems4.7/powerpc/gdb-sources.add, rtems4.7/sh/Makefile.am,
rtems4.7/sh/gdb-sources.add, rtems4.7/sparc/Makefile.am,
rtems4.7/sparc/gdb-sources.add, rtems4.7/tic4x/gdb-sources.add:
Updated to gdb 6.5
* patches/gdb-6.5-rtems-20060713.diff, rtems4.7/mipstx39/.cvsignore,
rtems4.7/mipstx39/Makefile.am, rtems4.7/mipstx39/gdb-sources.add: New files.
2006-07-12 Joel Sherrill <joel@oarcorp.com>
* rtems4.7/arm/gdb-sources.add, rtems4.7/avr/gdb-sources.add,
rtems4.7/h8300/gdb-sources.add, rtems4.7/i386/gdb-sources.add,
rtems4.7/m68k/gdb-sources.add, rtems4.7/mips/gdb-sources.add,
rtems4.7/powerpc/gdb-sources.add, rtems4.7/sh/gdb-sources.add,
rtems4.7/sparc/gdb-sources.add, rtems4.7/tic4x/gdb-sources.add:
Update gdb to use newer patch. This lets sparc build simulator and
mips build at all.
* patches/gdb-6.4-rtems-20060712.diff: New file.

View File

@@ -1,27 +0,0 @@
##
## $Id$
##
EXTRA_DIST =
SUBDIRS = @HOST_SUBDIRS@ @TARGET_SUBDIRS@
DIST_SUBDIRS = cygwin
DIST_SUBDIRS += freebsd5.2
DIST_SUBDIRS += freebsd6.0
DIST_SUBDIRS += freebsd6.1
DIST_SUBDIRS += mingw32
DIST_SUBDIRS += solaris2.7
DIST_SUBDIRS += rtems4.7
DIST_SUBDIRS += autotools
EXTRA_DIST += specstrip
EXTRA_DIST += $(srcdir)/patches/*.diff
install-patches:
@rpmsourcedir=`rpm --eval '%_sourcedir'`; \
for f in $(srcdir)/patches/*.diff; do \
echo "$(INSTALL_DATA) $$f $$rpmsourcedir"; \
$(INSTALL_DATA) $$f $$rpmsourcedir; \
done

View File

@@ -1,19 +0,0 @@
2006-07-24 Add provisory/preliminary autotools support.
2006-07-23 Rename "*-base-*" packages into <tool>-common.
Rename GCC's "*-<lang>" packages into "*-gcc-<lang>".
Many small directory ownership fixes.
Build all GCC packages with --enable-threads.
2006-07-10 Completely reworked and restructurized.
2006-03-10 Add preliminary rtems-gdb specs.
(Immature, incomplete, needs further testing).
2006-03-09 Add fortran and objc to GCC's default languages for freebsd5.2,
freebsd6.0 and solaris.
2006-03-02 Pass --enable-sysroot to non-rtems binutils (Required by
GCC-4.1 sys-root'ed toolchains).
2006-02-25 Put this package under the GPL.

View File

@@ -1,18 +0,0 @@
Copyright (C) 2006 Ralf Corsépius, Ulm, Germany <ralf.corsepius@rtems.org>
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA

View File

@@ -1,22 +0,0 @@
* Improve autotools support:
- Problem: The autotools packages conflict with OS provided packages
for --prefix=/usr.
* Improve info files treatment:
- Problem: Infos are not target canonicalized. Therefore, installing them to
/usr or /usr/local is likely to conflict with vendor provided infos rsp.
locally installed packages. Additionally, installing to /usr/local is
completely out of our control.
- Current approach: Install infos/provide base packages only for
$prefix ==/opt/rtems* or if user is forcing them with --enable-infos
- Consider to canonicalize the infos (How?). Probably better be done by
upstream.
* Ada:
- Consider to remove it (Lack of multilibs renders it unusable for rtems
toolchains).
- Consider to add support for non-multilib'ed toolchains.
* gcc/build.add: Use --languages=fortran instead of f95 for gcc >= 4.1
(--languages=f95 is deprecated in gcc >= 4.1)

View File

@@ -1,20 +0,0 @@
# RTEMS_CANONICAL_SPLIT(THING)
# --------------------------
# Generate the variables THING, THING_{alias cpu vendor os}.
m4_define([RTEMS_CANONICAL_SPLIT],
[case $ac_cv_$1 in
*-*-*) ;;
*) AC_MSG_ERROR([invalid value of canonical $1]);;
esac
ac_save_IFS=$IFS; IFS='-'
set x $ac_cv_$1
shift
$1_cpu=$[1]
$1_vendor=$[2]
shift; shift
[# Remember, the first character of IFS is used to create $]*,
# except with old shells:
$1_os=$[*]
IFS=$ac_save_IFS
case $$1_os in *\ *) $1_os=`echo "$$1_os" | sed 's/ /-/g'`;; esac
])# RTEMS_CANONICAL_SPLIT

View File

@@ -1,4 +0,0 @@
Makefile
Makefile.in
*.spec
*.spec.in

View File

@@ -1,13 +0,0 @@
##
## $Id$
##
include $(top_srcdir)/mkspec.am
AUTOCONF_VERS = 2.60
AUTOCONF_RPMREL = 4
include ./autoconf.am
AUTOMAKE_VERS = 1.10
AUTOMAKE_RPMREL = 5
include ./automake.am

View File

@@ -1,84 +0,0 @@
%define rpmvers 2.60
%define srcvers 2.60
%if "%{_prefix}" != "/usr"
%define name @rpmprefix@autoconf
%else
%define name autoconf
%endif
Name: %{name}
License: GPL
URL: http://www.gnu.org/software/autoconf
Group: Development/Tools
Version: %{rpmvers}
Release: @AUTOCONF_RPMREL@%{?dist}
Summary: Tool for automatically generating GNU style Makefile.in's
%if "%{_prefix}" != "/usr"
Obsoletes: @rpmprefix@autoconf-rtems < %{version}-%{release}
Provides: @rpmprefix@autoconf-rtems = %{version}-%{release}
%endif
BuildRoot: %{_tmppath}/%{name}-%{version}-%{release}-root-%(%{__id_u} -n)
BuildArch: noarch
BuildRequires: perl m4 gawk emacs
Requires: m4 gawk
Requires(post): /sbin/install-info
Requires(preun): /sbin/install-info
Source0: ftp://ftp.gnu.org/gnu/autoconf/autoconf-%{srcvers}.tar.bz2
%description
GNU's Autoconf is a tool for configuring source code and Makefiles.
Using Autoconf, programmers can create portable and configurable
packages, since the person building the package is allowed to
specify various configuration options.
You should install Autoconf if you are developing software and you'd
like to use it to create shell scripts which will configure your
source code packages.
Note that the Autoconf package is not required for the end user who
may be configuring software with an Autoconf-generated script;
Autoconf is only required for the generation of the scripts, not
their use.
%prep
%setup -q -n autoconf-%{srcvers}
# Work around rpm inserting bogus perl-module deps
cat << \EOF > %{name}-prov
#!/bin/sh
%{__perl_provides} $* |\
sed -e '/^perl(Autom4te/d'
EOF
%define __perl_provides %{_builddir}/autoconf-%{srcvers}/%{name}-prov
chmod +x %{__perl_provides}
cat << \EOF > %{name}-requ
#!/bin/sh
%{__perl_requires} $* |\
sed -e '/^perl(Autom4te/d'
EOF
%define __perl_requires %{_builddir}/autoconf-%{srcvers}/%{name}-requ
chmod +x %{__perl_requires}
%build
./configure --prefix=%{_prefix} --infodir=%{_infodir} --mandir=%{_mandir} \
--bindir=%{_bindir} --datadir=%{_datadir}
make
%install
rm -rf "${RPM_BUILD_ROOT}"
make DESTDIR=${RPM_BUILD_ROOT} install
# Create this directory to prevent the corresponding line
# in %%files below to fail
mkdir -p ${RPM_BUILD_ROOT}%{_datadir}/emacs/site-lisp
# RTEMS's standards.info comes from binutils
rm -f $RPM_BUILD_ROOT%{_infodir}/standards.info*
rm -f $RPM_BUILD_ROOT%{_infodir}/dir
touch $RPM_BUILD_ROOT%{_infodir}/dir

View File

@@ -1,18 +0,0 @@
AUTOCONF_SUBPACKAGES = $(top_srcdir)/common/common.add
AUTOCONF_SUBPACKAGES += $(top_srcdir)/autotools/autoconf.add
AUTOCONF_SUBPACKAGES += $(top_srcdir)/binutils/rpm-install.add
AUTOCONF_SUBPACKAGES += $(top_srcdir)/common/clean.add
AUTOCONF_SUBPACKAGES += $(top_srcdir)/autotools/target-autoconf.add
autoconf.spec.in: $(AUTOCONF_SUBPACKAGES) Makefile.in
cat $(AUTOCONF_SUBPACKAGES) | sed \
-e "s/[@]AUTOCONF_RPMREL[@]/$(AUTOCONF_RPMREL)/" > $@
CLEANFILES += autoconf.spec.in
@rpmprefix@autoconf.spec: autoconf.spec.in
$(MKSPEC) autoconf.spec.in | $(SPECSTRIP) > $@
CLEANFILES += @rpmprefix@autoconf.spec
noinst_DATA += @rpmprefix@autoconf.spec
EXTRA_DIST += $(AUTOCONF_SUBPACKAGES)

View File

@@ -1,92 +0,0 @@
%define rpmvers 1.10
%define srcvers 1.10
%define amvers 1.10
%if "%{_prefix}" != "/usr"
%define name @rpmprefix@automake
%define requirements @rpmprefix@autoconf >= 2.60
%else
%define name automake
%define requirements autoconf >= 2.60
%endif
Name: %{name}
URL: http://sources.redhat.com/automake
License: GPL
Group: Development/Tools
Version: %{rpmvers}
Release: @AUTOMAKE_RPMREL@%{?dist}
Summary: Tool for automatically generating GNU style Makefile.in's
%if "%{_prefix}" != "/usr"
Obsoletes: @rpmprefix@automake-rtems < %{version}-%{release}
Provides: @rpmprefix@automake-rtems = %{version}-%{release}
%endif
BuildRoot: %{_tmppath}/%{name}-%{version}-%{release}-root-%(%{__id_u} -n)
BuildArch: noarch
BuildRequires: %{requirements} perl help2man
Requires: %{requirements}
Requires(post): /sbin/install-info
Requires(preun):/sbin/install-info
Source0: ftp://ftp.gnu.org/gnu/automake/automake-%{srcvers}.tar.bz2
%description
Automake is a tool for automatically generating "Makefile.in"s from
files called "Makefile.am". "Makefile.am" is basically a series of
"make" macro definitions (with rules being thrown in occasionally).
The generated "Makefile.in"s are compatible to the GNU Makefile
standards.
%prep
%setup -q -n automake-%{srcvers}
# Work around rpm inserting bogus perl-module deps
cat << \EOF > %{name}-prov
#!/bin/sh
%{__perl_provides} $* |\
sed -e '/^perl(Automake/d'
EOF
%define __perl_provides %{_builddir}/automake-%{srcvers}/%{name}-prov
chmod +x %{__perl_provides}
cat << \EOF > %{name}-requ
#!/bin/sh
%{__perl_requires} $* |\
sed -e '/^perl(Automake/d'
EOF
%define __perl_requires %{_builddir}/automake-%{srcvers}/%{name}-requ
chmod +x %{__perl_requires}
%build
PATH=%{_bindir}:$PATH
# Don't use %%configure, it replaces config.sub/config.guess with the
# outdated versions bundled with rpm.
./configure --prefix=%{_prefix} --infodir=%{_infodir} --mandir=%{_mandir} \
--bindir=%{_bindir} --datadir=%{_datadir} \
--docdir=%{_datadir}/automake-%{amvers}/doc
make
%install
rm -rf "$RPM_BUILD_ROOT"
make DESTDIR=${RPM_BUILD_ROOT} install
install -m 755 -d $RPM_BUILD_ROOT/%{_mandir}/man1
for i in $RPM_BUILD_ROOT%{_bindir}/aclocal \
$RPM_BUILD_ROOT%{_bindir}/automake ;
do
perllibdir=$RPM_BUILD_ROOT/%{_datadir}/automake-%{amvers} \
help2man $i > `basename $i`.1
install -m 644 `basename $i`.1 $RPM_BUILD_ROOT/%{_mandir}/man1
done
%if "%{_prefix}" != "/usr"
mkdir -p $RPM_BUILD_ROOT%{_datadir}/aclocal
echo "/usr/share/aclocal" > $RPM_BUILD_ROOT%{_datadir}/aclocal/dirlist
%endif
rm -f $RPM_BUILD_ROOT%{_infodir}/dir
touch $RPM_BUILD_ROOT%{_infodir}/dir

View File

@@ -1,18 +0,0 @@
AUTOMAKE_SUBPACKAGES = $(top_srcdir)/common/common.add
AUTOMAKE_SUBPACKAGES += $(top_srcdir)/autotools/automake.add
AUTOMAKE_SUBPACKAGES += $(top_srcdir)/binutils/rpm-install.add
AUTOMAKE_SUBPACKAGES += $(top_srcdir)/common/clean.add
AUTOMAKE_SUBPACKAGES += $(top_srcdir)/autotools/target-automake.add
automake.spec.in: $(AUTOMAKE_SUBPACKAGES) Makefile.in
cat $(AUTOMAKE_SUBPACKAGES) | sed \
-e "s/[@]AUTOMAKE_RPMREL[@]/$(AUTOMAKE_RPMREL)/" > $@
CLEANFILES += automake.spec.in
@rpmprefix@automake.spec: automake.spec.in
$(MKSPEC) automake.spec.in | $(SPECSTRIP) > $@
CLEANFILES += @rpmprefix@automake.spec
noinst_DATA += @rpmprefix@automake.spec
EXTRA_DIST += $(AUTOMAKE_SUBPACKAGES)

View File

@@ -1,23 +0,0 @@
%post
/sbin/install-info --info-dir=%{_infodir} %{_infodir}/autoconf.info.gz ||:
%preun
if [ $1 -eq 0 ]; then
/sbin/install-info --delete --info-dir=%{_infodir} %{_infodir}/autoconf.info.gz ||:
fi
%files
%defattr(-,root,root)
# %doc AUTHORS COPYING ChangeLog NEWS README THANKS
%sysdir %{_bindir}
%{_bindir}/*
%sysdir %{_infodir}
%ghost %{_infodir}/dir
%{_infodir}/autoconf.info*
%sysdir %{_mandir}
%sysdir %{_mandir}/man1
%{_mandir}/man1/*
%sysdir %{_datadir}
%{_datadir}/autoconf
%exclude %{_datadir}/emacs/site-lisp

View File

@@ -1,27 +0,0 @@
%post
/sbin/install-info --info-dir=%{_infodir} %{_infodir}/automake.info.gz ||:
%preun
if [ $1 -eq 0 ]; then
/sbin/install-info --delete --info-dir=%{_infodir} %{_infodir}/automake.info.gz ||:
fi
%files
%defattr(-,root,root)
%doc AUTHORS COPYING ChangeLog NEWS README THANKS
%sysdir %{_bindir}
%{_bindir}/aclocal*
%{_bindir}/automake*
%sysdir %{_infodir}
%ghost %{_infodir}/dir
%{_infodir}/automake.info*.gz
%sysdir %{_mandir}
%sysdir %{_mandir}/man1
%{_mandir}/man1/*
%sysdir %{_datadir}
%if "%{_prefix}" != "/usr"
%{_datadir}/aclocal
%endif
%{_datadir}/aclocal-%{amvers}
%{_datadir}/automake-%{amvers}

View File

@@ -1,6 +0,0 @@
*.spec
Makefile
Makefile.in
binutils.spec
binutils.spec.in
mkspec

View File

@@ -1,69 +0,0 @@
%if %build_infos
# ==============================================================
# @rpmprefix@binutils-common
# ==============================================================
%package -n @rpmprefix@binutils-common
Summary: Base package for RTEMS binutils
Group: Development/Tools
Requires(post): /sbin/install-info
Requires(preun): /sbin/install-info
Provides: @rpmprefix@rtems4.7-base-binutils = %{binutils_version}-%{release}
Obsoletes: @rpmprefix@rtems4.7-base-binutils < %{binutils_version}-%{release}
Provides: @rpmprefix@rtems-base-binutils = %{binutils_version}-%{release}
Obsoletes: @rpmprefix@rtems-base-binutils < %{binutils_version}-%{release}
%description -n @rpmprefix@binutils-common
RTEMS is an open source operating system for embedded systems.
This is the base for binutils regardless of target CPU.
%post -n @rpmprefix@binutils-common
/sbin/install-info --info-dir=%{_infodir} %{_infodir}/as.info.gz || :
/sbin/install-info --info-dir=%{_infodir} %{_infodir}/bfd.info.gz || :
/sbin/install-info --info-dir=%{_infodir} %{_infodir}/binutils.info.gz || :
/sbin/install-info --info-dir=%{_infodir} %{_infodir}/ld.info.gz || :
/sbin/install-info --info-dir=%{_infodir} %{_infodir}/standards.info.gz || :
%if "%{binutils_version}" > "2.17"
/sbin/install-info --info-dir=%{_infodir} %{_infodir}/gprof.info.gz || :
%endif
%if "%{binutils_version}" < "2.13"
/sbin/install-info --info-dir=%{_infodir} %{_infodir}/gasp.info.gz || :
%endif
%preun -n @rpmprefix@binutils-common
if [ $1 -eq 0 ]; then
/sbin/install-info --delete --info-dir=%{_infodir} %{_infodir}/as.info.gz || :
/sbin/install-info --delete --info-dir=%{_infodir} %{_infodir}/bfd.info.gz || :
/sbin/install-info --delete --info-dir=%{_infodir} %{_infodir}/binutils.info.gz || :
/sbin/install-info --delete --info-dir=%{_infodir} %{_infodir}/ld.info.gz || :
/sbin/install-info --delete --info-dir=%{_infodir} %{_infodir}/standards.info.gz || :
%if "%{binutils_version}" > "2.17"
/sbin/install-info --delete --info-dir=%{_infodir} %{_infodir}/gprof.info.gz || :
%endif
%if "%{binutils_version}" < "2.13"
/sbin/install-info --delete --info-dir=%{_infodir} %{_infodir}/gasp.info.gz || :
%endif
fi
%files -n @rpmprefix@binutils-common
%defattr(-,root,root)
%sysdir %{_infodir}
%ghost %{_infodir}/dir
%{_infodir}/as.info*
%{_infodir}/bfd.info*
%{_infodir}/binutils.info*
%{_infodir}/ld.info*
%{_infodir}/standards.info*
%if "%{binutils_version}" > "2.17"
%{_infodir}/gprof.info*
%endif
%if "%{binutils_version}" < "2.13"
%{_infodir}/gasp.info*
%endif
%sysdir %{_prefix}/share
%sysdir %{_prefix}/share/locale
%endif

View File

@@ -1,29 +0,0 @@
%define binutils_pkgvers @BINUTILS_PKGVERS@
%define binutils_version @BINUTILS_VERS@
%define binutils_rpmvers %{expand:%(echo "@BINUTILS_VERS@" | tr - _ )}
Name: @rpmprefix@@tool_target@-binutils
Summary: Binutils for target @tool_target@
Group: Development/Tools
Version: %{binutils_rpmvers}
Release: @BINUTILS_RPMREL@%{?dist}
License: GPL/LGPL
URL: http://sources.redhat.com/binutils
BuildRoot: %{_tmppath}/%{name}-%{version}-%{release}-root-%(%{__id_u} -n)
%if %build_infos
# Required for building the infos
BuildRequires: /sbin/install-info
BuildRequires: texinfo >= 4.2
%endif
BuildRequires: flex
BuildRequires: bison
%if %build_infos
Requires: @rpmprefix@binutils-common
%endif
@SOURCES@
%description
Cross binutils for target @tool_target@

View File

@@ -1,22 +0,0 @@
%build
mkdir -p build
cd build
CFLAGS="$RPM_OPT_FLAGS" \
../binutils-%{binutils_pkgvers}/configure \
--build=%_build --host=%_host \
--target=@tool_target@ \
--verbose --disable-nls \
--without-included-gettext \
--disable-win32-registry \
--disable-werror \
--with-sysroot=%{_prefix}/@tool_target@/sys-root \
--prefix=%{_prefix} --bindir=%{_bindir} \
--includedir=%{_includedir} --libdir=%{_libdir} \
--mandir=%{_mandir} --infodir=%{_infodir}
make all
%if %build_infos
make info
%endif
cd ..

View File

@@ -1,52 +0,0 @@
%install
rm -rf $RPM_BUILD_ROOT
cd build
make prefix=$RPM_BUILD_ROOT%{_prefix} \
bindir=$RPM_BUILD_ROOT%{_bindir} \
includedir=$RPM_BUILD_ROOT%{_includedir} \
libdir=$RPM_BUILD_ROOT%{_libdir} \
infodir=$RPM_BUILD_ROOT%{_infodir} \
mandir=$RPM_BUILD_ROOT%{_mandir} \
install
%if %build_infos
make prefix=$RPM_BUILD_ROOT%{_prefix} \
bindir=$RPM_BUILD_ROOT%{_bindir} \
includedir=$RPM_BUILD_ROOT%{_includedir} \
libdir=$RPM_BUILD_ROOT%{_libdir} \
infodir=$RPM_BUILD_ROOT%{_infodir} \
mandir=$RPM_BUILD_ROOT%{_mandir} \
install-info
%endif
%if %build_infos
# Dropped in FSF-binutils-2.9.5, but Cygwin still ships it.
rm -rf $RPM_BUILD_ROOT%{_infodir}/configure.info*
rm -f $RPM_BUILD_ROOT%{_infodir}/dir
touch $RPM_BUILD_ROOT%{_infodir}/dir
# binutils does not install share/locale, however it uses it
mkdir -p $RPM_BUILD_ROOT%{_prefix}/share/locale
%else
# Conflict with a native binutils' infos
rm -rf $RPM_BUILD_ROOT%{_infodir}
%endif
# We don't ship host files
rm -f ${RPM_BUILD_ROOT}%{_libdir}/libiberty*
# manpages without corresponding tools
if test ! -f ${RPM_BUILD_ROOT}%{_bindir}/@tool_target@-dlltool%{_exeext}; then
rm -f ${RPM_BUILD_ROOT}%{_mandir}/man1/@tool_target@-dlltool*
fi
if test ! -f ${RPM_BUILD_ROOT}%{_bindir}/@tool_target@-nlmconv%{_exeext}; then
rm -f ${RPM_BUILD_ROOT}%{_mandir}/man1/@tool_target@-nlmconv*
fi
if test ! -f ${RPM_BUILD_ROOT}%{_bindir}/@tool_target@-windres%{_exeext}; then
rm -f ${RPM_BUILD_ROOT}%{_mandir}/man1/@tool_target@-windres*
fi
cd ..

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