2008-02-14 Joel Sherrill <joel.sherrill@OARcorp.com>

* user/mp.t: Now builds.

ChangeLog

@@ -1,3 +1,8 @@
+2007-09-04	Joel Sherrill <joel.sherrill@OARcorp.com>
+
+	* Makefile.maint: touch all documentation master files so the date on
+	the manual reflects the release date of the software.
+
 2007-02-22	Ralf Corsépius <ralf.corsepius@rtems.org>
 
 	* Makefile.am: Use MKDIR_P instead of mkdir_p.

Makefile.maint

@@ -54,6 +54,15 @@ rtems-$(rtems_version)/stamp.export.$(rtems_tag)$(TAG_SUFFIX):
 rtems-$(rtems_version)$(TAG_SUFFIX).tar.bz2: rtems-$(rtems_version)/stamp.autofiles \
 	  rtems-$(rtems_version)/excludes \
 	  rtems-$(rtems_version)/TOOL_VERSIONS
+	cd rtems-$(rtems_version) ; \
+	  touch doc/ada_user/ada_user.texi doc/bsp_howto/bsp_howto.texi \
+	    doc/cpu_supplement/cpu_supplement.texi \
+	    doc/develenv/develenv.texi doc/filesystem/filesystem.texi \
+	    doc/itron3.0/itron.texi doc/networking/networking.texi \
+	    doc/new_chapters/new_chapters.texi doc/porting/porting.texi \
+	    doc/posix1003.1/posix1003_1.texi doc/posix_users/posix_users.texi \
+	    doc/relnotes/relnotes.texi doc/started_ada/started_ada.texi \
+	    doc/started/started.texi doc/user/c_user.texi
 	tar -cj -X rtems-$(rtems_version)/excludes \
 	  -f rtems-$(rtems_version)$(TAG_SUFFIX).tar.bz2 rtems-$(rtems_version)
 

VERSION

@@ -4,4 +4,4 @@
 #  $Id$
 #
 
-RTEMS Version 4.7.1
+RTEMS Version 4.7.2

aclocal/version.m4

@@ -1,4 +1,4 @@
 AC_DEFUN([RTEMS_VERSIONING],
-m4_define([_RTEMS_VERSION],[4.7.1]))
+m4_define([_RTEMS_VERSION],[4.7.2]))
 
 m4_define([RTEMS_API],[4.7])

c/src/aclocal/version.m4

@@ -1,4 +1,4 @@
 AC_DEFUN([RTEMS_VERSIONING],
-m4_define([_RTEMS_VERSION],[4.7.1]))
+m4_define([_RTEMS_VERSION],[4.7.2]))
 
 m4_define([RTEMS_API],[4.7])

c/src/lib/libbsp/i386/pc386/ChangeLog

@@ -1,3 +1,8 @@
+2007-05-28	Joel Sherrill <joel.sherrill@OARcorp.com>
+
+	PR 1244/bsps
+	* console/console.c: Remove definition of __assert.
+
 2007-01-29	Ralf Corsépius <ralf.corsepius@rtems.org>
 
 	* console/fb_vga.c: Eliminate __u16, __u32.

c/src/lib/libbsp/i386/pc386/console/console.c

@@ -34,8 +34,6 @@
 #include <stdlib.h>
 #include <assert.h>
 #include <unistd.h>
-#undef __assert
-void __assert (const char *file, int line, const char *msg);
 
 #include <bsp.h>
 #include <bsp/irq.h>
@@ -141,44 +139,6 @@ int kbd_poll_read( int minor )
   return -1;
 }
 
-/*
-static void*	     termios_ttyp_console         = NULL;
-void enq_key( char key )
-{
-  if( termios_ttyp_console )
-  {
-	  rtems_termios_enqueue_raw_characters(termios_ttyp_console, &key,1 );
-  }
-}
-*/
-
-void __assert (const char *file, int line, const char *msg)
-{
-    static   char exit_msg[] = "EXECUTIVE SHUTDOWN! Any key to reboot...";
-  unsigned char  ch;
-
-  /*
-   * Note we cannot call exit or printf from here,
-   * assert can fail inside ISR too
-   */
-
-   /*
-   * Close console
-   */
-  close(2);
-  close(1);
-  close(0);
-
-  printk("\nassert failed: %s: ", file);
-  printk("%d: ", line);
-  printk("%s\n\n", msg);
-  printk(exit_msg);
-  ch = BSP_poll_char();
-  printk("\n\n");
-  rtemsReboot();
-
-}
-
 /*-------------------------------------------------------------------------+
 | Console device driver INITIALIZE entry point.
 +--------------------------------------------------------------------------+

c/src/lib/libbsp/m68k/ChangeLog

@@ -1,3 +1,8 @@
+2007-04-17	Joel Sherrill <joel@OARcorp.com>
+
+	* mcf5206elite/tools/runtest: Do not run pppd.exe from batch mode
+	script.
+
 2006-12-02	Ralf Corsépius <ralf.corsepius@rtems.org>
 
 	* configure.ac: New BUG-REPORT address.

c/src/lib/libbsp/m68k/mcf5206elite/tools/runtest

@@ -158,7 +158,7 @@ do
 
    case "$tname" in
        # size is no longer interactive.
-       monitor* | termios* | fileio*)
+       monitor* | termios* | fileio* | pppd*)
             warn "Skipping $tname; it is interactive"
             continue
             ;;

c/src/lib/libbsp/m68k/uC5282/ChangeLog

@@ -1,3 +1,7 @@
+2007-11-26	Eric Norum <norume@aps.anl.gov>
+
+	* network/network.c: Fix LED configuration to match uCDIMM.
+
 2007-03-12	Joel Sherrill <joel@OARcorp.com>
 
 	* clock/clock.c, console/console.c, include/bsp.h, include/coverhd.h,

c/src/lib/libbsp/m68k/uC5282/network/network.c

@@ -8,7 +8,7 @@
  *
  *  The license and distribution terms for this file may be
  *  found in the file LICENSE in this distribution or at
- *  http://www.rtems.com/license/LICENSE.
+ *  http://www.OARcorp.com/rtems/license.html.
  */
 
 #include <bsp.h>
@@ -308,12 +308,12 @@ mcf5282_fec_initialize_hardware(struct mcf5282_enet_struct *sc)
 
     /*
      * Set PHYS
-     *  LED1 link status, LED2 receive status, LEDs stretched
+     *  LED1 receive status, LED2 link status, LEDs stretched
      *  Advertise 100 Mb/s, full-duplex, IEEE-802.3
      *  Turn off auto-negotiate
-     *  Cleaer status
+     *  Clear status
      */
-    setMII(1, 20, 0x42F2);
+    setMII(1, 20, 0x24F2);
     setMII(1,  4, 0x0181);
     setMII(1,  0, 0x0);
     rtems_task_wake_after(2);

c/src/lib/libbsp/mips/ChangeLog

@@ -1,3 +1,7 @@
+2007-04-17	Joel Sherrill <joel@OARcorp.com>
+
+	* jmr3904/tools/runtest: Do not run pppd.exe from batch mode script.
+
 2006-12-02	Ralf Corsépius <ralf.corsepius@rtems.org>
 
 	* configure.ac: New BUG-REPORT address.

c/src/lib/libbsp/mips/jmr3904/tools/runtest

@@ -147,7 +147,7 @@ do
 
    case $tname in
        # size is no longer interactive.
-       monitor* | termios* | fileio*)
+       monitor* | termios* | fileio* | pppd*)
             if [ $run_to_completion = "yes" ]
             then
                  warn "Skipping $tname; it is interactive"

c/src/lib/libbsp/powerpc/ChangeLog

@@ -1,3 +1,7 @@
+2007-04-17	Joel Sherrill <joel@OARcorp.com>
+
+	* psim/tools/runtest: Do not run pppd.exe from batch mode script.
+
 2007-01-29	Till Straumann <strauman@slac.stanford.edu>
 
 	* shared/vme/VMEConfig.h:

c/src/lib/libbsp/powerpc/mvme5500/ChangeLog

@@ -1,3 +1,35 @@
+2008-02-14	Joel Sherrill <joel.sherrill@OARcorp.com>
+
+	* preinstall.am: Add vme_am_defs.h
+
+2007-09-20	Kate Feng <feng1@bnl.gov>
+
+	* network/if_100MHz/GT64260eth.c: Add else.
+
+2007-09-19	Kate Feng <feng1@bnl.gov>
+
+	* README: Update.
+
+2007-09-14	Joel Sherrill <joel.sherrill@OARcorp.com>
+
+	* network/GT64260eth.c, network/GT64260eth.h, network/GT64260ethreg.h:
+	Removed.
+
+2007-09-14	Kate Feng <feng1@bnl.gov>
+
+	* Makefile.am, README, README.booting, README.irq,
+	preinstall.am, GT64260/MVME5500I2C.c, include/bsp.h, irq/irq.c,
+	irq/irq.h, irq/irq_init.c, pci/pci.c, pci/pci_interface.c,
+	pci/pcifinddevice.c, start/preload.S, startup/bspclean.c,
+	startup/bspstart.c, startup/pgtbl_activate.c, startup/reboot.c: 
+	Merge my improvements in this BSP including a new network
+	driver for the 1GHz NIC.
+	* network/if_100MHz/GT64260eth.c, network/if_100MHz/GT64260eth.h,
+	network/if_100MHz/GT64260ethreg.h, network/if_100MHz/Makefile.am,
+	network/if_1GHz/Makefile.am, network/if_1GHz/POSSIBLEBUG,
+	network/if_1GHz/if_wm.c, network/if_1GHz/if_wmreg.h,
+	network/if_1GHz/pci_map.c, network/if_1GHz/pcireg.h: New files.
+
 2007-04-06	Ralf Corsépius	<ralf.corsepius@rtems.org>
 
 	* bsp_specs: Remove lib (Now expected to exist in GCC).

c/src/lib/libbsp/powerpc/mvme5500/GT64260/MVME5500I2C.c

@@ -12,23 +12,24 @@
  */
 
 #include <rtems/bspIo.h>	    /* printk */
-#include <rtems/stdint.h>
 #include "bsp/GT64260TWSI.h"
 
 /* #define I2C_DEBUG*/
+typedef unsigned int u32;
+typedef unsigned char unchar;
 
-unsigned char I2cAddrPack(unsigned char busAddr,uint32_t offset)
+unchar I2cAddrPack(unchar busAddr,u32 offset)
 {
   return(busAddr | ((offset & 0x700) >> 7));
 }
-unsigned char I2cDevByteAddr(uint32_t devA2A1A0, unsigned char byteNum)
+unchar I2cDevByteAddr(u32 devA2A1A0, unchar byteNum)
 {
   return(( devA2A1A0 >>(byteNum*8)) & 0xff);
 }
 /****************************************************************************
 * I2Cread_eeprom - read EEPROM VPD from the I2C
 */
-int I2Cread_eeprom(unsigned char I2cBusAddr,uint32_t devA2A1A0,uint32_t AddrBytes,unsigned char *pBuff,uint32_t numBytes)
+int I2Cread_eeprom(unchar I2cBusAddr,u32 devA2A1A0,u32 AddrBytes,unchar *pBuff,u32 numBytes)
 {
   int status=0, lastByte=0;
 

c/src/lib/libbsp/powerpc/mvme5500/Makefile.am

@@ -7,6 +7,9 @@ ACLOCAL_AMFLAGS = -I ../../../../aclocal
 include $(top_srcdir)/../../../../automake/compile.am
 include $(top_srcdir)/../../bsp.am
 
+#prevent the compiler from generating FP instructions
+AM_CFLAGS      += -msoft-float
+
 dist_project_lib_DATA = bsp_specs
 
 include_HEADERS = include/bsp.h
@@ -29,6 +32,7 @@ EXTRA_DIST = startup/bootpstuff.c
 noinst_PROGRAMS += startup.rel
 startup_rel_SOURCES = startup/bspstart.c \
     ../../powerpc/shared/startup/pgtbl_setup.c startup/pgtbl_activate.c \
+    ../../powerpc/shared/startup/pretaskinghook.c \
     ../../powerpc/shared/startup/sbrk.c ../../shared/bootcard.c \
     startup/bspclean.c ../../shared/bsplibc.c ../../shared/bsppost.c \
     ../../shared/main.c ../../shared/gnatinstallhandler.c startup/reboot.c
@@ -42,8 +46,8 @@ pclock_rel_CPPFLAGS = $(AM_CPPFLAGS)
 pclock_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
 
 ###
-include_bsp_HEADERS = ../../powerpc/shared/console/uart.h	\
-	../../shared/vmeUniverse/vme_am_defs.h
+include_bsp_HEADERS = ../../powerpc/shared/console/uart.h
+include_bsp_HEADERS += ../../powerpc/shared/console/consoleIo.h
 
 noinst_PROGRAMS += console.rel
 console_rel_SOURCES = ../../powerpc/shared/console/uart.c \
@@ -64,7 +68,7 @@ pci_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
 include_bsp_HEADERS += irq/irq.h
 
 noinst_PROGRAMS += irq.rel
-irq_rel_SOURCES = irq/irq_init.c irq/GT64260Int.c irq/irq.c \
+irq_rel_SOURCES = irq/irq_init.c irq/irq.c \
     ../../powerpc/shared/irq/irq_asm.S
 irq_rel_CPPFLAGS = $(AM_CPPFLAGS)
 irq_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
@@ -97,27 +101,28 @@ GT64260_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
 
 ##
 if HAS_NETWORKING
-include_bsp_HEADERS += network/GT64260eth.h network/GT64260ethreg.h
+include_bsp_HEADERS += network/if_100MHz/GT64260eth.h network/if_100MHz/GT64260ethreg.h \
+    network/if_1GHz/if_wmreg.h network/if_1GHz/pcireg.h
 
 network_CPPFLAGS = -D_KERNEL
 noinst_PROGRAMS += network.rel
-network_rel_SOURCES = network/GT64260eth.c
+network_rel_SOURCES = network/if_100MHz/GT64260eth.c \
+    network/if_1GHz/if_wm.c network/if_1GHz/pci_map.c
 network_rel_CPPFLAGS = $(AM_CPPFLAGS) $(network_CPPFLAGS)
 network_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
 endif
-##
-include_bsp_HEADERS += ../../shared/vmeUniverse/VME.h vme/VMEConfig.h
-include_bsp_HEADERS += ../../shared/vmeUniverse/vmeUniverse.h \
+##vme
+include_bsp_HEADERS += ../../shared/vmeUniverse/VME.h vme/VMEConfig.h \
+	../../shared/vmeUniverse/vmeUniverse.h \
 	../../shared/vmeUniverse/vmeUniverseDMA.h\
 	../../shared/vmeUniverse/bspVmeDmaList.h\
-	../../shared/vmeUniverse/VMEDMA.h
+	../../shared/vmeUniverse/VMEDMA.h \
+	../../shared/vmeUniverse/vme_am_defs.h
 
 noinst_PROGRAMS += vme.rel
-vme_rel_SOURCES = ../../shared/vmeUniverse/vmeUniverse.c
-vme_rel_SOURCES+= ../../shared/vmeUniverse/bspVmeDmaList.c
-vme_rel_SOURCES+= ../shared/vme/vmeconfig.c
-vme_rel_SOURCES+= ../shared/vme/vme_universe.c
-vme_rel_SOURCES+= ../shared/vme/vme_universe_dma.c
+vme_rel_SOURCES = ../../shared/vmeUniverse/vmeUniverse.c\
+	../shared/vme/vmeconfig.c ../../shared/vmeUniverse/bspVmeDmaList.c\
+	../shared/vme/vme_universe.c ../shared/vme/vme_universe_dma.c
 
 vme_rel_CPPFLAGS = $(AM_CPPFLAGS)
 vme_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)

c/src/lib/libbsp/powerpc/mvme5500/README

@@ -1,7 +1,38 @@
 #
-#  $Id$
+#  $Id: README,v 1.3.1  Shuchen Kate Feng, NSLS, BNL (08/27/07)
 #
 
+Please reference README.booting for the boot/load process.
+
+For the priority setting of the Interrupt Requests (IRQs), please
+reference README.irq 
+
+The BSP is built and tested on the 4.7.1 and 4.7.99.2 CVS RTEMS release.
+
+I believe in valuable real-time programming, where technical neatness,
+performance and truth are.  I hope I still believe. Any suggestion,
+bug reports, or even bug fixes (great!) would be highly appreciated
+so that I still believe what I believe.
+
+
+ACKNOWLEDGEMENTS
+----------------
+Acknowledgements:
+
+Valuable information was obtained from the following:
+1) Marvell NDA document for the discovery system controller.
+Other related documents are listed at :
+http://www.aps.anl.gov/epics/meetings/2006-06/RTEMS_Primer_SIG/RTEMS_BSP_MVME5500.pdf
+2) netBSD: For the two NICS and some headers :
+           Allegro Networks, Inc., Wasabi Systems, Inc.  
+3) RTEMS:  This BSP also builds on top of the work of others who have
+ contributed to similar RTEMS powerpc shared and motorola_powerpc BSPs, most
+ notably Eric Valette, Till Straumann (SVGM1 BSP, too), Eric Norum and others.
+
+LICENSE
+-------
+See ./LICENSE file.
+
 BSP NAME:           mvme5500
 BOARD:              MVME5500 by Motorola
 BUS:                PCI
@@ -12,9 +43,6 @@ MODE:               32/64 bit mode (support 32 bit for now)
 DEBUG MONITOR:      MOTLoad
 SYSTEM CONTROLLER:  GT64260B
 
-OTHER README FILES: README.booting,README.rtems-4.6.0-patch,README.VME,
-		    README.irq
-
 PERIPHERALS
 ===========
 TIMERS:             Eight, 32 bit programmable

c/src/lib/libbsp/powerpc/mvme5500/README.booting

@@ -1,18 +1,15 @@
-README.booting: written by S. Kate Feng <feng1@bnl.gov>, 2004/10/11
+README.booting: written by S. Kate Feng <feng1@bnl.gov>, Aug. 28, 2007
 
 The bootloader is adapted from Till Straumann's Generic Mini-loader,
-which he wrote originally for the SVGM powerpc board. Part of the
-BSP was derived from the "RTEMS-PowerPC BSPs" and the NetBSD projects.
-As of today, the BSP is built and tested on the RTEMS-4.6.0
-release with small patches I added (see README.rtems-4.6.0-patch
-and rtems-4.6.0-patch/ directory).
-
+which he wrote originally for the SVGM powerpc board. 
+The BSP is built and tested on the 4.7 CVS RTEMS release.
 
 Booting requirement :
 -------------------------
 
-1) One needs to setup BOOTP/DHCP and TFTP servers and /etc/bootptab
-   properly to boot the system.  (Note : EPICS needs a NTP server).
+1) One needs to setup BOOTP/DHCP and TFTP servers and /etc/bootptab(BOOTP)
+   or /etc/dhcpd.conf (DHCP) properly to boot the system.
+   (Note : EPICS needs a NTP server).
  
 2) Please copy the prebuilt RTEMS binary (e.g. misc/rtems5500-cexp.bin)
    and perhaps others (e.g. misc/st.sys) to the /tftpboot/epics/hostname/bin/
@@ -35,8 +32,10 @@ MVME5500>
 Note : (cxx.xx.xx.xx is the client IP address and 
         sxx.xx.xx.xx is the server IP address)
 
-4) Other reference web sites:
+4) Other reference web sites for mvme5500 BSP:
 http://lansce.lanl.gov/EPICS/presentations/KateFeng%20RTEMS-mvme55001.ppt
+http://www.nsls.bnl.gov/facility/expsys/software/EPICS/
+http://www.nsls.bnl.gov/facility/expsys/software/EPICS/FAQ.txt
 
 5) When generating code (especially C++) for this system, one should
    use at least gcc-3.2 (preferrably a copy downloaded from the RTEMS
@@ -53,10 +52,3 @@ other useful utilities such as telnet, nfs, and so on.
 tools and BSP, I would recommend one to reference
 http://www.aps.anl.gov/epics/base/RTEMS/tutorial/
 in additional to the RTEMS document.
-
-
-TODO lists:
-1) 1 GHZ ethernet ( work in progress, to be released soon)
-2) To measure the interrupt latency and context switching.
-3) To implement the watchdog timer.
-

c/src/lib/libbsp/powerpc/mvme5500/README.irq

@@ -1,52 +1,20 @@
-README.irq : Shuchen Kate Feng  <feng1@bnl.gov>, 10/10/04
+README.irq : Shuchen Kate Feng  <feng1@bnl.gov>, Sept. 2, 2007
 
-
-The BSPirqPrioTable[] listed in irq_init.c is where the
+As per implementation in shared PPC code,
+the BSPirqPrioTable[96] listed in irq_init.c is where the
 software developers can change the levels of priority
-for main interrupts based on the need of their
-applications.
+for all the interrupts based on the need of their
+applications.  The IRQs can be eanbled dynamically via the
+BSP_enable_pic_irq(), or disbaled dynamically via the
+BSP_disable_pic_irq(). 
 
 
-Presently, a dynamic IRQ table (e.g. mainIrqTbl[64]), which is
-arranged dynamically based on the priority levels of enabled
-main interrupts, is used in C_dispatch_irq_handler() to
-incorporate the handling of the software priority levels. 
+Support for run-time priority setup could be
+added easily, but there is no action taken yet due to concerns
+over computer security at VME CPU level. 
 
 
-The valid entries listed in mainIrqTbl[64] by the BSP are:
-
-1. Main interrupt 59   (GPP31_24 : no enabled IRQ yet, 
-                        to enable 'watchdog timer' if needed)
-2. Main interrupt 57   (GPP15_8  : VME interrupt enabled,
-                        to enable 'PMC1' if needed)
-3. Main interrupt 58   (GPP23_16 : no enabled IRQ yet,
-                        to enable '1 GHZ ethernet' or 'PMC2'
-                        if needed)
-4. Main interrupt 32   (10/100 MHZ ethernet)
-5. Main interrupt 56   (GPP7_0 : presently only COM1/COM2 enabled)
-
-
-The main IRQs can be added to the mainIrqTbl[] dynamically
-via the BSP_enable_main_irq(), or removed from the mainIrqTbl[]
-dynamically via the BSP_disable_main_irq().
-
-
-Regarding other GPP interrupts not listed in the GPP7_0IrqTbl[8],
-GPP15_8IrqTbl[8], GPP23_16IrqTbl[8], or GPP31_24IrqTbl[8], they
-could be enabled by being added to the correspondent of
-the four aforementioned tables listed in the irq_init.c.
-
-
-Caveat: Presently, the eight GPP IRQs for each BSP_MAIN_GPPx_y_IRQ group
-are set at the same main priority in the BSPirqPrioTable[], while the 
-sub-priority levels for the eight GPP in each group  are sorted 
-statically by developers in the GPPx_yIrqTbl[8] from the highest
-priority to the lowest one.
-
-
-Note :
-1. GPP7-0   (Main interrupt high cause, bit 24)
-2. GPP15-8  (Main interrupt high cause, bit 25)
-3. GPP23-16 (Main interrupt high cause, bit 26)
-4. GPP31-24 (Main interrupt high cause, bit 27)
-
+The software developers are forbidden to setup picIsrTable[],
+as it is a powerful engine for the BSP to find the pending
+highest priority IRQ at run time. It ensures the fastest/faster
+interrupt service to the highest/higher priority IRQ, if pending.

c/src/lib/libbsp/powerpc/mvme5500/include/bsp.h

@@ -7,7 +7,7 @@
  *  found in found in the file LICENSE in this distribution or at
  *  http://www.rtems.com/license/LICENSE.
  *
- *  S. Kate Feng 12/03 : Modified it to support the MVME5500 board.
+ *  S. Kate Feng 2003-2007 : Modified it to support the mvme5500 BSP.
  *
  */
 
@@ -53,14 +53,13 @@
 #define BSP_MAX_PCI_BUS  (BSP_MAX_PCI_BUS_ON_PCI0+BSP_MAX_PCI_BUS_ON_PCI1)
 
 
-#if 0
-/* T.S, 2007/1: in order to let the universe acknowledge the interrupt
- * (this allows for VME software priorities) corresponding support
- * **MUST** be present in the interrupt controller driver
- * Unless that's implemented DO NOT define BSP_PIC_DO_EOI.
+/* The glues to Till's vmeUniverse, although the name does not
+ * actually reflect the relevant architect of the MVME5500.
+ * Till TODO ? :  BSP_PCI_DO_EOI instead ? 
+ * BSP_EXT_IRQ0 instead of BSP_PCI_IRQ0 ?
+ *
  */
 #define BSP_PIC_DO_EOI  inl(0xc34)  /* PCI IACK */
-#endif
 #define BSP_PCI_IRQ0 BSP_GPP_IRQ_LOWEST_OFFSET
 
 /*
@@ -111,11 +110,28 @@ extern int BSP_connect_clock_handler (void);
 
 extern unsigned long _BSP_clear_hostbridge_errors();
 
+extern unsigned int BSP_heap_start;
+
+#if 1
 #define RTEMS_BSP_NETWORK_DRIVER_NAME	"gt1"
 #define RTEMS_BSP_NETWORK_DRIVER_ATTACH	rtems_GT64260eth_driver_attach
+#else
+#define RTEMS_BSP_NETWORK_DRIVER_NAME	"wmG1"
+#define RTEMS_BSP_NETWORK_DRIVER_ATTACH	rtems_i82544EI_driver_attach
+#endif
 
 extern int
 RTEMS_BSP_NETWORK_DRIVER_ATTACH(/* struct rtems_bsdnet_ifconfig * */);
 
+#define gccMemBar() RTEMS_COMPILER_MEMORY_BARRIER()
+
+static inline void memBar()
+{
+    asm volatile("sync":::"memory");
+}
+static inline void ioBar()
+{
+    asm volatile("eieio":::"memory");
+}
 
 #endif 

c/src/lib/libbsp/powerpc/mvme5500/irq/irq.c

@@ -6,14 +6,20 @@
  *
  *  The license and distribution terms for this file may be
  *  found in the file LICENSE in this distribution or at
- *  http://www.rtems.com/license/LICENSE.
+ *  http://www.OARcorp.com/rtems/license.html.
  *
- *  Special acknowledgement to Till Straumann <strauman@slac.stanford.edu>
- *  for providing inputs to the IRQ handling and optimization.
+ *  Acknowledgement May 2004 : to Till Straumann <strauman@slac.stanford.edu>
+ *  for some inputs.
  *
- *  Modified and added support for the MVME5500 board
- *  Copyright 2003, 2004, Shuchen Kate Feng <feng1@bnl.gov>,
+ *  Copyright 2003, 2004, 2005, 2007  Shuchen Kate Feng <feng1@bnl.gov>,
  *                  NSLS,Brookhaven National Laboratory
+ *  1) Modified and added support for the MVME5500 board.
+ *  2) The implementation of picIsrTable[] is an original work by the
+ *     author to optimize the software IRQ priority scheduling because
+ *     Discovery controller does not provide H/W IRQ priority schedule. 
+ *     It ensures the fastest/faster interrupt service to the
+ *     highest/higher priority IRQ, if pendig.
+ *  3) _CPU_MSR_SET() needs RTEMS_COMPILER_MEMORY_BARRIER()
  *
  */
   
@@ -23,7 +29,9 @@
 #include <rtems/score/thread.h>
 #include <rtems/score/apiext.h>
 #include <libcpu/raw_exception.h>
+#include <rtems/rtems/intr.h>
 #include <libcpu/io.h>
+#include <libcpu/byteorder.h>
 #include <bsp/vectors.h>
 
 #include <rtems/bspIo.h> /* for printk */
@@ -31,20 +39,35 @@
 
 #define HI_INT_CAUSE 0x40000000
 
-/*#define DEBUG*/
+#define MAX_IRQ_LOOP 30
 
-int gpp_int_error =0;
+#define EDGE_TRIGGER
+
+#define _MSR_GET( _mask) \
+  do { \
+     RTEMS_COMPILER_MEMORY_BARRIER(); \
+     _CPU_MSR_GET( _mask); \
+     RTEMS_COMPILER_MEMORY_BARRIER(); \
+  } while (0);
+
+#define _MSR_SET( _mask) \
+  do { \
+     RTEMS_COMPILER_MEMORY_BARRIER(); \
+     _CPU_MSR_SET( _mask); \
+     RTEMS_COMPILER_MEMORY_BARRIER(); \
+  } while (0);
+
+/* #define DEBUG_IRQ*/
 
 /*
  * pointer to the mask representing the additionnal irq vectors
  * that must be disabled when a particular entry is activated.
- * They will be dynamically computed from teh prioruty table given
+ * They will be dynamically computed from the table given
  * in BSP_rtems_irq_mngt_set();
  * CAUTION : this table is accessed directly by interrupt routine
  * 	     prologue.
  */
-static unsigned int irq_prio_maskLO_tbl[BSP_MAIN_IRQ_NUMBER];
-static unsigned int irq_prio_maskHI_tbl[BSP_MAIN_IRQ_NUMBER];
+static unsigned int BSP_irq_prio_mask_tbl[3][BSP_PIC_IRQ_NUMBER];
 
 /*
  * default handler connected on each irq after bsp initialization
@@ -58,26 +81,55 @@ static rtems_irq_connect_data	default_rtems_entry;
 static rtems_irq_global_settings* 	internal_config;
 static rtems_irq_connect_data*		rtems_hdl_tbl;
 
-static unsigned int irqCAUSE[20], irqLOW[20], irqHIGH[20];
-static int irqIndex=0;
+static volatile unsigned  *BSP_irqMask_reg[3];
+static volatile unsigned  *BSP_irqCause_reg[3];
+static volatile unsigned  BSP_irqMask_cache[3]={0,0,0}; 
+
+
+static int picIsrTblPtr=0;
+static unsigned int GPPIrqInTbl=0;
+static unsigned long long MainIrqInTbl=0;
+
+/* 
+ * The software developers are forbidden to setup picIsrTable[],
+ * as it is a powerful engine for the BSP to find the pending
+ * highest priority IRQ at run time.  It ensures the fastest/faster
+ * interrupt service to the highest/higher priority IRQ, if pendig.
+ *
+ * The picIsrTable[96] is updated dynamically at run time
+ * based on the priority levels set at BSPirqPrioTable[96],
+ * while the BSP_enable_pic_irq(), and BSP_disable_pic_irq()
+ * commands are invoked.
+ *
+ * The picIsrTable[96] lists the enabled CPU main and GPP external interrupt 
+ * numbers [0 (lowest)- 95 (highest)] starting from the highest priority
+ * one to the lowest priority one. The highest priority interrupt is
+ * located at picIsrTable[0], and the lowest priority interrupt is located
+ * at picIsrTable[picIsrTblPtr-1].
+ *
+ *
+ */
+/* BitNums for Main Interrupt Lo/High Cause and GPP, -1 means invalid bit */ 
+static unsigned int picIsrTable[BSP_PIC_IRQ_NUMBER]={  
+     -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
+     -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
+     -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
+     -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
+     -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
+     -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
+     -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
+     -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
+     -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
+     -1, -1, -1, -1, -1, -1 };
+
 
 /*
- * Check if IRQ is a MAIN CPU internal IRQ 
+ * Check if IRQ is a MAIN CPU internal IRQ or GPP external IRQ
  */
-static inline int is_main_irq(const rtems_irq_number irqLine)
-{
-  return (((int) irqLine <= BSP_MICH_IRQ_MAX_OFFSET) &
-	  ((int) irqLine >= BSP_MICL_IRQ_LOWEST_OFFSET)
-	 );
-}
-
-/*
- * Check if IRQ is a GPP IRQ
- */
-static inline int is_gpp_irq(const rtems_irq_number irqLine)
+static inline int is_pic_irq(const rtems_irq_number irqLine)
 {
   return (((int) irqLine <= BSP_GPP_IRQ_MAX_OFFSET) &
-	  ((int) irqLine >= BSP_GPP_IRQ_LOWEST_OFFSET)
+	  ((int) irqLine >= BSP_MICL_IRQ_LOWEST_OFFSET)
 	 );
 }
 
@@ -91,104 +143,14 @@ static inline int is_processor_irq(const rtems_irq_number irqLine)
 	 );
 }
 
-#define GT_GPP_Int1_Cause GT_GPP_Interrupt_Cause+1
-#define GT_GPP_Int2_Cause GT_GPP_Interrupt_Cause+2
-#define GT_GPP_Int3_Cause GT_GPP_Interrupt_Cause+3
-
-void GT_GPP_IntHandler0()
+static inline unsigned int divIrq32(unsigned irq)
 {
-
-  unsigned  gppCause, irqNum, bitNum;
-  int i, found=0;
-
-  gppCause = inb(GT_GPP_Interrupt_Cause) & GT_GPPirq_cache;
-
-  for (i=0; GPP7_0IrqTbl[i]!=-1;i++){
-    bitNum =GPP7_0IrqTbl[i];
-    if (gppCause & (1<<bitNum)) {
-        /* Clear the GPP interrupt cause bit */
-      outb( ~(1<<bitNum), GT_GPP_Interrupt_Cause);/* Till Straumann */
-        found = 1; 
-        irqNum = bitNum+BSP_GPP_IRQ_LOWEST_OFFSET;
-        /* call the necessary interrupt handlers */
-        if (rtems_hdl_tbl[irqNum].hdl != default_rtems_entry.hdl)
-	   rtems_hdl_tbl[irqNum].hdl(rtems_hdl_tbl[irqNum].handle);
-        else
-	   gpp_int_error= bitNum; /*GPP interrupt bitNum not connected */
-    }
-  }
-  if ( !found) gpp_int_error = 33; /* spurious GPP interrupt  */
+  return(irq/32);
 }
 
-void GT_GPP_IntHandler1()
+static inline unsigned int modIrq32(unsigned irq)
 {
-  unsigned  gppCause, irqNum, bitNum;
-  int i, found=0;
-
-  gppCause = inb(GT_GPP_Int1_Cause) & (GT_GPPirq_cache>>8);
-
-  for (i=0; GPP15_8IrqTbl[i]!=-1;i++){
-    bitNum =GPP15_8IrqTbl[i];
-    if (gppCause & (1<<bitNum)) {
-        /* Clear the GPP interrupt cause bit */
-        outb( ~(1<<bitNum), GT_GPP_Int1_Cause); /* Till Straumann */
-        found = 1; 
-        irqNum = bitNum+BSP_GPP8_IRQ_OFFSET;
-        /* call the necessary interrupt handlers */
-        if (rtems_hdl_tbl[irqNum].hdl != default_rtems_entry.hdl)
-	   rtems_hdl_tbl[irqNum].hdl(rtems_hdl_tbl[irqNum].handle);
-        else
-	   gpp_int_error= bitNum+8; /*GPP interrupt bitNum not connected */
-    }
-  }
-  if ( !found) gpp_int_error = 33; /* spurious GPP interrupt  */
-}
-void GT_GPP_IntHandler2()
-{
-  unsigned  gppCause, irqNum, bitNum;
-  int i, found=0;
-
-  gppCause = inb(GT_GPP_Int2_Cause) & (GT_GPPirq_cache>>16);
-
-  for (i=0; GPP23_16IrqTbl[i]!=-1;i++){
-    bitNum =GPP23_16IrqTbl[i];
-    if (gppCause & (1<<bitNum)) {
-        /* Clear the GPP interrupt cause bit */
-        outb( ~(1<<bitNum), GT_GPP_Int2_Cause);
-        found = 1; 
-        irqNum = bitNum+BSP_GPP16_IRQ_OFFSET;
-        /* call the necessary interrupt handlers */
-        if (rtems_hdl_tbl[irqNum].hdl != default_rtems_entry.hdl)
-	    rtems_hdl_tbl[irqNum].hdl(rtems_hdl_tbl[irqNum].handle);
-        else
-	   gpp_int_error= bitNum+16; /*GPP interrupt bitNum not connected */
-    }
-  }
-  if ( !found) gpp_int_error = 33; /* spurious GPP interrupt  */
-}
-
-void GT_GPP_IntHandler3()
-{
-  unsigned  gppCause, irqNum, bitNum;
-  int i, found=0;
-
-  gppCause = inb(GT_GPP_Int3_Cause) & (GT_GPPirq_cache>>24);
-
-  for (i=0; GPP31_24IrqTbl[i]!=-1;i++){
-    bitNum=GPP31_24IrqTbl[i];
-    if (gppCause & (1<<bitNum)) {
-        /* Clear the GPP interrupt cause bit */
-        outb(~(1<<bitNum), GT_GPP_Int3_Cause);
-        found = 1; 
-        irqNum = bitNum+BSP_GPP24_IRQ_OFFSET;
-        /* call the necessary interrupt handlers */
-        if (rtems_hdl_tbl[irqNum].hdl != default_rtems_entry.hdl)
-	    rtems_hdl_tbl[irqNum].hdl(rtems_hdl_tbl[irqNum].handle);
-        else
-	   gpp_int_error= bitNum+24; /*GPP interrupt bitNum not connected */
-    }
-  }
-  if ( !found) gpp_int_error = 33; /* spurious GPP interrupt  */
+   return(irq%32);
 }
 
 /*
@@ -200,33 +162,253 @@ void GT_GPP_IntHandler3()
  * is already set and that the tables it contains are still valid
  * and accessible.
  */
-static void compute_GT64260int_masks_from_prio ()
+static void compute_pic_masks_from_prio()
 {
-  int i,j;
+  int i,j, k;
   unsigned long long irq_prio_mask=0;
 
   /*
    * Always mask at least current interrupt to prevent re-entrance
    */
-  for (i=0; i <BSP_MAIN_IRQ_NUMBER; i++) {
-    irq_prio_mask = (unsigned long long) (1LLU << i);
+  for (i=0; i <BSP_PIC_IRQ_NUMBER; i++) {
+    switch(i) {
+      case BSP_MAIN_GPP7_0_IRQ:
+      case BSP_MAIN_GPP15_8_IRQ:
+      case BSP_MAIN_GPP23_16_IRQ:
+      case BSP_MAIN_GPP31_24_IRQ:
+	for (k=0; k< 3; k++)
+	    BSP_irq_prio_mask_tbl[k][i]=0;
+
+        irq_prio_mask =0;
+        break;
+      default : 
+        irq_prio_mask = (unsigned long long) (1LLU << i);
+	break;
+    }
+    
+    if (irq_prio_mask) {
     for (j = 0; j <BSP_MAIN_IRQ_NUMBER; j++) {
-      /*
-       * Mask interrupts at GT64260int level that have a lower priority
-       * or <Till Straumann> a equal priority. 
-       */
-      if (internal_config->irqPrioTbl [i] >= internal_config->irqPrioTbl [j]) {
-	 irq_prio_mask |= (unsigned long long)(1LLU << j);
+        /*
+         * Mask interrupts at PIC level that have a lower priority
+         * or <Till Straumann> a equal priority. 
+         */
+        if (internal_config->irqPrioTbl [i] >= internal_config->irqPrioTbl [j])
+	   irq_prio_mask |= (unsigned long long)(1LLU << j);
+    }
+    
+
+    BSP_irq_prio_mask_tbl[0][i] = irq_prio_mask & 0xffffffff;
+    BSP_irq_prio_mask_tbl[1][i] = (irq_prio_mask>>32) & 0xffffffff;
+#ifdef DEBUG
+    printk("irq_mask_prio_tbl[%d]:0x%8x%8x\n",i,BSP_irq_prio_mask_tbl[1][i],
+	   BSP_irq_prio_mask_tbl[0][i]);
+#endif 
+
+    BSP_irq_prio_mask_tbl[2][i] = 1<<i;
+    /* Compute for the GPP priority interrupt mask */
+    for (j=BSP_GPP_IRQ_LOWEST_OFFSET; j <BSP_PROCESSOR_IRQ_LOWEST_OFFSET; j++) {      
+      if (internal_config->irqPrioTbl [i] >= internal_config->irqPrioTbl [j])
+	   BSP_irq_prio_mask_tbl[2][i] |= 1 << (j-BSP_GPP_IRQ_LOWEST_OFFSET); 
+    }
+    }
+  }
+}
+
+
+static void UpdateMainIrqTbl(int irqNum)
+{
+  int i=0, j, shifted=0;
+
+  switch (irqNum) {
+    case BSP_MAIN_GPP7_0_IRQ:
+    case BSP_MAIN_GPP15_8_IRQ:
+    case BSP_MAIN_GPP23_16_IRQ:
+    case BSP_MAIN_GPP31_24_IRQ:  
+      return;  /* Do nothing, let GPP take care of it */
+      break;
+  }
+#ifdef SHOW_MORE_INIT_SETTINGS
+  unsigned long val2, val1;
+#endif
+
+  /* If entry not in table*/
+  if ( ((irqNum<BSP_GPP_IRQ_LOWEST_OFFSET) && 
+        (!((unsigned long long)(1LLU << irqNum) & MainIrqInTbl))) ||
+       ((irqNum>BSP_MICH_IRQ_MAX_OFFSET) && 
+        (!(( 1 << (irqNum-BSP_GPP_IRQ_LOWEST_OFFSET)) & GPPIrqInTbl))))
+  { 
+      while ( picIsrTable[i]!=-1) {
+        if (internal_config->irqPrioTbl[irqNum]>internal_config->irqPrioTbl[picIsrTable[i]]) {
+          /* all other lower priority entries shifted right */
+          for (j=picIsrTblPtr;j>i; j--) 
+              picIsrTable[j]=picIsrTable[j-1];
+          picIsrTable[i]=irqNum;
+          shifted=1;
+          break;
+       }
+       i++;
+     }
+     if (!shifted) picIsrTable[picIsrTblPtr]=irqNum;
+     if (irqNum >BSP_MICH_IRQ_MAX_OFFSET)
+        GPPIrqInTbl |= (1<< (irqNum-BSP_GPP_IRQ_LOWEST_OFFSET)); 
+     else      
+        MainIrqInTbl |= (unsigned long long)(1LLU << irqNum);
+     picIsrTblPtr++;
+  }
+#ifdef SHOW_MORE_INIT_SETTINGS
+  val2 = (MainIrqInTbl>>32) & 0xffffffff;
+  val1 = MainIrqInTbl&0xffffffff;
+  printk("irqNum %d, MainIrqInTbl 0x%x%x\n", irqNum, val2, val1); 
+  BSP_printPicIsrTbl();
+#endif
+
+}
+
+
+static void CleanMainIrqTbl(int irqNum)
+{
+  int i, j;
+
+  switch (irqNum) {
+    case BSP_MAIN_GPP7_0_IRQ:
+    case BSP_MAIN_GPP15_8_IRQ:
+    case BSP_MAIN_GPP23_16_IRQ:
+    case BSP_MAIN_GPP31_24_IRQ: 
+      return;  /* Do nothing, let GPP take care of it */
+      break;  
+  }
+  if ( ((irqNum<BSP_GPP_IRQ_LOWEST_OFFSET) && 
+        ((unsigned long long)(1LLU << irqNum) & MainIrqInTbl)) ||
+       ((irqNum>BSP_MICH_IRQ_MAX_OFFSET) && 
+        (( 1 << (irqNum-BSP_GPP_IRQ_LOWEST_OFFSET)) & GPPIrqInTbl)))
+  { /* If entry in table*/
+     for (i=0; i<64; i++) {
+       if (picIsrTable[i]==irqNum) {/*remove it from the entry */
+          /* all other lower priority entries shifted left */
+          for (j=i;j<picIsrTblPtr; j++) 
+              picIsrTable[j]=picIsrTable[j+1];
+          if (irqNum >BSP_MICH_IRQ_MAX_OFFSET)
+            GPPIrqInTbl &= ~(1<< (irqNum-BSP_GPP_IRQ_LOWEST_OFFSET)); 
+          else      
+            MainIrqInTbl &= ~(1LLU << irqNum);
+          picIsrTblPtr--;
+          break;
+       }
+     }
+  }
+}
+
+void BSP_enable_pic_irq(const rtems_irq_number irqNum)
+{
+  unsigned bitNum, regNum;
+  unsigned int level;
+
+  bitNum = modIrq32(((unsigned int)irqNum) - BSP_MICL_IRQ_LOWEST_OFFSET);
+  regNum = divIrq32(((unsigned int)irqNum) - BSP_MICL_IRQ_LOWEST_OFFSET);
+
+  rtems_interrupt_disable(level); 
+
+  UpdateMainIrqTbl((int) irqNum);
+  BSP_irqMask_cache[regNum] |= (1 << bitNum);
+
+  out_le32(BSP_irqMask_reg[regNum], BSP_irqMask_cache[regNum]);
+  while (in_le32(BSP_irqMask_reg[regNum]) != BSP_irqMask_cache[regNum]);
+
+  rtems_interrupt_enable(level);
+}
+
+void BSP_disable_pic_irq(const rtems_irq_number irqNum)
+{
+  unsigned bitNum, regNum;
+  unsigned int level;
+
+  bitNum = modIrq32(((unsigned int)irqNum) - BSP_MICL_IRQ_LOWEST_OFFSET);
+  regNum = divIrq32(((unsigned int)irqNum) - BSP_MICL_IRQ_LOWEST_OFFSET);
+
+  rtems_interrupt_disable(level); 
+
+  CleanMainIrqTbl((int) irqNum);
+  BSP_irqMask_cache[regNum] &=  ~(1 << bitNum);
+
+  out_le32(BSP_irqMask_reg[regNum], BSP_irqMask_cache[regNum]);
+  while (in_le32(BSP_irqMask_reg[regNum]) != BSP_irqMask_cache[regNum]);
+
+  rtems_interrupt_enable(level);
+}
+
+int BSP_setup_the_pic()  /* adapt the same name as shared/irq */
+{
+    int i;
+
+    /* Get ready for discovery BSP */
+    BSP_irqMask_reg[0]= (volatile unsigned int *) (GT64260_REG_BASE + GT_CPU_INT_MASK_LO);
+    BSP_irqMask_reg[1]= (volatile unsigned int *) (GT64260_REG_BASE + GT_CPU_INT_MASK_HI);
+    BSP_irqMask_reg[2]= (volatile unsigned int *) (GT64260_REG_BASE + GT_GPP_Interrupt_Mask);
+
+    BSP_irqCause_reg[0]= (volatile unsigned int *) (GT64260_REG_BASE + GT_MAIN_INT_CAUSE_LO);
+    BSP_irqCause_reg[1]= (volatile unsigned int *) (GT64260_REG_BASE + GT_MAIN_INT_CAUSE_HI);
+    BSP_irqCause_reg[2]= (volatile unsigned int *) (GT64260_REG_BASE + GT_GPP_Interrupt_Cause);
+
+#ifdef EDGE_TRIGGER
+
+    /* Page 401, Table 598:
+     * Comm Unit Arbiter Control register :
+     * bit 10:GPP interrupts as level sensitive(1) or edge sensitive(0).
+     * We set the GPP interrupts to be edge sensitive.
+     * MOTload default is set as level sensitive(1).
+     */
+    outl((inl(GT_CommUnitArb_Ctrl)& (~(1<<10))), GT_CommUnitArb_Ctrl);
+#else
+    outl((inl(GT_CommUnitArb_Ctrl)| (1<<10)), GT_CommUnitArb_Ctrl);
+#endif
+
+#if 0
+    printk("BSP_irqMask_reg[0] = 0x%x, BSP_irqCause_reg[0] 0x%x\n", 
+	   in_le32(BSP_irqMask_reg[0]),
+	   in_le32(BSP_irqCause_reg[0]));
+    printk("BSP_irqMask_reg[1] = 0x%x, BSP_irqCause_reg[1] 0x%x\n", 
+	   in_le32(BSP_irqMask_reg[1]),
+	   in_le32(BSP_irqCause_reg[1]));
+    printk("BSP_irqMask_reg[2] = 0x%x, BSP_irqCause_reg[2] 0x%x\n", 
+	   in_le32(BSP_irqMask_reg[2]),
+	   in_le32(BSP_irqCause_reg[2]));
+#endif
+
+    /* Initialize the interrupt related GT64260 registers */
+    for (i=0; i<3; i++) {
+      out_le32(BSP_irqCause_reg[i], 0);
+      out_le32(BSP_irqMask_reg[i], 0);
+    }         
+    in_le32(BSP_irqMask_reg[2]);
+    compute_pic_masks_from_prio();
+
+#if 0
+    printk("BSP_irqMask_reg[0] = 0x%x, BSP_irqCause_reg[0] 0x%x\n", 
+	   in_le32(BSP_irqMask_reg[0]),
+	   in_le32(BSP_irqCause_reg[0]));
+    printk("BSP_irqMask_reg[1] = 0x%x, BSP_irqCause_reg[1] 0x%x\n", 
+	   in_le32(BSP_irqMask_reg[1]),
+	   in_le32(BSP_irqCause_reg[1]));
+    printk("BSP_irqMask_reg[2] = 0x%x, BSP_irqCause_reg[2] 0x%x\n", 
+	   in_le32(BSP_irqMask_reg[2]),
+	   in_le32(BSP_irqCause_reg[2]));
+#endif
+
+    /*
+     * 
+     */
+    for (i=BSP_MICL_IRQ_LOWEST_OFFSET; i < BSP_PROCESSOR_IRQ_LOWEST_OFFSET ; i++) {
+      if (rtems_hdl_tbl[i].hdl != default_rtems_entry.hdl) {
+	BSP_enable_pic_irq(i);
+	rtems_hdl_tbl[i].on(&rtems_hdl_tbl[i]);
+      }
+      else {
+	rtems_hdl_tbl[i].off(&rtems_hdl_tbl[i]);
+	BSP_disable_pic_irq(i);
       }
     }
 
-    irq_prio_maskLO_tbl[i] = irq_prio_mask & 0xffffffff;
-    irq_prio_maskHI_tbl[i] = (irq_prio_mask>>32) & 0xffffffff;
-#ifdef DEBUG
-    printk("irq_mask_prio_tbl[%d]:0x%8x%8x\n",i,irq_prio_maskHI_tbl[i],
-	   irq_prio_maskLO_tbl[i]);
-#endif  
-  }
+    return(1);
 }
 
 /*
@@ -260,9 +442,9 @@ int BSP_install_rtems_irq_handler  (const rtems_irq_connect_data* irq)
      * RATIONALE : to always have the same transition by forcing the user
      * to get the previous handler before accepting to disconnect.
      */
-    _CPU_ISR_Disable(level);
+    rtems_interrupt_disable(level);
     if (rtems_hdl_tbl[irq->name].hdl != default_rtems_entry.hdl) {
-      _CPU_ISR_Enable(level);
+      rtems_interrupt_enable(level);
       printk("IRQ vector %d already connected\n",irq->name);
       return 0;
     }
@@ -271,35 +453,33 @@ int BSP_install_rtems_irq_handler  (const rtems_irq_connect_data* irq)
      * store the data provided by user
      */
     rtems_hdl_tbl[irq->name] = *irq;
+#ifdef BSP_SHARED_HANDLER_SUPPORT
+    rtems_hdl_tbl[irq->name].next_handler = (void *)-1;
+#endif
 
-    if (is_main_irq(irq->name)) {
+    if (is_pic_irq(irq->name)) {
       /*
-       * Enable (internal ) Main Interrupt Cause Low and High
+       * Enable PIC  irq : Main Interrupt Cause Low and High & GPP external
        */
 #ifdef DEBUG_IRQ
-      printk("main irq %d\n",irq->name);
+      printk("PIC irq %d\n",irq->name);
 #endif
-      BSP_enable_main_irq(irq->name);
-    }
-    
-    if (is_gpp_irq(irq->name)) {
-      /*
-       * Enable (external) GPP[x] interrupt 
-       */
-      BSP_enable_gpp_irq((int) irq->name);
+      BSP_enable_pic_irq(irq->name);
     }
+    else {
+      if (is_processor_irq(irq->name)) {
+         /*
+          * Enable exception at processor level
+          */
 
-    if (is_processor_irq(irq->name)) {
-      /*
-       * Enable exception at processor level
-       */
+       }
     }
     /*
      * Enable interrupt on device
-     
-    irq->on(irq);*/
+     */
+    irq->on(irq);
     
-    _CPU_ISR_Enable(level);
+    rtems_interrupt_enable(level);
 
     return 1;
 }
@@ -331,24 +511,19 @@ int BSP_remove_rtems_irq_handler  (const rtems_irq_connect_data* irq)
     if (rtems_hdl_tbl[irq->name].hdl != irq->hdl) {
       return 0;
     }
-    _CPU_ISR_Disable(level);
+    rtems_interrupt_disable(level);
 
-    if (is_main_irq(irq->name)) {
-      /*
-       * disable CPU main interrupt
-       */
-      BSP_disable_main_irq(irq->name);
-    }
-    if (is_gpp_irq(irq->name)) {
-      /*
-       * disable external interrupt
-       */
-      BSP_disable_gpp_irq(irq->name);
-    }
-    if (is_processor_irq(irq->name)) {
-      /*
-       * disable exception at processor level
-       */
+    /*
+     * disable PIC interrupt
+     */
+    if (is_pic_irq(irq->name))
+      BSP_disable_pic_irq(irq->name);
+    else {
+      if (is_processor_irq(irq->name)) {
+         /*
+          * disable exception at processor level
+          */
+       }
     }    
 
     /*
@@ -361,7 +536,8 @@ int BSP_remove_rtems_irq_handler  (const rtems_irq_connect_data* irq)
      */
     rtems_hdl_tbl[irq->name] = default_rtems_entry;
 
-    _CPU_ISR_Enable(level);
+
+    rtems_interrupt_enable(level);
 
     return 1;
 }
@@ -372,8 +548,9 @@ int BSP_remove_rtems_irq_handler  (const rtems_irq_connect_data* irq)
 
 int BSP_rtems_irq_mngt_set(rtems_irq_global_settings* config)
 {
-    int i;
     unsigned int level;
+    int i;
+
    /*
     * Store various code accelerators
     */
@@ -381,51 +558,17 @@ int BSP_rtems_irq_mngt_set(rtems_irq_global_settings* config)
     default_rtems_entry 	= config->defaultEntry;
     rtems_hdl_tbl 		= config->irqHdlTbl;
 
-    _CPU_ISR_Disable(level);
-    compute_GT64260int_masks_from_prio();
+    rtems_interrupt_disable(level);
 
-    /*
-     * set up internal tables used by rtems interrupt prologue
-     */
-    /*
-     * start with MAIN CPU IRQ
-     */
-    for (i=BSP_MICL_IRQ_LOWEST_OFFSET; i < BSP_GPP_IRQ_LOWEST_OFFSET ; i++) {
-      if (rtems_hdl_tbl[i].hdl != default_rtems_entry.hdl) {
-	BSP_enable_main_irq(i);
-	rtems_hdl_tbl[i].on(&rtems_hdl_tbl[i]);
-      }
-      else {
-	rtems_hdl_tbl[i].off(&rtems_hdl_tbl[i]);
-	BSP_disable_main_irq(i);
-      }
-    }
-    /*
-     * continue with  external IRQ
-     */
-    for (i=BSP_GPP_IRQ_LOWEST_OFFSET; i<BSP_PROCESSOR_IRQ_LOWEST_OFFSET; i++) {
-      if (rtems_hdl_tbl[i].hdl != default_rtems_entry.hdl) {
-	BSP_enable_gpp_irq(i);
-	rtems_hdl_tbl[i].on(&rtems_hdl_tbl[i]);
-      }
-      else {
-	rtems_hdl_tbl[i].off(&rtems_hdl_tbl[i]);
-	BSP_disable_gpp_irq(i);
-      }
+    if ( !BSP_setup_the_pic() ) {
+       printk("PIC setup failed; leaving IRQs OFF\n");
+       return 0;
     }
 
-    /*
-     * finish with Processor exceptions handled like IRQ
-     */
-    for (i=BSP_PROCESSOR_IRQ_LOWEST_OFFSET; i < BSP_PROCESSOR_IRQ_MAX_OFFSET+1; i++) {
-      if (rtems_hdl_tbl[i].hdl != default_rtems_entry.hdl) {
-	rtems_hdl_tbl[i].on(&rtems_hdl_tbl[i]);
-      }
-      else {
-	rtems_hdl_tbl[i].off(&rtems_hdl_tbl[i]);
-      }
-    }
-    _CPU_ISR_Enable(level);
+    for (i= BSP_MAIN_GPP7_0_IRQ; i <= BSP_MAIN_GPP31_24_IRQ; i++) 
+      BSP_enable_pic_irq(i);
+
+    rtems_interrupt_enable(level);
     return 1;
 }
 
@@ -435,85 +578,74 @@ int BSP_rtems_irq_mngt_get(rtems_irq_global_settings** config)
     return 0;
 }    
 
-int _BSP_vme_bridge_irq = -1;
-
 /*
  * High level IRQ handler called from shared_raw_irq_code_entry
  */
+
 void C_dispatch_irq_handler (CPU_Interrupt_frame *frame, unsigned int excNum)
 {
-  register unsigned msr;
-  register unsigned new_msr;
-  unsigned mainCause[2];
-  register unsigned selectCause;
-  register unsigned oldMask[2]={0,0};
-  unsigned i, regNum, irq, bitNum, startIrqNum=0;
+  register unsigned msr, new_msr;
+  unsigned long irqCause[3]={0, 0,0};
+  register unsigned long selectCause;
+  unsigned oldMask[3]={0,0,0};
+  register unsigned i=0, j, irq=0, bitmask=0, group=0;
 
   if (excNum == ASM_DEC_VECTOR) {
-    _CPU_MSR_GET(msr);
+    _MSR_GET(msr);
     new_msr = msr | MSR_EE;
-    _CPU_MSR_SET(new_msr);
+    _MSR_SET(new_msr);
     
     rtems_hdl_tbl[BSP_DECREMENTER].hdl(rtems_hdl_tbl[BSP_DECREMENTER].handle);
 
-    _CPU_MSR_SET(msr);
+    _MSR_SET(msr);
     return;
     
   }
-  selectCause = inl( GT_CPU_SEL_CAUSE); 
-  if (selectCause & HI_INT_CAUSE ) {
-    mainCause[1]= selectCause & inl(GT_CPU_INT_MASK_HI);
-    startIrqNum=32;
+
+  for (j=0; j<3; j++ ) oldMask[j] = BSP_irqMask_cache[j];
+
+  if ((selectCause= in_le32((volatile unsigned *)0xf1000c70)) & HI_INT_CAUSE ){
+    irqCause[1] = (selectCause & BSP_irqMask_cache[1]);
+    irqCause[2] = in_le32(BSP_irqCause_reg[2]) & BSP_irqMask_cache[2];
   }
   else {
-    mainCause[0] =inl(GT_MAIN_INT_CAUSE_LO)&inl(GT_CPU_INT_MASK_LO);
-    mainCause[1] =inl(GT_MAIN_INT_CAUSE_HI)&inl(GT_CPU_INT_MASK_HI);
+    irqCause[0] = (selectCause & BSP_irqMask_cache[0]);
+    if ((irqCause[1] =(in_le32((volatile unsigned *)0xf1000c68)&BSP_irqMask_cache[1])))
+       irqCause[2] = in_le32(BSP_irqCause_reg[2]) & BSP_irqMask_cache[2];
   }
+  
+  while ((irq = picIsrTable[i++])!=-1)
+  {
+    if (irqCause[group=(irq/32)] && (irqCause[group]&(bitmask=(1<<(irq % 32))))) {
+      for (j=0; j<3; j++)
+        BSP_irqMask_cache[j] &= (~ BSP_irq_prio_mask_tbl[j][irq]);
 
-#if 0
-  /* very bad practice to put printk here, use only if for debug */
-  printk("main 0 %x, main 1 %x \n", mainCause[0],mainCause[1]);
+      RTEMS_COMPILER_MEMORY_BARRIER();
+      out_le32((volatile unsigned *)0xf1000c1c, BSP_irqMask_cache[0]);
+      out_le32((volatile unsigned *)0xf1000c6c, BSP_irqMask_cache[1]);
+      out_le32((volatile unsigned *)0xf100f10c, BSP_irqMask_cache[2]);
+      in_le32((volatile unsigned *)0xf100f10c);
+
+#ifdef EDGE_TRIGGER
+      if (irq > BSP_MICH_IRQ_MAX_OFFSET)
+         out_le32(BSP_irqCause_reg[2], ~bitmask);/* Till Straumann: Ack the edge triggered GPP IRQ */
 #endif
-  oldMask[0]= GT_MAINirqLO_cache;
-  oldMask[1]= GT_MAINirqHI_cache;
 
-  for (i=0;mainIrqTbl[i]!=-1;i++) {
-    irq=mainIrqTbl[i];
-    if ( irq < startIrqNum ) continue;
-    regNum = irq/32;
-    bitNum = irq % 32;
-    if ( mainCause[regNum] & (1<<bitNum)) {
-      GT_MAINirqLO_cache=oldMask[0]&(~irq_prio_maskLO_tbl[irq]);
-      outl(GT_MAINirqLO_cache, GT_CPU_INT_MASK_LO);
-      __asm __volatile("sync");
-      GT_MAINirqHI_cache=oldMask[1]&(~irq_prio_maskHI_tbl[irq]);
-      outl(GT_MAINirqHI_cache, GT_CPU_INT_MASK_HI);
-      __asm __volatile("sync");
-
-      /* <skf> It seems that reading back is necessary to ensure the 
-       * interrupt mask updated. Otherwise, spurious interrupt will
-       * happen.  However, I do not want to use "while loop" to risk 
-       * the CPU stuck.  I wound rather keep track of the interrupt
-       * mask if not updated.
-       */
-      if (((irqLOW[irqIndex]= inl(GT_CPU_INT_MASK_LO))!=GT_MAINirqLO_cache)||
-          ((irqHIGH[irqIndex]= inl(GT_CPU_INT_MASK_HI))!=GT_MAINirqHI_cache)){
-         irqIndex++;
-         irqIndex %=20;
-         irqCAUSE[irqIndex] = irq;
-      }
-      _CPU_MSR_GET(msr);
+      _MSR_GET(msr);
       new_msr = msr | MSR_EE;
-      _CPU_MSR_SET(new_msr);
+      _MSR_SET(new_msr); 
       rtems_hdl_tbl[irq].hdl(rtems_hdl_tbl[irq].handle);
-      _CPU_MSR_SET(msr);
+      _MSR_SET(msr);
+      
+      for (j=0; j<3; j++ ) BSP_irqMask_cache[j] = oldMask[j];
       break;
     }
   }
-  GT_MAINirqLO_cache=oldMask[0];
-  outl(GT_MAINirqLO_cache, GT_CPU_INT_MASK_LO);
-  GT_MAINirqHI_cache=oldMask[1];
-  outl(GT_MAINirqHI_cache, GT_CPU_INT_MASK_HI);
+
+  out_le32((volatile unsigned *)0xf1000c1c, oldMask[0]);
+  out_le32((volatile unsigned *)0xf1000c6c, oldMask[1]);
+  out_le32((volatile unsigned *)0xf100f10c, oldMask[2]);
+  in_le32((volatile unsigned *)0xf100f10c);
 }
 
 void _ThreadProcessSignalsFromIrq (BSP_Exception_frame* ctx)
@@ -535,10 +667,15 @@ void _ThreadProcessSignalsFromIrq (BSP_Exception_frame* ctx)
    */
 }
 
-void BSP_printIRQMask()
+/* Only print part of the entries for now */
+void BSP_printPicIsrTbl()
 {
   int i;
 
-  for (i=0; i< 20; i++)
-    printk("IRQ%d : 0x%x %x \n", irqCAUSE[i], irqHIGH[i],irqLOW[i]);
+  printk("picIsrTable[12]={");
+  for (i=0; i<12; i++)
+    printk("%d,", picIsrTable[i]);
+  printk("}\n");
+
+  printk("GPPIrqInTbl: 0x%x :\n", GPPIrqInTbl);
 }

c/src/lib/libbsp/powerpc/mvme5500/irq/irq.h

@@ -15,12 +15,13 @@
  *  found in found in the file LICENSE in this distribution or at
  *  http://www.rtems.com/license/LICENSE.
  *
- * Copyright 2004, Brookhaven National Laboratory and
+ * Copyright 2004, 2005 Brookhaven National Laboratory and
  *                 Shuchen Kate Feng <feng1@bnl.gov> 
  *
  *    - modified shared/irq/irq.h for Mvme5500 (no ISA devices/PIC)
  *    - Discovery GT64260 interrupt controller instead of 8259.
  *    - Added support for software IRQ priority levels. 
+ *    - modified to optimize the IRQ latency and handling
  *
  *  $Id$
  */
@@ -28,13 +29,14 @@
 #ifndef LIBBSP_POWERPC_MVME5500_IRQ_IRQ_H
 #define LIBBSP_POWERPC_MVME5500_IRQ_IRQ_H
 
+/*#define BSP_SHARED_HANDLER_SUPPORT      1*/
 #include <rtems/irq.h>
 
 #define BSP_ASM_IRQ_VECTOR_BASE 0x0
 
 #ifndef ASM
 
-#define DynamicIrqTbl 1
+#define OneTierIrqPrioTbl 1
 
 /*
  * Symbolic IRQ names and related definitions.
@@ -83,7 +85,8 @@
    * Summary
    */
 #define BSP_IRQ_NUMBER			(BSP_MISC_IRQ_MAX_OFFSET + 1)
-#define BSP_MAIN_IRQ_NUMBER            (64)
+#define BSP_MAIN_IRQ_NUMBER             (64)
+#define BSP_PIC_IRQ_NUMBER              (96)
 #define BSP_LOWEST_OFFSET		(BSP_MICL_IRQ_LOWEST_OFFSET)
 #define BSP_MAX_OFFSET			(BSP_MISC_IRQ_MAX_OFFSET)
 
@@ -109,6 +112,7 @@
 #define BSP_MAIN_GPP31_24_IRQ         (BSP_MICH_IRQ_LOWEST_OFFSET+27)
 
   /* on the MVME5500, these are the GT64260B external GPP0 interrupt */
+#define BSP_PCI_IRQ_LOWEST_OFFSET       (BSP_GPP_IRQ_LOWEST_OFFSET)
 #define BSP_UART_COM2_IRQ		(BSP_GPP_IRQ_LOWEST_OFFSET)
 #define BSP_UART_COM1_IRQ		(BSP_GPP_IRQ_LOWEST_OFFSET)
 #define BSP_GPP8_IRQ_OFFSET		(BSP_GPP_IRQ_LOWEST_OFFSET+8)
@@ -129,29 +133,7 @@
    */
 #define BSP_DECREMENTER		(BSP_PROCESSOR_IRQ_LOWEST_OFFSET)
 
-typedef unsigned int rtems_GTirq_masks;
-
-extern rtems_GTirq_masks GT_GPPirq_cache;
-extern rtems_GTirq_masks GT_MAINirqLO_cache, GT_MAINirqHI_cache;
-
-void BSP_enable_main_irq(unsigned irqNum);
-void BSP_disable_main_irq(unsigned irqNum);
-void BSP_enable_gpp_irq(unsigned irqNum);
-void BSP_disable_gpp_irq(unsigned irqNum); 
- 
 extern void BSP_rtems_irq_mng_init(unsigned cpuId);
-extern int gpp_int_error;
-#if  DynamicIrqTbl
-extern int MainIrqTblPtr;
-extern unsigned long long MainIrqInTbl;
-extern unsigned char GPPinMainIrqTbl[4];
-#endif
-extern unsigned int mainIrqTbl[64];
-extern unsigned int GPP7_0IrqTbl[8];
-extern unsigned int GPP15_8IrqTbl[8];
-extern unsigned int GPP23_16IrqTbl[8];
-extern unsigned int GPP31_24IrqTbl[8];
 
 #endif
-
 #endif

c/src/lib/libbsp/powerpc/mvme5500/irq/irq_init.c

@@ -5,16 +5,13 @@
  *
  * CopyRight (C) 1999 valette@crf.canon.fr
  *
- * Special acknowledgement to Till Straumann <strauman@slac.stanford.edu>
- * for providing inputs to the IRQ optimization.
- * 
  * Modified and added support for the MVME5500.
- * Copyright 2003, 2004, Brookhaven National Laboratory and
+ * Copyright 2003, 2004, 2005, Brookhaven National Laboratory and
  *                 Shuchen Kate Feng <feng1@bnl.gov>
  *
  * The license and distribution terms for this file may be
  * found in the file LICENSE in this distribution or at
- * http://www.rtems.com/license/LICENSE.
+ * http://www.rtems.com/license/LICENSE
  * 
  */
 #include <libcpu/io.h>
@@ -22,14 +19,12 @@
 #include <bsp/irq.h>
 #include <bsp.h>
 #include <libcpu/raw_exception.h>  /* ASM_EXT_VECTOR, ASM_DEC_VECTOR ... */
+/*#define  TRACE_IRQ_INIT*/
 
 extern unsigned int external_exception_vector_prolog_code_size[];
 extern void external_exception_vector_prolog_code();
 extern unsigned int decrementer_exception_vector_prolog_code_size[];
 extern void decrementer_exception_vector_prolog_code();
-extern void GT_GPP_IntHandler0(), GT_GPP_IntHandler1();
-extern void GT_GPP_IntHandler2(), GT_GPP_IntHandler3();
-extern void BSP_GT64260INT_init();
 
 /*
  * default on/off function
@@ -47,116 +42,49 @@ static int connected() {return 1;}
 static rtems_irq_connect_data     	rtemsIrq[BSP_IRQ_NUMBER];
 static rtems_irq_global_settings     	initial_config;
 static rtems_irq_connect_data     	defaultIrq = {
-  /* vectorIdex,	 hdl		, handle	, on		, off		, isOn */
-  0, 			 nop_func	, NULL		, nop_func	, nop_func	, not_connected
+  /* vectorIdex,	 hdl	  , handle	, on		, off		, isOn */
+  0, 			 nop_func  , NULL	, nop_func	, nop_func	, not_connected
 };
 
-rtems_irq_prio BSPirqPrioTable[BSP_MAIN_IRQ_NUMBER]={
+rtems_irq_prio BSPirqPrioTable[BSP_PIC_IRQ_NUMBER]={
   /*
    * This table is where the developers can change the levels of priority
    * based on the need of their applications.
    *
-   * actual priorities for CPU MAIN interrupts 0-63:
+   * actual priorities for CPU MAIN and GPP interrupts (0-95) 
+   *
    *	0   means that only current interrupt is masked (lowest priority)
-   *	255 means all other interrupts are masked
+   *	255 is only used by bits 24, 25, 26 and 27 of the CPU high
+   *        interrupt Mask: (e.g. GPP7_0, GPP15_8, GPP23_16, GPP31_24). 
+   *        The IRQs of those four bits are always enabled. When it's used,
+   *        the IRQ number is never listed in the dynamic picIsrTable[96].
+   *
+   *        The priorities of GPP interrupts were decided by their own
+   *        value set at  BSPirqPrioTable.
+   *            
    */
   /* CPU Main cause low interrupt */
   /* 0-15 */
-  0, 0, 0, 0, 0, 0, 0, 0, 4/*Timer*/, 0, 0, 0, 0, 0, 0, 0,
+  0, 0, 0, 0, 0, 0, 0, 0, 64/*Timer*/, 0, 0, 0, 0, 0, 0, 0,
    /* 16-31 */
   0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
   /* CPU Main cause high interrupt */
   /* 32-47 */
-  1/*10/100MHZ*/, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+  2/*10/100MHz*/, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
   /* 48-63 */
-  0, 0, 0, 0, 0, 0, 0, 0, 0/*serial*/, 3/*VME*/, 2/*1GHZ*/, 5/*WD*/, 0, 0, 0, 0
+  0, 0, 0, 0, 0, 0, 0, 0, 
+  255 /*GPP0-7*/, 255/*GPP8-15*/, 255/*GPP16-23*/, 255/*GPP24-31*/, 0, 0, 0, 0,
+  /* GPP interrupts */
+  /* GPP0-7 */
+  1/*serial*/,0, 0, 0, 0, 0, 0, 0,
+  /* GPP8-15 */
+  47/*PMC1A*/,46/*PMC1B*/,45/*PMC1C*/,44/*PMC1D*/,30/*VME0*/, 29/*VME1*/,3,1,
+  /* GPP16-23 */
+  37/*PMC2A*/,36/*PMC2B*/,35/*PMC2C*/,34/*PMC2D*/,23/*1GHz*/, 0,0,0,  
+  /* GPP24-31 */
+  7/*watchdog*/, 0,0,0,0,0,0,0
 };
 
-/* The mainIrqTbl[64] lists the enabled CPU main interrupt
- * numbers [0-63] starting from the highest priority one
- * to the lowest priority one.
- *
- * The highest priority interrupt is located at mainIrqTbl[0], and 
- * the lowest priority interrupt is located at 
- * mainIrqTbl[MainIrqTblPtr-1].
- */
-
-#if DynamicIrqTbl
-/* The mainIrqTbl[64] is updated dynamically based on the priority
- * levels set at BSPirqPrioTable[64], as the BSP_enable_main_irq() and
- * BSP_disable_main_irq() commands are invoked.
- *
- * Caveat: The eight GPP IRQs for each BSP_MAIN_GPPx_y_IRQ group are set
- * at the same main priority in the BSPirqPrioTable, while the 
- * sub-priority levels for the eight GPP in each group  are sorted 
- * statically by developers in the GPPx_yIrqTbl[8] from the highest
- * priority to the lowest one.
- */
-int MainIrqTblPtr=0;
-unsigned long long MainIrqInTbl=0;
-unsigned char GPPinMainIrqTbl[4]={0,0,0,0};
-/* BitNums for Main Interrupt Lo/High Cause, -1 means invalid bit */ 
-unsigned int mainIrqTbl[BSP_MAIN_IRQ_NUMBER]={  
-                               -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-			       -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-			       -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-			       -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-			       -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-			       -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-			       -1, -1, -1, -1};
-#else
-/* Pre-sorted for IRQ optimization, and prioritization 
- * The interrupts sorted are :
-
- 1. Watchdog timer      (GPP #25)
- 2. Timers 0-1          (Main interrupt low cause, bit 8)
- 3. VME interrupt       (GPP #12)
- 4. 1 GHZ ethernet      (GPP #20)
- 5. 10/100 MHZ ethernet (Main interrupt high cause, bit 0)
- 6. COM1/COM2           (GPP #0)
-
-*/ 
-/* BitNums for Main Interrupt Lo/High Cause, -1 means invalid bit */ 
-unsigned int mainIrqTbl[64]={ BSP_MAIN_GPP31_24_IRQ, /* 59:watchdog timer */
-			       BSP_MAIN_TIMER0_1_IRQ, /* 8:Timers 0-1 */
-			       BSP_MAIN_GPP15_8_IRQ,  /* 57:VME interrupt */
-			       BSP_MAIN_GPP23_16_IRQ, /* 58: 1 GHZ ethernet */
-			       BSP_MAIN_ETH0_IRQ,  /* 32:10/100 MHZ ethernet */
-			       BSP_MAIN_GPP7_0_IRQ, /* 56:COM1/COM2 */
-			       -1, -1, -1, -1,
-			       -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-			       -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-			       -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-			       -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-			       -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-			       -1, -1, -1, -1};
-#endif
-
-unsigned int GPP7_0IrqTbl[8]={0, /* COM1/COM2 */
-                               -1, -1, -1, -1, -1, -1, -1};
-unsigned int GPP15_8IrqTbl[8]={ 4, 5, 6, 7,  /* VME interrupt 0-3 */
-				0, 1, 2, 3   /* PMC1 INT A, B, C, D */};
-unsigned int GPP23_16IrqTbl[8]={4, /* 82544 1GHZ ethernet (20-16=4)*/
-				0, 1, 2, 3, /* PMC2 INT A, B, C, D */
-			     	-1, -1, -1};
-unsigned int GPP31_24IrqTbl[8]={1, /* watchdog timer (25-24=1) */
-				-1, -1, -1, -1, -1, -1, -1};
-
-static int
-doit(unsigned intNum, rtems_irq_hdl handler, int (*p)(const rtems_irq_connect_data*))
-{
-	rtems_irq_connect_data d={0};
-	d.name = intNum;
-	d.isOn = connected;
-	d.hdl  = handler;
-	return p(&d);
-}
-
-int BSP_GT64260_install_isr(unsigned intNum,rtems_irq_hdl handler)
-{
-  return doit(intNum, handler, BSP_install_rtems_irq_handler);
-}
-
 /*
  * This code assumes the exceptions management setup has already
  * been done. We just need to replace the exceptions that will
@@ -174,7 +102,6 @@ void BSP_rtems_irq_mng_init(unsigned cpuId)
 #ifdef TRACE_IRQ_INIT  
   printk("Initializing the interrupt controller of the GT64260\n");
 #endif       
-  BSP_GT64260INT_init();
 
 #ifdef TRACE_IRQ_INIT  
   printk("Going to re-initialize the rtemsIrq table %d\n",BSP_IRQ_NUMBER);
@@ -186,8 +113,8 @@ void BSP_rtems_irq_mng_init(unsigned cpuId)
    * re-init the rtemsIrq table
    */
   for (i = 0; i < BSP_IRQ_NUMBER; i++) {
-      rtemsIrq[i]      = defaultIrq;
-      rtemsIrq[i].name = i;
+    rtemsIrq[i]      = defaultIrq;    
+    rtemsIrq[i].name = i;
   }
 
   /*
@@ -209,13 +136,10 @@ void BSP_rtems_irq_mng_init(unsigned cpuId)
        */
       BSP_panic("Unable to initialize RTEMS interrupt Management!!! System locked\n");
   }
+#ifdef TRACE_IRQ_INIT  
+  printk("Done setup irq mngt configuration\n");
+#endif      
 
-  /* Connect the GPP int handler to each of the associated main cause bits */
-  BSP_GT64260_install_isr(BSP_MAIN_GPP7_0_IRQ, GT_GPP_IntHandler0); /* COM1 & COM2, .... */
-  BSP_GT64260_install_isr(BSP_MAIN_GPP15_8_IRQ, GT_GPP_IntHandler1);
-  BSP_GT64260_install_isr(BSP_MAIN_GPP23_16_IRQ, GT_GPP_IntHandler2);
-  BSP_GT64260_install_isr(BSP_MAIN_GPP31_24_IRQ, GT_GPP_IntHandler3);
- 
   /*
    * We must connect the raw irq handler for the two
    * expected interrupt sources : decrementer and external interrupts.

c/src/lib/libbsp/powerpc/mvme5500/network/if_100MHz/GT64260eth.c

@@ -1,44 +1,28 @@
 /* GT64260eth.c : GT64260 10/100 Mb ethernet MAC driver
  *
- * Copyright (c) 2002 Allegro Networks, Inc., Wasabi Systems, Inc.
+ * Copyright (c) 2003,2004 Brookhaven National  Laboratory
+ *               S. Kate Feng <feng1@bnl.gov>
+ * All rights reserved 
  *
- * Copyright (c) 2003,2004 RTEMS/Mvme5500 port by S. Kate Feng <feng1@bnl.gov>
+ * Acknowledgements:
+ * netBSD : Copyright (c) 2002 Allegro Networks, Inc., Wasabi Systems, Inc. 
+ * Marvell : NDA document for the discovery system controller
+ * The author referenced two RTEMS network drivers of other NICs.
+ * rtems : 1) dec21140.c, a network driver for for TULIP based Ethernet Controller
+ *            (C) 1999 Emmanuel Raguet. raguet@crf.canon.fr
  *
- * All rights reserved.
+ *         2) yellowfin.c, a network driver for the SVGM5 BSP.
+ *           Stanford Linear Accelerator Center, Till Straumann 
  *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *      This product includes software developed for the NetBSD Project by
- *      Allegro Networks, Inc., and Wasabi Systems, Inc.
- * 4. The name of Allegro Networks, Inc. may not be used to endorse
- *    or promote products derived from this software without specific prior
- *    written permission.
- * 5. The name of Wasabi Systems, Inc. may not be used to endorse
- *    or promote products derived from this software without specific prior
- *    written permission.
+ * Some notes from the author, S. Kate Feng :
  *
- * S. Kate Feng, other notes in addition to porting to RTEMS :
- * 
  * 1) Mvme5500 uses Eth0 (controller 0) of the GT64260 to implement
  *    the 10/100 BaseT Ethernet with PCI Master Data Byte Swap\
  *    control.
- * 2) It implements hardware snoop instead of software snoop
- *    to ensure SDRAM cache coherency.
- * 3) The origianl ISR is optimized to minimize interrupt latencies,
- *    and to reduce system overhead. The driver's work is done by one single
- *    task who blocks on an event while it is idle.  This implemetation
- *    is heavily inspired by the modification of SVGM network driver for
- *    RTEMS port written by Till Straumann, whihc is licensed under the
- *    EPICS open source. Ditto the GT64260eth_sendpacket().
- *
+ * 2) Implemented hardware snoop instead of software snoop
+ *    to ensure SDRAM cache coherency. (Copyright : NDA item)
+ * 3) Added S/W support for multi mbuf.  (TODO : Let the H/W do it)
+ *    
  */
 #define BYTE_ORDER BIG_ENDIAN
 
@@ -156,7 +140,6 @@ static void GT64260eth_irq_on(const rtems_irq_connect_data *irq)
   struct GTeth_softc *sc;
 
   for (sc= root_GT64260eth_dev; sc; sc= sc-> next_module) {
-    printk("GT64260eth_irq_on\n");
     outl(0x30883444,ETH0_EIMR); /* MOTLoad default interrupt mask */
     return;
   }  
@@ -185,6 +168,12 @@ static void GT64260eth_isr()
   cause = inl(ETH0_EICR);
   outl( ~cause,ETH0_EICR);  /* clear the ICR */
 
+  if ( (!cause) || (cause & 0x803d00)) {
+       sc->intr_errsts[sc->intr_err_ptr2++]=cause;
+       sc->intr_err_ptr2 %=INTR_ERR_SIZE;   /* Till Straumann */
+       events |= ERR_EVENT;
+  }  
+
   /* ETH_IR_RxBuffer_3|ETH_IR_RxError_3 */
   if (cause & 0x880000) {
      sc->stats.rxInterrupts++;
@@ -206,12 +195,6 @@ static void GT64260eth_isr()
 
 
   }
-  if ( (!cause) || (cause & 0x803d00)) {
-       sc->intr_errsts[sc->intr_err_ptr2++]=cause;
-       sc->intr_err_ptr2 %=INTR_ERR_SIZE;   /* Till Straumann */
-       events |= ERR_EVENT;
-  }
-
   rtems_event_send(sc->daemonTid, events);
 }
 
@@ -268,7 +251,7 @@ static void GT64260eth_init_hw(struct GTeth_softc *sc)
    * take care of enabling interrupts
    */
   if (!BSP_install_rtems_irq_handler(&GT64260ethIrqData))
-     rtems_panic("GT64260eth: unable to install ISR");
+     printk("GT64260eth: unable to install ISR");
    
   /* The ethernet port is ready to transmit/receive */
   outl(sc->sc_pcr | ETH_EPCR_EN, ETH0_EPCR);
@@ -288,7 +271,7 @@ static void GT64260eth_stop_hw(struct GTeth_softc *sc)
   * itself
   */
   if (!BSP_remove_rtems_irq_handler(&GT64260ethIrqData))
-     rtems_panic("Yellowfin: unable to remove IRQ handler!");
+     printk("GT64260eth: unable to remove IRQ handler!");
 
   outl(sc->sc_pcr, ETH0_EPCR);
   outl(0, ETH0_EIMR);
@@ -383,7 +366,6 @@ int rtems_GT64260eth_driver_attach(struct rtems_bsdnet_ifconfig *config, int att
   if (unit < 0) return 0;
  
   printk("\nEthernet driver name %s unit %d \n",name, unit);
-  printk("Copyright (c) 2002 Allegro Networks, Inc., Wasabi Systems, Inc.\n");
   printk("(c) 2004, Brookhaven National Lab. <feng1@bnl.gov> (RTEMS/mvme5500 port)\n");
 
   /* Make certain elements e.g. descriptor lists are aligned. */
@@ -391,7 +373,7 @@ int rtems_GT64260eth_driver_attach(struct rtems_bsdnet_ifconfig *config, int att
 
   /* Check for the very unlikely case of no memory. */
   if (softc_mem == NULL)
-     rtems_panic("GT64260eth: OUT OF MEMORY");
+     printk("GT64260eth: OUT OF MEMORY");
 
   sc = (void *)(((long)softc_mem + SOFTC_ALIGN) & ~SOFTC_ALIGN);
   memset(sc, 0, sizeof(*sc));
@@ -484,7 +466,7 @@ int rtems_GT64260eth_driver_attach(struct rtems_bsdnet_ifconfig *config, int att
   printk("sdcr %x \n", sdcr);
 #endif
 
-  if (phyaddr== -1) rtems_panic("MII auto negotiation ?");
+  if (phyaddr== -1) printk("MII auto negotiation ?");
 
   ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
 
@@ -509,7 +491,7 @@ int rtems_GT64260eth_driver_attach(struct rtems_bsdnet_ifconfig *config, int att
   /* create the synchronization semaphore */
   if (RTEMS_SUCCESSFUL != rtems_semaphore_create(
      rtems_build_name('G','e','t','h'),0,0,0,&sc->daemonSync))
-     rtems_panic("GT64260eth: semaphore creation failed");
+     printk("GT64260eth: semaphore creation failed");
 
   sc->next_module = root_GT64260eth_dev;
   root_GT64260eth_dev = sc;
@@ -529,6 +511,7 @@ static void GT64260eth_stats(struct GTeth_softc *sc)
 {
   struct ifnet *ifp = &sc->arpcom.ac_if;
 
+#if 0
   printf("       Rx Interrupts:%-8lu\n", sc->stats.rxInterrupts);
   printf("     Receive Packets:%-8lu\n", ifp->if_ipackets);
   printf("     Receive  errors:%-8lu\n", ifp->if_ierrors);
@@ -537,11 +520,23 @@ static void GT64260eth_stats(struct GTeth_softc *sc)
   printf("    Oversized Frames:%-8lu\n", sc->stats.length_errors);
   printf("         Active Rxqs:%-8u\n",  sc->rxq_active); 
   printf("       Tx Interrupts:%-8lu\n", sc->stats.txInterrupts);
-  printf("Multi-Buffer Packets:%-8lu\n", sc->stats.txMultiBuffPacket);
+#endif
+  printf("Multi-BuffTx Packets:%-8lu\n", sc->stats.txMultiBuffPacket);
+  printf("Multi-BuffTx max len:%-8lu\n", sc->stats.txMultiMaxLen);
+  printf("SingleBuffTx max len:%-8lu\n", sc->stats.txSinglMaxLen);
+  printf("Multi-BuffTx maxloop:%-8lu\n", sc->stats.txMultiMaxLoop);
+  printf("Tx buffer max len   :%-8lu\n", sc->stats.txBuffMaxLen);
+#if 0
   printf("   Transmitt Packets:%-8lu\n", ifp->if_opackets);
   printf("   Transmitt  errors:%-8lu\n", ifp->if_oerrors);
   printf("    Tx/Rx collisions:%-8lu\n", ifp->if_collisions);
   printf("         Active Txqs:%-8u\n", sc->txq_nactive); 
+#endif
+}
+
+void GT64260eth_printStats()
+{
+  GT64260eth_stats(root_GT64260eth_dev);
 }
 
 static int GTeth_ifioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
@@ -590,6 +585,7 @@ static int GTeth_ifioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
        if (error == ENETRESET) {
 	   if (ifp->if_flags & IFF_RUNNING)
 	      GTeth_ifchange(sc);
+	   else
 	      error = 0;
        }
        break;
@@ -910,7 +906,7 @@ static int GT64260eth_sendpacket(struct GTeth_softc *sc,struct mbuf *m)
 {
   volatile struct GTeth_desc *txd = &sc->txq_desc[sc->txq_lo];
   unsigned intrmask = sc->sc_intrmask;
-  unsigned index= sc->txq_lo;
+  unsigned loop=0, index= sc->txq_lo;
 
   /* 
    * The end-of-list descriptor we put on last time is the starting point
@@ -920,8 +916,10 @@ static int GT64260eth_sendpacket(struct GTeth_softc *sc,struct mbuf *m)
    */
   intrmask = sc->sc_intrmask;
 
-  if ( !(m->m_next)) /* single buffer packet */
+  if ( !(m->m_next)) {/* single buffer packet */
     sc->txq_mbuf[index]= m;
+    sc->stats.txSinglMaxLen= MAX(m->m_len, sc->stats.txSinglMaxLen);
+  }
   else /* multiple mbufs in this packet */
   { 
     struct mbuf *mtp, *mdest;
@@ -935,20 +933,23 @@ static int GT64260eth_sendpacket(struct GTeth_softc *sc,struct mbuf *m)
     MCLGET(mdest, M_WAIT);
     pt = (volatile unsigned char *)mdest->m_data;
     for (mtp=m,len=0;mtp;mtp=mtp->m_next) {
+      loop++;
       if ( (y=(len+mtp->m_len)) > sizeof(union mcluster)) {
-	/* GT64260 allows us to chain the remaining to the nex
+	/* GT64260 allows us to chain the remaining to the next
          * free descriptors. 
          */
         printk("packet size %x > mcluster %x\n", y,sizeof(union mcluster)); 
-	rtems_panic("GT64260eth : packet too large ");
+	printk("GT64260eth : packet too large ");
       }
       memcpy((void *)pt,(char *)mtp->m_data, mtp->m_len);
       pt += mtp->m_len;
 #if 0
-      printk("%d ",mtp->m_len);
+    printk("%d ",mtp->m_len);
 #endif
       len += mtp->m_len;
+      sc->stats.txBuffMaxLen=MAX(mtp->m_len,sc->stats.txBuffMaxLen); 
     }
+    sc->stats.txMultiMaxLoop=MAX(loop, sc->stats.txMultiMaxLoop);
 #if 0
     printk("\n");
 #endif
@@ -957,6 +958,7 @@ static int GT64260eth_sendpacket(struct GTeth_softc *sc,struct mbuf *m)
     m_freem(m);
     sc->txq_mbuf[index] = m = mdest;
     sc->stats.txMultiBuffPacket++;
+    sc->stats.txMultiMaxLen= MAX(m->m_len, sc->stats.txMultiMaxLen);
   }
   if (m->m_len < ET_MINLEN) m->m_len = ET_MINLEN;
 
@@ -964,6 +966,8 @@ static int GT64260eth_sendpacket(struct GTeth_softc *sc,struct mbuf *m)
   txd->ed_lencnt = m->m_len << 16;
   /*txd->ed_cmdsts = TX_CMD_L|TX_CMD_GC|TX_CMD_P|TX_CMD_O|TX_CMD_F|TX_CMD_EI;*/
   txd->ed_cmdsts = 0x80c70000;
+  while (txd->ed_cmdsts != 0x80c70000);
+  memBar();
 
 #ifdef GT_DEBUG 
   printk("len = %d, cmdsts 0x%x ", m->m_len,txd->ed_cmdsts);
@@ -1138,7 +1142,7 @@ static void GTeth_ifchange(struct GTeth_softc *sc)
 {
   if (GTeth_debug>0) printk("GTeth_ifchange(");
   if (GTeth_debug>5) printk("(pcr=%#x,imr=%#x)",inl(ETH0_EPCR),inl(ETH0_EIMR));
-  printk("SIOCADDMULTI (SIOCDELMULTI): is it about rx or tx ?\n");
+  /*  printk("SIOCADDMULTI (SIOCDELMULTI): is it about rx or tx ?\n");*/
   outl(sc->sc_pcr | ETH_EPCR_EN, ETH0_EPCR);
   outl(sc->sc_intrmask, ETH0_EIMR);
   GTeth_ifstart(&sc->arpcom.ac_if);
@@ -1251,7 +1255,7 @@ static int GTeth_hash_entry_op(struct GTeth_softc *sc, enum GTeth_hash_op op,
   hash = GTeth_hash_compute(sc, eaddr);
 
   if (sc->sc_hashtable == NULL) {
-	rtems_panic("hashtable == NULL!");
+	printk("hashtable == NULL!");
   }
 #ifdef GT_DEBUG
   printk("Hash computed %x eaddr %s\n", hash,ether_sprintf1(eaddr));
@@ -1350,7 +1354,7 @@ static int GTeth_hash_entry_op(struct GTeth_softc *sc, enum GTeth_hash_op op,
    * If we couldn't find a slot, return an error.
    */
   if (maybe_he_p == NULL) {
-     rtems_panic("GT64260eth : No slot found");
+     printk("GT64260eth : No slot found");
      return ENOSPC;
   }
 
@@ -1519,12 +1523,6 @@ static void GT64260eth_daemon(void *arg)
 
      /* clean up and try sending packets */
      do { 
-#if 0
-	if (gpp_int_error!=0) {
-           printk("GPP interrupt error %d\n", gpp_int_error);
-           gpp_int_error=0;
-	}
-#endif
 	 if (sc->txq_nactive) GTeth_txq_done(sc);
 
          while (sc->txq_free>0) {

c/src/lib/libbsp/powerpc/mvme5500/network/if_100MHz/GT64260eth.h

@@ -75,8 +75,9 @@ struct GTeth_softc {
   unsigned int intr_err_ptr2;   /* ptr used in ISR */
   struct ifqueue txq_pendq;	/* these are ready to go to the GT */
   unsigned int txq_pending;
-  unsigned int txq_lo;		/* next to be given to GT */
-  unsigned int txq_fi; 		/* next to be returned to CPU */
+  unsigned int txq_lo;		/* next to be given to GT DMA */
+  unsigned int txq_fi; 		/* next to be free */
+  unsigned int txq_to_cpu;      /* next to be returned to CPU */
   unsigned int txq_ei_gapcount;	/* counter until next EI */
   unsigned int txq_nactive;	/* number of active descriptors */
   unsigned int txq_nintr;       /* number of txq desc. send TX_EVENT */
@@ -127,6 +128,10 @@ struct GTeth_softc {
 
     volatile unsigned long       txInterrupts;
     unsigned long	txMultiBuffPacket;
+    unsigned long       txMultiMaxLen;
+    unsigned long       txSinglMaxLen;
+    unsigned long       txMultiMaxLoop;
+    unsigned long       txBuffMaxLen;
     unsigned long 	length_errors;
     unsigned long	frame_errors;
     unsigned long	crc_errors;

c/src/lib/libbsp/powerpc/mvme5500/network/if_100MHz/Makefile.am

@@ -0,0 +1,46 @@
+##
+## $Id$
+##
+
+VPATH = @srcdir@:
+
+INCLUDES = -I @srcdir@/../GT64260
+
+C_FILES = GT64260eth.c
+include_bspdir = $(includedir)/bsp
+include_bsp_HEADERS = GT64260eth.h GT64260ethreg.h
+
+H_FILES = GT64260eth.h GT64260ethreg.h
+
+C_O_FILES = $(C_FILES:%.c=$(ARCH)/%.$(OBJEXT))
+
+EXTRA_DIST = GT64260eth.c
+
+OBJS = $(C_O_FILES)
+
+include $(top_srcdir)/../../../../../../automake/compile.am
+include $(top_srcdir)/../../../../../../automake/lib.am
+
+CFLAGS   += -msoft-float
+
+#
+# (OPTIONAL) Add local stuff here using +=
+#
+
+$(PROJECT_INCLUDE)/bsp:
+	$(mkinstalldirs) $<
+
+$(PROJECT_INCLUDE)/bsp/GT64260eth.h: GT64260eth.h
+	$(INSTALL_DATA) $< $@
+
+$(PROJECT_INCLUDE)/bsp/GT64260ethreg.h: GT64260ethreg.h
+	$(INSTALL_DATA) $< $@
+
+
+# the .rel file built here will be put into libbsp.a by ../wrapup/Makefile
+PREINSTALL_FILES = $(PROJECT_INCLUDE)/bsp $(PROJECT_INCLUDE)/bsp/GT64260eth.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/GT64260ethreg.h
+
+all-local: $(ARCH) $(PREINSTALL_FILES) $(OBJS)
+
+include $(top_srcdir)/../../../../../../automake/local.am

c/src/lib/libbsp/powerpc/mvme5500/network/if_1GHz/Makefile.am

@@ -0,0 +1,45 @@
+##
+## $Id$
+##
+
+VPATH = @srcdir@:
+
+INCLUDES = -I @srcdir@/../GT64260
+
+C_FILES = if_wm.c pci_map.c
+include_bspdir = $(includedir)/bsp
+include_bsp_HEADERS =  if_wmreg.h pcireg.h
+
+H_FILES =  if_wmreg.h pcireg.h
+
+C_O_FILES = $(C_FILES:%.c=$(ARCH)/%.$(OBJEXT))
+
+EXTRA_DIST =  if_wm.c pci_map.c
+
+OBJS = $(C_O_FILES)
+
+include $(top_srcdir)/../../../../../../automake/compile.am
+include $(top_srcdir)/../../../../../../automake/lib.am
+
+CFLAGS   += -msoft-float
+
+#
+# (OPTIONAL) Add local stuff here using +=
+#
+
+$(PROJECT_INCLUDE)/bsp:
+	$(mkinstalldirs) $<
+
+$(PROJECT_INCLUDE)/bsp/if_wmreg.h: if_wmreg.h
+	$(INSTALL_DATA) $< $@
+
+$(PROJECT_INCLUDE)/bsp/pcireg.h: pcireg.h 
+	$(INSTALL_DATA) $< $@
+
+# the .rel file built here will be put into libbsp.a by ../wrapup/Makefile
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/if_wmreg.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/pcireg.h
+
+all-local: $(ARCH) $(PREINSTALL_FILES) $(OBJS)
+
+include $(top_srcdir)/../../../../../../automake/local.am

c/src/lib/libbsp/powerpc/mvme5500/network/if_1GHz/POSSIBLEBUG

@@ -0,0 +1,4 @@
+S. Kate Feng <feng1@bnl.gov>, Sept. 06, 2007
+
+This driver boots smoothly with the 1GHZ media.
+It might not boot with the 10/100MHZ media.

c/src/lib/libbsp/powerpc/mvme5500/network/if_1GHz/if_wmreg.h

@@ -0,0 +1,737 @@
+/*	$NetBSD: if_wmreg.h,v 1.22 2007/04/29 20:35:21 bouyer Exp $	*/
+
+/*
+ * Copyright (c) 2001 Wasabi Systems, Inc.
+ * All rights reserved.
+ *
+ * Written by Jason R. Thorpe for Wasabi Systems, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed for the NetBSD Project by
+ *	Wasabi Systems, Inc.
+ * 4. The name of Wasabi Systems, Inc. may not be used to endorse
+ *    or promote products derived from this software without specific prior
+ *    written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Register description for the Intel i82542 (``Wiseman''),
+ * i82543 (``Livengood''), and i82544 (``Cordova'') Gigabit
+ * Ethernet chips.
+ */
+
+/*
+ * The wiseman supports 64-bit PCI addressing.  This structure
+ * describes the address in descriptors.
+ */
+typedef struct wiseman_addr {
+	uint32_t	wa_low;		/* low-order 32 bits */
+	uint32_t	wa_high;	/* high-order 32 bits */
+} __attribute__((__packed__)) wiseman_addr_t;
+
+/*
+ * The Wiseman receive descriptor.
+ *
+ * The receive descriptor ring must be aligned to a 4K boundary,
+ * and there must be an even multiple of 8 descriptors in the ring.
+ */
+typedef struct wiseman_rxdesc {
+	wiseman_addr_t	wrx_addr;	/* buffer address */
+
+	uint16_t	wrx_len;	/* buffer length */
+	uint16_t	wrx_cksum;	/* checksum (starting at PCSS) */
+
+	uint8_t		wrx_status;	/* Rx status */
+	uint8_t		wrx_errors;	/* Rx errors */
+	uint16_t	wrx_special;	/* special field (VLAN, etc.) */
+} __attribute__((__packed__)) wiseman_rxdesc_t;
+
+/* wrx_status bits */
+#define	WRX_ST_DD	(1U << 0)	/* descriptor done */
+#define	WRX_ST_EOP	(1U << 1)	/* end of packet */
+#define	WRX_ST_IXSM	(1U << 2)	/* ignore checksum indication */
+#define	WRX_ST_VP	(1U << 3)	/* VLAN packet */
+#define	WRX_ST_BPDU	(1U << 4)	/* ??? */
+#define	WRX_ST_TCPCS	(1U << 5)	/* TCP checksum performed */
+#define	WRX_ST_IPCS	(1U << 6)	/* IP checksum performed */
+#define	WRX_ST_PIF	(1U << 7)	/* passed in-exact filter */
+
+/* wrx_error bits */
+#define	WRX_ER_CE	(1U << 0)	/* CRC error */
+#define	WRX_ER_SE	(1U << 1)	/* symbol error */
+#define	WRX_ER_SEQ	(1U << 2)	/* sequence error */
+#define	WRX_ER_ICE	(1U << 3)	/* ??? */
+#define	WRX_ER_CXE	(1U << 4)	/* carrier extension error */
+#define	WRX_ER_TCPE	(1U << 5)	/* TCP checksum error */
+#define	WRX_ER_IPE	(1U << 6)	/* IP checksum error */
+#define	WRX_ER_RXE	(1U << 7)	/* Rx data error */
+
+/* wrx_special field for VLAN packets */
+#define	WRX_VLAN_ID(x)	((x) & 0x0fff)	/* VLAN identifier */
+#define	WRX_VLAN_CFI	(1U << 12)	/* Canonical Form Indicator */
+#define	WRX_VLAN_PRI(x)	(((x) >> 13) & 7)/* VLAN priority field */
+
+/*
+ * The Wiseman transmit descriptor.
+ *
+ * The transmit descriptor ring must be aligned to a 4K boundary,
+ * and there must be an even multiple of 8 descriptors in the ring.
+ */
+typedef struct wiseman_tx_fields {
+	uint8_t wtxu_status;		/* Tx status */
+	uint8_t wtxu_options;		/* options */
+	uint16_t wtxu_vlan;		/* VLAN info */
+} __attribute__((__packed__)) wiseman_txfields_t;
+typedef struct wiseman_txdesc {
+	wiseman_addr_t	wtx_addr;	/* buffer address */
+	uint32_t	wtx_cmdlen;	/* command and length */
+	wiseman_txfields_t wtx_fields;	/* fields; see below */
+} __attribute__((__packed__)) wiseman_txdesc_t;
+
+/* Commands for wtx_cmdlen */
+#define	WTX_CMD_EOP	(1U << 24)	/* end of packet */
+#define	WTX_CMD_IFCS	(1U << 25)	/* insert FCS */
+#define	WTX_CMD_RS	(1U << 27)	/* report status */
+#define	WTX_CMD_RPS	(1U << 28)	/* report packet sent */
+#define	WTX_CMD_DEXT	(1U << 29)	/* descriptor extension */
+#define	WTX_CMD_VLE	(1U << 30)	/* VLAN enable */
+#define	WTX_CMD_IDE	(1U << 31)	/* interrupt delay enable */
+
+/* Descriptor types (if DEXT is set) */
+#define	WTX_DTYP_C	(0U << 20)	/* context */
+#define	WTX_DTYP_D	(1U << 20)	/* data */
+
+/* wtx_fields status bits */
+#define	WTX_ST_DD	(1U << 0)	/* descriptor done */
+#define	WTX_ST_EC	(1U << 1)	/* excessive collisions */
+#define	WTX_ST_LC	(1U << 2)	/* late collision */
+#define	WTX_ST_TU	(1U << 3)	/* transmit underrun */
+
+/* wtx_fields option bits for IP/TCP/UDP checksum offload */
+#define	WTX_IXSM	(1U << 0)	/* IP checksum offload */
+#define	WTX_TXSM	(1U << 1)	/* TCP/UDP checksum offload */
+
+/* Maximum payload per Tx descriptor */
+#define	WTX_MAX_LEN	4096
+
+/*
+ * The Livengood TCP/IP context descriptor.
+ */
+struct livengood_tcpip_ctxdesc {
+	uint32_t	tcpip_ipcs;	/* IP checksum context */
+	uint32_t	tcpip_tucs;	/* TCP/UDP checksum context */
+	uint32_t	tcpip_cmdlen;
+	uint32_t	tcpip_seg;	/* TCP segmentation context */
+};
+
+/* commands for context descriptors */
+#define	WTX_TCPIP_CMD_TCP	(1U << 24)	/* 1 = TCP, 0 = UDP */
+#define	WTX_TCPIP_CMD_IP	(1U << 25)	/* 1 = IPv4, 0 = IPv6 */
+#define	WTX_TCPIP_CMD_TSE	(1U << 26)	/* segmentation context valid */
+
+#define	WTX_TCPIP_IPCSS(x)	((x) << 0)	/* checksum start */
+#define	WTX_TCPIP_IPCSO(x)	((x) << 8)	/* checksum value offset */
+#define	WTX_TCPIP_IPCSE(x)	((x) << 16)	/* checksum end */
+
+#define	WTX_TCPIP_TUCSS(x)	((x) << 0)	/* checksum start */
+#define	WTX_TCPIP_TUCSO(x)	((x) << 8)	/* checksum value offset */
+#define	WTX_TCPIP_TUCSE(x)	((x) << 16)	/* checksum end */
+
+#define	WTX_TCPIP_SEG_STATUS(x)	((x) << 0)
+#define	WTX_TCPIP_SEG_HDRLEN(x)	((x) << 8)
+#define	WTX_TCPIP_SEG_MSS(x)	((x) << 16)
+
+/*
+ * PCI config registers used by the Wiseman.
+ */
+#define	WM_PCI_MMBA	PCI_MAPREG_START
+/* registers for FLASH access on ICH8 */
+#define WM_ICH8_FLASH	0x0014
+
+/*
+ * Wiseman Control/Status Registers.
+ */
+#define	WMREG_CTRL	0x0000	/* Device Control Register */
+#define	CTRL_FD		(1U << 0)	/* full duplex */
+#define	CTRL_BEM	(1U << 1)	/* big-endian mode */
+#define	CTRL_PRIOR	(1U << 2)	/* 0 = receive, 1 = fair */
+#define	CTRL_LRST	(1U << 3)	/* link reset */
+#define	CTRL_ASDE	(1U << 5)	/* auto speed detect enable */
+#define	CTRL_SLU	(1U << 6)	/* set link up */
+#define	CTRL_ILOS	(1U << 7)	/* invert loss of signal */
+#define	CTRL_SPEED(x)	((x) << 8)	/* speed (Livengood) */
+#define	CTRL_SPEED_10	CTRL_SPEED(0)
+#define	CTRL_SPEED_100	CTRL_SPEED(1)
+#define	CTRL_SPEED_1000	CTRL_SPEED(2)
+#define	CTRL_SPEED_MASK	CTRL_SPEED(3)
+#define	CTRL_FRCSPD	(1U << 11)	/* force speed (Livengood) */
+#define	CTRL_FRCFDX	(1U << 12)	/* force full-duplex (Livengood) */
+#define CTRL_D_UD_EN	(1U << 13)	/* Dock/Undock enable */
+#define CTRL_D_UD_POL	(1U << 14)	/* Defined polarity of Dock/Undock indication in SDP[0] */
+#define CTRL_F_PHY_R 	(1U << 15)	/* Reset both PHY ports, through PHYRST_N pin */
+#define CTRL_EXT_LINK_EN (1U << 16)	/* enable link status from external LINK_0 and LINK_1 pins */
+#define	CTRL_SWDPINS_SHIFT	18
+#define	CTRL_SWDPINS_MASK	0x0f
+#define	CTRL_SWDPIN(x)		(1U << (CTRL_SWDPINS_SHIFT + (x)))
+#define	CTRL_SWDPIO_SHIFT	22
+#define	CTRL_SWDPIO_MASK	0x0f
+#define	CTRL_SWDPIO(x)		(1U << (CTRL_SWDPIO_SHIFT + (x)))
+#define	CTRL_RST	(1U << 26)	/* device reset */
+#define	CTRL_RFCE	(1U << 27)	/* Rx flow control enable */
+#define	CTRL_TFCE	(1U << 28)	/* Tx flow control enable */
+#define	CTRL_VME	(1U << 30)	/* VLAN Mode Enable */
+#define	CTRL_PHY_RESET	(1U << 31)	/* PHY reset (Cordova) */
+
+#define	WMREG_CTRL_SHADOW 0x0004	/* Device Control Register (shadow) */
+
+#define	WMREG_STATUS	0x0008	/* Device Status Register */
+#define	STATUS_FD	(1U << 0)	/* full duplex */
+#define	STATUS_LU	(1U << 1)	/* link up */
+#define	STATUS_TCKOK	(1U << 2)	/* Tx clock running */
+#define	STATUS_RBCOK	(1U << 3)	/* Rx clock running */
+#define	STATUS_FUNCID_SHIFT 2		/* 82546 function ID */
+#define	STATUS_FUNCID_MASK  3		/* ... */
+#define	STATUS_TXOFF	(1U << 4)	/* Tx paused */
+#define	STATUS_TBIMODE	(1U << 5)	/* fiber mode (Livengood) */
+#define	STATUS_SPEED(x)	((x) << 6)	/* speed indication */
+#define	STATUS_SPEED_10	  STATUS_SPEED(0)
+#define	STATUS_SPEED_100  STATUS_SPEED(1)
+#define	STATUS_SPEED_1000 STATUS_SPEED(2)
+#define	STATUS_ASDV(x)	((x) << 8)	/* auto speed det. val. (Livengood) */
+#define	STATUS_MTXCKOK	(1U << 10)	/* MTXD clock running */
+#define	STATUS_PCI66	(1U << 11)	/* 66MHz bus (Livengood) */
+#define	STATUS_BUS64	(1U << 12)	/* 64-bit bus (Livengood) */
+#define	STATUS_PCIX_MODE (1U << 13)	/* PCIX mode (Cordova) */
+#define	STATUS_PCIXSPD(x) ((x) << 14)	/* PCIX speed indication (Cordova) */
+#define	STATUS_PCIXSPD_50_66   STATUS_PCIXSPD(0)
+#define	STATUS_PCIXSPD_66_100  STATUS_PCIXSPD(1)
+#define	STATUS_PCIXSPD_100_133 STATUS_PCIXSPD(2)
+#define	STATUS_PCIXSPD_MASK    STATUS_PCIXSPD(3)
+
+#define	WMREG_EECD	0x0010	/* EEPROM Control Register */
+#define	EECD_SK		(1U << 0)	/* clock */
+#define	EECD_CS		(1U << 1)	/* chip select */
+#define	EECD_DI		(1U << 2)	/* data in */
+#define	EECD_DO		(1U << 3)	/* data out */
+#define	EECD_FWE(x)	((x) << 4)	/* flash write enable control */
+#define	EECD_FWE_DISABLED EECD_FWE(1)
+#define	EECD_FWE_ENABLED  EECD_FWE(2)
+#define	EECD_EE_REQ	(1U << 6)	/* (shared) EEPROM request */
+#define	EECD_EE_GNT	(1U << 7)	/* (shared) EEPROM grant */
+#define	EECD_EE_PRES	(1U << 8)	/* EEPROM present */
+#define	EECD_EE_SIZE	(1U << 9)	/* EEPROM size
+					   (0 = 64 word, 1 = 256 word) */
+#define	EECD_EE_AUTORD	(1U << 9)	/* auto read done */
+#define	EECD_EE_ABITS	(1U << 10)	/* EEPROM address bits
+					   (based on type) */
+#define	EECD_EE_TYPE	(1U << 13)	/* EEPROM type
+					   (0 = Microwire, 1 = SPI) */
+#define EECD_SEC1VAL	(1U << 22)	/* Sector One Valid */
+
+#define	UWIRE_OPC_ERASE	0x04		/* MicroWire "erase" opcode */
+#define	UWIRE_OPC_WRITE	0x05		/* MicroWire "write" opcode */
+#define	UWIRE_OPC_READ	0x06		/* MicroWire "read" opcode */
+
+#define	SPI_OPC_WRITE	0x02		/* SPI "write" opcode */
+#define	SPI_OPC_READ	0x03		/* SPI "read" opcode */
+#define	SPI_OPC_A8	0x08		/* opcode bit 3 == address bit 8 */
+#define	SPI_OPC_WREN	0x06		/* SPI "set write enable" opcode */
+#define	SPI_OPC_WRDI	0x04		/* SPI "clear write enable" opcode */
+#define	SPI_OPC_RDSR	0x05		/* SPI "read status" opcode */
+#define	SPI_OPC_WRSR	0x01		/* SPI "write status" opcode */
+#define	SPI_MAX_RETRIES	5000		/* max wait of 5ms for RDY signal */
+
+#define	SPI_SR_RDY	0x01
+#define	SPI_SR_WEN	0x02
+#define	SPI_SR_BP0	0x04
+#define	SPI_SR_BP1	0x08
+#define	SPI_SR_WPEN	0x80
+
+#define	EEPROM_OFF_MACADDR	0x00	/* MAC address offset */
+#define	EEPROM_OFF_CFG1		0x0a	/* config word 1 */
+#define	EEPROM_OFF_CFG2		0x0f	/* config word 2 */
+#define	EEPROM_OFF_SWDPIN	0x20	/* SWD Pins (Cordova) */
+
+#define	EEPROM_CFG1_LVDID	(1U << 0)
+#define	EEPROM_CFG1_LSSID	(1U << 1)
+#define	EEPROM_CFG1_PME_CLOCK	(1U << 2)
+#define	EEPROM_CFG1_PM		(1U << 3)
+#define	EEPROM_CFG1_ILOS	(1U << 4)
+#define	EEPROM_CFG1_SWDPIO_SHIFT 5
+#define	EEPROM_CFG1_SWDPIO_MASK	(0xf << EEPROM_CFG1_SWDPIO_SHIFT)
+#define	EEPROM_CFG1_IPS1	(1U << 8)
+#define	EEPROM_CFG1_LRST	(1U << 9)
+#define	EEPROM_CFG1_FD		(1U << 10)
+#define	EEPROM_CFG1_FRCSPD	(1U << 11)
+#define	EEPROM_CFG1_IPS0	(1U << 12)
+#define	EEPROM_CFG1_64_32_BAR	(1U << 13)
+
+#define	EEPROM_CFG2_CSR_RD_SPLIT (1U << 1)
+#define	EEPROM_CFG2_APM_EN	(1U << 2)
+#define	EEPROM_CFG2_64_BIT	(1U << 3)
+#define	EEPROM_CFG2_MAX_READ	(1U << 4)
+#define	EEPROM_CFG2_DMCR_MAP	(1U << 5)
+#define	EEPROM_CFG2_133_CAP	(1U << 6)
+#define	EEPROM_CFG2_MSI_DIS	(1U << 7)
+#define	EEPROM_CFG2_FLASH_DIS	(1U << 8)
+#define	EEPROM_CFG2_FLASH_SIZE(x) (((x) & 3) >> 9)
+#define	EEPROM_CFG2_ANE		(1U << 11)
+#define	EEPROM_CFG2_PAUSE(x)	(((x) & 3) >> 12)
+#define	EEPROM_CFG2_ASDE	(1U << 14)
+#define	EEPROM_CFG2_APM_PME	(1U << 15)
+#define	EEPROM_CFG2_SWDPIO_SHIFT 4
+#define	EEPROM_CFG2_SWDPIO_MASK	(0xf << EEPROM_CFG2_SWDPIO_SHIFT)
+
+#define	EEPROM_SWDPIN_MASK	0xdf
+#define	EEPROM_SWDPIN_SWDPIN_SHIFT 0
+#define	EEPROM_SWDPIN_SWDPIO_SHIFT 8
+
+#define	WMREG_EERD	0x0014	/* EEPROM read */
+#define	EERD_DONE	0x02    /* done bit */
+#define	EERD_START	0x01	/* First bit for telling part to start operation */
+#define	EERD_ADDR_SHIFT	2	/* Shift to the address bits */
+#define	EERD_DATA_SHIFT	16	/* Offset to data in EEPROM read/write registers */
+
+#define	WMREG_CTRL_EXT	0x0018	/* Extended Device Control Register */
+#define	CTRL_EXT_GPI_EN(x)	(1U << (x)) /* gpin interrupt enable */
+#define	CTRL_EXT_SWDPINS_SHIFT	4
+#define	CTRL_EXT_SWDPINS_MASK	0x0d
+#define	CTRL_EXT_SWDPIN(x)	(1U << (CTRL_EXT_SWDPINS_SHIFT + (x) - 4))
+#define	CTRL_EXT_SWDPIO_SHIFT	8
+#define	CTRL_EXT_SWDPIO_MASK	0x0d
+#define	CTRL_EXT_SWDPIO(x)	(1U << (CTRL_EXT_SWDPIO_SHIFT + (x) - 4))
+#define	CTRL_EXT_ASDCHK		(1U << 12) /* ASD check */
+#define	CTRL_EXT_EE_RST		(1U << 13) /* EEPROM reset */
+#define	CTRL_EXT_IPS		(1U << 14) /* invert power state bit 0 */
+#define	CTRL_EXT_SPD_BYPS	(1U << 15) /* speed select bypass */
+#define	CTRL_EXT_IPS1		(1U << 16) /* invert power state bit 1 */
+#define	CTRL_EXT_RO_DIS		(1U << 17) /* relaxed ordering disabled */
+#define	CTRL_EXT_LINK_MODE_MASK	0x00C00000
+#define	CTRL_EXT_LINK_MODE_GMII	0x00000000
+#define	CTRL_EXT_LINK_MODE_TBI	0x00C00000
+#define	CTRL_EXT_LINK_MODE_KMRN	0x00000000
+#define	CTRL_EXT_LINK_MODE_SERDES 0x00C00000
+
+
+#define	WMREG_MDIC	0x0020	/* MDI Control Register */
+#define	MDIC_DATA(x)	((x) & 0xffff)
+#define	MDIC_REGADD(x)	((x) << 16)
+#define	MDIC_PHYADD(x)	((x) << 21)
+#define	MDIC_OP_WRITE	(1U << 26)
+#define	MDIC_OP_READ	(2U << 26)
+#define	MDIC_READY	(1U << 28)
+#define	MDIC_I		(1U << 29)	/* interrupt on MDI complete */
+#define	MDIC_E		(1U << 30)	/* MDI error */
+
+#define	WMREG_FCAL	0x0028	/* Flow Control Address Low */
+#define	FCAL_CONST	0x00c28001	/* Flow Control MAC addr low */
+
+#define	WMREG_FCAH	0x002c	/* Flow Control Address High */
+#define	FCAH_CONST	0x00000100	/* Flow Control MAC addr high */
+
+#define	WMREG_FCT	0x0030	/* Flow Control Type */
+
+#define	WMREG_VET	0x0038	/* VLAN Ethertype */
+
+#define	WMREG_RAL_BASE	0x0040	/* Receive Address List */
+#define	WMREG_CORDOVA_RAL_BASE 0x5400
+#define	WMREG_RAL_LO(b, x) ((b) + ((x) << 3))
+#define	WMREG_RAL_HI(b, x) (WMREG_RAL_LO(b, x) + 4)
+	/*
+	 * Receive Address List: The LO part is the low-order 32-bits
+	 * of the MAC address.  The HI part is the high-order 16-bits
+	 * along with a few control bits.
+	 */
+#define	RAL_AS(x)	((x) << 16)	/* address select */
+#define	RAL_AS_DEST	RAL_AS(0)	/* (cordova?) */
+#define	RAL_AS_SOURCE	RAL_AS(1)	/* (cordova?) */
+#define	RAL_RDR1	(1U << 30)	/* put packet in alt. rx ring */
+#define	RAL_AV		(1U << 31)	/* entry is valid */
+
+#define	WM_RAL_TABSIZE	16
+#define	WM_ICH8_RAL_TABSIZE 7
+
+#define	WMREG_ICR	0x00c0	/* Interrupt Cause Register */
+#define	ICR_TXDW	(1U << 0)	/* Tx desc written back */
+#define	ICR_TXQE	(1U << 1)	/* Tx queue empty */
+#define	ICR_LSC		(1U << 2)	/* link status change */
+#define	ICR_RXSEQ	(1U << 3)	/* receive sequence error */
+#define	ICR_RXDMT0	(1U << 4)	/* Rx ring 0 nearly empty */
+#define	ICR_RXO		(1U << 6)	/* Rx overrun */
+#define	ICR_RXT0	(1U << 7)	/* Rx ring 0 timer */
+#define	ICR_MDAC	(1U << 9)	/* MDIO access complete */
+#define	ICR_RXCFG	(1U << 10)	/* Receiving /C/ */
+#define	ICR_GPI(x)	(1U << (x))	/* general purpose interrupts */
+#define	ICR_INT		(1U << 31)	/* device generated an interrupt */
+
+#define WMREG_ITR	0x00c4	/* Interrupt Throttling Register */
+#define ITR_IVAL_MASK	0xffff		/* Interval mask */
+#define ITR_IVAL_SHIFT	0		/* Interval shift */
+
+#define	WMREG_ICS	0x00c8	/* Interrupt Cause Set Register */
+	/* See ICR bits. */
+
+#define	WMREG_IMS	0x00d0	/* Interrupt Mask Set Register */
+	/* See ICR bits. */
+
+#define	WMREG_IMC	0x00d8	/* Interrupt Mask Clear Register */
+	/* See ICR bits. */
+
+#define	WMREG_RCTL	0x0100	/* Receive Control */
+#define	RCTL_EN		(1U << 1)	/* receiver enable */
+#define	RCTL_SBP	(1U << 2)	/* store bad packets */
+#define	RCTL_UPE	(1U << 3)	/* unicast promisc. enable */
+#define	RCTL_MPE	(1U << 4)	/* multicast promisc. enable */
+#define	RCTL_LPE	(1U << 5)	/* large packet enable */
+#define	RCTL_LBM(x)	((x) << 6)	/* loopback mode */
+#define	RCTL_LBM_NONE	RCTL_LBM(0)
+#define	RCTL_LBM_PHY	RCTL_LBM(3)
+#define	RCTL_RDMTS(x)	((x) << 8)	/* receive desc. min thresh size */
+#define	RCTL_RDMTS_1_2	RCTL_RDMTS(0)
+#define	RCTL_RDMTS_1_4	RCTL_RDMTS(1)
+#define	RCTL_RDMTS_1_8	RCTL_RDMTS(2)
+#define	RCTL_RDMTS_MASK	RCTL_RDMTS(3)
+#define	RCTL_MO(x)	((x) << 12)	/* multicast offset */
+#define	RCTL_BAM	(1U << 15)	/* broadcast accept mode */
+#define	RCTL_2k		(0 << 16)	/* 2k Rx buffers */
+#define	RCTL_1k		(1 << 16)	/* 1k Rx buffers */
+#define	RCTL_512	(2 << 16)	/* 512 byte Rx buffers */
+#define	RCTL_256	(3 << 16)	/* 256 byte Rx buffers */
+#define	RCTL_BSEX_16k	(1 << 16)	/* 16k Rx buffers (BSEX) */
+#define	RCTL_BSEX_8k	(2 << 16)	/* 8k Rx buffers (BSEX) */
+#define	RCTL_BSEX_4k	(3 << 16)	/* 4k Rx buffers (BSEX) */
+#define	RCTL_DPF	(1U << 22)	/* discard pause frames */
+#define	RCTL_PMCF	(1U << 23)	/* pass MAC control frames */
+#define	RCTL_BSEX	(1U << 25)	/* buffer size extension (Livengood) */
+#define	RCTL_SECRC	(1U << 26)	/* strip Ethernet CRC */
+
+#define	WMREG_OLD_RDTR0	0x0108	/* Receive Delay Timer (ring 0) */
+#define	WMREG_RDTR	0x2820
+#define	RDTR_FPD	(1U << 31)	/* flush partial descriptor */
+
+#define	WMREG_RADV	0x282c	/* Receive Interrupt Absolute Delay Timer */
+
+#define	WMREG_OLD_RDBAL0 0x0110	/* Receive Descriptor Base Low (ring 0) */
+#define	WMREG_RDBAL	0x2800
+
+#define	WMREG_OLD_RDBAH0 0x0114	/* Receive Descriptor Base High (ring 0) */
+#define	WMREG_RDBAH	0x2804
+
+#define	WMREG_OLD_RDLEN0 0x0118	/* Receive Descriptor Length (ring 0) */
+#define	WMREG_RDLEN	0x2808
+
+#define	WMREG_OLD_RDH0	0x0120	/* Receive Descriptor Head (ring 0) */
+#define	WMREG_RDH	0x2810
+
+#define	WMREG_OLD_RDT0	0x0128	/* Receive Descriptor Tail (ring 0) */
+#define	WMREG_RDT	0x2818
+
+#define	WMREG_RXDCTL	0x2828	/* Receive Descriptor Control */
+#define	RXDCTL_PTHRESH(x) ((x) << 0)	/* prefetch threshold */
+#define	RXDCTL_HTHRESH(x) ((x) << 8)	/* host threshold */
+#define	RXDCTL_WTHRESH(x) ((x) << 16)	/* write back threshold */
+#define	RXDCTL_GRAN	(1U << 24)	/* 0 = cacheline, 1 = descriptor */
+
+#define	WMREG_OLD_RDTR1	0x0130	/* Receive Delay Timer (ring 1) */
+
+#define	WMREG_OLD_RDBA1_LO 0x0138 /* Receive Descriptor Base Low (ring 1) */
+
+#define	WMREG_OLD_RDBA1_HI 0x013c /* Receive Descriptor Base High (ring 1) */
+
+#define	WMREG_OLD_RDLEN1 0x0140	/* Receive Drscriptor Length (ring 1) */
+
+#define	WMREG_OLD_RDH1	0x0148
+
+#define	WMREG_OLD_RDT1	0x0150
+
+#define	WMREG_OLD_FCRTH 0x0160	/* Flow Control Rx Threshold Hi (OLD) */
+#define	WMREG_FCRTL	0x2160	/* Flow Control Rx Threshold Lo */
+#define	FCRTH_DFLT	0x00008000
+
+#define	WMREG_OLD_FCRTL 0x0168	/* Flow Control Rx Threshold Lo (OLD) */
+#define	WMREG_FCRTH	0x2168	/* Flow Control Rx Threhsold Hi */
+#define	FCRTL_DFLT	0x00004000
+#define	FCRTL_XONE	0x80000000	/* Enable XON frame transmission */
+
+#define	WMREG_FCTTV	0x0170	/* Flow Control Transmit Timer Value */
+#define	FCTTV_DFLT	0x00000600
+
+#define	WMREG_TXCW	0x0178	/* Transmit Configuration Word (TBI mode) */
+	/* See MII ANAR_X bits. */
+#define	TXCW_TxConfig	(1U << 30)	/* Tx Config */
+#define	TXCW_ANE	(1U << 31)	/* Autonegotiate */
+
+#define	WMREG_RXCW	0x0180	/* Receive Configuration Word (TBI mode) */
+	/* See MII ANLPAR_X bits. */
+#define	RXCW_NC		(1U << 26)	/* no carrier */
+#define	RXCW_IV		(1U << 27)	/* config invalid */
+#define	RXCW_CC		(1U << 28)	/* config change */
+#define	RXCW_C		(1U << 29)	/* /C/ reception */
+#define	RXCW_SYNCH	(1U << 30)	/* synchronized */
+#define	RXCW_ANC	(1U << 31)	/* autonegotiation complete */
+
+#define	WMREG_MTA	0x0200	/* Multicast Table Array */
+#define	WMREG_CORDOVA_MTA 0x5200
+
+#define	WMREG_TCTL	0x0400	/* Transmit Control Register */
+#define	TCTL_EN		(1U << 1)	/* transmitter enable */
+#define	TCTL_PSP	(1U << 3)	/* pad short packets */
+#define	TCTL_CT(x)	(((x) & 0xff) << 4)   /* 4:11 - collision threshold */
+#define	TCTL_COLD(x)	(((x) & 0x3ff) << 12) /* 12:21 - collision distance */
+#define	TCTL_SWXOFF	(1U << 22)	/* software XOFF */
+#define	TCTL_RTLC	(1U << 24)	/* retransmit on late collision */
+#define	TCTL_NRTU	(1U << 25)	/* no retransmit on underrun */
+#define	TCTL_MULR	(1U << 28)	/* multiple request */
+
+#define	TX_COLLISION_THRESHOLD		15
+#define	TX_COLLISION_DISTANCE_HDX	512
+#define	TX_COLLISION_DISTANCE_FDX	64
+
+#define	WMREG_TCTL_EXT	0x0404	/* Transmit Control Register */
+#define	TCTL_EXT_BST_MASK	0x000003FF /* Backoff Slot Time */
+#define	TCTL_EXT_GCEX_MASK	0x000FFC00 /* Gigabit Carry Extend Padding */
+
+#define	DEFAULT_80003ES2LAN_TCTL_EXT_GCEX 0x00010000
+
+#define	WMREG_TQSA_LO	0x0408
+
+#define	WMREG_TQSA_HI	0x040c
+
+#define	WMREG_TIPG	0x0410	/* Transmit IPG Register */
+#define	TIPG_IPGT(x)	(x)		/* IPG transmit time */
+#define	TIPG_IPGR1(x)	((x) << 10)	/* IPG receive time 1 */
+#define	TIPG_IPGR2(x)	((x) << 20)	/* IPG receive time 2 */
+
+#define	TIPG_WM_DFLT	(TIPG_IPGT(0x0a) | TIPG_IPGR1(0x02) | TIPG_IPGR2(0x0a))
+#define	TIPG_LG_DFLT	(TIPG_IPGT(0x06) | TIPG_IPGR1(0x08) | TIPG_IPGR2(0x06))
+#define	TIPG_1000T_DFLT	(TIPG_IPGT(0x08) | TIPG_IPGR1(0x08) | TIPG_IPGR2(0x06))
+#define	TIPG_1000T_80003_DFLT \
+    (TIPG_IPGT(0x08) | TIPG_IPGR1(0x02) | TIPG_IPGR2(0x07))
+#define	TIPG_10_100_80003_DFLT \
+    (TIPG_IPGT(0x09) | TIPG_IPGR1(0x02) | TIPG_IPGR2(0x07))
+
+#define	WMREG_TQC	0x0418
+
+#define	WMREG_EEWR	0x102c	/* EEPROM write */
+
+#define	WMREG_RDFH	0x2410	/* Receive Data FIFO Head */
+
+#define	WMREG_RDFT	0x2418	/* Receive Data FIFO Tail */
+
+#define	WMREG_RDFHS	0x2420	/* Receive Data FIFO Head Saved */
+
+#define	WMREG_RDFTS	0x2428	/* Receive Data FIFO Tail Saved */
+
+#define	WMREG_TDFH	0x3410	/* Transmit Data FIFO Head */
+
+#define	WMREG_TDFT	0x3418	/* Transmit Data FIFO Tail */
+
+#define	WMREG_TDFHS	0x3420	/* Transmit Data FIFO Head Saved */
+
+#define	WMREG_TDFTS	0x3428	/* Transmit Data FIFO Tail Saved */
+
+#define	WMREG_TDFPC	0x3430	/* Transmit Data FIFO Packet Count */
+
+#define	WMREG_OLD_TBDAL	0x0420	/* Transmit Descriptor Base Lo */
+#define	WMREG_TBDAL	0x3800
+
+#define	WMREG_OLD_TBDAH	0x0424	/* Transmit Descriptor Base Hi */
+#define	WMREG_TBDAH	0x3804
+
+#define	WMREG_OLD_TDLEN	0x0428	/* Transmit Descriptor Length */
+#define	WMREG_TDLEN	0x3808
+
+#define	WMREG_OLD_TDH	0x0430	/* Transmit Descriptor Head */
+#define	WMREG_TDH	0x3810
+
+#define	WMREG_OLD_TDT	0x0438	/* Transmit Descriptor Tail */
+#define	WMREG_TDT	0x3818
+
+#define	WMREG_OLD_TIDV	0x0440	/* Transmit Delay Interrupt Value */
+#define	WMREG_TIDV	0x3820
+
+#define	WMREG_TXDCTL	0x3828	/* Trandmit Descriptor Control */
+#define	TXDCTL_PTHRESH(x) ((x) << 0)	/* prefetch threshold */
+#define	TXDCTL_HTHRESH(x) ((x) << 8)	/* host threshold */
+#define	TXDCTL_WTHRESH(x) ((x) << 16)	/* write back threshold */
+
+#define	WMREG_TADV	0x382c	/* Transmit Absolute Interrupt Delay Timer */
+
+#define	WMREG_AIT	0x0458	/* Adaptive IFS Throttle */
+
+#define	WMREG_VFTA	0x0600
+
+#define	WM_MC_TABSIZE	128
+#define	WM_ICH8_MC_TABSIZE 32
+#define	WM_VLAN_TABSIZE	128
+
+#define	WMREG_PBA	0x1000	/* Packet Buffer Allocation */
+#define	PBA_BYTE_SHIFT	10		/* KB -> bytes */
+#define	PBA_ADDR_SHIFT	7		/* KB -> quadwords */
+#define	PBA_8K		0x0008
+#define	PBA_12K		0x000c
+#define	PBA_16K		0x0010		/* 16K, default Tx allocation */
+#define	PBA_22K		0x0016
+#define	PBA_24K		0x0018
+#define	PBA_30K		0x001e
+#define	PBA_32K		0x0020
+#define	PBA_40K		0x0028
+#define	PBA_48K		0x0030		/* 48K, default Rx allocation */
+
+#define	WMREG_PBS	0x1000	/* Packet Buffer Size (ICH8 only ?) */
+
+#define	WMREG_TXDMAC	0x3000	/* Transfer DMA Control */
+#define	TXDMAC_DPP	(1U << 0)	/* disable packet prefetch */
+
+#define	WMREG_TSPMT	0x3830	/* TCP Segmentation Pad and Minimum
+				   Threshold (Cordova) */
+#define	TSPMT_TSMT(x)	(x)		/* TCP seg min transfer */
+#define	TSPMT_TSPBP(x)	((x) << 16)	/* TCP seg pkt buf padding */
+
+#define	WMREG_RXCSUM	0x5000	/* Receive Checksum register */
+#define	RXCSUM_PCSS	0x000000ff	/* Packet Checksum Start */
+#define	RXCSUM_IPOFL	(1U << 8)	/* IP checksum offload */
+#define	RXCSUM_TUOFL	(1U << 9)	/* TCP/UDP checksum offload */
+#define	RXCSUM_IPV6OFL	(1U << 10)	/* IPv6 checksum offload */
+
+#define	WMREG_RXERRC	0x400C	/* receive error Count - R/clr */
+#define	WMREG_COLC	0x4028	/* collision Count - R/clr */
+#define	WMREG_XONRXC	0x4048	/* XON Rx Count - R/clr */
+#define	WMREG_XONTXC	0x404c	/* XON Tx Count - R/clr */
+#define	WMREG_XOFFRXC	0x4050	/* XOFF Rx Count - R/clr */
+#define	WMREG_XOFFTXC	0x4054	/* XOFF Tx Count - R/clr */
+#define	WMREG_FCRUC	0x4058	/* Flow Control Rx Unsupported Count - R/clr */
+
+#define	WMREG_KUMCTRLSTA 0x0034	/* MAC-PHY interface - RW */
+#define	KUMCTRLSTA_MASK			0x0000FFFF
+#define	KUMCTRLSTA_OFFSET		0x001F0000
+#define	KUMCTRLSTA_OFFSET_SHIFT		16
+#define	KUMCTRLSTA_REN			0x00200000
+
+#define	KUMCTRLSTA_OFFSET_FIFO_CTRL	0x00000000
+#define	KUMCTRLSTA_OFFSET_CTRL		0x00000001
+#define	KUMCTRLSTA_OFFSET_INB_CTRL	0x00000002
+#define	KUMCTRLSTA_OFFSET_DIAG		0x00000003
+#define	KUMCTRLSTA_OFFSET_TIMEOUTS	0x00000004
+#define	KUMCTRLSTA_OFFSET_INB_PARAM	0x00000009
+#define	KUMCTRLSTA_OFFSET_HD_CTRL	0x00000010
+#define	KUMCTRLSTA_OFFSET_M2P_SERDES	0x0000001E
+#define	KUMCTRLSTA_OFFSET_M2P_MODES	0x0000001F
+
+/* FIFO Control */
+#define	KUMCTRLSTA_FIFO_CTRL_RX_BYPASS	0x00000008
+#define	KUMCTRLSTA_FIFO_CTRL_TX_BYPASS	0x00000800
+
+/* In-Band Control */
+#define	KUMCTRLSTA_INB_CTRL_LINK_TMOUT_DFLT 0x00000500
+#define	KUMCTRLSTA_INB_CTRL_DIS_PADDING	0x00000010
+
+/* Half-Duplex Control */
+#define	KUMCTRLSTA_HD_CTRL_10_100_DEFAULT 0x00000004
+#define	KUMCTRLSTA_HD_CTRL_1000_DEFAULT	0x00000000
+
+#define	WMREG_MDPHYA	0x003C	/* PHY address - RW */
+
+#define	WMREG_MANC2H	0x5860	/* Managment Control To Host - RW */
+
+#define	WMREG_SWSM	0x5b50	/* SW Semaphore */
+#define	SWSM_SMBI	0x00000001	/* Driver Semaphore bit */
+#define	SWSM_SWESMBI	0x00000002	/* FW Semaphore bit */
+#define	SWSM_WMNG	0x00000004	/* Wake MNG Clock */
+#define	SWSM_DRV_LOAD	0x00000008	/* Driver Loaded Bit */
+
+#define	WMREG_SW_FW_SYNC 0x5b5c	/* software-firmware semaphore */
+#define	SWFW_EEP_SM		0x0001 /* eeprom access */
+#define	SWFW_PHY0_SM		0x0002 /* first ctrl phy access */
+#define	SWFW_PHY1_SM		0x0004 /* second ctrl phy access */
+#define	SWFW_MAC_CSR_SM		0x0008
+#define	SWFW_SOFT_SHIFT		0	/* software semaphores */
+#define	SWFW_FIRM_SHIFT		16	/* firmware semaphores */
+
+#define WMREG_EXTCNFCTR		0x0f00  /* Extended Configuration Control */
+#define EXTCNFCTR_PCIE_WRITE_ENABLE	0x00000001
+#define EXTCNFCTR_PHY_WRITE_ENABLE	0x00000002
+#define EXTCNFCTR_D_UD_ENABLE		0x00000004
+#define EXTCNFCTR_D_UD_LATENCY		0x00000008
+#define EXTCNFCTR_D_UD_OWNER		0x00000010
+#define EXTCNFCTR_MDIO_SW_OWNERSHIP	0x00000020
+#define EXTCNFCTR_MDIO_HW_OWNERSHIP	0x00000040
+#define EXTCNFCTR_EXT_CNF_POINTER	0x0FFF0000
+#define E1000_EXTCNF_CTRL_SWFLAG	EXTCNFCTR_MDIO_SW_OWNERSHIP
+
+/* ich8 flash control */
+#define ICH_FLASH_COMMAND_TIMEOUT            5000    /* 5000 uSecs - adjusted */
+#define ICH_FLASH_ERASE_TIMEOUT              3000000 /* Up to 3 seconds - worst case */
+#define ICH_FLASH_CYCLE_REPEAT_COUNT         10      /* 10 cycles */
+#define ICH_FLASH_SEG_SIZE_256               256
+#define ICH_FLASH_SEG_SIZE_4K                4096
+#define ICH_FLASH_SEG_SIZE_64K               65536
+
+#define ICH_CYCLE_READ                       0x0
+#define ICH_CYCLE_RESERVED                   0x1
+#define ICH_CYCLE_WRITE                      0x2
+#define ICH_CYCLE_ERASE                      0x3
+
+#define ICH_FLASH_GFPREG   0x0000
+#define ICH_FLASH_HSFSTS   0x0004 /* Flash Status Register */
+#define HSFSTS_DONE		0x0001 /* Flash Cycle Done */
+#define HSFSTS_ERR		0x0002 /* Flash Cycle Error */
+#define HSFSTS_DAEL		0x0004 /* Direct Access error Log */
+#define HSFSTS_ERSZ_MASK	0x0018 /* Block/Sector Erase Size */
+#define HSFSTS_ERSZ_SHIFT	3
+#define HSFSTS_FLINPRO		0x0020 /* flash SPI cycle in Progress */
+#define HSFSTS_FLDVAL		0x4000 /* Flash Descriptor Valid */
+#define HSFSTS_FLLK		0x8000 /* Flash Configuration Lock-Down */
+#define ICH_FLASH_HSFCTL   0x0006 /* Flash control Register */
+#define HSFCTL_GO		0x0001 /* Flash Cycle Go */
+#define HSFCTL_CYCLE_MASK	0x0006 /* Flash Cycle */
+#define HSFCTL_CYCLE_SHIFT	1
+#define HSFCTL_BCOUNT_MASK	0x0300 /* Data Byte Count */
+#define HSFCTL_BCOUNT_SHIFT	8
+#define ICH_FLASH_FADDR    0x0008
+#define ICH_FLASH_FDATA0   0x0010
+#define ICH_FLASH_FRACC    0x0050
+#define ICH_FLASH_FREG0    0x0054
+#define ICH_FLASH_FREG1    0x0058
+#define ICH_FLASH_FREG2    0x005C
+#define ICH_FLASH_FREG3    0x0060
+#define ICH_FLASH_FPR0     0x0074
+#define ICH_FLASH_FPR1     0x0078
+#define ICH_FLASH_SSFSTS   0x0090
+#define ICH_FLASH_SSFCTL   0x0092
+#define ICH_FLASH_PREOP    0x0094
+#define ICH_FLASH_OPTYPE   0x0096
+#define ICH_FLASH_OPMENU   0x0098
+
+#define ICH_FLASH_REG_MAPSIZE      0x00A0
+#define ICH_FLASH_SECTOR_SIZE      4096
+#define ICH_GFPREG_BASE_MASK       0x1FFF
+#define ICH_FLASH_LINEAR_ADDR_MASK 0x00FFFFFF
+
+/* start of Kate Feng added */ 
+#define WMREG_GPTC      0x4080  /* Good packets transmitted count */
+#define WMREG_GPRC      0x4074  /* Good packets received count */
+#define WMREG_CRCERRS   0x4000  /* CRC Error Count */
+#define WMREG_RLEC      0x4040  /* Receive Length Error Count */
+/* end of Kate Feng added */

c/src/lib/libbsp/powerpc/mvme5500/network/if_1GHz/pci_map.c

@@ -0,0 +1,131 @@
+/*	$NetBSD: pci_map.c,v 1.12 2002/05/30 12:06:43 drochner Exp $	*/
+
+/*-
+ * Copyright (c) 2004, 2005  Brookhaven National  Laboratory
+ *               S. Kate Feng <feng1@bnl.gov>
+ *
+ * Copyright (c) 1998, 2000 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Charles M. Hannum; by William R. Studenmund; by Jason R. Thorpe. 
+ *
+ */
+
+/*
+ * PCI device mapping.
+ */
+
+#include <sys/cdefs.h>
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <rtems/rtems/types.h>
+
+#include <bsp/pci.h>
+#include <bsp/pcireg.h>
+
+int pci_io_find(int b, int d, int f, int reg,unsigned *basep,unsigned *sizep)
+{
+  uint32_t address, mask;
+
+  if (reg < PCI_MAPREG_START ||
+#if 0
+	    /*
+	     * Can't do this check; some devices have mapping registers
+	     * way out in left field.
+	     */
+	    reg >= PCI_MAPREG_END ||
+#endif
+	    (reg & 3))
+		rtems_panic("pci_io_find: bad request");
+
+  /*
+   * Section 6.2.5.1, `Address Maps', tells us that:
+   *
+   * 1) The builtin software should have already mapped the device in a
+   * reasonable way.
+   *
+   * 2) A device which wants 2^n bytes of memory will hardwire the bottom
+   * n bits of the address to 0.  As recommended, we write all 1s and see
+   * what we get back.
+   */
+  pci_read_config_dword(b,d,f,reg, &address);
+  if ( !(address & PCI_MAPREG_TYPE_IO)) return(1);
+  pci_write_config_dword(b,d,f,reg, 0xffffffff);
+  pci_read_config_dword(b,d,f,reg,&mask);
+  pci_write_config_dword(b,d,f,reg, address);
+
+  if ( (*sizep = PCI_MAPREG_IO_SIZE(mask))== 0) {
+     printk("pci_io_find: void region\n");
+     return(1);
+  }
+  *basep = PCI_MAPREG_IO_ADDR(address);
+  return(0);
+}
+
+int pci_mem_find(int b, int d, int f, int reg, unsigned *basep,unsigned *sizep)
+{
+  uint32_t address, mask;
+
+  if (reg < PCI_MAPREG_START ||
+#if 0
+	    /*
+	     * Can't do this check; some devices have mapping registers
+	     * way out in left field.
+	     */
+	    reg >= PCI_MAPREG_END ||
+#endif
+	    (reg & 3))
+      rtems_panic("pci_mem_find: bad request");
+
+  pci_read_config_dword(b,d,f,reg, &address);
+  if (address & PCI_MAPREG_TYPE_IO) {
+     printk("pci_mem_find: expected type mem, found I/O\n");
+     return(1);
+  }
+
+  /*
+   * Section 6.2.5.1, `Address Maps', tells us that:
+   *
+   * 1) The builtin software should have already mapped the device in a
+   * reasonable way.
+   *
+   * 2) A device which wants 2^n bytes of memory will hardwire the bottom
+   * n bits of the address to 0.  As recommended, we write all 1s and see
+   * what we get back.
+   */
+  pci_write_config_dword(b,d,f,reg, 0xffffffff);
+  pci_read_config_dword(b,d,f,reg,&mask);
+  pci_write_config_dword(b,d,f,reg, address);
+  if ( (*sizep = PCI_MAPREG_MEM_SIZE(mask))== 0) {
+     printk("pci_io_find: void region\n");
+     return (1);
+  }
+  *basep = PCI_MAPREG_MEM_ADDR(address);
+  return(0);
+}
+
+int pci_get_capability(int b, int d, int f, int capid,int *offset,uint32_t *value)
+{
+  uint32_t reg, ofs;
+
+  /*  i82544EI PCI_CAPLISTPTR_REG */
+  pci_read_config_dword(b,d,f,PCI_CAPLISTPTR_REG, &reg);   
+  ofs = PCI_CAPLIST_PTR(reg);
+  while (ofs != 0) {
+#ifdef DIAGNOSTIC
+    if ((ofs & 3) || (ofs < 0x40))
+       panic("pci_get_capability");
+#endif
+    pci_read_config_dword(b,d,f,ofs, &reg);
+    if (PCI_CAPLIST_CAP(reg) == capid) {
+       if (offset)
+	   *offset = ofs;
+       if (value)
+	   *value = reg;
+       return (1);
+    }
+    ofs = PCI_CAPLIST_NEXT(reg);
+  }
+  return (0);
+}

c/src/lib/libbsp/powerpc/mvme5500/network/if_1GHz/pcireg.h

@@ -0,0 +1,384 @@
+/*	$NetBSD: pcireg.h,v 1.44 2003/12/02 16:31:06 briggs Exp $	*/
+
+/*
+ * Copyright (c) 1995, 1996, 1999, 2000
+ *     Christopher G. Demetriou.  All rights reserved.
+ * Copyright (c) 1994, 1996 Charles M. Hannum.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by Charles M. Hannum.
+ * 4. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * PCI Class and Revision Register; defines type and revision of device.
+ */
+#define	PCI_CLASS_REG			0x08
+
+#define	PCI_CLASS_SHIFT				24
+#define	PCI_CLASS_MASK				0xff
+#define	PCI_CLASS(cr) \
+	    (((cr) >> PCI_CLASS_SHIFT) & PCI_CLASS_MASK)
+
+#define	PCI_SUBCLASS_SHIFT			16
+#define	PCI_SUBCLASS_MASK			0xff
+#define	PCI_SUBCLASS(cr) \
+	    (((cr) >> PCI_SUBCLASS_SHIFT) & PCI_SUBCLASS_MASK)
+
+#define	PCI_INTERFACE_SHIFT			8
+#define	PCI_INTERFACE_MASK			0xff
+#define	PCI_INTERFACE(cr) \
+	    (((cr) >> PCI_INTERFACE_SHIFT) & PCI_INTERFACE_MASK)
+
+#define	PCI_REVISION_SHIFT			0
+#define	PCI_REVISION_MASK			0xff
+#define	PCI_REVISION(cr) \
+	    (((cr) >> PCI_REVISION_SHIFT) & PCI_REVISION_MASK)
+
+#define	PCI_CLASS_CODE(mainclass, subclass, interface) \
+	    ((((mainclass) & PCI_CLASS_MASK) << PCI_CLASS_SHIFT) | \
+	     (((subclass) & PCI_SUBCLASS_MASK) << PCI_SUBCLASS_SHIFT) | \
+	     (((interface) & PCI_INTERFACE_MASK) << PCI_INTERFACE_SHIFT))
+
+/* base classes */
+#define	PCI_CLASS_PREHISTORIC			0x00
+#define	PCI_CLASS_MASS_STORAGE			0x01
+#define	PCI_CLASS_NETWORK			0x02
+#define	PCI_CLASS_DISPLAY			0x03
+#define	PCI_CLASS_MULTIMEDIA			0x04
+#define	PCI_CLASS_MEMORY			0x05
+#define	PCI_CLASS_BRIDGE			0x06
+#define	PCI_CLASS_COMMUNICATIONS		0x07
+#define	PCI_CLASS_SYSTEM			0x08
+#define	PCI_CLASS_INPUT				0x09
+#define	PCI_CLASS_DOCK				0x0a
+#define	PCI_CLASS_PROCESSOR			0x0b
+#define	PCI_CLASS_SERIALBUS			0x0c
+#define	PCI_CLASS_WIRELESS			0x0d
+#define	PCI_CLASS_I2O				0x0e
+#define	PCI_CLASS_SATCOM			0x0f
+#define	PCI_CLASS_CRYPTO			0x10
+#define	PCI_CLASS_DASP				0x11
+#define	PCI_CLASS_UNDEFINED			0xff
+
+/* 0x00 prehistoric subclasses */
+#define	PCI_SUBCLASS_PREHISTORIC_MISC		0x00
+#define	PCI_SUBCLASS_PREHISTORIC_VGA		0x01
+
+/* 0x01 mass storage subclasses */
+#define	PCI_SUBCLASS_MASS_STORAGE_SCSI		0x00
+#define	PCI_SUBCLASS_MASS_STORAGE_IDE		0x01
+#define	PCI_SUBCLASS_MASS_STORAGE_FLOPPY	0x02
+#define	PCI_SUBCLASS_MASS_STORAGE_IPI		0x03
+#define	PCI_SUBCLASS_MASS_STORAGE_RAID		0x04
+#define	PCI_SUBCLASS_MASS_STORAGE_ATA		0x05
+#define	PCI_SUBCLASS_MASS_STORAGE_SATA		0x06
+#define	PCI_SUBCLASS_MASS_STORAGE_MISC		0x80
+
+/* 0x02 network subclasses */
+#define	PCI_SUBCLASS_NETWORK_ETHERNET		0x00
+#define	PCI_SUBCLASS_NETWORK_TOKENRING		0x01
+#define	PCI_SUBCLASS_NETWORK_FDDI		0x02
+#define	PCI_SUBCLASS_NETWORK_ATM		0x03
+#define	PCI_SUBCLASS_NETWORK_ISDN		0x04
+#define	PCI_SUBCLASS_NETWORK_WORLDFIP		0x05
+#define	PCI_SUBCLASS_NETWORK_PCIMGMULTICOMP	0x06
+#define	PCI_SUBCLASS_NETWORK_MISC		0x80
+
+/* 0x03 display subclasses */
+#define	PCI_SUBCLASS_DISPLAY_VGA		0x00
+#define	PCI_SUBCLASS_DISPLAY_XGA		0x01
+#define	PCI_SUBCLASS_DISPLAY_3D			0x02
+#define	PCI_SUBCLASS_DISPLAY_MISC		0x80
+
+/* 0x04 multimedia subclasses */
+#define	PCI_SUBCLASS_MULTIMEDIA_VIDEO		0x00
+#define	PCI_SUBCLASS_MULTIMEDIA_AUDIO		0x01
+#define	PCI_SUBCLASS_MULTIMEDIA_TELEPHONY	0x02
+#define	PCI_SUBCLASS_MULTIMEDIA_MISC		0x80
+
+/* 0x05 memory subclasses */
+#define	PCI_SUBCLASS_MEMORY_RAM			0x00
+#define	PCI_SUBCLASS_MEMORY_FLASH		0x01
+#define	PCI_SUBCLASS_MEMORY_MISC		0x80
+
+/* 0x06 bridge subclasses */
+#define	PCI_SUBCLASS_BRIDGE_HOST		0x00
+#define	PCI_SUBCLASS_BRIDGE_ISA			0x01
+#define	PCI_SUBCLASS_BRIDGE_EISA		0x02
+#define	PCI_SUBCLASS_BRIDGE_MC			0x03	/* XXX _MCA? */
+#define	PCI_SUBCLASS_BRIDGE_PCI			0x04
+#define	PCI_SUBCLASS_BRIDGE_PCMCIA		0x05
+#define	PCI_SUBCLASS_BRIDGE_NUBUS		0x06
+#define	PCI_SUBCLASS_BRIDGE_CARDBUS		0x07
+#define	PCI_SUBCLASS_BRIDGE_RACEWAY		0x08
+#define	PCI_SUBCLASS_BRIDGE_STPCI		0x09
+#define	PCI_SUBCLASS_BRIDGE_INFINIBAND		0x0a
+#define	PCI_SUBCLASS_BRIDGE_MISC		0x80
+
+/* 0x07 communications subclasses */
+#define	PCI_SUBCLASS_COMMUNICATIONS_SERIAL	0x00
+#define	PCI_SUBCLASS_COMMUNICATIONS_PARALLEL	0x01
+#define	PCI_SUBCLASS_COMMUNICATIONS_MPSERIAL	0x02
+#define	PCI_SUBCLASS_COMMUNICATIONS_MODEM	0x03
+#define	PCI_SUBCLASS_COMMUNICATIONS_GPIB	0x04
+#define	PCI_SUBCLASS_COMMUNICATIONS_SMARTCARD	0x05
+#define	PCI_SUBCLASS_COMMUNICATIONS_MISC	0x80
+
+/* 0x08 system subclasses */
+#define	PCI_SUBCLASS_SYSTEM_PIC			0x00
+#define	PCI_SUBCLASS_SYSTEM_DMA			0x01
+#define	PCI_SUBCLASS_SYSTEM_TIMER		0x02
+#define	PCI_SUBCLASS_SYSTEM_RTC			0x03
+#define	PCI_SUBCLASS_SYSTEM_PCIHOTPLUG		0x04
+#define	PCI_SUBCLASS_SYSTEM_MISC		0x80
+
+/* 0x09 input subclasses */
+#define	PCI_SUBCLASS_INPUT_KEYBOARD		0x00
+#define	PCI_SUBCLASS_INPUT_DIGITIZER		0x01
+#define	PCI_SUBCLASS_INPUT_MOUSE		0x02
+#define	PCI_SUBCLASS_INPUT_SCANNER		0x03
+#define	PCI_SUBCLASS_INPUT_GAMEPORT		0x04
+#define	PCI_SUBCLASS_INPUT_MISC			0x80
+
+/* 0x0a dock subclasses */
+#define	PCI_SUBCLASS_DOCK_GENERIC		0x00
+#define	PCI_SUBCLASS_DOCK_MISC			0x80
+
+/* 0x0b processor subclasses */
+#define	PCI_SUBCLASS_PROCESSOR_386		0x00
+#define	PCI_SUBCLASS_PROCESSOR_486		0x01
+#define	PCI_SUBCLASS_PROCESSOR_PENTIUM		0x02
+#define	PCI_SUBCLASS_PROCESSOR_ALPHA		0x10
+#define	PCI_SUBCLASS_PROCESSOR_POWERPC		0x20
+#define	PCI_SUBCLASS_PROCESSOR_MIPS		0x30
+#define	PCI_SUBCLASS_PROCESSOR_COPROC		0x40
+
+/* 0x0c serial bus subclasses */
+#define	PCI_SUBCLASS_SERIALBUS_FIREWIRE		0x00
+#define	PCI_SUBCLASS_SERIALBUS_ACCESS		0x01
+#define	PCI_SUBCLASS_SERIALBUS_SSA		0x02
+#define	PCI_SUBCLASS_SERIALBUS_USB		0x03
+#define	PCI_SUBCLASS_SERIALBUS_FIBER		0x04	/* XXX _FIBRECHANNEL */
+#define	PCI_SUBCLASS_SERIALBUS_SMBUS		0x05
+#define	PCI_SUBCLASS_SERIALBUS_INFINIBAND	0x06
+#define	PCI_SUBCLASS_SERIALBUS_IPMI		0x07
+#define	PCI_SUBCLASS_SERIALBUS_SERCOS		0x08
+#define	PCI_SUBCLASS_SERIALBUS_CANBUS		0x09
+
+/* 0x0d wireless subclasses */
+#define	PCI_SUBCLASS_WIRELESS_IRDA		0x00
+#define	PCI_SUBCLASS_WIRELESS_CONSUMERIR	0x01
+#define	PCI_SUBCLASS_WIRELESS_RF		0x10
+#define	PCI_SUBCLASS_WIRELESS_BLUETOOTH		0x11
+#define	PCI_SUBCLASS_WIRELESS_BROADBAND		0x12
+#define	PCI_SUBCLASS_WIRELESS_802_11A		0x20
+#define	PCI_SUBCLASS_WIRELESS_802_11B		0x21
+#define	PCI_SUBCLASS_WIRELESS_MISC		0x80
+
+/* 0x0e I2O (Intelligent I/O) subclasses */
+#define	PCI_SUBCLASS_I2O_STANDARD		0x00
+
+/* 0x0f satellite communication subclasses */
+/*	PCI_SUBCLASS_SATCOM_???			0x00	/ * XXX ??? */
+#define	PCI_SUBCLASS_SATCOM_TV			0x01
+#define	PCI_SUBCLASS_SATCOM_AUDIO		0x02
+#define	PCI_SUBCLASS_SATCOM_VOICE		0x03
+#define	PCI_SUBCLASS_SATCOM_DATA		0x04
+
+/* 0x10 encryption/decryption subclasses */
+#define	PCI_SUBCLASS_CRYPTO_NETCOMP		0x00
+#define	PCI_SUBCLASS_CRYPTO_ENTERTAINMENT	0x10
+#define	PCI_SUBCLASS_CRYPTO_MISC		0x80
+
+/* 0x11 data acquisition and signal processing subclasses */
+#define	PCI_SUBCLASS_DASP_DPIO			0x00
+#define	PCI_SUBCLASS_DASP_TIMEFREQ		0x01
+#define	PCI_SUBCLASS_DASP_SYNC			0x10
+#define	PCI_SUBCLASS_DASP_MGMT			0x20
+#define	PCI_SUBCLASS_DASP_MISC			0x80
+
+/*
+ * PCI BIST/Header Type/Latency Timer/Cache Line Size Register.
+ */
+#define	PCI_BHLC_REG			0x0c
+
+#define	PCI_BIST_SHIFT				24
+#define	PCI_BIST_MASK				0xff
+#define	PCI_BIST(bhlcr) \
+	    (((bhlcr) >> PCI_BIST_SHIFT) & PCI_BIST_MASK)
+
+#define	PCI_HDRTYPE_SHIFT			16
+#define	PCI_HDRTYPE_MASK			0xff
+#define	PCI_HDRTYPE(bhlcr) \
+	    (((bhlcr) >> PCI_HDRTYPE_SHIFT) & PCI_HDRTYPE_MASK)
+
+#define	PCI_HDRTYPE_TYPE(bhlcr) \
+	    (PCI_HDRTYPE(bhlcr) & 0x7f)
+#define	PCI_HDRTYPE_MULTIFN(bhlcr) \
+	    ((PCI_HDRTYPE(bhlcr) & 0x80) != 0)
+
+#define	PCI_LATTIMER_SHIFT			8
+#define	PCI_LATTIMER_MASK			0xff
+#define	PCI_LATTIMER(bhlcr) \
+	    (((bhlcr) >> PCI_LATTIMER_SHIFT) & PCI_LATTIMER_MASK)
+
+#define	PCI_CACHELINE_SHIFT			0
+#define	PCI_CACHELINE_MASK			0xff
+#define	PCI_CACHELINE(bhlcr) \
+	    (((bhlcr) >> PCI_CACHELINE_SHIFT) & PCI_CACHELINE_MASK)
+
+#define PCI_BHLC_CODE(bist,type,multi,latency,cacheline)		\
+	    ((((bist) & PCI_BIST_MASK) << PCI_BIST_SHIFT) |		\
+	     (((type) & PCI_HDRTYPE_MASK) << PCI_HDRTYPE_SHIFT) |	\
+	     (((multi)?0x80:0) << PCI_HDRTYPE_SHIFT) |			\
+	     (((latency) & PCI_LATTIMER_MASK) << PCI_LATTIMER_SHIFT) |	\
+	     (((cacheline) & PCI_CACHELINE_MASK) << PCI_CACHELINE_SHIFT))
+
+/*
+ * PCI header type
+ */
+#define PCI_HDRTYPE_DEVICE	0
+#define PCI_HDRTYPE_PPB		1
+#define PCI_HDRTYPE_PCB		2
+
+/*
+ * Mapping registers
+ */
+#define	PCI_MAPREG_START		0x10
+#define	PCI_MAPREG_END			0x28
+#define	PCI_MAPREG_ROM			0x30
+#define	PCI_MAPREG_PPB_END		0x18
+#define	PCI_MAPREG_PCB_END		0x14
+
+#define	PCI_MAPREG_TYPE(mr)						\
+	    ((mr) & PCI_MAPREG_TYPE_MASK)
+#define	PCI_MAPREG_TYPE_MASK			0x00000001
+
+#define	PCI_MAPREG_TYPE_MEM			0x00000000
+#define	PCI_MAPREG_TYPE_IO			0x00000001
+#define	PCI_MAPREG_ROM_ENABLE			0x00000001
+
+#define	PCI_MAPREG_MEM_TYPE(mr)						\
+	    ((mr) & PCI_MAPREG_MEM_TYPE_MASK)
+#define	PCI_MAPREG_MEM_TYPE_MASK		0x00000006
+
+#define	PCI_MAPREG_MEM_TYPE_32BIT		0x00000000
+#define	PCI_MAPREG_MEM_TYPE_32BIT_1M		0x00000002
+#define	PCI_MAPREG_MEM_TYPE_64BIT		0x00000004
+
+#define	PCI_MAPREG_MEM_PREFETCHABLE(mr)				\
+	    (((mr) & PCI_MAPREG_MEM_PREFETCHABLE_MASK) != 0)
+#define	PCI_MAPREG_MEM_PREFETCHABLE_MASK	0x00000008
+
+#define	PCI_MAPREG_MEM_ADDR(mr)						\
+	    ((mr) & PCI_MAPREG_MEM_ADDR_MASK)
+#define	PCI_MAPREG_MEM_SIZE(mr)						\
+	    (PCI_MAPREG_MEM_ADDR(mr) & -PCI_MAPREG_MEM_ADDR(mr))
+#define	PCI_MAPREG_MEM_ADDR_MASK		0xfffffff0
+
+#define	PCI_MAPREG_MEM64_ADDR(mr)					\
+	    ((mr) & PCI_MAPREG_MEM64_ADDR_MASK)
+#define	PCI_MAPREG_MEM64_SIZE(mr)					\
+	    (PCI_MAPREG_MEM64_ADDR(mr) & -PCI_MAPREG_MEM64_ADDR(mr))
+#define	PCI_MAPREG_MEM64_ADDR_MASK		0xfffffffffffffff0ULL
+
+#define	PCI_MAPREG_IO_ADDR(mr)						\
+	    ((mr) & PCI_MAPREG_IO_ADDR_MASK)
+#define	PCI_MAPREG_IO_SIZE(mr)						\
+	    (PCI_MAPREG_IO_ADDR(mr) & -PCI_MAPREG_IO_ADDR(mr))
+#define	PCI_MAPREG_IO_ADDR_MASK			0xfffffffc
+
+#define PCI_MAPREG_SIZE_TO_MASK(size)					\
+	    (-(size))
+
+#define PCI_MAPREG_NUM(offset)						\
+	    (((unsigned)(offset)-PCI_MAPREG_START)/4)
+
+
+/*
+ * Cardbus CIS pointer (PCI rev. 2.1)
+ */
+#define PCI_CARDBUS_CIS_REG 0x28
+
+/*
+ * Subsystem identification register; contains a vendor ID and a device ID.
+ * Types/macros for PCI_ID_REG apply.
+ * (PCI rev. 2.1)
+ */
+#define PCI_SUBSYS_ID_REG 0x2c
+
+/*
+ * capabilities link list (PCI rev. 2.2)
+ */
+#define	PCI_CAPLISTPTR_REG		0x34	/* header type 0 */
+#define	PCI_CARDBUS_CAPLISTPTR_REG	0x14	/* header type 2 */
+#define	PCI_CAPLIST_PTR(cpr)	((cpr) & 0xff)
+#define	PCI_CAPLIST_NEXT(cr)	(((cr) >> 8) & 0xff)
+#define	PCI_CAPLIST_CAP(cr)	((cr) & 0xff)
+
+#define	PCI_CAP_RESERVED0	0x00
+#define	PCI_CAP_PWRMGMT		0x01
+#define	PCI_CAP_AGP		0x02
+#define	PCI_CAP_VPD		0x03
+#define	PCI_CAP_SLOTID		0x04
+#define	PCI_CAP_MSI		0x05
+#define	PCI_CAP_CPCI_HOTSWAP	0x06
+#define	PCI_CAP_PCIX		0x07
+#define	PCI_CAP_LDT		0x08
+#define	PCI_CAP_VENDSPEC	0x09
+#define	PCI_CAP_DEBUGPORT	0x0a
+#define	PCI_CAP_CPCI_RSRCCTL	0x0b
+#define	PCI_CAP_HOTPLUG		0x0c
+#define	PCI_CAP_AGP8		0x0e
+#define	PCI_CAP_SECURE		0x0f
+#define	PCI_CAP_PCIEXPRESS     	0x10
+#define	PCI_CAP_MSIX		0x11
+
+/*
+ * Vital Product Data; access via capability pointer (PCI rev 2.2).
+ */
+#define	PCI_VPD_ADDRESS_MASK	0x7fff
+#define	PCI_VPD_ADDRESS_SHIFT	16
+#define	PCI_VPD_ADDRESS(ofs)	\
+	(((ofs) & PCI_VPD_ADDRESS_MASK) << PCI_VPD_ADDRESS_SHIFT)
+#define	PCI_VPD_DATAREG(ofs)	((ofs) + 4)
+#define	PCI_VPD_OPFLAG		0x80000000
+
+/*
+ * Power Management Capability; access via capability pointer.
+ */
+
+/* Power Management Capability Register */
+#define PCI_PMCR		0x02
+#define PCI_PMCR_D1SUPP		0x0200
+#define PCI_PMCR_D2SUPP		0x0400
+/* Power Management Control Status Register */
+#define PCI_PMCSR		0x04
+#define PCI_PMCSR_STATE_MASK	0x03
+#define PCI_PMCSR_STATE_D0      0x00
+#define PCI_PMCSR_STATE_D1      0x01
+#define PCI_PMCSR_STATE_D2      0x02
+#define PCI_PMCSR_STATE_D3      0x03
+

c/src/lib/libbsp/powerpc/mvme5500/pci/pci.c

@@ -34,8 +34,8 @@
 #include <stdio.h>
 #include <string.h>
 
-/* #define PCI_DEBUG 1 */
-/* #define PCI_PRINT 1 */
+#define PCI_DEBUG 0
+#define PCI_PRINT 0
 
 /* allow for overriding these definitions */
 #ifndef PCI_CONFIG_ADDR
@@ -251,11 +251,6 @@ int pci_initialize()
   unsigned char ucBusNumber, ucSlotNumber, ucFnNumber, ucNumFuncs;
   unsigned int ulHeader;
   unsigned int pcidata, ulClass, ulDeviceID;
-#if PCI_DEBUG
-  unsigned short sdata;
-  unsigned int data;
-#endif
-
 
   pci_interface();
   

c/src/lib/libbsp/powerpc/mvme5500/pci/pci_interface.c

@@ -1,11 +1,15 @@
 /* pci_interface.c
  *
- * Copyright 2004, Brookhaven National Laboratory and
- *                 Shuchen Kate Feng <feng1@bnl.gov>
+ * Copyright 2004, 2006, 2007 All rights reserved. (NDA items)
+ *      Brookhaven National Laboratory and Shuchen Kate Feng <feng1@bnl.gov>
  *
  * The license and distribution terms for this file may be
  * found in the file LICENSE in this distribution.
  *
+ * 8/17/2006 : S. Kate Feng
+ *             uses in_le32()/out_le32(), instead of inl()/outl() so that
+ *             it is easier to be ported.
+ *
  */
 #include <libcpu/io.h>
 #include <rtems/bspIo.h>	    /* printk */
@@ -15,15 +19,16 @@
 #include <bsp/gtreg.h>
 #include <bsp/gtpcireg.h> 
 
+#define REG32_READ(reg) in_le32((volatile unsigned int *)(GT64260_REG_BASE+reg))
+#define REG32_WRITE(data, reg) out_le32((volatile unsigned int *)(GT64260_REG_BASE+reg), data)
+
 #define PCI_DEBUG     0
 
 /* Please reference the GT64260B datasheet, for the PCI interface, 
  * Synchronization Barriers and PCI ordering.
  *
  * Some PCI devices require Synchronization Barriers or PCI ordering
- * for synchronization.  For example, the VME-OMS58 motor controller we
- * used at NSLS requires either enhanced CPU Synchronization Barrier
- * or PCI-ordering (only one mechanism allowed. See section 11.1.2).
+ * for synchronization (only one mechanism allowed. See section 11.1.2).
  * To use the former mechanism(default), one needs to call 
  * CPU0_PciEnhanceSync() or CPU1_PciEnhanceSync() to perform software
  * synchronization between the CPU and PCI activities.
@@ -39,13 +44,12 @@
  * function correctly.
  *
  */
-#define PCI_ORDERING
+/*#define PCI_ORDERING*/
+
+#define EN_SYN_BAR   /* take MOTLoad default for enhanced SYN Barrier mode */
 
 /*#define PCI_DEADLOCK*/
 
-/*  So far, I do not see the need to disable the address pipelining.
-#define DIS_ADDR_PIPELINE*/
-
 #ifdef PCI_ORDERING
 #define PCI_ACCCTLBASEL_VALUE          0x01009000
 #else
@@ -86,40 +90,18 @@ void  pciAccessInit();
 
 void pci_interface()
 {
-  unsigned int data;
-
-#if  (defined(PCI_ORDERING)||defined(DIS_ADDR_PIPELINE))
-  data = inl(0); /* needed : read to flush */
-  /* MOTLOad default disables Configuration and I/O Read Sync Barrier 
-   * which is needed for enhanced CPU sync. barrier  */
-#ifdef PCI_ORDERING
-  /* enable Configuration Read Sync Barrier and IO read Sync Barrier*/
-  data &= ~ConfIOSBDis;
-#endif
-#ifdef DIS_ADDR_PIPELINE
-  data &= ~ADDR_PIPELINE;
-
-#if PCI_DEBUG
-  printk("data %x\n", data);
-#endif
-#endif
-  outl(data, 0);
-  /* read polling of the register until the new data is being read */
-  while ( inl(0)!=data);
-#endif
 
 #ifdef PCI_DEADLOCK
-  outl(0x07fff600, CNT_SYNC_REG);
+  REG32_WRITE(0x07fff600, CNT_SYNC_REG);
 #endif
 #ifdef PCI_ORDERING
-  outl(0xc0060002, DLOCK_ORDER_REG);
-  outl(0x07fff600, CNT_SYNC_REG);
-#else
-  outl(inl(PCI_CMD_CNTL)|PCI_COMMAND_SB_DIS, PCI_CMD_CNTL);
+  /* Let's leave this to be MOTLOad deafult : 0x80070000 
+     REG32_WRITE(0xc0070000, DLOCK_ORDER_REG);*/
+  /* Leave the CNT_SYNC_REG b/c MOTload default had the SyncBarMode set to 1 */
 #endif
 
   /* asserts SERR upon various detection */
-  outl(0x3fffff, 0xc28);
+  REG32_WRITE(0x3fffff, 0xc28);
 
   pciAccessInit();
 }
@@ -133,13 +115,14 @@ void pciAccessInit()
     /* MOTLoad combines the two banks of SDRAM into
      * one PCI access control because the top = 0x1ff
      */
-    data = inl(GT_SCS0_Low_Decode) & 0xfff; 
+    data = REG32_READ(GT_SCS0_Low_Decode) & 0xfff; 
     data |= PCI_ACCCTLBASEL_VALUE;
     data &= ~0x300000;
-    outl(data, PCI0_ACCESS_CNTL_BASE0_LOW+(PciLocal * 0x80));
+    REG32_WRITE(data, PCI0_ACCESS_CNTL_BASE0_LOW+(PciLocal * 0x80));
 #if PCI_DEBUG
-    printk("PCI%d_ACCESS_CNTL_BASE0_LOW 0x%x\n",PciLocal,inl(PCI_ACCESS_CNTL_BASE0_LOW+(PciLocal * 0x80))); 
+    printk("PCI%d_ACCESS_CNTL_BASE0_LOW 0x%x\n",PciLocal,REG32_READ(PCI_ACCESS_CNTL_BASE0_LOW+(PciLocal * 0x80))); 
 #endif
+
   }
 }
 
@@ -152,14 +135,14 @@ void pciAccessInit()
  */
 void CPU0_PciEnhanceSync(unsigned int syncVal)
 {
-  outl(syncVal,CPU0_SYNC_TRIGGER);
-  while (inl(CPU0_SYNC_VIRTUAL));
+  REG32_WRITE(syncVal,CPU0_SYNC_TRIGGER);
+  while (REG32_READ(CPU0_SYNC_VIRTUAL));
 }
 
 void CPU1_PciEnhanceSync(unsigned int syncVal)
 {
-  outl(syncVal,CPU1_SYNC_TRIGGER);
-  while (inl(CPU1_SYNC_VIRTUAL));
+  REG32_WRITE(syncVal,CPU1_SYNC_TRIGGER);
+  while (REG32_READ(CPU1_SYNC_VIRTUAL));
 }
 
 /* Currently, if PCI_ordering is used for synchronization, configuration

c/src/lib/libbsp/powerpc/mvme5500/pci/pcifinddevice.c

@@ -1,56 +1,11 @@
 /* pcifinddevice.c
  *
+ * Copyright 2001,  Till Straumann <strauman@slac.stanford.edu> 
  *
  * find a particular PCI device
  * (we assume, the firmware configured the PCI bus[es] for us)
  *
- */ 
-
-/* 
- * Authorship
- * ----------
- * This software was created by
- *     Till Straumann <strauman@slac.stanford.edu>, 2001,
- * 	   Stanford Linear Accelerator Center, Stanford University.
  * 
- * Acknowledgement of sponsorship
- * ------------------------------
- * This software was produced by
- *     the Stanford Linear Accelerator Center, Stanford University,
- * 	   under Contract DE-AC03-76SFO0515 with the Department of Energy.
- * 
- * Government disclaimer of liability
- * ----------------------------------
- * Neither the United States nor the United States Department of Energy,
- * nor any of their employees, makes any warranty, express or implied, or
- * assumes any legal liability or responsibility for the accuracy,
- * completeness, or usefulness of any data, apparatus, product, or process
- * disclosed, or represents that its use would not infringe privately owned
- * rights.
- * 
- * Stanford disclaimer of liability
- * --------------------------------
- * Stanford University makes no representations or warranties, express or
- * implied, nor assumes any liability for the use of this software.
- * 
- * Stanford disclaimer of copyright
- * --------------------------------
- * Stanford University, owner of the copyright, hereby disclaims its
- * copyright and all other rights in this software.  Hence, anyone may
- * freely use it for any purpose without restriction.  
- * 
- * Maintenance of notices
- * ----------------------
- * In the interest of clarity regarding the origin and status of this
- * SLAC software, this and all the preceding Stanford University notices
- * are to remain affixed to any copy or derivative of this software made
- * or distributed by the recipient and are to be affixed to any copy of
- * software made or distributed by the recipient that contains a copy or
- * derivative of this software.
- * 
- * ------------------ SLAC Software Notices, Set 4 OTT.002a, 2004 FEB 03
- */ 
-/*
  * Kate Feng <feng1@bnl.gov>, modified it to support the mvme5500 board.
  * 
  */

c/src/lib/libbsp/powerpc/mvme5500/preinstall.am

@@ -61,9 +61,9 @@ $(PROJECT_INCLUDE)/bsp/uart.h: ../../powerpc/shared/console/uart.h $(PROJECT_INC
 	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/uart.h
 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/uart.h
 
-$(PROJECT_INCLUDE)/bsp/vme_am_defs.h: ../../shared/vmeUniverse/vme_am_defs.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vme_am_defs.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vme_am_defs.h
+$(PROJECT_INCLUDE)/bsp/consoleIo.h: ../../powerpc/shared/console/consoleIo.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/consoleIo.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/consoleIo.h
 
 $(PROJECT_INCLUDE)/bsp/gtpcireg.h: pci/gtpcireg.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
 	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/gtpcireg.h
@@ -106,13 +106,21 @@ $(PROJECT_INCLUDE)/bsp/VPD.h: GT64260/VPD.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/VPD.h
 
 if HAS_NETWORKING
-$(PROJECT_INCLUDE)/bsp/GT64260eth.h: network/GT64260eth.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+$(PROJECT_INCLUDE)/bsp/GT64260eth.h: network/if_100MHz/GT64260eth.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
 	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/GT64260eth.h
 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/GT64260eth.h
 
-$(PROJECT_INCLUDE)/bsp/GT64260ethreg.h: network/GT64260ethreg.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+$(PROJECT_INCLUDE)/bsp/GT64260ethreg.h: network/if_100MHz/GT64260ethreg.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
 	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/GT64260ethreg.h
 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/GT64260ethreg.h
+
+$(PROJECT_INCLUDE)/bsp/if_wmreg.h: network/if_1GHz/if_wmreg.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/if_wmreg.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/if_wmreg.h
+
+$(PROJECT_INCLUDE)/bsp/pcireg.h: network/if_1GHz/pcireg.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/pcireg.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/pcireg.h
 endif
 $(PROJECT_INCLUDE)/bsp/VME.h: ../../shared/vmeUniverse/VME.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
 	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/VME.h
@@ -138,6 +146,10 @@ $(PROJECT_INCLUDE)/bsp/VMEDMA.h: ../../shared/vmeUniverse/VMEDMA.h $(PROJECT_INC
 	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/VMEDMA.h
 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/VMEDMA.h
 
+$(PROJECT_INCLUDE)/bsp/vme_am_defs.h: ../../shared/vmeUniverse/vme_am_defs.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vme_am_defs.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vme_am_defs.h
+
 $(PROJECT_LIB)/rtems_crti.$(OBJEXT): rtems_crti.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp)
 	$(INSTALL_DATA) $< $(PROJECT_LIB)/rtems_crti.$(OBJEXT)
 TMPINSTALL_FILES += $(PROJECT_LIB)/rtems_crti.$(OBJEXT)

c/src/lib/libbsp/powerpc/mvme5500/start/preload.S

@@ -1,9 +1,8 @@
 /*
- * Mini-loader for the SVGM and MVME5500 BSP.
+ * Mini-loader for the SVGM BSP.
  *
  * $Id$
  *
- * Copyright (C) 2003, 2004
  * Author: Till Straumann, 10/2001 <strauman@slac.stanford.edu>
  *
  * Some ideas are borrowed from the powerpc/shared/bootloader
@@ -11,9 +10,8 @@
  *  Copyright (C) 1998, 1999 Gabriel Paubert, paubert@iram.es
  *  Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
  *
- *
- * The SVGM firmware is unable to load the RTEMS image below
- * 0x2000 (I believe their stack is growing below 0x1000) ?
+ * The SMON firmware is unable to load the RTEMS image below
+ * 0x2000 (I believe their stack is growing below 0x1000).
  * 
  * The code provided by this file is responsible for the performing
  * the following steps:
@@ -23,13 +21,11 @@
  *       b) will not be overwritten by the moved image
  *          nor the final BSS segment (rtems clears BSS
  *          before saving the command line).
- *  2) Initialize and setup the memory controller to prepare the
- *     SDRAM before moving the image to it.
- *  3) Move the entire image (including this very file) to
+ *  2) Move the entire image (including this very file) to
  *     its final location starting at 0x0000.
  *     It is important to note that _NO_STACK_ is available
  *     during this step. Also, there is probably no return to
- *     Monitor because relocating RTEMS will destroy vital Monitor
+ *     SMON because relocating RTEMS will destroy vital SMON
  *     data (such as its stack).
  *  3) Flush the cache to make sure the relocated image is actually
  *     in memory.
@@ -44,10 +40,10 @@
  *
  *
  *  Calling convention:
- *     R1: Monitor SP
+ *     R1: SMON SP
  *     R3: command line string start
  *     R4: command line string end + 1
- *     R5: where Monitor put the image
+ *     R5: where SMON put the image
  *         if R5 is 0, the preloader will use its entry point
  *         as the image starting address.
  *         See NOTE below.
@@ -74,10 +70,7 @@
  *
  */
 #if 0
-/* TODO: I dont know where the appropriate CPU model is to be defined
- *       when including this to get PPC_CACHE_ALIGNMENT I get an error...
- */
-#include <rtems/score/ppc.h>
+#include <rtems/score/powerpc.h>
 #else
 #ifndef PPC_CACHE_ALIGNMENT
 #define PPC_CACHE_ALIGNMENT	32
@@ -90,8 +83,8 @@
 /* Note that major modifications may be needed
  * if DESTINATION_ADDR is not 0
  */
-#define KERNELBASE		0x0
-#define INITIAL_STACK		0x78			/* 8-byte aligned */
+#define KERNELBASE			0x0
+#define INITIAL_STACK		0x78					/* 8-byte aligned */
 #define CACHE_LINE_SIZE		PPC_CACHE_ALIGNMENT 	/* autodetect doesn't work, see below */
 #define	ASSUME_RTEMS_INSTALLS_VECTORS				/* assume we need not load vectors */
 #define DONT_USE_R5_ENTRY							/* always dynamically determine the address we're running from */
@@ -108,10 +101,8 @@ preload:
 	/* find out where we are */
 	bl	here
 here:
-	/* MOTLoad had MSR_EE turned on.  Disable it.*/
-	mfmsr   r0
-	xori    r0, r0, MSR_EE
-	mtmsr   r0               
+	xor		r0,r0,r0
+	mtmsr	r0	/* clear MSR to known state */
 	mflr	r5
 	addi	r5,r5,-(here-preload)
 	lis		r27,_edata@h
@@ -147,10 +138,9 @@ here:
 	add		r16, r5, r27	/* image end + 1 */
 	cmpw	r16, r18
 	bge		ishighenough
-	mr		r16,r18			/* __rtems_end is higher than
-	                                         * the image end
-					         * (without bss)
-					         */
+	mr		r16,r18			/* __rtems_end is higher than the image end
+							 * (without bss)
+							 */
 ishighenough:
 	cmpw	r16, r3 	    /* destination start > current string start ? */
 	ble		leaveparms		/* string already after dst, leave it */
@@ -165,7 +155,7 @@ leaveparms:
 	add		r7, r6, r17		/* destination + strlen */
 
 #ifndef CACHE_LINE_SIZE
-	/* Oh well, Monitor firmware has inhibited the cache, so this
+	/* Oh well, SMON has inhibited the cache, so this
 	 * nice routine doesn't work...
 	 */
 	/* figure out the cache line size */
@@ -187,7 +177,7 @@ leaveparms:
 	li		r16,CACHE_LINE_SIZE
 #endif
 	
-	lis		r3,preload@h
+    lis		r3,preload@h
 	ori		r3,r3,preload@l
 	mr		r4,r5			/* from-addr */
 	li		r5,_preload_size/* this is never > 16k */
@@ -218,19 +208,19 @@ return_here:
 	/* OK, now everything should be in place.
      * we are ready to start...
 	 */
-	/* R6: start of command line */
-	/* R7: end of command line +1 */
-	
+
 	/* setup initial stack for rtems early boot */
-	lis		r1, INITIAL_STACK
+	li		r1,INITIAL_STACK
 	/* disable the MMU and fire up rtems */
 	mfmsr	r0
-	ori 	r0,r0,MSR_IR|MSR_DR|MSR_IP
+	ori 	r0,r0,MSR_IR|MSR_DR|MSR_IP|MSR_ME
 	xori	r0,r0,MSR_IR|MSR_DR
 	mtsrr1	r0
 	lis		r0,__rtems_entry_point@h
 	ori		r0,r0,__rtems_entry_point@l
 	mtsrr0	r0
+	/* R6: start of command line */
+	/* R7: end of command line +1 */
 	rfi
 
     /* domove(to, from, nbytes):
@@ -238,7 +228,7 @@ return_here:
      * move a R5 bytes from R4 to R3 and flush
      * the caches for the destination memory
      * region. R16 provides the cache line size.
-     * DESTROYS: R0, R17, R18, CTR, CR
+	 * DESTROYS: R0, R17, R18, CTR, CR
      */
 domove:
 	addi	r0,r5,3			/* convert to word count */
@@ -258,18 +248,18 @@ domove:
 	beq		3f				/* nothing to do */
 #endif
 #if defined(CACHE_LINE_SIZE) && CACHE_LINE_SIZE > 0
-	add	r17,r3,r5		/* target end pointer */
+	add		r17,r3,r5		/* target end pointer */
 	subi	r0,r16,1
-	add	r17,r17,r0
+	add		r17,r17,r0
 	andc	r17,r17,r0		/* cache aligned target end pointer */
-	mr	r18,r3
+	mr		r18,r3
 2:	cmpw	r18,r17
 	dcbst	0,r18			/* write out data cache line */
 	icbi	0,r18			/* invalidate corresponding i-cache line */
-	add	r18,r18,r16
-	blt	2b
-	sync		               /*  make sure data is written back */
-	isync		               /*  invalidate possibly preloaded instructions */
+	add		r18,r18,r16
+	blt		2b
+	sync					/* make sure data is written back */
+	isync					/* invalidate possibly preloaded instructions */
 #endif
 3:
 	blr

c/src/lib/libbsp/powerpc/mvme5500/startup/bspclean.c

@@ -7,10 +7,12 @@
 void bsp_cleanup(void)
 {
 #if AUTO_BOOT
+  /* Till Straumann <strauman@slac.stanford.edu> for SVGM */
   void rtemsReboot();
 
   rtemsReboot();
 #else
+  /* Kate Feng <feng1@bnl.gov> for the MVME5500 */
   printk("\nPrinting a stack trace for your convenience :-)\n");
   CPU_print_stack();
   printk("RTEMS terminated; Boot manually or turn on AUTO_BOOT.\n");

c/src/lib/libbsp/powerpc/mvme5500/startup/bspstart.c

@@ -14,14 +14,13 @@
  *  Modified to support the MCP750.
  *  Modifications Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
  *
- *  Modified to support the Synergy VGM & Motorola PowerPC boards.
- *  Many thanks to Till Straumann for providing assistance to port the 
- *  BSP_pgtbl_xxx().
- *  (C) by Till Straumann, <strauman@slac.stanford.edu>, 2002, 2004
- *
- *  Modified to support the MVME5500 board
- *  (C) by S. Kate Feng <feng1@bnl.gov>, 2003, 2004
+ *  Modified to support the Synergy VGM & Motorola PowerPC boards
+ *  (C) by Till Straumann, <strauman@slac.stanford.edu>, 2002, 2004, 2005
  *
+ *  Modified to support the MVME5500 board.
+ *  Also, the settings of L1, L2, and L3 caches is not necessary here.
+ *  (C) by Brookhaven National Lab., S. Kate Feng <feng1@bnl.gov>, 2003, 2004, 2005
+ *  
  *  $Id$
  */
 
@@ -62,19 +61,11 @@
 /* there is no public Workspace_Free() variant :-( */
 #include <rtems/score/wkspace.h>
 
-uint32_t
-_bsp_sbrk_init(uint32_t heap_start, uint32_t *heap_size_p);
-
-/* provide access to the command line parameters */
-char *BSP_commandline_string = 0;
-
 BSP_output_char_function_type BSP_output_char = BSP_output_char_via_serial;
 
 extern void _return_to_ppcbug();
 extern unsigned long __rtems_end[];
-extern void L1_caches_enables();
 extern unsigned get_L1CR(), get_L2CR(), get_L3CR();
-extern unsigned set_L2CR(unsigned);
 extern void bsp_cleanup(void);
 extern Triv121PgTbl BSP_pgtbl_setup();
 extern void BSP_pgtbl_activate();
@@ -112,6 +103,11 @@ unsigned int BSP_mem_size;
 /*
  * PCI Bus Frequency
  */
+/*
+ * Start of the heap
+ */
+unsigned int BSP_heap_start;
+
 unsigned int BSP_bus_frequency;
 /*
  * processor clock frequency
@@ -123,23 +119,17 @@ unsigned int BSP_processor_frequency;
 unsigned int BSP_time_base_divisor;
 unsigned char ConfVPD_buff[200];
 
+#define CMDLINE_BUF_SIZE	2048
+
+static char cmdline_buf[CMDLINE_BUF_SIZE];
+char *BSP_commandline_string = cmdline_buf;
+
 /*
  * system init stack and soft ir stack size
  */
 #define INIT_STACK_SIZE 0x1000
 #define INTR_STACK_SIZE CONFIGURE_INTERRUPT_STACK_MEMORY
 
-/* calculate the heap start */
-static unsigned long
-heapStart(void)
-{
-unsigned long rval;
-    rval = ((uint32_t) __rtems_end) +INIT_STACK_SIZE + INTR_STACK_SIZE;
-    if (rval & (CPU_ALIGNMENT-1))
-        rval = (rval + CPU_ALIGNMENT) & ~(CPU_ALIGNMENT-1);
-	return rval;
-}
-
 void BSP_panic(char *s)
 {
   printk("%s PANIC %s\n",_RTEMS_version, s);
@@ -173,40 +163,7 @@ extern void bsp_postdriver_hook(void); /* see c/src/lib/libbsp/shared/bsppost.c
 
 extern void bsp_libc_init( void *, uint32_t, int );
 
-/*
- *  Function:   bsp_pretasking_hook
- *  Created:    95/03/10
- *
- *  Description:
- *      BSP pretasking hook.  Called just before drivers are initialized.
- *      Used to setup libc and install any BSP extensions.
- *
- *  NOTES:
- *      Must not use libc (to do io) from here, since drivers are
- *      not yet initialized.
- *
- */
-
-void bsp_pretasking_hook(void)
-{
-    uint32_t        heap_start=heapStart();    
-    uint32_t        heap_size,heap_sbrk_spared;
-    extern uint32_t _bsp_sbrk_init(uint32_t, uint32_t*);
-
-    heap_size = (BSP_mem_size - heap_start) - BSP_Configuration.work_space_size;
-
-    heap_sbrk_spared=_bsp_sbrk_init(heap_start, &heap_size);
-
-#ifdef SHOW_MORE_INIT_SETTINGS
-   	printk(" HEAP start %x  size %x (%x bytes spared for sbrk)\n", heap_start, heap_size, heap_sbrk_spared);
-#endif    
-
-    bsp_libc_init((void *) 0, heap_size, heap_sbrk_spared);
-
-#ifdef RTEMS_DEBUG
-    rtems_debug_enable( RTEMS_DEBUG_ALL_MASK );
-#endif
-}
+extern void bsp_pretasking_hook(void);
 
 void zero_bss()
 {
@@ -257,65 +214,12 @@ void
 save_boot_params(void *r3, void *r4, void* r5, char *cmdline_start, char *cmdline_end)
 {
 int		i=cmdline_end-cmdline_start;
-CmdLine future_heap=(CmdLine)heapStart();
-
- 	/* get the string out of the stack area into the future heap region;
-	 * assume there's enough memory...
-	 */
-	memmove(future_heap->buf,cmdline_start,i);
-	/* make sure there's an end of string marker */
-	future_heap->buf[i++]=0;
-	future_heap->size=i;
-}
-
-
-/* Configure and enable the L3CR */
-void config_enable_L3CR(unsigned l3cr)
-{
-	unsigned x;
-
-	/* By The Book (numbered steps from section 3.7.3.1 of MPC7450UM) */				
-	/*
-	 * 1: Set all L3CR bits for final config except L3E, L3I, L3PE, and
-	 *    L3CLKEN.  (also mask off reserved bits in case they were included
-	 *    in L3CR_CONFIG)
-	 */
-	l3cr &= ~(L3CR_L3E|L3CR_L3I|L3CR_LOCK_745x|L3CR_L3PE|L3CR_L3CLKEN|L3CR_RESERVED);
-	mtspr(L3CR, l3cr);
-
-	/* 2: Set L3CR[5] (otherwise reserved bit) to 1 */
-	l3cr |= 0x04000000;
-	mtspr(L3CR, l3cr);
-
-	/* 3: Set L3CLKEN to 1*/
-	l3cr |= L3CR_L3CLKEN;
-	mtspr(L3CR, l3cr);
-
-	/* 4/5: Perform a global cache invalidate (ref section 3.7.3.6) */
-	__asm __volatile("dssall;sync");
-	/* L3 cache is already disabled, no need to clear L3E */
-	mtspr(L3CR, l3cr|L3CR_L3I);
-
-	do {
-	       x = mfspr(L3CR);
-	} while (x & L3CR_L3I);
-	
-	/* 6: Clear L3CLKEN to 0 */
-	l3cr &= ~L3CR_L3CLKEN;
-	mtspr(L3CR, l3cr);
-
-	/* 7: Perform a 'sync' and wait at least 100 CPU cycles */
-	__asm __volatile("sync");
-	rtems_bsp_delay_in_bus_cycles(100);
-
-	/* 8: Set L3E and L3CLKEN */
-	l3cr |= (L3CR_L3E|L3CR_L3CLKEN);
-	mtspr(L3CR, l3cr);
-
-	/* 9: Perform a 'sync' and wait at least 100 CPU cycles */
-	__asm __volatile("sync");
-
-	rtems_bsp_delay_in_bus_cycles(100);
+	if ( i >= CMDLINE_BUF_SIZE )
+		i = CMDLINE_BUF_SIZE-1;
+	else if ( i < 0 )
+		i = 0;
+        memmove(cmdline_buf, cmdline_start, i);
+	cmdline_buf[i]=0;
 }
 
 /*
@@ -346,6 +250,24 @@ void bsp_start( void )
   ppc_cpu_id_t myCpu;
   ppc_cpu_revision_t myCpuRevision;
   Triv121PgTbl	pt=0;
+
+  /* Till Straumann: 4/2005
+   * Need to map the system registers early, so we can printk...
+   * (otherwise we silently die)
+   */
+  /*
+   * Kate Feng : PCI 0 domain memory space, want to leave room for the VME window 
+   */
+  setdbat(2, PCI0_MEM_BASE, PCI0_MEM_BASE, 0x10000000, IO_PAGE);
+
+  /* Till Straumann: 2004
+   * map the PCI 0, 1 Domain I/O space, GT64260B registers
+   * and the reserved area so that the size is the power of 2.
+   * 
+   */
+  setdbat(3,PCI0_IO_BASE, PCI0_IO_BASE, 0x2000000, IO_PAGE);
+
+
   /*
    * Get CPU identification dynamically. Note that the get_ppc_cpu_type() function
    * store the result in global variables so that it can be used latter...
@@ -353,15 +275,6 @@ void bsp_start( void )
   myCpu 	= get_ppc_cpu_type();
   myCpuRevision = get_ppc_cpu_revision();
 
-  /*
-   * enables L1 Cache. Note that the L1_caches_enables() codes checks for
-   * relevant CPU type so that the reason why there is no use of myCpu...
-   *
-   * MOTLoad default is good. Otherwise, one would have to disable L2, L3
-   * first before settting L1.  Then L1->L2->L3.
-   * 
-   L1_caches_enables();*/
-  
 #ifdef SHOW_LCR1_REGISTER
   l1cr = get_L1CR();
   printk("Initial L1CR value = %x\n", l1cr); 
@@ -390,8 +303,8 @@ void bsp_start( void )
    * This could be done latter (e.g in IRQ_INIT) but it helps to understand
    * some settings below...
    */
-  intrStack = ((uint32_t) __rtems_end) + 
-          INIT_STACK_SIZE + INTR_STACK_SIZE - PPC_MINIMUM_STACK_FRAME_SIZE;
+  BSP_heap_start = ((uint32_t) __rtems_end) + INIT_STACK_SIZE + INTR_STACK_SIZE;
+  intrStack = BSP_heap_start - PPC_MINIMUM_STACK_FRAME_SIZE;
 
   /* make sure it's properly aligned */
   intrStack &= ~(CPU_STACK_ALIGNMENT-1);
@@ -414,16 +327,6 @@ void bsp_start( void )
    * access
    * More PCI1 memory mapping to be done after BSP_pgtbl_activate.
    */
-  /*
-   * PCI 0 domain memory space, want to leave room for the VME window 
-   */
-  setdbat(2, PCI0_MEM_BASE, PCI0_MEM_BASE, 0x10000000, IO_PAGE);
-
-  /* map the PCI 0, 1 Domain I/O space, GT64260B registers
-   * and the reserved area so that the size is the power of 2.
-   */
-  setdbat(3,PCI0_IO_BASE, PCI0_IO_BASE, 0x2000000, IO_PAGE);
-
   printk("-----------------------------------------\n");
   printk("Welcome to %s on MVME5500-0163\n", _RTEMS_version );
   printk("-----------------------------------------\n");
@@ -485,7 +388,7 @@ void bsp_start( void )
   /* P94 : 7455 TB/DECR is clocked by the system bus clock frequency */
   Cpu_table.clicks_per_usec 	 = BSP_bus_frequency/(BSP_time_base_divisor * 1000);
   Cpu_table.exceptions_in_RAM 	 = TRUE;
-  _CPU_Table                     = Cpu_table;/* <skf> for rtems_bsp_delay() */
+  _CPU_Table                     = Cpu_table;/* S. Kate Feng <feng1@bnl.gov>, for rtems_bsp_delay() */
 
   printk("BSP_Configuration.work_space_size = %x\n", BSP_Configuration.work_space_size); 
   work_space_start = 
@@ -503,50 +406,10 @@ void bsp_start( void )
    */
    BSP_rtems_irq_mng_init(0);
 
-  /*
-   * Enable L2 Cache. Note that the set_L2CR(L2CR) codes checks for
-   * relevant CPU type (mpc750)...
-   *
-   * It also takes care of flushing the cache under certain conditions:
-   *   current    going to (E==enable, I==invalidate)
-   *     E           E | I	-> __NOT_FLUSHED_, invalidated, stays E
-   *     E               I	-> flush & disable, invalidate
-   *     E           E		-> nothing, stays E
-   *     0           E | I	-> not flushed, invalidated, enabled
-   *     0             | I	-> not flushed, invalidated, stays off
-   *     0           E      -> not flushed, _NO_INVALIDATE, enabled
-   *
-   * The first and the last combinations are potentially dangerous!
-   *
-   * NOTE: we assume the essential cache parameters (speed, size etc.)
-   *       have been set correctly by the firmware!
-   *
-   */
 #ifdef SHOW_LCR2_REGISTER
   l2cr = get_L2CR();
   printk("Initial L2CR value = %x\n", l2cr);
 #endif  
-#if 0
-  /* Again, MOTload setup seems to be fine. Otherwise, one would
-   * have to disable the L3 cahce, then R2 ->R3
-   */
-  if ( -1 != (int)l2cr ) {
-	/* -1 would mean that this machine doesn't support L2 */
-
-	l2cr &= ~( L2CR_LOCK_745x); /* clear 'data only' and 'instruction only' */
-	l2cr |= L2CR_L3OH0;    /* L3 output hold 0 should be set */
-	if ( ! (l2cr & L2CR_L2E) ) {
-	    /* we are going to enable the L2 - hence we
-	     * MUST invalidate it first; however, if
-	     * it was enabled already, we MUST NOT
-	     * invalidate it!!
-	     */
-	     l2cr |= L2CR_L2E | L2CR_L2I;
-	     l2cr=set_L2CR(l2cr);
-        }
-	l2cr=set_L2CR(l2cr);
-  }
-#endif
 
 #ifdef SHOW_LCR3_REGISTER
   /* L3CR needs DEC int. handler installed for bsp_delay()*/
@@ -554,22 +417,6 @@ void bsp_start( void )
   printk("Initial L3CR value = %x\n", l3cr);
 #endif  
 
-#if 0 
-  /* Again, use the MOTLoad default for L3CR again */
-  if ( -1 != (int)l3cr ) {
- 	/* -1 would mean that this machine doesn't support L3 */
-        /* BSD : %2 , SDRAM late wirte
-	   l3cr |= L3SIZ_2M|L3CLK_20|L3RT_PIPELINE_LATE; */
-        /* MOTLOad :0xDF826000-> %5, 4 clocks sample point,3 p-clocks SP */
-        l3cr |= L3CR_L3PE| L3SIZ_2M|L3CLK_50|L3CKSP_4|L3PSP_3;
-
-	/* TOCHECK MOTload had L2 cache enabled, try to set nothing first */
-	if ( !(l3cr & L3CR_L3E)) {
-           l3cr |= L3CR_L3E | L3CR_L3I;
-	   config_enable_L3CR(l3cr);
-        }
-  }
-#endif
 
   /* Activate the page table mappings only after
    * initializing interrupts because the irq_mng_init()
@@ -604,19 +451,6 @@ void bsp_start( void )
    */
   _BSP_clear_hostbridge_errors(0, 1 /*quiet*/);
 
-  /*
-   * Initialize VME bridge - needs working PCI
-   * and IRQ subsystems...
-   */
-#ifdef SHOW_MORE_INIT_SETTINGS
-  printk("Going to initialize VME bridge\n");
-#endif
-  /* VME initialization is in a separate file so apps which don't use
-   * VME or want a different configuration may link against a customized
-   * routine.
-   */
-  BSP_vme_config();
-
   /* Read Configuration Vital Product Data (VPD) */
   if ( I2Cread_eeprom(0xa8, 4,2, &ConfVPD_buff[0], 150))
      printk("I2Cread_eeprom() error \n");

c/src/lib/libbsp/powerpc/mvme5500/startup/pgtbl_activate.c

@@ -9,52 +9,8 @@
  * default activation procedure.
  */
 
-/* 
- * Authorship
- * ----------
- * This software was created by
- *     Till Straumann <strauman@slac.stanford.edu>, 4/2002,
- * 	   Stanford Linear Accelerator Center, Stanford University.
- * 
- * Acknowledgement of sponsorship
- * ------------------------------
- * This software was produced by
- *     the Stanford Linear Accelerator Center, Stanford University,
- * 	   under Contract DE-AC03-76SFO0515 with the Department of Energy.
- * 
- * Government disclaimer of liability
- * ----------------------------------
- * Neither the United States nor the United States Department of Energy,
- * nor any of their employees, makes any warranty, express or implied, or
- * assumes any legal liability or responsibility for the accuracy,
- * completeness, or usefulness of any data, apparatus, product, or process
- * disclosed, or represents that its use would not infringe privately owned
- * rights.
- * 
- * Stanford disclaimer of liability
- * --------------------------------
- * Stanford University makes no representations or warranties, express or
- * implied, nor assumes any liability for the use of this software.
- * 
- * Stanford disclaimer of copyright
- * --------------------------------
- * Stanford University, owner of the copyright, hereby disclaims its
- * copyright and all other rights in this software.  Hence, anyone may
- * freely use it for any purpose without restriction.  
- * 
- * Maintenance of notices
- * ----------------------
- * In the interest of clarity regarding the origin and status of this
- * SLAC software, this and all the preceding Stanford University notices
- * are to remain affixed to any copy or derivative of this software made
- * or distributed by the recipient and are to be affixed to any copy of
- * software made or distributed by the recipient that contains a copy or
- * derivative of this software.
- * 
- * ------------------ SLAC Software Notices, Set 4 OTT.002a, 2004 FEB 03
- */ 
-
-/* Kate Feng <feng1@bnl.gov> ported it to MVME5500, 4/2004
+/* Author: Till Straumann, <strauman@slac.stanford.edu>, 4/2002 
+ * Kate Feng <feng1@bnl.gov> ported it to MVME5500, 4/2004
  */
 
 void

c/src/lib/libbsp/powerpc/mvme5500/startup/reboot.c

@@ -7,10 +7,10 @@
 void rtemsReboot()
 {
 
-  printk("\nPrinting a stack trace for your convenience :-)\n");
+  printk("Printing a stack trace for your convenience :-)\n");
   CPU_print_stack();
 
   printk("RTEMS terminated; Rebooting ...\n");
-  /* Mvme5500 board reset  <skf> */
+  /* Mvme5500 board reset : 2004 S. Kate Feng <feng1@bnl.gov>  */
   out_8((volatile unsigned char*) (GT64260_DEV1_BASE +2), 0x80);
 }

c/src/lib/libbsp/powerpc/psim/tools/runtest

@@ -151,7 +151,7 @@ do
 
    case $tname in
        # size is no longer interactive.
-       monitor*| termios*| fileio*)
+       monitor* | termios* | fileio* | pppd*)
             if [ $run_to_completion = "yes" ]
             then
                  warn "Skipping $tname; it is interactive"

c/src/lib/libbsp/sh/ChangeLog

@@ -1,3 +1,7 @@
+2007-04-17	Joel Sherrill <joel@OARcorp.com>
+
+	* simsh4/tools/runtest.in: Do not run pppd.exe from batch mode script.
+
 2006-12-02	Ralf Corsépius <ralf.corsepius@rtems.org>
 
 	* configure.ac: New BUG-REPORT address.

c/src/lib/libbsp/sh/simsh4/tools/runtest.in

@@ -133,7 +133,7 @@ do
 
    case "$tname" in
        # size is no longer interactive.
-       monitor* | termios* | fileio*)
+       monitor* | termios* | fileio* | pppd*)
             warn "Skipping $tname; it is interactive"
             continue
             ;;

c/src/lib/libbsp/shared/ChangeLog

@@ -1,3 +1,7 @@
+2007-07-15	Till Straumann <strauman@slac.stanford.edu>
+
+	* vmeUniverse/vmeTsi148.c: Use size_t for sizes.
+
 2007-04-02	Joel Sherrill <joel@OARcorp.com>
 
 	* dummy_printk_support.c: New file.

c/src/lib/libbsp/shared/vmeUniverse/vmeTsi148.c

@@ -1904,7 +1904,7 @@ rtems_id			q = 0;
 int					installed = 0;
 int					i, err = 0;
 int					doDisable = 0;
-uint32_t			size;
+size_t				size;
 unsigned long		msg;
 char *				irqfmt  = "VME IRQ @vector %3i %s";
 char *				iackfmt = "VME IACK            %s";

c/src/lib/libbsp/sparc/ChangeLog

@@ -1,3 +1,8 @@
+2007-04-17	Joel Sherrill <joel@OARcorp.com>
+
+	* erc32/tools/runtest.in, leon2/tools/runtest.in,
+	leon3/tools/runtest.in: Do not run pppd.exe from batch mode script.
+
 2006-12-02	Ralf Corsépius <ralf.corsepius@rtems.org>
 
 	* configure.ac: New BUG-REPORT address.

c/src/lib/libbsp/sparc/erc32/tools/runtest.in

@@ -2,7 +2,7 @@
 #
 #  $Id$
 #
-# Run rtems tests on the hppa simulator
+# Run rtems tests on the SPARC simulator includeed with GDB
 # This program generates a simulator script to run each test
 # Typically the test is then run, although it can be generated
 # and left as a file using -s
@@ -131,7 +131,7 @@ do
    TEST_TYPE="single"
 
    case $tname in
-       monitor* | termios* | fileio*)
+       monitor* | termios* | fileio* | pppd*)
            if [ $run_to_completion = "yes" ]
            then
                 warn "Skipping $tname; it is interactive"

c/src/lib/libbsp/sparc/leon2/tools/runtest.in

@@ -131,7 +131,7 @@ do
    TEST_TYPE="single"
 
    case $tname in
-       monitor* | termios* | fileio*)
+       monitor* | termios* | fileio* | pppd*)
            if [ $run_to_completion = "yes" ]
            then
                 warn "Skipping $tname; it is interactive"

c/src/lib/libbsp/sparc/leon3/tools/runtest.in

@@ -131,7 +131,7 @@ do
    TEST_TYPE="single"
 
    case $tname in
-       monitor* | termios* | fileio*)
+       monitor* | termios* | fileio* | pppd*)
            if [ $run_to_completion = "yes" ]
            then
                 warn "Skipping $tname; it is interactive"

c/src/lib/libbsp/unix/ChangeLog

@@ -1,3 +1,7 @@
+2007-04-17	Joel Sherrill <joel@OARcorp.com>
+
+	* posix/tools/runtest.in: Do not run pppd.exe from batch mode script.
+
 2006-12-02	Ralf Corsépius <ralf.corsepius@rtems.org>
 
 	* configure.ac: New BUG-REPORT address.

c/src/lib/libbsp/unix/posix/tools/runtest.in

@@ -132,7 +132,7 @@ do
    TEST_TYPE="single"
 
    case $tname in
-       monitor* | termios* | fileio*)
+       monitor* | termios* | fileio* | pppd*)
            if [ $run_to_completion = "yes" ]
            then
                 warn "Skipping $tname; it is interactive"

c/src/lib/libcpu/sparc/ChangeLog

@@ -1,3 +1,10 @@
+2007-07-31	Joel Sherrill <joel.sherrill@OARcorp.com>
+
+	PR 1249/build
+	* configure.ac: Jerry Needell <jerry.needell@unh.edu> reported that the
+	leon3 was left out of the cache enable logic. Thus the cache
+	management support code was empty on LEON3 CPUs.
+
 2006-12-02	Ralf Corsépius <ralf.corsepius@rtems.org>
 
 	* configure.ac: New BUG-REPORT address.

c/src/lib/libcpu/sparc/configure.ac

@@ -22,7 +22,7 @@ RTEMS_CANONICALIZE_TOOLS
 RTEMS_PROG_CCAS
 
 AM_CONDITIONAL(has_instruction_cache, test "$RTEMS_CPU_MODEL" = "leon1" \
-|| test "$RTEMS_CPU_MODEL" = "leon2" )
+|| test "$RTEMS_CPU_MODEL" = "leon2" || test "$RTEMS_CPU_MODEL" = "leon3" )
 
 RTEMS_AMPOLISH3
 

contrib/crossrpms/binutils/base-binutils.add

@@ -25,6 +25,9 @@ This is the base for binutils regardless of target CPU.
   /sbin/install-info --info-dir=%{_infodir} %{_infodir}/binutils.info.gz || :
   /sbin/install-info --info-dir=%{_infodir} %{_infodir}/ld.info.gz || :
   /sbin/install-info --info-dir=%{_infodir} %{_infodir}/standards.info.gz || :
+%if "%{binutils_version}" > "2.17"
+  /sbin/install-info --info-dir=%{_infodir} %{_infodir}/gprof.info.gz || :
+%endif
 %if "%{binutils_version}" < "2.13"
   /sbin/install-info --info-dir=%{_infodir} %{_infodir}/gasp.info.gz || :
 %endif
@@ -36,6 +39,9 @@ if [ $1 -eq 0 ]; then
   /sbin/install-info --delete --info-dir=%{_infodir} %{_infodir}/binutils.info.gz || :
   /sbin/install-info --delete --info-dir=%{_infodir} %{_infodir}/ld.info.gz || :
   /sbin/install-info --delete --info-dir=%{_infodir} %{_infodir}/standards.info.gz || :
+%if "%{binutils_version}" > "2.17"
+  /sbin/install-info --delete --info-dir=%{_infodir} %{_infodir}/gprof.info.gz || :
+%endif
 %if "%{binutils_version}" < "2.13"
   /sbin/install-info --delete --info-dir=%{_infodir} %{_infodir}/gasp.info.gz || :
 %endif
@@ -50,7 +56,9 @@ fi
 %{_infodir}/binutils.info*
 %{_infodir}/ld.info*
 %{_infodir}/standards.info*
-
+%if "%{binutils_version}" > "2.17"
+%{_infodir}/gprof.info*
+%endif
 %if "%{binutils_version}" < "2.13"
 %{_infodir}/gasp.info*
 %endif

contrib/crossrpms/gcc/build.add

@@ -33,8 +33,10 @@
   ../gcc-%{gcc_pkgvers}/configure \
     --prefix=%{_prefix} \
     --bindir=%{_bindir} \
+    --exec_prefix=%{_exec_prefix} \
     --includedir=%{_includedir} \
     --libdir=%{_libdir} \
+    --libexecdir=%{_libexecdir} \
     --mandir=%{_mandir} \
     --infodir=%{_infodir} \
     --datadir=%{_datadir} \
@@ -47,7 +49,7 @@
     --disable-win32-registry \
     --enable-version-specific-runtime-libs \
     --enable-threads \
-    --with-sysroot=%{_prefix}/@tool_target@/sys-root \
+    --with-sysroot=%{_exec_prefix}/@tool_target@/sys-root \
     --enable-languages="$languages" $optargs
 
 %if "%_host" != "%_build"

contrib/crossrpms/gcc/install.add

@@ -15,7 +15,7 @@
   cd ../../..
 %endif
 
-%if "%{gcc_version}" <= "4.1.1"
+%if "%{gcc_version}" <= "4.1.2"
 # Misplaced header file
   if test -f $RPM_BUILD_ROOT%{_includedir}/mf-runtime.h; then
     mv $RPM_BUILD_ROOT%{_includedir}/mf-runtime.h \
@@ -24,7 +24,7 @@
 %endif
 
   # host library
-  rm -f  ${RPM_BUILD_ROOT}%{_prefix}/lib/libiberty.a
+  rm -f  ${RPM_BUILD_ROOT}%{_libdir}/libiberty.a
 
   # We use the version from binutils
   rm -f $RPM_BUILD_ROOT%{_bindir}/@tool_target@-c++filt%{_exeext}
@@ -68,7 +68,7 @@
 
 %if %build_newlib
   echo "%defattr(-,root,root,-)" > build/files.newlib
-  TGTDIR="%{_prefix}/@tool_target@/lib"
+  TGTDIR="%{_exec_prefix}/@tool_target@/lib"
   for i in $f; do
     case $i in
     \.) echo "%dir ${TGTDIR}" >> build/files.newlib
@@ -136,7 +136,7 @@
     esac
   done
 
-  TGTDIR="%{_prefix}/@tool_target@/lib"
+  TGTDIR="%{_exec_prefix}/@tool_target@/lib"
   f=`find ${RPM_BUILD_ROOT}${TGTDIR} ! -type d -print | sed -e "s,^$RPM_BUILD_ROOT,,g"`;
   for i in $f; do
     case $i in

contrib/crossrpms/gcc/rpm-install.add

@@ -33,7 +33,7 @@ sed -e 's,^[ ]*/usr/lib/rpm.*/brp-strip,./brp-strip,' \
 
 cat << EOF > %{_builddir}/%{name}-%{gcc_rpmvers}/find-provides
 #!/bin/sh
-grep -E -v '^${RPM_BUILD_ROOT}%{_prefix}/@tool_target@/(lib|include|sys-root)' \
+grep -E -v '^${RPM_BUILD_ROOT}%{_exec_prefix}/@tool_target@/(lib|include|sys-root)' \
   | grep -v '^${RPM_BUILD_ROOT}%{gcclib}/@tool_target@/' | %__find_provides
 EOF
 chmod +x %{_builddir}/%{name}-%{gcc_rpmvers}/find-provides
@@ -41,7 +41,7 @@ chmod +x %{_builddir}/%{name}-%{gcc_rpmvers}/find-provides
 
 cat << EOF > %{_builddir}/%{name}-%{gcc_rpmvers}/find-requires
 #!/bin/sh
-grep -E -v '^${RPM_BUILD_ROOT}%{_prefix}/@tool_target@/(lib|include|sys-root)' \
+grep -E -v '^${RPM_BUILD_ROOT}%{_exec_prefix}/@tool_target@/(lib|include|sys-root)' \
   | grep -v '^${RPM_BUILD_ROOT}%{gcclib}/@tool_target@/' | %__find_requires
 EOF
 chmod +x %{_builddir}/%{name}-%{gcc_rpmvers}/find-requires

contrib/crossrpms/gcc/target-newlib.add

@@ -21,7 +21,7 @@ Newlib C Library for @tool_target@.
 %files -n @rpmprefix@@tool_target@-newlib -f build/files.newlib
 %defattr(-,root,root)
 %sysdir %{_prefix}
-%dir %{_prefix}/@tool_target@
-%{_prefix}/@tool_target@/include
+%dir %{_exec_prefix}/@tool_target@
+%{_exec_prefix}/@tool_target@/include
 
 %endif

contrib/crossrpms/patches/gcc-core-4.1.1-rtems4.7-20070613.diff

@@ -0,0 +1,161 @@
+Common subdirectories: gcc-4.1.1.orig/config and gcc-4.1.1/config
+Common subdirectories: gcc-4.1.1.orig/contrib and gcc-4.1.1/contrib
+Common subdirectories: gcc-4.1.1.orig/fixincludes and gcc-4.1.1/fixincludes
+Common subdirectories: gcc-4.1.1.orig/gcc and gcc-4.1.1/gcc
+diff -uNt gcc-4.1.1.orig/gcc-core-4.1.2-rtems4.8-20070613.diff gcc-4.1.1/gcc-core-4.1.2-rtems4.8-20070613.diff
+--- gcc-4.1.1.orig/gcc-core-4.1.2-rtems4.8-20070613.diff	1970-01-01 01:00:00.000000000 +0100
++++ gcc-4.1.1/gcc-core-4.1.2-rtems4.8-20070613.diff	2007-06-14 04:15:19.000000000 +0200
+@@ -0,0 +1,114 @@
++diff -uNr gcc-4.1.2.orig/gcc/config/arm/rtems-elf.h gcc-4.1.2/gcc/config/arm/rtems-elf.h
++--- gcc-4.1.2.orig/gcc/config/arm/rtems-elf.h   2005-11-22 00:28:29.000000000 +0100
+++++ gcc-4.1.2/gcc/config/arm/rtems-elf.h        2007-06-13 17:19:33.000000000 +0200
++@@ -27,6 +27,7 @@
++ #define TARGET_OS_CPP_BUILTINS()               \
++     do {                                       \
++        builtin_define ("__rtems__");           \
+++       builtin_define ("__USE_INIT_FINI__");   \
++        builtin_assert ("system=rtems");        \
++     } while (0)
++ 
++diff -uNr gcc-4.1.2.orig/gcc/config/c4x/rtems.h gcc-4.1.2/gcc/config/c4x/rtems.h
++--- gcc-4.1.2.orig/gcc/config/c4x/rtems.h       2005-06-25 03:22:41.000000000 +0200
+++++ gcc-4.1.2/gcc/config/c4x/rtems.h    2007-06-13 17:19:33.000000000 +0200
++@@ -24,6 +24,5 @@
++ #define TARGET_OS_CPP_BUILTINS()               \
++     do {                                       \
++        builtin_define ("__rtems__");           \
++-       builtin_define ("__USE_INIT_FINI__");   \
++        builtin_assert ("system=rtems");        \
++     } while (0)
++diff -uNr gcc-4.1.2.orig/gcc/config/mips/elf.h gcc-4.1.2/gcc/config/mips/elf.h
++--- gcc-4.1.2.orig/gcc/config/mips/elf.h        2005-07-09 10:46:34.000000000 +0200
+++++ gcc-4.1.2/gcc/config/mips/elf.h     2007-06-13 17:19:33.000000000 +0200
++@@ -48,5 +48,3 @@
++ 
++ #undef  ENDFILE_SPEC
++ #define ENDFILE_SPEC "crtend%O%s crtn%O%s"
++-
++-#define NO_IMPLICIT_EXTERN_C 1
++diff -uNr gcc-4.1.2.orig/gcc/config/mips/mips.h gcc-4.1.2/gcc/config/mips/mips.h
++--- gcc-4.1.2.orig/gcc/config/mips/mips.h       2006-02-17 22:38:59.000000000 +0100
+++++ gcc-4.1.2/gcc/config/mips/mips.h    2007-06-13 17:19:34.000000000 +0200
++@@ -450,6 +450,8 @@
++ #endif
++ #endif /* IN_LIBGCC2 */
++ 
+++#define TARGET_LIBGCC_SDATA_SECTION ".sdata"
+++
++ #ifndef MULTILIB_ENDIAN_DEFAULT
++ #if TARGET_ENDIAN_DEFAULT == 0
++ #define MULTILIB_ENDIAN_DEFAULT "EL"
++@@ -2712,7 +2714,6 @@
++ /* Define the strings to put out for each section in the object file.  */
++ #define TEXT_SECTION_ASM_OP    "\t.text"       /* instructions */
++ #define DATA_SECTION_ASM_OP    "\t.data"       /* large data */
++-#define SDATA_SECTION_ASM_OP   "\t.sdata"      /* small data */
++ 
++ #undef READONLY_DATA_SECTION_ASM_OP
++ #define READONLY_DATA_SECTION_ASM_OP   "\t.rdata"      /* read-only data */
++diff -uNr gcc-4.1.2.orig/gcc/config/sparc/sparc.c gcc-4.1.2/gcc/config/sparc/sparc.c
++--- gcc-4.1.2.orig/gcc/config/sparc/sparc.c     2006-04-14 09:02:43.000000000 +0200
+++++ gcc-4.1.2/gcc/config/sparc/sparc.c  2007-06-13 17:29:33.000000000 +0200
++@@ -675,7 +675,7 @@
++        error ("-mcmodel= is not supported on 32 bit systems");
++     }
++ 
++-  fpu = TARGET_FPU; /* save current -mfpu status */
+++  fpu = target_flags & MASK_FPU; /* save current -mfpu status */
++ 
++   /* Set the default CPU.  */
++   for (def = &cpu_default[0]; def->name; ++def)
++diff -uNr gcc-4.1.2.orig/gcc/config.gcc gcc-4.1.2/gcc/config.gcc
++--- gcc-4.1.2.orig/gcc/config.gcc       2006-10-16 01:12:23.000000000 +0200
+++++ gcc-4.1.2/gcc/config.gcc    2007-06-13 17:19:34.000000000 +0200
++@@ -761,6 +761,11 @@
++         tmake_file=bfin/t-bfin-elf
++         use_collect2=no
++         ;;
+++bfin*-rtems*)
+++       tm_file="${tm_file} dbxelf.h elfos.h bfin/elf.h bfin/rtems.h rtems.h"
+++        tmake_file=bfin/t-bfin-elf
+++        use_collect2=no
+++        ;;
++ bfin*-*)
++        tm_file="${tm_file} dbxelf.h elfos.h bfin/elf.h"
++         tmake_file=bfin/t-bfin
++@@ -1560,7 +1565,7 @@
++        tm_defines="MIPS_ISA_DEFAULT=3 MIPS_ABI_DEFAULT=ABI_O64"
++        use_fixproto=yes
++        ;;
++-mips*-*-rtems*)
+++mips-*-rtems*)
++        tm_file="elfos.h ${tm_file} mips/elf.h mips/rtems.h rtems.h"
++        tmake_file="mips/t-elf t-rtems mips/t-rtems"
++        ;;
++diff -uNr gcc-4.1.2.orig/gcc/crtstuff.c gcc-4.1.2/gcc/crtstuff.c
++--- gcc-4.1.2.orig/gcc/crtstuff.c       2005-11-15 02:21:29.000000000 +0100
+++++ gcc-4.1.2/gcc/crtstuff.c    2007-06-13 17:19:34.000000000 +0200
++@@ -225,6 +225,9 @@
++    in one DSO or the main program is not used in another object.  The
++    dynamic linker takes care of this.  */
++ 
+++#ifdef TARGET_LIBGCC_SDATA_SECTION
+++extern void *__dso_handle __attribute__ ((__section__ (TARGET_LIBGCC_SDATA_SECTION)));
+++#endif
++ #ifdef HAVE_GAS_HIDDEN
++ extern void *__dso_handle __attribute__ ((__visibility__ ("hidden")));
++ #endif
++diff -uNr gcc-4.1.2.orig/Makefile.in gcc-4.1.2/Makefile.in
++--- gcc-4.1.2.orig/Makefile.in  2006-04-04 23:03:05.000000000 +0200
+++++ gcc-4.1.2/Makefile.in       2007-06-13 17:19:34.000000000 +0200
++@@ -329,9 +329,9 @@
++ # CFLAGS will be just -g.  We want to ensure that TARGET libraries
++ # (which we know are built with gcc) are built with optimizations so
++ # prepend -O2 when setting CFLAGS_FOR_TARGET.
++-CFLAGS_FOR_TARGET = -O2 $(CFLAGS) $(SYSROOT_CFLAGS_FOR_TARGET)
+++CFLAGS_FOR_TARGET = $(strip -O2 $(CFLAGS) $(SYSROOT_CFLAGS_FOR_TARGET))
++ SYSROOT_CFLAGS_FOR_TARGET = @SYSROOT_CFLAGS_FOR_TARGET@
++-CXXFLAGS_FOR_TARGET = $(CXXFLAGS) $(SYSROOT_CFLAGS_FOR_TARGET)
+++CXXFLAGS_FOR_TARGET = $(strip $(CXXFLAGS) $(SYSROOT_CFLAGS_FOR_TARGET))
++ LIBCFLAGS_FOR_TARGET = $(CFLAGS_FOR_TARGET)
++ LIBCXXFLAGS_FOR_TARGET = $(CXXFLAGS_FOR_TARGET) -fno-implicit-templates
++ LDFLAGS_FOR_TARGET = 
+Common subdirectories: gcc-4.1.1.orig/include and gcc-4.1.1/include
+Common subdirectories: gcc-4.1.1.orig/INSTALL and gcc-4.1.1/INSTALL
+Common subdirectories: gcc-4.1.1.orig/intl and gcc-4.1.1/intl
+Common subdirectories: gcc-4.1.1.orig/libcpp and gcc-4.1.1/libcpp
+Common subdirectories: gcc-4.1.1.orig/libiberty and gcc-4.1.1/libiberty
+Common subdirectories: gcc-4.1.1.orig/libmudflap and gcc-4.1.1/libmudflap
+Common subdirectories: gcc-4.1.1.orig/libssp and gcc-4.1.1/libssp
+Common subdirectories: gcc-4.1.1.orig/maintainer-scripts and gcc-4.1.1/maintainer-scripts
+diff -uNt gcc-4.1.1.orig/Makefile.in gcc-4.1.1/Makefile.in
+--- gcc-4.1.1.orig/Makefile.in	2006-04-04 23:03:05.000000000 +0200
++++ gcc-4.1.1/Makefile.in	2007-06-14 04:14:41.000000000 +0200
+@@ -329,9 +329,9 @@
+ # CFLAGS will be just -g.  We want to ensure that TARGET libraries
+ # (which we know are built with gcc) are built with optimizations so
+ # prepend -O2 when setting CFLAGS_FOR_TARGET.
+-CFLAGS_FOR_TARGET = -O2 $(CFLAGS) $(SYSROOT_CFLAGS_FOR_TARGET)
++CFLAGS_FOR_TARGET = $(strip -O2 $(CFLAGS) $(SYSROOT_CFLAGS_FOR_TARGET))
+ SYSROOT_CFLAGS_FOR_TARGET = @SYSROOT_CFLAGS_FOR_TARGET@
+-CXXFLAGS_FOR_TARGET = $(CXXFLAGS) $(SYSROOT_CFLAGS_FOR_TARGET)
++CXXFLAGS_FOR_TARGET = $(strip $(CXXFLAGS) $(SYSROOT_CFLAGS_FOR_TARGET))
+ LIBCFLAGS_FOR_TARGET = $(CFLAGS_FOR_TARGET)
+ LIBCXXFLAGS_FOR_TARGET = $(CXXFLAGS_FOR_TARGET) -fno-implicit-templates
+ LDFLAGS_FOR_TARGET = 
+diff -uNt gcc-4.1.1.orig/tmp gcc-4.1.1/tmp
+--- gcc-4.1.1.orig/tmp	1970-01-01 01:00:00.000000000 +0100
++++ gcc-4.1.1/tmp	2007-06-14 04:15:43.000000000 +0200
+@@ -0,0 +1,12 @@
++diff -uNr gcc-4.1.2.orig/gcc/config/sparc/sparc.c gcc-4.1.2/gcc/config/sparc/sparc.c
++--- gcc-4.1.2.orig/gcc/config/sparc/sparc.c     2006-04-14 09:02:43.000000000 +0200
+++++ gcc-4.1.2/gcc/config/sparc/sparc.c  2007-06-13 17:29:33.000000000 +0200
++@@ -675,7 +675,7 @@
++        error ("-mcmodel= is not supported on 32 bit systems");
++     }
++ 
++-  fpu = TARGET_FPU; /* save current -mfpu status */
+++  fpu = target_flags & MASK_FPU; /* save current -mfpu status */
++ 
++   /* Set the default CPU.  */
++   for (def = &cpu_default[0]; def->name; ++def)

contrib/crossrpms/patches/gdb-6.4-rtems-20060311.diff

@@ -1,40 +0,0 @@
---- gdb-6.4/sim/Makefile.in	29 Jan 2005 00:53:13 -0000	1.6
-+++ gdb-6.4/sim/Makefile.in	11 Mar 2006 04:59:44 -0000
-@@ -87,6 +87,7 @@
- 	"exec_prefix=$(exec_prefix)" \
- 	"bindir=$(bindir)" \
- 	"mandir=$(mandir)" \
-+	"libdir=$(libdir)" \
- 	"against=$(against)" \
- 	"AR=$(AR)" \
- 	"AR_FLAGS=$(AR_FLAGS)" \
---- gdb-6.4/sim/erc32/exec.c	7 Mar 2005 11:09:05 -0000	1.2
-+++ gdb-6.4/sim/erc32/exec.c	11 Mar 2006 04:59:45 -0000
-@@ -1713,7 +1713,7 @@
-     	    sregs->fdp[rs2 | 1] = sregs->fs[rs2 & ~1];
-     	    sregs->fdp[rs2 & ~1] = sregs->fs[rs2 | 1];
-     default:
--      ;
-+      break;
-     }
- #endif
- 
-@@ -1886,7 +1886,7 @@
- 	sregs->fs[rd & ~1] = sregs->fdp[rd | 1];
- 	sregs->fs[rd | 1] = sregs->fdp[rd & ~1];
-     default:
--      ;
-+      break;
-     }
- #endif
-     if (sregs->fpstate == FP_EXC_PE) {
---- gdb-6.4/sim/mips/dv-tx3904tmr.c	16 Apr 1999 01:35:06 -0000	1.1.1.1
-+++ gdb-6.4/sim/mips/dv-tx3904tmr.c	11 Mar 2006 04:59:46 -0000
-@@ -675,6 +675,7 @@
- 
- 	case 3: /* disabled */
- 	default:
-+	  break;
- 	}
- 
-       /* update counter and report */

contrib/crossrpms/patches/gdb-6.4-rtems-20060712.diff

@@ -1,120 +0,0 @@
-diff -uNr /usr1/rtems/work-tools/original/gdb-6.4/bfd/sysdep.h gdb-6.4/bfd/sysdep.h
---- /usr1/rtems/work-tools/original/gdb-6.4/bfd/sysdep.h	Thu May  5 13:51:14 2005
-+++ gdb-6.4/bfd/sysdep.h	Fri Mar 24 11:31:32 2006
-@@ -135,7 +135,7 @@
- #endif
- 
- #if !HAVE_DECL_STRSTR
--extern char *strstr ();
-+/* extern char *strstr (); */
- #endif
- 
- #ifdef HAVE_FTELLO
-diff -uNr /usr1/rtems/work-tools/original/gdb-6.4/gdb/config/sparc/embedded.mt gdb-6.4/gdb/config/sparc/embedded.mt
---- /usr1/rtems/work-tools/original/gdb-6.4/gdb/config/sparc/embedded.mt	Wed Dec 31 18:00:00 1969
-+++ gdb-6.4/gdb/config/sparc/embedded.mt	Fri Apr  7 10:56:45 2006
-@@ -0,0 +1,5 @@
-+# Target: SPARC embedded with simulator
-+TDEPFILES= sparc-tdep.o
-+
-+SIM_OBS = remote-sim.o
-+SIM = ../sim/erc32/libsim.a
-diff -uNr /usr1/rtems/work-tools/original/gdb-6.4/gdb/configure.tgt gdb-6.4/gdb/configure.tgt
---- /usr1/rtems/work-tools/original/gdb-6.4/gdb/configure.tgt	Mon Aug 15 16:46:38 2005
-+++ gdb-6.4/gdb/configure.tgt	Fri Apr  7 10:55:37 2006
-@@ -198,6 +198,7 @@
- sparc-*-solaris2* | sparcv9-*-solaris2* | sparc64-*-solaris2*)
- 			gdb_target=sol2-64
- 			;;
-+sparc-*-rtems*)		gdb_target=embedded ;;
- sparc-*-*)		gdb_target=sparc ;;
- sparc64-*-*)		gdb_target=sparc64 ;;
- 
-diff -uNr /usr1/rtems/work-tools/original/gdb-6.4/sim/Makefile.in gdb-6.4/sim/Makefile.in
---- /usr1/rtems/work-tools/original/gdb-6.4/sim/Makefile.in	Fri Jan 28 18:53:13 2005
-+++ gdb-6.4/sim/Makefile.in	Fri Mar 24 11:32:53 2006
-@@ -87,6 +87,7 @@
- 	"exec_prefix=$(exec_prefix)" \
- 	"bindir=$(bindir)" \
- 	"mandir=$(mandir)" \
-+	"libdir=$(libdir)" \
- 	"against=$(against)" \
- 	"AR=$(AR)" \
- 	"AR_FLAGS=$(AR_FLAGS)" \
-diff -uNr /usr1/rtems/work-tools/original/gdb-6.4/sim/configure gdb-6.4/sim/configure
---- /usr1/rtems/work-tools/original/gdb-6.4/sim/configure	Tue May 17 09:11:24 2005
-+++ gdb-6.4/sim/configure	Wed Apr  5 12:39:21 2006
-@@ -3515,6 +3515,14 @@
- 	   testsuite=yes
- 	   common=yes
- 	   ;;
-+       sparc-*-rtems*|sparc-*-elf*)
-+
-+
-+subdirs="$subdirs erc32"
-+
-+	   testsuite=yes
-+	   common=yes
-+	   ;;
-        powerpc*-*-* )
- 
- 
-diff -uNr /usr1/rtems/work-tools/original/gdb-6.4/sim/configure.ac gdb-6.4/sim/configure.ac
---- /usr1/rtems/work-tools/original/gdb-6.4/sim/configure.ac	Tue May 17 09:11:24 2005
-+++ gdb-6.4/sim/configure.ac	Wed Apr  5 12:39:19 2006
-@@ -109,6 +109,11 @@
- 	   testsuite=yes
- 	   common=yes
- 	   ;;
-+       sparc-*-rtems*|sparc-*-elf*)
-+           AC_CONFIG_SUBDIRS(erc32)
-+	   testsuite=yes
-+	   common=yes
-+	   ;;
-        powerpc*-*-* )
-            AC_CONFIG_SUBDIRS(ppc)
- 	   common=yes
-diff -uNr /usr1/rtems/work-tools/original/gdb-6.4/sim/erc32/Makefile.in gdb-6.4/sim/erc32/Makefile.in
---- /usr1/rtems/work-tools/original/gdb-6.4/sim/erc32/Makefile.in	Tue Mar  7 09:32:49 2000
-+++ gdb-6.4/sim/erc32/Makefile.in	Wed Apr  5 15:15:12 2006
-@@ -53,7 +53,7 @@
- # Copy the files into directories where they will be run.
- install-sis: installdirs
- 	n=`echo sis | sed '$(program_transform_name)'`; \
--	$(INSTALL_PROGRAM) sis$(EXEEXT) $(bindir)/$$n$(EXEEXT)
-+	$(INSTALL_PROGRAM) sis$(EXEEXT) $(DESTDIR)$(bindir)/$$n$(EXEEXT)
- 
- clean-sis:
- 	rm -f sis end end.h
-diff -uNr /usr1/rtems/work-tools/original/gdb-6.4/sim/erc32/exec.c gdb-6.4/sim/erc32/exec.c
---- /usr1/rtems/work-tools/original/gdb-6.4/sim/erc32/exec.c	Mon Mar  7 05:09:05 2005
-+++ gdb-6.4/sim/erc32/exec.c	Fri Mar 24 11:32:53 2006
-@@ -1713,7 +1713,7 @@
-     	    sregs->fdp[rs2 | 1] = sregs->fs[rs2 & ~1];
-     	    sregs->fdp[rs2 & ~1] = sregs->fs[rs2 | 1];
-     default:
--      ;
-+      break;
-     }
- #endif
- 
-@@ -1886,7 +1886,7 @@
- 	sregs->fs[rd & ~1] = sregs->fdp[rd | 1];
- 	sregs->fs[rd | 1] = sregs->fdp[rd & ~1];
-     default:
--      ;
-+      break;
-     }
- #endif
-     if (sregs->fpstate == FP_EXC_PE) {
-diff -uNr /usr1/rtems/work-tools/original/gdb-6.4/sim/mips/dv-tx3904tmr.c gdb-6.4/sim/mips/dv-tx3904tmr.c
---- /usr1/rtems/work-tools/original/gdb-6.4/sim/mips/dv-tx3904tmr.c	Thu Apr 15 20:35:06 1999
-+++ gdb-6.4/sim/mips/dv-tx3904tmr.c	Fri Mar 24 11:32:53 2006
-@@ -675,6 +675,7 @@
- 
- 	case 3: /* disabled */
- 	default:
-+	  break;
- 	}
- 
-       /* update counter and report */

contrib/crossrpms/patches/gdb-6.5-rtems-20060713.diff

@@ -1,109 +0,0 @@
-diff -uNr /home/joel/tools-original/gdb-6.5/bfd/sysdep.h gdb-6.5/bfd/sysdep.h
---- /home/joel/tools-original/gdb-6.5/bfd/sysdep.h	2005-05-05 13:51:14.000000000 -0500
-+++ gdb-6.5/bfd/sysdep.h	2006-07-13 10:00:00.000000000 -0500
-@@ -135,7 +135,7 @@
- #endif
- 
- #if !HAVE_DECL_STRSTR
--extern char *strstr ();
-+/* extern char *strstr (); */
- #endif
- 
- #ifdef HAVE_FTELLO
-diff -uNr /home/joel/tools-original/gdb-6.5/gdb/config/sparc/embedded.mt gdb-6.5/gdb/config/sparc/embedded.mt
---- /home/joel/tools-original/gdb-6.5/gdb/config/sparc/embedded.mt	1969-12-31 18:00:00.000000000 -0600
-+++ gdb-6.5/gdb/config/sparc/embedded.mt	2006-07-13 10:00:00.000000000 -0500
-@@ -0,0 +1,5 @@
-+# Target: SPARC embedded with simulator
-+TDEPFILES= sparc-tdep.o
-+
-+SIM_OBS = remote-sim.o
-+SIM = ../sim/erc32/libsim.a
-diff -uNr /home/joel/tools-original/gdb-6.5/gdb/configure.tgt gdb-6.5/gdb/configure.tgt
---- /home/joel/tools-original/gdb-6.5/gdb/configure.tgt	2006-04-20 18:18:48.000000000 -0500
-+++ gdb-6.5/gdb/configure.tgt	2006-07-13 10:00:00.000000000 -0500
-@@ -197,6 +197,7 @@
- sparc-*-solaris2* | sparcv9-*-solaris2* | sparc64-*-solaris2*)
- 			gdb_target=sol2-64
- 			;;
-+sparc-*-rtems*)		gdb_target=embedded ;;
- sparc-*-*)		gdb_target=sparc ;;
- sparc64-*-*)		gdb_target=sparc64 ;;
- 
-diff -uNr /home/joel/tools-original/gdb-6.5/sim/configure gdb-6.5/sim/configure
---- /home/joel/tools-original/gdb-6.5/sim/configure	2006-05-05 12:11:19.000000000 -0500
-+++ gdb-6.5/sim/configure	2006-07-13 10:00:00.000000000 -0500
-@@ -3525,6 +3525,14 @@
- 	   testsuite=yes
- 	   common=yes
- 	   ;;
-+       sparc-*-rtems*|sparc-*-elf*)
-+
-+
-+subdirs="$subdirs erc32"
-+
-+	   testsuite=yes
-+	   common=yes
-+	   ;;
-        powerpc*-*-* )
- 
- 
-diff -uNr /home/joel/tools-original/gdb-6.5/sim/configure.ac gdb-6.5/sim/configure.ac
---- /home/joel/tools-original/gdb-6.5/sim/configure.ac	2006-05-05 12:11:19.000000000 -0500
-+++ gdb-6.5/sim/configure.ac	2006-07-13 10:00:00.000000000 -0500
-@@ -115,6 +115,11 @@
- 	   testsuite=yes
- 	   common=yes
- 	   ;;
-+       sparc-*-rtems*|sparc-*-elf*)
-+           AC_CONFIG_SUBDIRS(erc32)
-+	   testsuite=yes
-+	   common=yes
-+	   ;;
-        powerpc*-*-* )
-            AC_CONFIG_SUBDIRS(ppc)
- 	   common=yes
-diff -uNr /home/joel/tools-original/gdb-6.5/sim/erc32/exec.c gdb-6.5/sim/erc32/exec.c
---- /home/joel/tools-original/gdb-6.5/sim/erc32/exec.c	2005-03-07 05:09:05.000000000 -0600
-+++ gdb-6.5/sim/erc32/exec.c	2006-07-13 10:00:00.000000000 -0500
-@@ -1713,7 +1713,7 @@
-     	    sregs->fdp[rs2 | 1] = sregs->fs[rs2 & ~1];
-     	    sregs->fdp[rs2 & ~1] = sregs->fs[rs2 | 1];
-     default:
--      ;
-+      break;
-     }
- #endif
- 
-@@ -1886,7 +1886,7 @@
- 	sregs->fs[rd & ~1] = sregs->fdp[rd | 1];
- 	sregs->fs[rd | 1] = sregs->fdp[rd & ~1];
-     default:
--      ;
-+      break;
-     }
- #endif
-     if (sregs->fpstate == FP_EXC_PE) {
-diff -uNr /home/joel/tools-original/gdb-6.5/sim/erc32/Makefile.in gdb-6.5/sim/erc32/Makefile.in
---- /home/joel/tools-original/gdb-6.5/sim/erc32/Makefile.in	2000-03-07 09:32:49.000000000 -0600
-+++ gdb-6.5/sim/erc32/Makefile.in	2006-07-13 10:00:00.000000000 -0500
-@@ -53,7 +53,7 @@
- # Copy the files into directories where they will be run.
- install-sis: installdirs
- 	n=`echo sis | sed '$(program_transform_name)'`; \
--	$(INSTALL_PROGRAM) sis$(EXEEXT) $(bindir)/$$n$(EXEEXT)
-+	$(INSTALL_PROGRAM) sis$(EXEEXT) $(DESTDIR)$(bindir)/$$n$(EXEEXT)
- 
- clean-sis:
- 	rm -f sis end end.h
-diff -uNr /home/joel/tools-original/gdb-6.5/sim/Makefile.in gdb-6.5/sim/Makefile.in
---- /home/joel/tools-original/gdb-6.5/sim/Makefile.in	2006-05-05 12:11:19.000000000 -0500
-+++ gdb-6.5/sim/Makefile.in	2006-07-13 10:00:00.000000000 -0500
-@@ -84,6 +84,7 @@
- 	"exec_prefix=$(exec_prefix)" \
- 	"bindir=$(bindir)" \
- 	"mandir=$(mandir)" \
-+	"libdir=$(libdir)" \
- 	"against=$(against)" \
- 	"AR=$(AR)" \
- 	"AR_FLAGS=$(AR_FLAGS)" \

contrib/crossrpms/patches/gdb-6.5-rtems4.7-20071115.diff

@@ -0,0 +1,133 @@
+diff -uNr gdb-6.5.orig/bfd/sysdep.h gdb-6.5/bfd/sysdep.h
+--- gdb-6.5.orig/bfd/sysdep.h	2005-05-05 20:51:14.000000000 +0200
++++ gdb-6.5/bfd/sysdep.h	2007-11-15 06:31:01.000000000 +0100
+@@ -135,7 +135,7 @@
+ #endif
+ 
+ #if !HAVE_DECL_STRSTR
+-extern char *strstr ();
++/* extern char *strstr (); */
+ #endif
+ 
+ #ifdef HAVE_FTELLO
+diff -uNr gdb-6.5.orig/configure gdb-6.5/configure
+--- gdb-6.5.orig/configure	2006-05-02 02:16:50.000000000 +0200
++++ gdb-6.5/configure	2007-11-15 06:31:09.000000000 +0100
+@@ -3648,7 +3648,7 @@
+     # For an installed makeinfo, we require it to be from texinfo 4.4 or
+     # higher, else we use the "missing" dummy.
+     if ${MAKEINFO} --version \
+-       | egrep 'texinfo[^0-9]*([1-3][0-9]|4\.[4-9]|[5-9])' >/dev/null 2>&1; then
++       | egrep 'texinfo[^0-9]*(4\.([4-9]|[1-9][0-9])|[5-9]|[1-9][0-9])' >/dev/null 2>&1; then
+       :
+     else
+       MAKEINFO="$MISSING makeinfo"
+diff -uNr gdb-6.5.orig/configure.in gdb-6.5/configure.in
+--- gdb-6.5.orig/configure.in	2006-06-21 07:16:16.000000000 +0200
++++ gdb-6.5/configure.in	2007-11-15 06:31:09.000000000 +0100
+@@ -2217,7 +2217,7 @@
+     # For an installed makeinfo, we require it to be from texinfo 4.4 or
+     # higher, else we use the "missing" dummy.
+     if ${MAKEINFO} --version \
+-       | egrep 'texinfo[^0-9]*([1-3][0-9]|4\.[4-9]|[5-9])' >/dev/null 2>&1; then
++       | egrep 'texinfo[^0-9]*(4\.([4-9]|[1-9][0-9])|[5-9]|[1-9][0-9])' >/dev/null 2>&1; then
+       :
+     else
+       MAKEINFO="$MISSING makeinfo"
+diff -uNr gdb-6.5.orig/gdb/config/sparc/embedded.mt gdb-6.5/gdb/config/sparc/embedded.mt
+--- gdb-6.5.orig/gdb/config/sparc/embedded.mt	1970-01-01 01:00:00.000000000 +0100
++++ gdb-6.5/gdb/config/sparc/embedded.mt	2007-11-15 06:31:01.000000000 +0100
+@@ -0,0 +1,5 @@
++# Target: SPARC embedded with simulator
++TDEPFILES= sparc-tdep.o
++
++SIM_OBS = remote-sim.o
++SIM = ../sim/erc32/libsim.a
+diff -uNr gdb-6.5.orig/gdb/configure.tgt gdb-6.5/gdb/configure.tgt
+--- gdb-6.5.orig/gdb/configure.tgt	2006-04-21 01:18:48.000000000 +0200
++++ gdb-6.5/gdb/configure.tgt	2007-11-15 06:31:01.000000000 +0100
+@@ -197,6 +197,7 @@
+ sparc-*-solaris2* | sparcv9-*-solaris2* | sparc64-*-solaris2*)
+ 			gdb_target=sol2-64
+ 			;;
++sparc-*-rtems*)		gdb_target=embedded ;;
+ sparc-*-*)		gdb_target=sparc ;;
+ sparc64-*-*)		gdb_target=sparc64 ;;
+ 
+diff -uNr gdb-6.5.orig/sim/configure gdb-6.5/sim/configure
+--- gdb-6.5.orig/sim/configure	2006-05-05 19:11:19.000000000 +0200
++++ gdb-6.5/sim/configure	2007-11-15 06:31:01.000000000 +0100
+@@ -3525,6 +3525,14 @@
+ 	   testsuite=yes
+ 	   common=yes
+ 	   ;;
++       sparc-*-rtems*|sparc-*-elf*)
++
++
++subdirs="$subdirs erc32"
++
++	   testsuite=yes
++	   common=yes
++	   ;;
+        powerpc*-*-* )
+ 
+ 
+diff -uNr gdb-6.5.orig/sim/configure.ac gdb-6.5/sim/configure.ac
+--- gdb-6.5.orig/sim/configure.ac	2006-05-05 19:11:19.000000000 +0200
++++ gdb-6.5/sim/configure.ac	2007-11-15 06:31:01.000000000 +0100
+@@ -115,6 +115,11 @@
+ 	   testsuite=yes
+ 	   common=yes
+ 	   ;;
++       sparc-*-rtems*|sparc-*-elf*)
++           AC_CONFIG_SUBDIRS(erc32)
++	   testsuite=yes
++	   common=yes
++	   ;;
+        powerpc*-*-* )
+            AC_CONFIG_SUBDIRS(ppc)
+ 	   common=yes
+diff -uNr gdb-6.5.orig/sim/erc32/exec.c gdb-6.5/sim/erc32/exec.c
+--- gdb-6.5.orig/sim/erc32/exec.c	2005-03-07 12:09:05.000000000 +0100
++++ gdb-6.5/sim/erc32/exec.c	2007-11-15 06:31:01.000000000 +0100
+@@ -1713,7 +1713,7 @@
+     	    sregs->fdp[rs2 | 1] = sregs->fs[rs2 & ~1];
+     	    sregs->fdp[rs2 & ~1] = sregs->fs[rs2 | 1];
+     default:
+-      ;
++      break;
+     }
+ #endif
+ 
+@@ -1886,7 +1886,7 @@
+ 	sregs->fs[rd & ~1] = sregs->fdp[rd | 1];
+ 	sregs->fs[rd | 1] = sregs->fdp[rd & ~1];
+     default:
+-      ;
++      break;
+     }
+ #endif
+     if (sregs->fpstate == FP_EXC_PE) {
+diff -uNr gdb-6.5.orig/sim/erc32/Makefile.in gdb-6.5/sim/erc32/Makefile.in
+--- gdb-6.5.orig/sim/erc32/Makefile.in	2000-03-07 16:32:49.000000000 +0100
++++ gdb-6.5/sim/erc32/Makefile.in	2007-11-15 06:31:01.000000000 +0100
+@@ -53,7 +53,7 @@
+ # Copy the files into directories where they will be run.
+ install-sis: installdirs
+ 	n=`echo sis | sed '$(program_transform_name)'`; \
+-	$(INSTALL_PROGRAM) sis$(EXEEXT) $(bindir)/$$n$(EXEEXT)
++	$(INSTALL_PROGRAM) sis$(EXEEXT) $(DESTDIR)$(bindir)/$$n$(EXEEXT)
+ 
+ clean-sis:
+ 	rm -f sis end end.h
+diff -uNr gdb-6.5.orig/sim/Makefile.in gdb-6.5/sim/Makefile.in
+--- gdb-6.5.orig/sim/Makefile.in	2006-05-05 19:11:19.000000000 +0200
++++ gdb-6.5/sim/Makefile.in	2007-11-15 06:31:01.000000000 +0100
+@@ -84,6 +84,7 @@
+ 	"exec_prefix=$(exec_prefix)" \
+ 	"bindir=$(bindir)" \
+ 	"mandir=$(mandir)" \
++	"libdir=$(libdir)" \
+ 	"against=$(against)" \
+ 	"AR=$(AR)" \
+ 	"AR_FLAGS=$(AR_FLAGS)" \

contrib/crossrpms/rtems4.7/arm/Makefile.am

@@ -6,19 +6,19 @@ include $(top_srcdir)/mkspec.am
 
 BINUTILS_VERS = 2.17
 BINUTILS_PKGVERS = $(BINUTILS_VERS)
-BINUTILS_RPMREL = 4
+BINUTILS_RPMREL = 5
 include ../binutils.am
 BINUTILS_OPTS +=
 
 GCC_VERS = 4.1.1
 GCC_PKGVERS = $(GCC_VERS)
-GCC_RPMREL = 7
+GCC_RPMREL = 10
 NEWLIB_VERS = 1.15.0
 include ../gcc.am
 GCC_OPTS += --languages=cxx
 
 GDB_VERS = 6.5
 GDB_PKGVERS = $(GDB_VERS)
-GDB_RPMREL = 2
+GDB_RPMREL = 3
 include ../gdb.am
 GDB_OPTS +=

contrib/crossrpms/rtems4.7/arm/binutils-sources.add

@@ -1,5 +1,5 @@
 Source0:	ftp://ftp.gnu.org/pub/gnu/binutils/binutils-%{binutils_pkgvers}.tar.bz2
 %{?_without_sources:NoSource:	0}
 %if "%{binutils_version}" == "2.17"
-Patch0:		binutils-2.17-rtems4.7-20061021.diff
+Patch0:		binutils-2.17-rtems4.7-20071114.diff
 %endif

contrib/crossrpms/rtems4.7/arm/gdb-sources.add

@@ -1,7 +1,7 @@
 Source0:	ftp://ftp.gnu.org/pub/gnu/gdb/gdb-%{gdb_version}.tar.bz2
 %{?_without_sources:NoSource:	0}
 %if "%{gdb_version}" == "6.5"
-Patch0:		gdb-6.5-rtems-20060713.diff
+Patch0:		gdb-6.5-rtems4.7-20071115.diff
 %endif
 %if "%{gdb_version}" == "6.6"
 Patch0:		gdb-6.6-rtems4.7-20070218.diff

contrib/crossrpms/rtems4.7/avr/Makefile.am

@@ -6,19 +6,19 @@ include $(top_srcdir)/mkspec.am
 
 BINUTILS_VERS = 2.17
 BINUTILS_PKGVERS = $(BINUTILS_VERS)
-BINUTILS_RPMREL = 4
+BINUTILS_RPMREL = 5
 include ../binutils.am
 BINUTILS_OPTS +=
 
 GCC_VERS = 4.0.3
 GCC_PKGVERS = $(GCC_VERS)
-GCC_RPMREL = 7
+GCC_RPMREL = 10
 NEWLIB_VERS = 1.15.0
 include ../gcc.am
 GCC_OPTS +=
 
 GDB_VERS = 6.5
 GDB_PKGVERS = $(GDB_VERS)
-GDB_RPMREL = 2
+GDB_RPMREL = 3
 include ../gdb.am
 GDB_OPTS +=

contrib/crossrpms/rtems4.7/avr/binutils-sources.add

@@ -1,5 +1,5 @@
 Source0:	ftp://ftp.gnu.org/pub/gnu/binutils/binutils-%{binutils_pkgvers}.tar.bz2
 %{?_without_sources:NoSource:	0}
 %if "%{binutils_version}" == "2.17"
-Patch0:		binutils-2.17-rtems4.7-20061021.diff
+Patch0:		binutils-2.17-rtems4.7-20071114.diff
 %endif

contrib/crossrpms/rtems4.7/avr/gdb-sources.add

@@ -1,7 +1,7 @@
 Source0:	ftp://ftp.gnu.org/pub/gnu/gdb/gdb-%{gdb_version}.tar.bz2
 %{?_without_sources:NoSource:	0}
 %if "%{gdb_version}" == "6.5"
-Patch0:		gdb-6.5-rtems-20060713.diff
+Patch0:		gdb-6.5-rtems4.7-20071115.diff
 %endif
 %if "%{gdb_version}" == "6.6"
 Patch0:		gdb-6.6-rtems4.7-20070218.diff

contrib/crossrpms/rtems4.7/h8300/Makefile.am

@@ -6,19 +6,19 @@ include $(top_srcdir)/mkspec.am
 
 BINUTILS_VERS = 2.17
 BINUTILS_PKGVERS = $(BINUTILS_VERS)
-BINUTILS_RPMREL = 4
+BINUTILS_RPMREL = 5
 include ../binutils.am
 BINUTILS_OPTS +=
 
 GCC_VERS = 4.1.1
 GCC_PKGVERS = $(GCC_VERS)
-GCC_RPMREL = 7
+GCC_RPMREL = 10
 NEWLIB_VERS = 1.15.0
 include ../gcc.am
 GCC_OPTS += --languages=cxx
 
 GDB_VERS = 6.5
 GDB_PKGVERS = $(GDB_VERS)
-GDB_RPMREL = 2
+GDB_RPMREL = 3
 include ../gdb.am
 GDB_OPTS +=

contrib/crossrpms/rtems4.7/h8300/binutils-sources.add

@@ -1,5 +1,5 @@
 Source0:	ftp://ftp.gnu.org/pub/gnu/binutils/binutils-%{binutils_pkgvers}.tar.bz2
 %{?_without_sources:NoSource:	0}
 %if "%{binutils_version}" == "2.17"
-Patch0:		binutils-2.17-rtems4.7-20061021.diff
+Patch0:		binutils-2.17-rtems4.7-20071114.diff
 %endif

contrib/crossrpms/rtems4.7/h8300/gdb-sources.add

@@ -1,7 +1,7 @@
 Source0:	ftp://ftp.gnu.org/pub/gnu/gdb/gdb-%{gdb_version}.tar.bz2
 %{?_without_sources:NoSource:	0}
 %if "%{gdb_version}" == "6.5"
-Patch0:		gdb-6.5-rtems-20060713.diff
+Patch0:		gdb-6.5-rtems4.7-20071115.diff
 %endif
 %if "%{gdb_version}" == "6.6"
 Patch0:		gdb-6.6-rtems4.7-20070218.diff

contrib/crossrpms/rtems4.7/i386/Makefile.am

@@ -6,19 +6,19 @@ include $(top_srcdir)/mkspec.am
 
 BINUTILS_VERS = 2.17
 BINUTILS_PKGVERS = $(BINUTILS_VERS)
-BINUTILS_RPMREL = 4
+BINUTILS_RPMREL = 5
 include ../binutils.am
 BINUTILS_OPTS +=
 
 GCC_VERS = 4.1.1
 GCC_PKGVERS = $(GCC_VERS)
-GCC_RPMREL = 7
+GCC_RPMREL = 10
 NEWLIB_VERS = 1.15.0
 include ../gcc.am
 GCC_OPTS += --languages=cxx
 
 GDB_VERS = 6.5
 GDB_PKGVERS = $(GDB_VERS)
-GDB_RPMREL = 2
+GDB_RPMREL = 3
 include ../gdb.am
 GDB_OPTS +=

contrib/crossrpms/rtems4.7/i386/binutils-sources.add

@@ -1,5 +1,5 @@
 Source0:	ftp://ftp.gnu.org/pub/gnu/binutils/binutils-%{binutils_pkgvers}.tar.bz2
 %{?_without_sources:NoSource:	0}
 %if "%{binutils_version}" == "2.17"
-Patch0:		binutils-2.17-rtems4.7-20061021.diff
+Patch0:		binutils-2.17-rtems4.7-20071114.diff
 %endif

contrib/crossrpms/rtems4.7/i386/gdb-sources.add

@@ -1,7 +1,7 @@
 Source0:	ftp://ftp.gnu.org/pub/gnu/gdb/gdb-%{gdb_version}.tar.bz2
 %{?_without_sources:NoSource:	0}
 %if "%{gdb_version}" == "6.5"
-Patch0:		gdb-6.5-rtems-20060713.diff
+Patch0:		gdb-6.5-rtems4.7-20071115.diff
 %endif
 %if "%{gdb_version}" == "6.6"
 Patch0:		gdb-6.6-rtems4.7-20070218.diff

contrib/crossrpms/rtems4.7/m68k/Makefile.am

@@ -6,19 +6,19 @@ include $(top_srcdir)/mkspec.am
 
 BINUTILS_VERS = 2.17
 BINUTILS_PKGVERS = $(BINUTILS_VERS)
-BINUTILS_RPMREL = 4
+BINUTILS_RPMREL = 5
 include ../binutils.am
 BINUTILS_OPTS +=
 
 GCC_VERS = 4.1.1
 GCC_PKGVERS = $(GCC_VERS)
-GCC_RPMREL = 7
+GCC_RPMREL = 10
 NEWLIB_VERS = 1.15.0
 include ../gcc.am
 GCC_OPTS += --languages=cxx
 
 GDB_VERS = 6.5
 GDB_PKGVERS = $(GDB_VERS)
-GDB_RPMREL = 2
+GDB_RPMREL = 3
 include ../gdb.am
 GDB_OPTS +=

contrib/crossrpms/rtems4.7/m68k/binutils-sources.add

@@ -1,5 +1,5 @@
 Source0:	ftp://ftp.gnu.org/pub/gnu/binutils/binutils-%{binutils_pkgvers}.tar.bz2
 %{?_without_sources:NoSource:	0}
 %if "%{binutils_version}" == "2.17"
-Patch0:		binutils-2.17-rtems4.7-20061021.diff
+Patch0:		binutils-2.17-rtems4.7-20071114.diff
 %endif

contrib/crossrpms/rtems4.7/m68k/gdb-sources.add

@@ -1,7 +1,7 @@
 Source0:	ftp://ftp.gnu.org/pub/gnu/gdb/gdb-%{gdb_version}.tar.bz2
 %{?_without_sources:NoSource:	0}
 %if "%{gdb_version}" == "6.5"
-Patch0:		gdb-6.5-rtems-20060713.diff
+Patch0:		gdb-6.5-rtems4.7-20071115.diff
 %endif
 %if "%{gdb_version}" == "6.6"
 Patch0:		gdb-6.6-rtems4.7-20070218.diff

contrib/crossrpms/rtems4.7/mips/Makefile.am

@@ -6,19 +6,19 @@ include $(top_srcdir)/mkspec.am
 
 BINUTILS_VERS = 2.17
 BINUTILS_PKGVERS = $(BINUTILS_VERS)
-BINUTILS_RPMREL = 4
+BINUTILS_RPMREL = 5
 include ../binutils.am
 BINUTILS_OPTS +=
 
 GCC_VERS = 4.1.1
 GCC_PKGVERS = $(GCC_VERS)
-GCC_RPMREL = 8
+GCC_RPMREL = 10
 NEWLIB_VERS = 1.15.0
 include ../gcc.am
 GCC_OPTS += --languages=cxx
 
 GDB_VERS = 6.5
 GDB_PKGVERS = $(GDB_VERS)
-GDB_RPMREL = 2
+GDB_RPMREL = 3
 include ../gdb.am
 GDB_OPTS +=

contrib/crossrpms/rtems4.7/mips/binutils-sources.add

@@ -1,5 +1,5 @@
 Source0:	ftp://ftp.gnu.org/pub/gnu/binutils/binutils-%{binutils_pkgvers}.tar.bz2
 %{?_without_sources:NoSource:	0}
 %if "%{binutils_version}" == "2.17"
-Patch0:		binutils-2.17-rtems4.7-20061021.diff
+Patch0:		binutils-2.17-rtems4.7-20071114.diff
 %endif

contrib/crossrpms/rtems4.7/mips/gdb-sources.add

@@ -1,7 +1,7 @@
 Source0:	ftp://ftp.gnu.org/pub/gnu/gdb/gdb-%{gdb_version}.tar.bz2
 %{?_without_sources:NoSource:	0}
 %if "%{gdb_version}" == "6.5"
-Patch0:		gdb-6.5-rtems-20060713.diff
+Patch0:		gdb-6.5-rtems4.7-20071115.diff
 %endif
 %if "%{gdb_version}" == "6.6"
 Patch0:		gdb-6.6-rtems4.7-20070218.diff

contrib/crossrpms/rtems4.7/mipstx39/Makefile.am

@@ -7,6 +7,6 @@ include $(top_srcdir)/mkspec.am
 # We only want a gdb with a tx39 simulator in it.  We share the other tools
 GDB_VERS = 6.5
 GDB_PKGVERS = $(GDB_VERS)
-GDB_RPMREL = 2
+GDB_RPMREL = 3
 include ../gdb.am
 GDB_OPTS +=

contrib/crossrpms/rtems4.7/mipstx39/gdb-sources.add

@@ -1,7 +1,7 @@
 Source0:	ftp://ftp.gnu.org/pub/gnu/gdb/gdb-%{gdb_version}.tar.bz2
 %{?_without_sources:NoSource:	0}
 %if "%{gdb_version}" == "6.5"
-Patch0:		gdb-6.5-rtems-20060713.diff
+Patch0:		gdb-6.5-rtems4.7-20071115.diff
 %endif
 %if "%{gdb_version}" == "6.6"
 Patch0:		gdb-6.6-rtems4.7-20070218.diff

contrib/crossrpms/rtems4.7/powerpc/Makefile.am

@@ -6,19 +6,19 @@ include $(top_srcdir)/mkspec.am
 
 BINUTILS_VERS = 2.17
 BINUTILS_PKGVERS = $(BINUTILS_VERS)
-BINUTILS_RPMREL = 4
+BINUTILS_RPMREL = 5
 include ../binutils.am
 BINUTILS_OPTS +=
 
 GCC_VERS = 4.1.1
 GCC_PKGVERS = $(GCC_VERS)
-GCC_RPMREL = 7
+GCC_RPMREL = 10
 NEWLIB_VERS = 1.15.0
 include ../gcc.am
 GCC_OPTS += --languages=cxx
 
 GDB_VERS = 6.5
 GDB_PKGVERS = $(GDB_VERS)
-GDB_RPMREL = 2
+GDB_RPMREL = 3
 include ../gdb.am
 GDB_OPTS +=

contrib/crossrpms/rtems4.7/powerpc/binutils-sources.add

@@ -1,5 +1,5 @@
 Source0:	ftp://ftp.gnu.org/pub/gnu/binutils/binutils-%{binutils_pkgvers}.tar.bz2
 %{?_without_sources:NoSource:	0}
 %if "%{binutils_version}" == "2.17"
-Patch0:		binutils-2.17-rtems4.7-20061021.diff
+Patch0:		binutils-2.17-rtems4.7-20071114.diff
 %endif

contrib/crossrpms/rtems4.7/powerpc/gdb-sources.add

@@ -1,7 +1,7 @@
 Source0:	ftp://ftp.gnu.org/pub/gnu/gdb/gdb-%{gdb_version}.tar.bz2
 %{?_without_sources:NoSource:	0}
 %if "%{gdb_version}" == "6.5"
-Patch0:		gdb-6.5-rtems-20060713.diff
+Patch0:		gdb-6.5-rtems4.7-20071115.diff
 %endif
 %if "%{gdb_version}" == "6.6"
 Patch0:		gdb-6.6-rtems4.7-20070218.diff

contrib/crossrpms/rtems4.7/sh/Makefile.am

@@ -6,19 +6,19 @@ include $(top_srcdir)/mkspec.am
 
 BINUTILS_VERS = 2.17
 BINUTILS_PKGVERS = $(BINUTILS_VERS)
-BINUTILS_RPMREL = 4
+BINUTILS_RPMREL = 5
 include ../binutils.am
 BINUTILS_OPTS +=
 
 GCC_VERS = 4.1.1
 GCC_PKGVERS = $(GCC_VERS)
-GCC_RPMREL = 7
+GCC_RPMREL = 10
 NEWLIB_VERS = 1.15.0
 include ../gcc.am
 GCC_OPTS += --languages=cxx
 
 GDB_VERS = 6.5
 GDB_PKGVERS = $(GDB_VERS)
-GDB_RPMREL = 2
+GDB_RPMREL = 3
 include ../gdb.am
 GDB_OPTS +=

contrib/crossrpms/rtems4.7/sh/binutils-sources.add

@@ -1,5 +1,5 @@
 Source0:	ftp://ftp.gnu.org/pub/gnu/binutils/binutils-%{binutils_pkgvers}.tar.bz2
 %{?_without_sources:NoSource:	0}
 %if "%{binutils_version}" == "2.17"
-Patch0:		binutils-2.17-rtems4.7-20061021.diff
+Patch0:		binutils-2.17-rtems4.7-20071114.diff
 %endif

contrib/crossrpms/rtems4.7/sh/gdb-sources.add

@@ -1,7 +1,7 @@
 Source0:	ftp://ftp.gnu.org/pub/gnu/gdb/gdb-%{gdb_version}.tar.bz2
 %{?_without_sources:NoSource:	0}
 %if "%{gdb_version}" == "6.5"
-Patch0:		gdb-6.5-rtems-20060713.diff
+Patch0:		gdb-6.5-rtems4.7-20071115.diff
 %endif
 %if "%{gdb_version}" == "6.6"
 Patch0:		gdb-6.6-rtems4.7-20070218.diff

contrib/crossrpms/rtems4.7/sparc/Makefile.am

@@ -6,19 +6,19 @@ include $(top_srcdir)/mkspec.am
 
 BINUTILS_VERS = 2.17
 BINUTILS_PKGVERS = $(BINUTILS_VERS)
-BINUTILS_RPMREL = 4
+BINUTILS_RPMREL = 5
 include ../binutils.am
 BINUTILS_OPTS +=
 
 GCC_VERS = 4.1.1
 GCC_PKGVERS = $(GCC_VERS)
-GCC_RPMREL = 7
+GCC_RPMREL = 11
 NEWLIB_VERS = 1.15.0
 include ../gcc.am
 GCC_OPTS += --languages=cxx
 
 GDB_VERS = 6.5
 GDB_PKGVERS = $(GDB_VERS)
-GDB_RPMREL = 2
+GDB_RPMREL = 3
 include ../gdb.am
 GDB_OPTS +=

contrib/crossrpms/rtems4.7/sparc/binutils-sources.add

@@ -1,5 +1,5 @@
 Source0:	ftp://ftp.gnu.org/pub/gnu/binutils/binutils-%{binutils_pkgvers}.tar.bz2
 %{?_without_sources:NoSource:	0}
 %if "%{binutils_version}" == "2.17"
-Patch0:		binutils-2.17-rtems4.7-20061021.diff
+Patch0:		binutils-2.17-rtems4.7-20071114.diff
 %endif

contrib/crossrpms/rtems4.7/sparc/gcc-sources.add

@@ -1,12 +1,12 @@
-Source0: 	ftp://ftp.gnu.org/gnu/gcc/gcc-%{gcc_version}/gcc-core-%{gcc_pkgvers}.tar.bz2
+Source0:	ftp://ftp.gnu.org/gnu/gcc/gcc-%{gcc_version}/gcc-core-%{gcc_pkgvers}.tar.bz2
 %if "%{gcc_version}" == "4.0.3"
 Patch0:		gcc-core-4.0.3-rtems-20060822.diff
 %endif
 %if "%{gcc_version}" == "4.1.1"
-Patch0:		gcc-core-4.1.1-rtems4.7-20070102.diff
+Patch0:		gcc-core-4.1.1-rtems4.7-20070613.diff
 %endif
 %if "%{gcc_version}" == "4.1.2"
-Patch0:		gcc-core-4.1.2-rtems4.7-20070216.diff
+Patch0:		gcc-core-4.1.2-rtems4.7-20070613.diff
 %endif
 %{?_without_sources:NoSource:	0}
 

contrib/crossrpms/rtems4.7/sparc/gdb-sources.add

@@ -1,7 +1,7 @@
 Source0:	ftp://ftp.gnu.org/pub/gnu/gdb/gdb-%{gdb_version}.tar.bz2
 %{?_without_sources:NoSource:	0}
 %if "%{gdb_version}" == "6.5"
-Patch0:		gdb-6.5-rtems-20060713.diff
+Patch0:		gdb-6.5-rtems4.7-20071115.diff
 %endif
 %if "%{gdb_version}" == "6.6"
 Patch0:		gdb-6.6-rtems4.7-20070218.diff

contrib/crossrpms/rtems4.7/sparc/rtems-4.7-sparc-rtems4.7-gcc.spec

@@ -0,0 +1,549 @@
+#
+# Please send bugfixes or comments to
+# 	http://www.rtems.org/bugzilla
+#
+
+%define _prefix			/opt/rtems-4.7
+%define _infodir		%{_prefix}/info
+%define _mandir			%{_prefix}/man
+
+%ifos cygwin cygwin32 mingw mingw32
+%define _exeext .exe
+%else
+%define _exeext %{nil}
+%endif
+
+
+%define gcc_pkgvers 4.1.1
+%define gcc_version 4.1.1
+%define gcc_rpmvers %{expand:%(echo "4.1.1" | tr - _ )}
+
+%define newlib_version		1.15.0
+%define gccnewlib_version	gcc%{gcc_version}newlib%{newlib_version}
+
+Name:         	rtems-4.7-sparc-rtems4.7-gcc
+Summary:      	sparc-rtems4.7 gcc
+
+Group:	      	Development/Tools
+Version:        %{gcc_rpmvers}
+Release:      	11%{?dist}
+License:      	GPL
+URL:		http://gcc.gnu.org
+BuildRoot:	%{_tmppath}/%{name}-%{version}-%{release}-root-%(%{__id_u} -n)
+
+%define _use_internal_dependency_generator 0
+
+%if "%{gcc_version}" >= "4.2.0"
+BuildRequires:	flex bison
+%endif
+
+BuildRequires:	texinfo >= 4.2
+BuildRequires:	rtems-4.7-sparc-rtems4.7-binutils
+
+Requires:	rtems-4.7-gcc-common
+Requires:	rtems-4.7-sparc-rtems4.7-binutils
+Requires:	rtems-4.7-sparc-rtems4.7-newlib = %{newlib_version}-%{release}
+
+
+%if "%{gcc_version}" >= "3.4"
+%define gcclib %{_libdir}/gcc
+%define gccexec %{_libexecdir}/gcc
+%else
+%define gcclib %{_libdir}/gcc-lib
+%define gccexec %{_libdir}/gcc-lib
+%endif
+
+Source0:	ftp://ftp.gnu.org/gnu/gcc/gcc-%{gcc_version}/gcc-core-%{gcc_pkgvers}.tar.bz2
+%if "%{gcc_version}" == "4.0.3"
+Patch0:		gcc-core-4.0.3-rtems-20060822.diff
+%endif
+%if "%{gcc_version}" == "4.1.1"
+Patch0:		gcc-core-4.1.1-rtems4.7-20070613.diff
+%endif
+%if "%{gcc_version}" == "4.1.2"
+Patch0:		gcc-core-4.1.2-rtems4.7-20070613.diff
+%endif
+%{?_without_sources:NoSource:	0}
+
+Source1: 	ftp://ftp.gnu.org/gnu/gcc/gcc-%{gcc_version}/gcc-g++-%{gcc_pkgvers}.tar.bz2
+%{?_without_sources:NoSource:	1}
+
+Source50:	ftp://sources.redhat.com/pub/newlib/newlib-%{newlib_version}.tar.gz
+%if "%{newlib_version}" == "1.14.0"
+Patch50:	newlib-1.14.0-rtems4.7-20061019.diff
+%endif
+%if "%{newlib_version}" == "1.15.0"
+Patch50:	newlib-1.15.0-rtems4.7-20070208.diff
+%endif
+%{?_without_sources:NoSource:	50}
+
+%description
+Cross gcc for sparc-rtems4.7.
+
+%prep
+%setup -c -T -n %{name}-%{version}
+
+%setup -q -T -D -n %{name}-%{version} -a0
+%{?PATCH0:%patch0 -p0}
+
+%setup -q -T -D -n %{name}-%{version} -a1
+%{?PATCH1:%patch1 -p0}
+
+
+
+
+
+%setup -q -T -D -n %{name}-%{version} -a50
+cd newlib-%{newlib_version}
+%{?PATCH50:%patch50 -p1}
+cd ..
+  # Copy the C library into gcc's source tree
+  ln -s ../newlib-%{newlib_version}/newlib gcc-%{gcc_pkgvers}
+
+%if "%{gcc_version}" < "4.1.0"
+  sed -e 's/\(version_string.* = \"[^\"]*\)/\1 (RTEMS gcc-%{gcc_version}\/newlib-%{newlib_version}-%release)/' \
+  gcc-%{gcc_pkgvers}/gcc/version.c > gcc-%{gcc_pkgvers}/gcc/version.c~
+%else
+  sed -e 's/^#define VERSUFFIX.*$/#define VERSUFFIX \" (RTEMS gcc-%{gcc_version}\/newlib-%{newlib_version}-%{release})\"/' \
+    gcc-%{gcc_pkgvers}/gcc/version.c > gcc-%{gcc_pkgvers}/gcc/version.c~
+%endif
+  mv gcc-%{gcc_pkgvers}/gcc/version.c~ gcc-%{gcc_pkgvers}/gcc/version.c
+
+
+  # Fix timestamps
+  cd gcc-%{gcc_pkgvers}
+  contrib/gcc_update --touch
+  cd ..
+%build
+  mkdir -p build
+
+  cd build
+
+  languages="c"
+  languages="$languages,c++"
+  export PATH="%{_bindir}:${PATH}"
+
+  CC="%{__cc} ${RPM_OPT_FLAGS}" \
+  ../gcc-%{gcc_pkgvers}/configure \
+    --prefix=%{_prefix} \
+    --bindir=%{_bindir} \
+    --exec_prefix=%{_exec_prefix} \
+    --includedir=%{_includedir} \
+    --libdir=%{_libdir} \
+    --libexecdir=%{_libexecdir} \
+    --mandir=%{_mandir} \
+    --infodir=%{_infodir} \
+    --datadir=%{_datadir} \
+    --build=%_build --host=%_host \
+    --target=sparc-rtems4.7 \
+    --with-gnu-as --with-gnu-ld --verbose \
+    --with-newlib \
+    --with-system-zlib \
+    --disable-nls --without-included-gettext \
+    --disable-win32-registry \
+    --enable-version-specific-runtime-libs \
+    --enable-threads \
+    --enable-languages="$languages" $optargs
+
+%if "%_host" != "%_build"
+  # Bug in gcc-3.2.1:
+  # Somehow, gcc doesn't get syslimits.h right for Cdn-Xs
+  mkdir -p gcc/include
+  cp ../gcc-%{gcc_pkgvers}/gcc/gsyslimits.h gcc/include/syslimits.h
+%endif
+
+  make all
+  make info
+  cd ..
+
+%install
+  export PATH="%{_bindir}:${PATH}"
+  rm -rf $RPM_BUILD_ROOT
+
+  cd build
+
+  make DESTDIR=$RPM_BUILD_ROOT install
+  cd ..
+
+  cd build/sparc-rtems4.7/newlib
+  make DESTDIR=$RPM_BUILD_ROOT install-info
+  cd ../../..
+
+%if "%{gcc_version}" <= "4.1.2"
+# Misplaced header file
+  if test -f $RPM_BUILD_ROOT%{_includedir}/mf-runtime.h; then
+    mv $RPM_BUILD_ROOT%{_includedir}/mf-runtime.h \
+      $RPM_BUILD_ROOT%{gcclib}/sparc-rtems4.7/%{gcc_version}/include/
+  fi
+%endif
+
+  # host library
+  rm -f  ${RPM_BUILD_ROOT}%{_libdir}/libiberty.a
+
+  # We use the version from binutils
+  rm -f $RPM_BUILD_ROOT%{_bindir}/sparc-rtems4.7-c++filt%{_exeext}
+
+
+  # We don't ship info/dir
+  rm -f $RPM_BUILD_ROOT%{_infodir}/dir
+  touch $RPM_BUILD_ROOT%{_infodir}/dir
+
+
+%if "%{gcc_version}" >= "3.4"
+  # Bug in gcc-3.4.0pre
+  rm -f $RPM_BUILD_ROOT%{_bindir}/sparc-rtems4.7-sparc-rtems4.7-gcjh%{_exeext}
+%endif
+
+%if "%{gcc_version}" >= "3.3"
+  # Bug in gcc-3.3.x/gcc-3.4.x: Despite we don't need fixincludes, it installs
+  # the fixinclude-install-tools
+  rm -rf ${RPM_BUILD_ROOT}%{gcclib}/sparc-rtems4.7/%{gcc_version}/install-tools
+  rm -rf ${RPM_BUILD_ROOT}%{gccexec}/sparc-rtems4.7/%{gcc_version}/install-tools
+%endif
+
+  # Collect multilib subdirectories
+  f=`build/gcc/xgcc -Bbuild/gcc/ --print-multi-lib | sed -e 's,;.*$,,'`
+
+  echo "%defattr(-,root,root,-)" > build/files.newlib
+  TGTDIR="%{_exec_prefix}/sparc-rtems4.7/lib"
+  for i in $f; do
+    case $i in
+    \.) echo "%dir ${TGTDIR}" >> build/files.newlib
+      ;;
+    *)  echo "%dir ${TGTDIR}/$i" >> build/files.newlib
+      ;;
+    esac
+  done
+
+  rm -f dirs ;
+  echo "%defattr(-,root,root,-)" >> dirs
+  echo "%dir %{_prefix}" >> dirs
+  echo "%dir %{_libdir}" >> dirs
+%if "%{gcc_version}" >= "3.4"
+  echo "%dir %{_libexecdir}" >> dirs
+%endif
+  echo "%dir %{gcclib}" >> dirs
+  echo "%dir %{gcclib}/sparc-rtems4.7" >> dirs
+
+  TGTDIR="%{gcclib}/sparc-rtems4.7/%{gcc_version}"
+  for i in $f; do
+    case $i in
+    \.) echo "%dir ${TGTDIR}" >> dirs
+      ;;
+    *)  echo "%dir ${TGTDIR}/$i" >> dirs
+      ;;
+    esac
+  done
+
+  # Collect files to go into different packages
+  cp dirs build/files.gcc
+  cp dirs build/files.g77
+  cp dirs build/files.gfortran
+  cp dirs build/files.objc
+  cp dirs build/files.gcj
+  cp dirs build/files.g++
+
+  TGTDIR="%{gcclib}/sparc-rtems4.7/%{gcc_version}"
+  f=`find ${RPM_BUILD_ROOT}${TGTDIR} ! -type d -print | sed -e "s,^$RPM_BUILD_ROOT,,g"`;
+  for i in $f; do
+    case $i in
+    *lib*.la) rm ${RPM_BUILD_ROOT}/$i ;; # ignore: gcc produces bogus libtool libs
+    *f771) ;;
+    *f951) ;;
+    *cc1) ;;
+    *cc1obj) ;;
+    *cc1plus) ;; # ignore: explicitly put into rpm elsewhere
+    *collect2) ;;
+    *libobjc*) echo "$i" >> build/files.objc ;;
+    *include/objc*) ;;
+    *include/g++*);;
+    *include/c++*);;
+    *adainclude*);;
+    *adalib*);;
+    *gnat1);;
+    *jc1) ;;
+    *jvgenmain) ;;
+    */libgfortran*.*) echo "$i" >> build/files.gfortran ;;
+    */libstdc++.*) echo "$i" >> build/files.g++ ;;
+    */libsupc++.*) echo "$i" >> build/files.g++ ;;
+    *) echo "$i" >> build/files.gcc ;;
+    esac
+  done
+
+  TGTDIR="%{_exec_prefix}/sparc-rtems4.7/lib"
+  f=`find ${RPM_BUILD_ROOT}${TGTDIR} ! -type d -print | sed -e "s,^$RPM_BUILD_ROOT,,g"`;
+  for i in $f; do
+    case $i in
+    *lib*.la) rm ${RPM_BUILD_ROOT}/$i;; # ignore - gcc produces bogus libtool libs
+    *libiberty.a) rm ${RPM_BUILD_ROOT}/$i ;; # ignore - GPL'ed
+# all other files belong to newlib
+    *) echo "$i" >> build/files.newlib ;; 
+    esac
+  done
+# Extract %%__os_install_post into os_install_post~
+cat << \EOF > os_install_post~
+%__os_install_post
+EOF
+
+# Generate customized brp-*scripts
+cat os_install_post~ | while read a x y; do
+case $a in
+# Prevent brp-strip* from trying to handle foreign binaries
+*/brp-strip*)
+  b=$(basename $a)
+  sed -e 's,find $RPM_BUILD_ROOT,find $RPM_BUILD_ROOT%_bindir $RPM_BUILD_ROOT%_libexecdir,' $a > $b
+  chmod a+x $b
+  ;;
+# Fix up brp-compress to handle %%_prefix != /usr
+*/brp-compress*)
+  b=$(basename $a)
+  sed -e 's,\./usr/,.%{_prefix}/,g' < $a > $b
+  chmod a+x $b
+  ;;
+esac
+done
+
+sed -e 's,^[ ]*/usr/lib/rpm.*/brp-strip,./brp-strip,' \
+  -e 's,^[ ]*/usr/lib/rpm.*/brp-compress,./brp-compress,' \
+< os_install_post~ > os_install_post 
+%define __os_install_post . ./os_install_post
+
+
+cat << EOF > %{_builddir}/%{name}-%{gcc_rpmvers}/find-provides
+#!/bin/sh
+grep -E -v '^${RPM_BUILD_ROOT}%{_exec_prefix}/sparc-rtems4.7/(lib|include|sys-root)' \
+  | grep -v '^${RPM_BUILD_ROOT}%{gcclib}/sparc-rtems4.7/' | %__find_provides
+EOF
+chmod +x %{_builddir}/%{name}-%{gcc_rpmvers}/find-provides
+%define __find_provides %{_builddir}/%{name}-%{gcc_rpmvers}/find-provides
+
+cat << EOF > %{_builddir}/%{name}-%{gcc_rpmvers}/find-requires
+#!/bin/sh
+grep -E -v '^${RPM_BUILD_ROOT}%{_exec_prefix}/sparc-rtems4.7/(lib|include|sys-root)' \
+  | grep -v '^${RPM_BUILD_ROOT}%{gcclib}/sparc-rtems4.7/' | %__find_requires
+EOF
+chmod +x %{_builddir}/%{name}-%{gcc_rpmvers}/find-requires
+%define __find_requires %{_builddir}/%{name}-%{gcc_rpmvers}/find-requires
+
+%clean
+  rm -rf $RPM_BUILD_ROOT
+
+# ==============================================================
+# rtems-4.7-sparc-rtems4.7-gcc
+# ==============================================================
+# %package -n rtems-4.7-sparc-rtems4.7-gcc
+# Summary:        GNU cc compiler for sparc-rtems4.7
+# Group:          Development/Tools
+# Version:        %{gcc_rpmvers}
+# Requires:       rtems-4.7-sparc-rtems4.7-binutils
+# Requires:       rtems-4.7-sparc-rtems4.7-newlib = %{newlib_version}-%{release}
+# License:	GPL
+
+# %if %build_infos
+# Requires:      rtems-4.7-gcc-common
+# %endif
+
+%description -n rtems-4.7-sparc-rtems4.7-gcc
+GNU cc compiler for sparc-rtems4.7.
+
+%files -n rtems-4.7-sparc-rtems4.7-gcc -f build/files.gcc
+%defattr(-,root,root)
+%dir %{_mandir}
+%dir %{_mandir}/man1
+%{_mandir}/man1/sparc-rtems4.7-gcc.1*
+%if "%{gcc_version}" >= "3.4"
+%{_mandir}/man1/sparc-rtems4.7-cpp.1*
+%{_mandir}/man1/sparc-rtems4.7-gcov.1*
+%endif
+
+%dir %{_bindir}
+%{_bindir}/sparc-rtems4.7-cpp%{_exeext}
+%{_bindir}/sparc-rtems4.7-gcc%{_exeext}
+%if "%{gcc_version}" >= "3.3"
+%{_bindir}/sparc-rtems4.7-gcc-%{gcc_version}%{_exeext}
+%endif
+%{_bindir}/sparc-rtems4.7-gcov%{_exeext}
+%{_bindir}/sparc-rtems4.7-gccbug
+
+%dir %{gcclib}/sparc-rtems4.7/%{gcc_version}/include
+%if "%{gcc_version}" > "4.0.3"
+%if "sparc-rtems4.7" != "bfin-rtems4.7"
+%dir %{gcclib}/sparc-rtems4.7/%{gcc_version}/include/ssp
+%endif
+%endif
+
+%dir %{gccexec}
+%dir %{gccexec}/sparc-rtems4.7
+%dir %{gccexec}/sparc-rtems4.7/%{gcc_version}
+%{gccexec}/sparc-rtems4.7/%{gcc_version}/cc1%{_exeext}
+%{gccexec}/sparc-rtems4.7/%{gcc_version}/collect2%{_exeext}
+
+# ==============================================================
+# rtems-4.7-rtems4.7-base-gcc
+# ==============================================================
+%package -n rtems-4.7-gcc-common
+Summary:	Base package for rtems gcc and newlib C Library
+Group:          Development/Tools
+Version:        %{gcc_rpmvers}
+License:	GPL
+
+Requires(post): 	/sbin/install-info
+Requires(preun):	/sbin/install-info
+
+Provides:	rtems-4.7-rtems4.7-base-gcc = %{gcc_version}-%{release}
+Obsoletes:	rtems-4.7-rtems4.7-base-gcc < %{gcc_rpmvers}-%{release}
+Provides:	rtems-4.7-rtems-base-gcc = %{gcc_version}-%{release}
+Obsoletes:	rtems-4.7-rtems-base-gcc < %{gcc_rpmvers}-%{release}
+
+%description -n rtems-4.7-gcc-common
+
+GCC files that are shared by all targets.
+
+%files -n rtems-4.7-gcc-common
+%defattr(-,root,root)
+%dir %{_infodir}
+%ghost %{_infodir}/dir
+%{_infodir}/cpp.info*
+%{_infodir}/cppinternals.info*
+%{_infodir}/gcc.info*
+%{_infodir}/gccint.info*
+%if "%{gcc_version}" >= "3.4"
+%{_infodir}/gccinstall.info*
+%endif
+
+%dir %{_mandir}
+%if "%{gcc_version}" < "3.4"
+%dir %{_mandir}/man1
+%{_mandir}/man1/cpp.1*
+%{_mandir}/man1/gcov.1*
+%endif
+%dir %{_mandir}/man7
+%{_mandir}/man7/fsf-funding.7*
+%{_mandir}/man7/gfdl.7*
+%{_mandir}/man7/gpl.7*
+
+%post -n rtems-4.7-gcc-common
+  /sbin/install-info --info-dir=%{_infodir} %{_infodir}/cpp.info.gz || :
+  /sbin/install-info --info-dir=%{_infodir} %{_infodir}/cppinternals.info.gz || :
+  /sbin/install-info --info-dir=%{_infodir} %{_infodir}/gcc.info.gz || :
+  /sbin/install-info --info-dir=%{_infodir} %{_infodir}/gccint.info.gz || :
+%if "%{gcc_version}" >= "3.4"
+  /sbin/install-info --info-dir=%{_infodir} %{_infodir}/gccinstall.info.gz || :
+%endif
+
+%preun -n rtems-4.7-gcc-common
+if [ $1 -eq 0 ]; then
+  /sbin/install-info --delete --info-dir=%{_infodir} %{_infodir}/cpp.info.gz || :
+  /sbin/install-info --delete --info-dir=%{_infodir} %{_infodir}/cppinternals.info.gz || :
+  /sbin/install-info --delete --info-dir=%{_infodir} %{_infodir}/gcc.info.gz || :
+  /sbin/install-info --delete --info-dir=%{_infodir} %{_infodir}/gccint.info.gz || :
+%if "%{gcc_version}" >= "3.4"
+  /sbin/install-info --delete --info-dir=%{_infodir} %{_infodir}/gccinstall.info.gz || :
+%endif
+fi
+
+# ==============================================================
+# rtems-4.7-sparc-rtems4.7-gcc-c++
+# ==============================================================
+%package -n rtems-4.7-sparc-rtems4.7-gcc-c++
+Summary:	GCC c++ compiler for sparc-rtems4.7
+Group:		Development/Tools
+Version:        %{gcc_rpmvers}
+License:	GPL
+
+Provides:	rtems-4.7-sparc-rtems4.7-c++ = %{gcc_rpmvers}-%{release}
+Obsoletes:	rtems-4.7-sparc-rtems4.7-c++ < %{gcc_rpmvers}-%{release}
+
+Requires:       rtems-4.7-gcc-common
+Requires:       rtems-4.7-sparc-rtems4.7-gcc = %{gcc_rpmvers}-%{release}
+
+%description -n rtems-4.7-sparc-rtems4.7-gcc-c++
+GCC c++ compiler for sparc-rtems4.7.
+
+%files -n rtems-4.7-sparc-rtems4.7-gcc-c++ -f build/files.g++
+%defattr(-,root,root)
+%{_mandir}/man1/sparc-rtems4.7-g++.1*
+
+%{_bindir}/sparc-rtems4.7-c++%{_exeext}
+%{_bindir}/sparc-rtems4.7-g++%{_exeext}
+
+%dir %{gccexec}
+%dir %{gccexec}/sparc-rtems4.7
+%dir %{gccexec}/sparc-rtems4.7/%{gcc_version}
+%{gccexec}/sparc-rtems4.7/%{gcc_version}/cc1plus%{_exeext}
+
+%dir %{gcclib}/sparc-rtems4.7/%{gcc_version}/include
+%if "%{gcc_version}" >= "3.2"
+%{gcclib}/sparc-rtems4.7/%{gcc_version}/include/c++
+%else
+%{gcclib}/sparc-rtems4.7/%{gcc_version}/include/g++
+%endif
+
+
+
+# ==============================================================
+# rtems-4.7-sparc-rtems4.7-newlib
+# ==============================================================
+%package -n rtems-4.7-sparc-rtems4.7-newlib
+Summary:      	C Library (newlib) for sparc-rtems4.7
+Group: 		Development/Tools
+License:	Distributable
+Version:	%{newlib_version}
+
+Provides:	rtems-4.7-sparc-rtems4.7-libc = %{newlib_version}-%{release}
+Obsoletes:	rtems-4.7-sparc-rtems4.7-libc < %{newlib_version}-%{release}
+
+Requires:	rtems-4.7-newlib-common
+
+%description -n rtems-4.7-sparc-rtems4.7-newlib
+Newlib C Library for sparc-rtems4.7.
+
+%files -n rtems-4.7-sparc-rtems4.7-newlib -f build/files.newlib
+%defattr(-,root,root)
+%dir %{_prefix}
+%dir %{_exec_prefix}/sparc-rtems4.7
+%{_exec_prefix}/sparc-rtems4.7/include
+
+# ==============================================================
+# rtems-4.7-newlib-common
+# ==============================================================
+%package -n rtems-4.7-newlib-common
+Summary:	Base package for RTEMS newlib C Library
+Group:          Development/Tools
+Version:        %{newlib_version}
+License:	Distributable
+
+Provides:	rtems-4.7-rtems4.7-base-newlib = %{newlib_version}-%{release}
+Obsoletes:	rtems-4.7-rtems4.7-base-newlib < %{newlib_version}-%{release}
+Provides:	rtems-4.7-rtems-base-newlib = %{newlib_version}-%{release}
+Obsoletes:	rtems-4.7-rtems-base-newlib < %{newlib_version}-%{release}
+
+Provides:	rtems-4.7-rtems4.7-base-libc = %{newlib_version}-%{release}
+Obsoletes:	rtems-4.7-rtems4.7-base-libc < %{newlib_version}-%{release}
+Provides:	rtems-4.7-rtems-base-libc = %{newlib_version}-%{release}
+Obsoletes:	rtems-4.7-rtems-base-libc < %{newlib_version}-%{release}
+
+
+Requires(post): 	/sbin/install-info
+Requires(preun):	/sbin/install-info
+
+%description -n rtems-4.7-newlib-common
+newlib files that are shared by all targets.
+
+%files -n rtems-4.7-newlib-common
+%defattr(-,root,root)
+%dir %{_infodir}
+%ghost %{_infodir}/dir
+%{_infodir}/libc.info*
+%{_infodir}/libm.info*
+
+%post -n rtems-4.7-newlib-common
+  /sbin/install-info --info-dir=%{_infodir} %{_infodir}/libc.info.gz || :
+  /sbin/install-info --info-dir=%{_infodir} %{_infodir}/libm.info.gz || :
+
+%preun -n rtems-4.7-newlib-common
+if [ $1 -eq 0 ]; then
+  /sbin/install-info --delete --info-dir=%{_infodir} %{_infodir}/libc.info.gz || :
+  /sbin/install-info --delete --info-dir=%{_infodir} %{_infodir}/libm.info.gz || :
+fi
+

contrib/repo-conf/Makefile.am

@@ -10,6 +10,7 @@ nobase_aptconf_DATA += apt/vendors.list.d/rtems.list
 apt/sources.list.d/rtems-@RTEMS_API@.list: apt/sources.list.d/rtems.list.in
 	@$(mkdir_p) apt/sources.list.d
 	sed -e 's,[@]RTEMS_API[@],@RTEMS_API@,' \
+	  -e 's,[@]OS_SUBDIR[@],@OS_SUBDIR@,' \
 	  < $(srcdir)/apt/sources.list.d/rtems.list.in \
 	  > apt/sources.list.d/rtems-@RTEMS_API@.list
 CLEANFILES += apt/sources.list.d/rtems-@RTEMS_API@.list
@@ -24,6 +25,7 @@ yum.repos.d/rtems-@RTEMS_API@.repo: yum.repos.d/rtems.repo.in
 	@$(mkdir_p) yum.repos.d
 	sed -e 's,[@]sysconfdir[@],$(sysconfdir),' \
 	  -e 's,[@]RTEMS_API[@],@RTEMS_API@,' \
+	  -e 's,[@]OS_SUBDIR[@],@OS_SUBDIR@,' \
 	  < $(srcdir)/yum.repos.d/rtems.repo.in \
 	  > yum.repos.d/rtems-@RTEMS_API@.repo
 CLEANFILES += yum.repos.d/rtems-@RTEMS_API@.repo

contrib/repo-conf/apt/sources.list.d/rtems.list.in

@@ -1,21 +1,21 @@
 ## rtems-@RTEMS_API@ sources.list entries for apt-rpm with repomd support,
 ## http://apt-rpm.laiskiainen.org/
 
-repomd ftp://ftp.rtems.org/pub/rtems/linux/@RTEMS_API@ fedora/$(VERSION)/$(ARCH)
+repomd ftp://ftp.rtems.org/pub/rtems/linux/@RTEMS_API@ @OS_SUBDIR@$(VERSION)/$(ARCH)
 
 ## uncomment the line below if you want to access the *.src.rpms
-# repomd-src ftp://ftp.rtems.org/pub/rtems/linux/@RTEMS_API@ fedora/$(VERSION)/SRPMS
+# repomd-src ftp://ftp.rtems.org/pub/rtems/linux/@RTEMS_API@ @OS_SUBDIR@$(VERSION)/SRPMS
 
 ## uncomment the line below if you want to access the *-debuginfo*.rpms
-# repomd-debug ftp://ftp.rtems.org/pub/rtems/linux/@RTEMS_API@ fedora/$(VERSION)/$(ARCH)/debug
+# repomd-debug ftp://ftp.rtems.org/pub/rtems/linux/@RTEMS_API@ @OS_SUBDIR@$(VERSION)/$(ARCH)/debug
 
 
 ## rtems/testing repos
 
-# repomd ftp://ftp.rtems.org/pub/rtems/linux/testing/@RTEMS_API@ fedora/$(VERSION)/$(ARCH)
+# repomd ftp://ftp.rtems.org/pub/rtems/linux/testing/@RTEMS_API@ @OS_SUBDIR@$(VERSION)/$(ARCH)
 
 ## uncomment the line below if you want to access the *.src.rpms
-# repomd-src ftp://ftp.rtems.org/pub/rtems/linux/testing/@RTEMS_API@ fedora/$(VERSION)/SRPMS
+# repomd-src ftp://ftp.rtems.org/pub/rtems/linux/testing/@RTEMS_API@ @OS_SUBDIR@$(VERSION)/SRPMS
 
 ## uncomment the line below if you want to access the *-debuginfo*.rpms
-# repomd-debug ftp://ftp.rtems.org/pub/rtems/linux/testing/@RTEMS_API@ fedora/$(VERSION)/$(ARCH)/debug
+# repomd-debug ftp://ftp.rtems.org/pub/rtems/linux/testing/@RTEMS_API@ @OS_SUBDIR@$(VERSION)/$(ARCH)/debug

contrib/repo-conf/configure.ac

@@ -1,13 +1,18 @@
 #                                               -*- Autoconf -*-
 # Process this file with autoconf to produce a configure script.
 
-AC_PREREQ(2.60)
-AC_INIT([rtems-]_RTEMS_API[-repo-conf],[0.5],[http://www.rtems.org/bugzilla],
+AC_PREREQ(2.61)
+AC_INIT([rtems-]_RTEMS_API[-repo-conf],[0.10],[http://www.rtems.org/bugzilla],
   [rtems-]_RTEMS_API[-repo-conf])
 RTEMS_VERSIONING
 AC_CONFIG_SRCDIR([gpg])
 AC_CONFIG_AUX_DIR([.])
 AC_SUBST([RTEMS_API],[_RTEMS_API])
 AM_INIT_AUTOMAKE([dist-bzip2 no-dist-gzip 1.10])
+AC_ARG_ENABLE(os_subdir,AS_HELP_STRING(
+[--enable-os-subdir=<dir> ... os subdirectory]),
+[os_subdir="$enable_os_subdir"],
+[os_subdir="fedora/"])
+AC_SUBST([OS_SUBDIR],[$os_subdir])
 AC_CONFIG_FILES([Makefile])
 AC_OUTPUT