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1 Commits
4.6.4 ... 4.6.0

Author SHA1 Message Date
cvs2git
f810577581 This commit was manufactured by cvs2svn to create tag 'rtems-4-6-0'.
Sprout from rtems-4-6-branch 2004-02-09 13:21:25 UTC cvs2git <rtems-devel@rtems.org> 'This commit was manufactured by cvs2svn to create branch 'rtems-4-6-branch'.'
Delete:
    scripts/rtems/rtems-source.add
2004-02-09 13:21:26 +00:00
400 changed files with 2150 additions and 5790 deletions

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@@ -1,70 +1,3 @@
2005-09-01 Joel Sherrill <joel@OARcorp.com>
* VERSION: Updated to rtems-4.6.4.
2005-09-01 Joel Sherrill <joel@OARcorp.com>
* aclocal/version.m4: Updated to rtems-4.6.4.
2005-03-17 Joel Sherrill <joel@OARcorp.com>
* VERSION: Updated to rtems-4.6.3.
2004-11-10 Richard Campbell <richard.campbell@oarcorp.com>
* aclocal/bsp-alias.m4: Add MVME2100 BSP.
2004-10-18 Joel Sherrill <joel@OARcorp.com>
* VERSION: Updated to rtems-4.6.2.
2004-10-18 Joel Sherrill <joel@OARcorp.com>
* aclocal/version.m4: Updated to rtems-4.6.2.
2004-08-18 Ralf Corsepius <ralf_corsepius@rtems.org>
PR 673/make_build
* config-ml.in: Quote 'cd "${ml_origdir}"'.
Quote 'cd "${ML_POPDIR}"'.
2004-08-18 Ralf Corsepius <ralf_corsepius@rtems.org>
PR 673/make_build
* aclocal/ppc.m4 (RTEMS_PPC_EXCEPTIONS): Quote ac_popdir uses.
* aclocal/target.m4 (_RTEMS_POP_BUILDDIR): Ditto.
* acinclude.m4 (_RTEMS_CONFIG_SUBDIR): Quote ac_popdir uses.
2004-08-18 Ralf Corsepius <ralf_corsepius@rtems.org>
* acinclude.m4: Fix m4-underquoting.
2004-08-18 Ralf Corsepius <ralf_corsepius@rtems.org>
* aclocal/bsp-alias.m4, aclocal/bsp-arg-enable.m4,
aclocal/canonical-host.m4, aclocal/canonical-target-name.m4,
aclocal/canonicalize-tools.m4, aclocal/check-bsps.m4,
aclocal/check-cpu.m4, aclocal/check-custom-bsp.m4, aclocal/check-cxx.m4,
aclocal/check-itron.m4, aclocal/check-multiprocessing.m4,
aclocal/check-networking.m4, aclocal/check-newlib.m4,
aclocal/check-posix.m4, aclocal/check-rdbg.m4, aclocal/check-tool.m4,
aclocal/config-subdirs.m4, aclocal/enable-bare.m4,
aclocal/enable-cxx.m4, aclocal/enable-inlines.m4,
aclocal/enable-itron.m4, aclocal/enable-multiprocessing.m4,
aclocal/enable-networking.m4, aclocal/enable-posix.m4,
aclocal/enable-rdbg.m4, aclocal/enable-rtemsbsp.m4,
aclocal/enable-tests.m4, aclocal/env-rtemsbsp.m4,
aclocal/gcc-isystem.m4, aclocal/gcc-pipe.m4, aclocal/gcc-specs.m4,
aclocal/i386-gas-code16.m4, aclocal/multilib.m4, aclocal/path-ksh.m4,
aclocal/path-perl.m4, aclocal/prog-cc.m4, aclocal/prog-cxx.m4,
aclocal/project-root.m4, aclocal/rtems-debug.m4,
aclocal/rtems-test-no-pause.m4, aclocal/rtems-top.m4,
aclocal/target.m4, aclocal/tool-paths.m4: Fix m4-underquoting.
2004-04-08 Joel Sherrill <joel@OARcorp.com>
* aclocal/version.m4: Updated to rtems-4.6.1.
2004-02-03 Joel Sherrill <joel@OARcorp.com>
* VERSION: Updated to rtems-4.6.0.

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@@ -4,4 +4,4 @@
# $Id$
#
RTEMS Version 4.6.4
RTEMS Version 4.6.0

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@@ -261,7 +261,7 @@ if test "$no_recursion" != yes; then
AC_MSG_ERROR([$ac_sub_configure failed for $ac_dir])
fi
cd "$ac_popdir"
cd $ac_popdir
done
fi
fi
@@ -332,7 +332,7 @@ m4_divert_text([DEFAULTS],
m4_expand_once([_RTEMS_COMMANDS_POST_CONFIG_SUBDIRS])
])
AC_DEFUN([_RTEMS_BUILD_CONFIG_PREPARE],[
AC_DEFUN(_RTEMS_BUILD_CONFIG_PREPARE,[
## # Record the configure arguments in Makefile.
m4_ifdef([_RTEMS_BUILD_CONFIGDIRS_LIST],
[
@@ -358,7 +358,7 @@ m4_divert_text([DEFAULTS],
m4_expand_once([_RTEMS_COMMANDS_POST_CONFIG_SUBDIRS])
])
AC_DEFUN([_RTEMS_HOST_CONFIG_PREPARE],[
AC_DEFUN(_RTEMS_HOST_CONFIG_PREPARE,[
m4_ifdef([_RTEMS_HOST_CONFIGDIRS_LIST],
[
m4_expand_once([_RTEMS_TOOLS([host],[HOST])])
@@ -382,7 +382,7 @@ m4_divert_text([DEFAULTS],
m4_expand_once([_RTEMS_COMMANDS_POST_CONFIG_SUBDIRS])
])
AC_DEFUN([_RTEMS_TARGET_CONFIG_PREPARE],[
AC_DEFUN(_RTEMS_TARGET_CONFIG_PREPARE,[
m4_ifdef([_RTEMS_TARGET_CONFIGDIRS_LIST],
[
m4_expand_once([_RTEMS_TOOLS([target],[TARGET])])

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@@ -4,13 +4,12 @@ dnl
dnl _RTEMS_BSP_ALIAS(BSP_ALIAS,RTEMS_BSP_FAMILY)
dnl Internal subroutine to RTEMS_BSP_ALIAS
AC_DEFUN([_RTEMS_BSP_ALIAS],
AC_DEFUN(_RTEMS_BSP_ALIAS,
[# account for "aliased" bsps which share source code
case $1 in
simcpu32) $2=sim68000 ;; # BSVC CPU32 variant
c3xsim) $2=c4xsim ;; # TI C3x Simulator in gdb
mcp750) $2=motorola_powerpc ;; # Motorola PPC board variant
mvme2100) $2=motorola_powerpc ;; # Motorola PPC board variant
mvme2307) $2=motorola_powerpc ;; # Motorola PPC board variant
mtx603e) $2=motorola_powerpc ;; # Motorola PPC board variant
mvme162lx) $2=mvme162 ;; # m68k - mvme162 board variant
@@ -35,7 +34,7 @@ AC_DEFUN([_RTEMS_BSP_ALIAS],
dnl RTEMS_BSP_ALIAS(BSP_ALIAS,RTEMS_BSP_FAMILY)
dnl convert a bsp alias $1 into its bsp directory RTEMS_BSP_FAMILY
AC_DEFUN([RTEMS_BSP_ALIAS],
AC_DEFUN(RTEMS_BSP_ALIAS,
[_RTEMS_BSP_ALIAS(m4_if([$1],,[$RTEMS_BSP],[$1]),
m4_if([$2],,[RTEMS_BSP_FAMILY],[$2]))]
)

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@@ -9,7 +9,7 @@ dnl Configure scripts will receive <bsp-value> if <RTEMS_BSP> matches the
dnl actual value of the shell variable RTEMS_BSP (cf. RTEMS_ENV_RTEMSBSP),
dnl and the raw value passed to --enable-FEATURE otherwise.
dnl
AC_DEFUN([RTEMS_BSP_ARG_ENABLE],
AC_DEFUN(RTEMS_BSP_ARG_ENABLE,
[AC_REQUIRE([RTEMS_ENV_RTEMSBSP])
AC_ARG_ENABLE([$1],[$2],
[enableval=`echo "[$enable_]patsubst([$1], -, _)" | sed -e "s%^${RTEMS_BSP}:%%"`

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@@ -1,6 +1,6 @@
dnl $Id$
AC_DEFUN([RTEMS_CANONICAL_HOST],
AC_DEFUN(RTEMS_CANONICAL_HOST,
[dnl
AC_REQUIRE([AC_CANONICAL_HOST])
RTEMS_HOST=$host_os

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@@ -8,7 +8,7 @@ dnl target naming conventions "processor-vendor-os"
dnl Therefore autoconf's AC_CANONICAL_TARGET will fail for them
dnl and we have to fix it for rtems ourselves
AC_DEFUN([RTEMS_CANONICAL_TARGET_CPU],
AC_DEFUN(RTEMS_CANONICAL_TARGET_CPU,
[
AC_CANONICAL_TARGET
AC_MSG_CHECKING(rtems target cpu)

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@@ -4,7 +4,7 @@ dnl
dnl Set target tools
dnl
AC_DEFUN([RTEMS_CANONICALIZE_TOOLS],
AC_DEFUN(RTEMS_CANONICALIZE_TOOLS,
[AC_REQUIRE([RTEMS_PROG_CC])dnl
dnl FIXME: What shall be done if these tools are not available?

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@@ -4,7 +4,7 @@ dnl Report all available bsps for a target,
dnl check if a bsp-subdirectory is present for all bsps found
dnl
dnl RTEMS_CHECK_BSPS(bsp_list)
AC_DEFUN([RTEMS_CHECK_BSPS],
AC_DEFUN(RTEMS_CHECK_BSPS,
[
AC_REQUIRE([RTEMS_CHECK_CPU])dnl sets RTEMS_CPU, target
AC_REQUIRE([RTEMS_TOP])dnl sets RTEMS_TOPdir

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@@ -1,7 +1,7 @@
dnl $Id$
dnl check if RTEMS support a cpu
AC_DEFUN([RTEMS_CHECK_CPU],
AC_DEFUN(RTEMS_CHECK_CPU,
[dnl
AC_REQUIRE([RTEMS_TOP])
AC_REQUIRE([RTEMS_CANONICAL_TARGET_CPU])

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@@ -1,6 +1,6 @@
dnl $Id$
AC_DEFUN([RTEMS_CHECK_CUSTOM_BSP],[
AC_DEFUN(RTEMS_CHECK_CUSTOM_BSP,[
AC_REQUIRE([RTEMS_TOP])
AC_MSG_CHECKING([for make/custom/[$]$1.cfg])

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@@ -1,6 +1,6 @@
dnl $Id$
dnl
AC_DEFUN([RTEMS_CHECK_CXX],
AC_DEFUN(RTEMS_CHECK_CXX,
[dnl
AC_REQUIRE([RTEMS_CHECK_CPU])dnl
AC_REQUIRE([RTEMS_PROG_CC_FOR_TARGET])dnl

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@@ -1,6 +1,6 @@
dnl $Id$
dnl
AC_DEFUN([RTEMS_CHECK_ITRON_API],
AC_DEFUN(RTEMS_CHECK_ITRON_API,
[dnl
AC_REQUIRE([RTEMS_CHECK_CPU])dnl
AC_REQUIRE([RTEMS_ENABLE_ITRON])dnl
@@ -28,7 +28,7 @@ fi
AC_SUBST(HAS_ITRON_API)dnl
])
AC_DEFUN([RTEMS_DEFINE_ITRON_API],
AC_DEFUN(RTEMS_DEFINE_ITRON_API,
[AC_REQUIRE([RTEMS_CHECK_ITRON_API])dnl
if test x"${HAS_ITRON_API}" = x"yes";
then

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@@ -2,7 +2,7 @@ dnl
dnl $Id$
dnl
AC_DEFUN([RTEMS_CHECK_MULTIPROCESSING],
AC_DEFUN(RTEMS_CHECK_MULTIPROCESSING,
[dnl
AC_REQUIRE([RTEMS_ENABLE_MULTILIB])dnl
AC_REQUIRE([RTEMS_ENV_RTEMSBSP])dnl

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@@ -1,6 +1,6 @@
dnl $Id$
dnl
AC_DEFUN([RTEMS_CHECK_NETWORKING],
AC_DEFUN(RTEMS_CHECK_NETWORKING,
[dnl
AC_REQUIRE([RTEMS_CHECK_CPU])dnl
AC_REQUIRE([RTEMS_ENABLE_NETWORKING])dnl

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@@ -1,6 +1,6 @@
dnl $Id$
AC_DEFUN([RTEMS_CHECK_NEWLIB],
AC_DEFUN(RTEMS_CHECK_NEWLIB,
[dnl
AC_REQUIRE([RTEMS_PROG_CC_FOR_TARGET])dnl
AC_REQUIRE([RTEMS_CANONICALIZE_TOOLS])dnl

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@@ -1,6 +1,6 @@
dnl $Id$
dnl
AC_DEFUN([RTEMS_CHECK_POSIX_API],
AC_DEFUN(RTEMS_CHECK_POSIX_API,
[dnl
AC_REQUIRE([RTEMS_CHECK_CPU])dnl
AC_REQUIRE([RTEMS_ENABLE_POSIX])dnl
@@ -28,7 +28,7 @@ fi
AC_SUBST(HAS_POSIX_API)dnl
])
AC_DEFUN([RTEMS_DEFINE_POSIX_API],
AC_DEFUN(RTEMS_DEFINE_POSIX_API,
[AC_REQUIRE([RTEMS_CHECK_POSIX_API])dnl
AS_IF(
[test x"${HAS_POSIX_API}" = x"yes"],

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@@ -1,6 +1,6 @@
dnl $Id$
dnl
AC_DEFUN([RTEMS_CHECK_RDBG],
AC_DEFUN(RTEMS_CHECK_RDBG,
[dnl
AC_REQUIRE([RTEMS_TOP])dnl
AC_REQUIRE([RTEMS_CHECK_CPU])dnl

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@@ -3,7 +3,7 @@ dnl $Id$
## Check for a cross tool, similar to AC_CHECK_TOOL, but do not fall back to
## the un-prefixed version of PROG-TO-CHECK-FOR.
dnl RTEMS_CHECK_TOOL(VARIABLE, PROG-TO-CHECK-FOR[, VALUE-IF-NOT-FOUND [, PATH]])
AC_DEFUN([RTEMS_CHECK_TOOL],
AC_DEFUN(RTEMS_CHECK_TOOL,
[
AS_IF([test "x$build_alias" != "x$host_alias"],
[rtems_tool_prefix=${ac_tool_prefix}])

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@@ -11,7 +11,7 @@ dnl
dnl
dnl _AC_DOTS(PATH)
dnl
AC_DEFUN([_AC_DOTS],[
AC_DEFUN(_AC_DOTS,[
# A "../" for each directory in $1.
ac_dots=`echo $1 | \
sed -e 's%^\./%%' -e 's%[[^/]]$%&/%' -e 's%[[^/]]*/%../%g'`
@@ -20,7 +20,7 @@ AC_DEFUN([_AC_DOTS],[
dnl
dnl _RTEMS_ADJUST_SRCDIR(REVAR,CONFIG_DIR[,TARGET_SUBDIR])
dnl
AC_DEFUN([_RTEMS_ADJUST_SRCDIR],[
AC_DEFUN(_RTEMS_ADJUST_SRCDIR,[
_AC_DOTS(ifelse([$3], ,[$2],[$3/$2]))
case "$srcdir" in

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@@ -1,4 +1,4 @@
AC_DEFUN([RTEMS_ENABLE_BARE],
AC_DEFUN(RTEMS_ENABLE_BARE,
[
AC_ARG_ENABLE(bare-cpu-cflags,
[AC_HELP_STRING([--enable-bare-cpu-cflags],

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@@ -1,6 +1,6 @@
dnl $Id$
AC_DEFUN([RTEMS_ENABLE_CXX],
AC_DEFUN(RTEMS_ENABLE_CXX,
[
AC_ARG_ENABLE(cxx,
[AC_HELP_STRING([--enable-cxx],

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@@ -1,6 +1,6 @@
dnl $Id$
AC_DEFUN([RTEMS_ENABLE_INLINES],
AC_DEFUN(RTEMS_ENABLE_INLINES,
[AC_ARG_ENABLE(rtems-inlines,
[AC_HELP_STRING([--enable-rtems-inlines],
[enable RTEMS inline functions (default:enabled, disable to use macros)])],

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@@ -1,6 +1,6 @@
dnl $Id$
AC_DEFUN([RTEMS_ENABLE_ITRON],
AC_DEFUN(RTEMS_ENABLE_ITRON,
[
## AC_BEFORE([$0], [RTEMS_CHECK_ITRON_API])dnl

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@@ -1,6 +1,6 @@
dnl $Id$
AC_DEFUN([RTEMS_ENABLE_MULTIPROCESSING],
AC_DEFUN(RTEMS_ENABLE_MULTIPROCESSING,
[
AC_ARG_ENABLE(multiprocessing,
[AC_HELP_STRING([--enable-multiprocessing],

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@@ -1,6 +1,6 @@
dnl $Id$
AC_DEFUN([RTEMS_ENABLE_NETWORKING],
AC_DEFUN(RTEMS_ENABLE_NETWORKING,
[
## AC_BEFORE([$0], [RTEMS_CHECK_NETWORKING])dnl

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@@ -1,6 +1,6 @@
dnl $Id$
AC_DEFUN([RTEMS_ENABLE_POSIX],
AC_DEFUN(RTEMS_ENABLE_POSIX,
[
## AC_BEFORE([$0], [RTEMS_CHECK_POSIX_API])dnl

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@@ -1,6 +1,6 @@
dnl $Id$
AC_DEFUN([RTEMS_ENABLE_RDBG],
AC_DEFUN(RTEMS_ENABLE_RDBG,
[
AC_BEFORE([$0], [RTEMS_CHECK_RDBG])dnl

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@@ -3,7 +3,7 @@ dnl $Id$
dnl Override the set of BSPs to be built.
dnl used by the toplevel configure script
dnl RTEMS_ENABLE_RTEMSBSP(rtems_bsp_list)
AC_DEFUN([RTEMS_ENABLE_RTEMSBSP],
AC_DEFUN(RTEMS_ENABLE_RTEMSBSP,
[
AC_BEFORE([$0], [RTEMS_ENV_RTEMSBSP])
AC_ARG_ENABLE(rtemsbsp,

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@@ -1,6 +1,6 @@
dnl $Id$
AC_DEFUN([RTEMS_ENABLE_TESTS],
AC_DEFUN(RTEMS_ENABLE_TESTS,
[
# If the tests are enabled, then find all the test suite Makefiles
AC_MSG_CHECKING([if the test suites are enabled? ])

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@@ -2,7 +2,7 @@ dnl $Id$
dnl Pass a single BSP via an environment variable
dnl used by per BSP configure scripts
AC_DEFUN([RTEMS_ENV_RTEMSBSP],
AC_DEFUN(RTEMS_ENV_RTEMSBSP,
[dnl
AC_BEFORE([$0], [RTEMS_ENABLE_RTEMSBSP])dnl
AC_BEFORE([$0], [RTEMS_PROJECT_ROOT])dnl

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@@ -4,7 +4,7 @@ dnl
dnl Check whether the gcc accepts -isystem
dnl
AC_DEFUN([RTEMS_GCC_ISYSTEM],
AC_DEFUN(RTEMS_GCC_ISYSTEM,
[AC_REQUIRE([RTEMS_PROG_CC])
AC_CACHE_CHECK(whether $CC accepts -isystem,rtems_cv_gcc_isystem,
[

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@@ -4,7 +4,7 @@ dnl
dnl Check whether the target compiler accepts -pipe
dnl
AC_DEFUN([RTEMS_GCC_PIPE],
AC_DEFUN(RTEMS_GCC_PIPE,
[AC_REQUIRE([RTEMS_PROG_CC])
AC_REQUIRE([AC_CANONICAL_HOST])
AC_CACHE_CHECK(whether $CC accepts --pipe,rtems_cv_gcc_pipe,

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@@ -4,7 +4,7 @@ dnl
dnl Check whether the target compiler accepts -specs
dnl
AC_DEFUN([RTEMS_GCC_SPECS],
AC_DEFUN(RTEMS_GCC_SPECS,
[AC_REQUIRE([RTEMS_PROG_CC])
AC_CACHE_CHECK(whether $CC accepts -specs,rtems_cv_gcc_specs,
[

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@@ -5,7 +5,7 @@ dnl
dnl check for i386 gas supporting 16 bit mode
dnl - binutils 2.9.1.0.7 and higher
AC_DEFUN([RTEMS_I386_GAS_CODE16],
AC_DEFUN(RTEMS_I386_GAS_CODE16,
[ if test "${host_cpu}" = "i386"; then
AC_CACHE_CHECK([for 16 bit mode assembler support],
rtems_cv_prog_gas_code16,

View File

@@ -2,7 +2,7 @@ dnl This provides configure definitions used for multilib support
dnl parts of these macros are derived from newlib-1.8.2's multilib support
AC_DEFUN([RTEMS_ENABLE_MULTILIB],
AC_DEFUN(RTEMS_ENABLE_MULTILIB,
[
AC_ARG_ENABLE(multilib,
AC_HELP_STRING([--enable-multilib],

View File

@@ -1,6 +1,6 @@
dnl $Id$
AC_DEFUN([RTEMS_PATH_KSH],
AC_DEFUN(RTEMS_PATH_KSH,
[
dnl NOTE: prefer bash over ksh over sh
AC_PATH_PROGS(KSH,bash ksh sh)

View File

@@ -1,6 +1,6 @@
dnl $Id$
AC_DEFUN([RTEMS_PATH_PERL],
AC_DEFUN(RTEMS_PATH_PERL,
[
AC_PATH_PROG(PERL,perl)
if test -z "$PERL" ; then

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@@ -80,7 +80,7 @@ if test "$no_recursion" != yes; then
AC_MSG_ERROR([$ac_sub_configure failed for $ac_subdir])
fi
cd "$ac_popdir"
cd $ac_popdir
done
fi
])

View File

@@ -4,7 +4,7 @@ dnl
dnl Check for target gcc
dnl
AC_DEFUN([RTEMS_PROG_CC],
AC_DEFUN(RTEMS_PROG_CC,
[
AC_BEFORE([$0], [AC_PROG_CPP])dnl
AC_BEFORE([$0], [AC_PROG_CC])dnl
@@ -22,7 +22,7 @@ AC_PROG_CPP
AM_CONDITIONAL(RTEMS_USE_GCC,test x"$GCC" = x"yes")
])
AC_DEFUN([RTEMS_PROG_CC_FOR_TARGET],
AC_DEFUN(RTEMS_PROG_CC_FOR_TARGET,
[
dnl check target cc
RTEMS_PROG_CC

View File

@@ -4,7 +4,7 @@ dnl
dnl Check for target g++
dnl
AC_DEFUN([RTEMS_PROG_CXX_FOR_TARGET],
AC_DEFUN(RTEMS_PROG_CXX_FOR_TARGET,
[
AC_BEFORE([$0], [RTEMS_CANONICALIZE_TOOLS])dnl
AC_REQUIRE([RTEMS_ENABLE_CXX])

View File

@@ -12,7 +12,7 @@ dnl RTEMS_ROOT .. path to the top of a bsp's build directory
dnl [Applied by custom/*.cfg, depredicated otherwise]
dnl
AC_DEFUN([RTEMS_PROJECT_ROOT],
AC_DEFUN(RTEMS_PROJECT_ROOT,
[dnl
AC_REQUIRE([RTEMS_TOP])

View File

@@ -1,6 +1,6 @@
## $Id$
AC_DEFUN([RTEMS_ENABLE_RTEMS_DEBUG],
AC_DEFUN(RTEMS_ENABLE_RTEMS_DEBUG,
[
AC_ARG_ENABLE(rtems-debug,
AC_HELP_STRING([--enable-rtems-debug],[enable RTEMS_DEBUG]),
@@ -11,7 +11,7 @@ AC_HELP_STRING([--enable-rtems-debug],[enable RTEMS_DEBUG]),
esac],[enable_rtems_debug=no])
])
AC_DEFUN([RTEMS_CHECK_RTEMS_DEBUG],
AC_DEFUN(RTEMS_CHECK_RTEMS_DEBUG,
[AC_REQUIRE([RTEMS_ENABLE_RTEMS_DEBUG])
AS_IF([test x"${enable_rtems_debug}" = x"yes"]
[AC_DEFINE_UNQUOTED(RTEMS_DEBUG,1,[if RTEMS_DEBUG is enabled])])

View File

@@ -1,4 +1,4 @@
AC_DEFUN([RTEMS_ENABLE_RTEMS_TEST_NO_PAUSE],
AC_DEFUN(RTEMS_ENABLE_RTEMS_TEST_NO_PAUSE,
[AC_ARG_ENABLE(test-no-pause,
AC_HELP_STRING([--disable-test-no-pause],[disable RTEMS_TEST_NO_PAUSE]),
[case "${enableval}" in
@@ -8,7 +8,7 @@ AC_HELP_STRING([--disable-test-no-pause],[disable RTEMS_TEST_NO_PAUSE]),
esac],[RTEMS_TEST_NO_PAUSE=yes])
])
AC_DEFUN([RTEMS_CHECK_RTEMS_TEST_NO_PAUSE],
AC_DEFUN(RTEMS_CHECK_RTEMS_TEST_NO_PAUSE,
[AC_REQUIRE([RTEMS_ENABLE_RTEMS_TEST_NO_PAUSE])
if test x"${RTEMS_TEST_NO_PAUSE}" = x"yes";
then

View File

@@ -7,7 +7,7 @@ dnl RTEMS_TOP($1)
dnl
dnl $1 .. relative path from this configure.in to the toplevel configure.in
dnl
AC_DEFUN([RTEMS_TOP],
AC_DEFUN(RTEMS_TOP,
[dnl
AC_REQUIRE([RTEMS_VERSIONING])
AC_CONFIG_AUX_DIR([$1])

View File

@@ -2,7 +2,7 @@ dnl $Id$
## HACK: Work-around to structural issue with RTEMS
## The macros below violate most autoconf and canonicalization standards
AC_DEFUN([RTEMS_CONFIG_BUILD_SUBDIRS],
AC_DEFUN(RTEMS_CONFIG_BUILD_SUBDIRS,
[AC_REQUIRE([_RTEMS_OUTPUT_BUILD_SUBDIRS])
RTEMS_BUILD_SUBDIRS="$RTEMS_BUILD_SUBDIRS [$1]"
])
@@ -86,7 +86,7 @@ dnl
dnl
dnl _RTEMS_PUSH_BUILDDIR(SUBDIR)
dnl
AC_DEFUN([_RTEMS_PUSH_BUILDDIR],
AC_DEFUN(_RTEMS_PUSH_BUILDDIR,
[
# _RTEMS_PUSH_BUILDDIR
echo configuring in $1
@@ -103,15 +103,15 @@ AC_DEFUN([_RTEMS_PUSH_BUILDDIR],
dnl
dnl _RTEMS_POP_BUILDDIR
dnl
AC_DEFUN([_RTEMS_POP_BUILDDIR],
AC_DEFUN(_RTEMS_POP_BUILDDIR,
[
cd "$ac_popdir"
cd $ac_popdir
])
dnl
dnl _RTEMS_GIVEN_INSTALL
dnl
AC_DEFUN([_RTEMS_GIVEN_INSTALL],
AC_DEFUN(_RTEMS_GIVEN_INSTALL,
[
ifdef([AC_PROVIDE_AC_PROG_INSTALL],[
case "$ac_given_INSTALL" in
@@ -124,7 +124,7 @@ ifdef([AC_PROVIDE_AC_PROG_INSTALL],[
dnl
dnl _RTEMS_SUB_SRCDIR(AC_CONFIG_DIR[,TARGET_SUBDIR])
dnl
AC_DEFUN([_RTEMS_SUB_SRCDIR],[
AC_DEFUN(_RTEMS_SUB_SRCDIR,[
# _RTEMS_SUB_SRCDIR
_RTEMS_ADJUST_SRCDIR(ac_sub_srcdir,$1,$2)

View File

@@ -1,4 +1,4 @@
AC_DEFUN([RTEMS_TOOLPATHS],
AC_DEFUN(RTEMS_TOOLPATHS,
[
# tooldir='$(exec_prefix)/'$target_alias
# Temporary work-around until building in source tree is supported

View File

@@ -1,2 +1,2 @@
AC_DEFUN([RTEMS_VERSIONING],
m4_define([_RTEMS_VERSION],[4.6.4]))
m4_define([_RTEMS_VERSION],[4.6.0]))

View File

@@ -1,7 +1,3 @@
2004-08-17 Ralf Corsepius <ralf_corsepius@rtems.org>
* acinclude.m4 (_RTEMS_CONFIG_SUBDIR): Quote ac_popdir uses.
2003-12-14 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* support/Makefile.am: Pass @RTEMS_BSP@ to AM_CPPFLAGS.

View File

@@ -79,7 +79,7 @@ if test "$no_recursion" != yes; then
AC_MSG_ERROR([$ac_sub_configure failed for $ac_subdir])
fi
cd "$ac_popdir"
cd $ac_popdir
done
fi
fi

View File

@@ -1,8 +1,3 @@
2004-09-27 Joel Sherrill <joel@OARcorp.com>
PR 679/bsps
* startup/linkcmds: Add gnu.linkonce.d and .gcc_except_table.
2003-09-04 Joel Sherrill <joel@OARcorp.com>
* clock/ckinit.c, console/console.c, include/bsp.h, include/coverhd.h,

View File

@@ -48,8 +48,6 @@ SECTIONS
{
_sdata = .;
*(.data);
*(.gnu.linkonce.d*)
*(.gcc_except_table)
_edata = .;
}
_data_start = ADDR(.data) ;

View File

@@ -1,25 +1,3 @@
2005-09-01 Joel Sherrill <joel@OARcorp.com>
* clock/Makefile.am, include/Makefile.am: Install tod.h
2005-01-20 Joel Sherrill <joel@OARcorp.com>
PR 743/bsps
* clock/Makefile.am: Did not install tod.h.
2004-10-13 Eric Norum <norume@aps.anl.gov>
PR 688/bsps
* Makefile.am clock/todcfg.c: Add support for MC146818A TOD chip.
2004-05-21 Till Strauman <strauman@slac.stanford.edu>
* PR 624/bsps
startup/bspstart.c: When probing the memory, make sure not to
corrupt the application. Only probe addresses beyond rtemsFreeMemStart.
* Let IBMPC_outch() convert LF -> CRLF to avoid printk scrambling
the screen.
2003-10-02 Till Strauman <strauman@slac.stanford.edu>
PR 502/bsps

View File

@@ -2,11 +2,10 @@
## $Id$
##
VPATH = @srcdir@:@srcdir@/../../shared/tod:@srcdir@/../../../shared
PGM = $(ARCH)/clock.rel
C_FILES = ckinit.c todcfg.c tod.c
C_FILES = ckinit.c rtc.c
clock_rel_OBJECTS = $(C_FILES:%.c=$(ARCH)/%.$(OBJEXT))
include $(top_srcdir)/../../../../../../automake/compile.am
@@ -26,6 +25,6 @@ all-local: $(ARCH) $(clock_rel_OBJECTS) $(PGM)
.PRECIOUS: $(PGM)
EXTRA_DIST =
EXTRA_DIST = ckinit.c rtc.c
include $(top_srcdir)/../../../../../../automake/local.am

View File

@@ -1,36 +0,0 @@
/*
* This file contains the RTC driver table for Motorola shared BSPs.
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*
* $Id$
*/
#include <bsp.h>
#include <libchip/rtc.h>
#include <libchip/mc146818a.h>
/* The following table configures the RTC drivers used in this BSP */
rtc_tbl RTC_Table[] = {
{
"/dev/rtc", /* sDeviceName */
RTC_MC146818A, /* deviceType */
&mc146818a_fns, /* pDeviceFns */
mc146818a_probe, /* deviceProbe */
NULL, /* pDeviceParams */
0x70, /* ulCtrlPort1 */
0x00, /* ulDataPort */
mc146818a_get_register, /* getRegister */
mc146818a_set_register /* setRegister */
}
};
/* Some information used by the RTC driver */
#define NUM_RTCS (sizeof(RTC_Table)/sizeof(rtc_tbl))
unsigned long RTC_Count = NUM_RTCS;
rtems_device_minor_number RTC_Minor;

View File

@@ -270,11 +270,8 @@ _IBMPC_outch(char c)
{
static int escaped = 0;
if ( ! (escaped = handleEscape(escaped, c)) ) {
if ( '\n' == c )
videoPutChar('\r');
if ( ! (escaped = handleEscape(escaped, c)) )
videoPutChar(c);
}
} /* _IBMPC_outch */

View File

@@ -9,15 +9,11 @@ if HAS_NETWORKING
WD80X3 = wd80x3.h
endif
include_HEADERS = bsp.h crt.h coverhd.h tod.h $(WD80X3) bspopts.h
include_HEADERS = bsp.h crt.h coverhd.h $(WD80X3) bspopts.h
coverhd.h: $(top_srcdir)/../../shared/include/coverhd.h
cp $< $@
tod.h: $(top_srcdir)/../../shared/tod.h
cp $< $@
CLEANFILES = coverhd.h tod.h
CLEANFILES = coverhd.h
$(PROJECT_INCLUDE):
$(mkinstalldirs) $@

View File

@@ -82,18 +82,12 @@ void bsp_postdriver_hook(void);
void bsp_pretasking_hook(void)
{
rtems_unsigned32 topAddr, val;
int i, lowest;
int i;
if (rtemsFreeMemStart & (CPU_ALIGNMENT - 1)) /* not aligned => align it */
rtemsFreeMemStart = (rtemsFreeMemStart+CPU_ALIGNMENT) & ~(CPU_ALIGNMENT-1);
/* find the lowest 1M boundary to probe */
lowest = ((rtemsFreeMemStart + (1<<20)) >> 20) + 1;
if ( lowest < 2 )
lowest = 2;
if(_heap_size == 0)
{
/*
@@ -101,13 +95,13 @@ void bsp_pretasking_hook(void)
* between 2M and 2048M.
* let us first write
*/
for(i=2048; i>=lowest; i--)
for(i=2048; i>=2; i--)
{
topAddr = i*1024*1024 - 4;
*(volatile rtems_unsigned32 *)topAddr = topAddr;
}
for(i=lowest; i<=2048; i++)
for(i=2; i<=2048; i++)
{
topAddr = i*1024*1024 - 4;
val = *(rtems_unsigned32 *)topAddr;

View File

@@ -1,8 +1,3 @@
2004-09-27 Greg Menke <gregory.menke@gsfc.nasa.gov>
PR 608/bsps
* pci/pcibios.c: BusCountPCI().
2003-12-29 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* shared/io/Makefile.am: Remove (Unused).

View File

@@ -218,64 +218,6 @@ pcib_find_by_class(int classCode, int idx, int *sig)
#define PCI_MAX_DEVICES 16
#define PCI_MAX_FUNCTIONS 8
#define PCI_VENDOR_ID 0x00 /* 16 bits */
#define PCI_DEVICE_ID 0x02 /* 16 bits */
#define PCI_CLASS_REVISION 0x08
#define PCI_HEADER_TYPE 0x0e
#define PCI_SUBORDINATE_BUS 0x1a
#define PCI_CLASS_BRIDGE_PCI 0x0604
static unsigned8 ucBusCount = 0xff;
int
BusCountPCI()
{
if( ucBusCount == 0xff )
{
unsigned char bus,dev,hd;
unsigned int d;
int sig;
ucBusCount = 0;
for(bus=0; bus< 0xff; bus++)
{
for(dev=0; dev<PCI_MAX_DEVICES; dev++)
{
sig = PCIB_DEVSIG_MAKE(bus,dev,0);
pcib_conf_read32(sig, PCI_VENDOR_ID, &d);
if( d != -1 )
{
pcib_conf_read32(sig, PCI_CLASS_REVISION, &d);
if( (d >> 16) == PCI_CLASS_BRIDGE_PCI )
{
pcib_conf_read8(sig, PCI_SUBORDINATE_BUS, &hd);
if( hd > ucBusCount )
ucBusCount = hd;
}
}
}
}
if( ucBusCount == 0 )
{
printk("BusCountPCI() found 0 busses, assuming 1\n");
ucBusCount = 1;
}
else if( ucBusCount == 0xff )
{
printk("BusCountPCI() found 0xff busses, assuming 1\n");
ucBusCount = 1;
}
}
return ucBusCount;
}
int
BSP_pciFindDevice( unsigned short vendorid, unsigned short deviceid,

View File

@@ -1,9 +1,3 @@
2004-03-05 Joel Sherrill <joel@OARcorp.com>
PR 505/bsps
* setvec.c: Rework to remove punned pointer warning generated by gcc
3.3 and newer.
2003-09-04 Joel Sherrill <joel@OARcorp.com>
* bspspuriousinit.c, m68000spurious.c, m68kpretaskinghook.c, setvec.c,

View File

@@ -26,13 +26,13 @@ m68k_isr_entry set_vector( /* returns old vector */
int type /* RTEMS or RAW intr */
)
{
rtems_isr_entry previous_isr;
m68k_isr_entry previous_isr;
if ( type )
rtems_interrupt_catch( handler, vector, &previous_isr );
rtems_interrupt_catch( handler, vector, (rtems_isr_entry *) &previous_isr );
else {
_CPU_ISR_install_raw_handler( vector, handler, (void *)&previous_isr );
}
return (m68k_isr_entry) previous_isr;
return previous_isr;
}

View File

@@ -1,8 +1,3 @@
2004-11-10 Richard Campbell <richard.campbell@oarcorp.com>
* configure.ac: Add TOD support in shared as part of adding MVME2100
BSP.
2003-08-11 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* configure.ac: Use rtems-bugs@rtems.com as bug report email address.

View File

@@ -33,7 +33,6 @@ shared/pci/Makefile
shared/residual/Makefile
shared/start/Makefile
shared/startup/Makefile
shared/tod/Makefile
shared/vectors/Makefile
shared/vme/Makefile])
AC_OUTPUT

View File

@@ -1,8 +1,3 @@
2004-10-15 Gene Smith <gene.smith@seimens.com>
PR 691/bsps
* startup/linkcmds: Correct bug in linker script.
2003-12-16 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
PR 533/bsps

View File

@@ -145,6 +145,7 @@ SECTIONS
PROVIDE(_heap_end = heap.end);
/* reserve 64KByte for stack... */
stack.end = heap.end + 64K;
PROVIDE(_end = stack.end);
.line 0 : { *(.line) }
.debug 0 : { *(.debug) }

View File

@@ -1,9 +1,3 @@
2004-10-02 Ralf Corsepius <ralf_corsepius@rtems.org>
PR 697/bsps
* flashentry/flashentry.S: Fix broken comments
(Patch by Thomas.Doerfler@imd-systems.de)
2003-12-16 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
PR 533/bsps

View File

@@ -191,7 +191,7 @@ stack_top:
lis r3,0x0100 /* size 16 MB = 0x01000000 */
bl ramacc /* test memory accessibility */
cmpi 0,0,r4,0 /* memory ok? else test smaller size */
beq ramcfgok /* ok, we found configuration... */
beq ramcfgok /* ok, we found configuration... +/
lis r2,0x0000 /* disable BR6, config not ok */
mtdcr br6,r2 /* write to DCR BR6*/
@@ -263,7 +263,7 @@ ramcfgt18:
lis r3,0x0080 /* size 8 MB = 0x00800000 */
bl ramacc /* test memory accessibility */
cmpi 0,0,r4,0 /* memory ok? else test smaller size */
beq ramcfgok /* ok, we found configuration... */
beq ramcfgok /* ok, we found configuration... +/
lis r2,0x0000 /* disable BR6, config not ok */
mtdcr br6,r2 /* write to DCR BR6*/
@@ -333,7 +333,7 @@ ramcfgt14:
lis r3,0x0040 /* size 4 MB = 0x00400000 */
bl ramacc /* test memory accessibility */
cmpi 0,0,r4,0 /* memory ok? else test smaller size */
beq ramcfgok /* ok, we found configuration... */
beq ramcfgok /* ok, we found configuration... +/
lis r2,0x0000 /* disable BR6, config not ok */
mtdcr br6,r2 /* write to DCR BR6*/

View File

@@ -1,19 +1,3 @@
2005-05-20 Ralf Corsepius <ralf_corsepius@rtems.org>
PR 717/bsps
* bootloader/Makefile.am: Typo results in wrong flags being used.
2004-11-16 Richard Campbell <richard.campbell@OARcorp.com>
* README.MVME2100: Update to include DBAT0.
* bsp_specs: Fix spacing.
2004-11-10 Richard Campbell <richard.campbell@oarcorp.com>
* Makefile.am, configure.ac, bootloader/Makefile.am,
include/Makefile.am, wrapup/Makefile.am: Add MVME2100 BSP.
* README.MVME2100, tod/.cvsignore, tod/Makefile.am: New files.
2003-12-16 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
PR 533/bsps

View File

@@ -7,12 +7,12 @@ ACLOCAL_AMFLAGS = -I ../../../../../../aclocal
# wrapup is the one that actually builds and installs the library
# from the individual .rel files built in other directories
SUBDIRS = include clock console pci residual openpic irq vectors start \
startup bootloader motorola @exceptions@ tod vme wrapup
startup bootloader motorola @exceptions@ vme wrapup
include $(top_srcdir)/../../bsp.am
EXTRA_DIST = BOOTING README.MVME2100 README.MVME2300 README.OTHERBOARDS \
README.dec21140 bsp_specs times.mcp750 times.mvme2307
EXTRA_DIST = BOOTING README.MVME2300 README.OTHERBOARDS README.dec21140 \
bsp_specs times.mcp750 times.mvme2307
include $(top_srcdir)/../../../../../../automake/subdirs.am
include $(top_srcdir)/../../../../../../automake/local.am

View File

@@ -1,132 +0,0 @@
#
# $Id$
#
The MVME2100 is a Motorola VMEbus board which is similar to the other
Motorola PowerPC boards supported by this BSP. But it does not support
the Motorola CPU Configuration Register. This makes it impossible to
dynamically probe and determine that you are executing on this board
variant. So this BSP variant must be explicitly built to only support
the MVME2100. The complete list of differences found so far is:
* No CPU Configuration Register
* one COM port
* COM port is on PCI IRQ not ISA IRQ
* limited on RAM (32 or 64 MB)
* uses the EPIC interrupt controller on the MPC8240
* does not have an ISA bus but has an ISA I/O address space
* cannot set DBAT2 in bspstart like other variants because
there are PCI/ISA Interrupt Acknowledge registers at this space
This BSP may have left some PCI memory uncovered
* PPCBug starts programs with vectors still in ROM
Supported Features:
- Interrupt driven console using termios
- Network device driver
- Real-Time Clock driver
- Clock Tick Device Driver
Things to address:
- Does not return to monitor
- Level 1 cache is disabled for now
- Check on trying to read CPU Configuration Register for CHRP/Prep for PCI
and report a failure if in the wrong mode. May be able to set the model
but it may be hard to test if we break PPCBug.
- Use NVRAM for network configuration information
BSP Features Not Implemented:
- VMEbus mapped in but untested
- OpenPIC features not required for BSP are not supported
Memory Map
==========
BAT Mapping
ffff ffff |------------------------------------| ----- ffff ffff
| ROM/FLASH Bank 0 | |
fff0 0000 |------------------------------------| |
| System I/O | |
ffe0 0000 |------------------------------------| |
| Replicated ROM/FLASH Bank 0 | |
| Replicated System I/O | |
ff80 0000 |------------------------------------| |
| ROM/FLASH Bank 1 | DBAT3
ff00 0000 |------------------------------------| - Supervisor R/W
| PCI Interrupt Acknowledge | - Cache Inhibited
fef0 0000 |------------------------------------| - Guarded
| PCI Configuration Data Register | |
fee0 0000 |------------------------------------| |
| PCI Configuration Address Register | |
fec0 0000 |------------------------------------| |
| PCI I/O Space | |
fe80 0000 |------------------------------------| |
| PCI/ISA I/O Space | |
fe00 0000 |------------------------------------| |
| PCI/ISA Memory Space | |
fd00 0000 |------------------------------------| |
| | |
| xxxxxxxxxxxxxx| ----- f000 0000
| x not mapped | |
| xxxxxxxxxxxxxx| ----- a000 0000
| | |
| | |
| | DBAT0
| | - Supervisor R/W
| | - Cache Inhibited
| | - Guarded
| | |
| | |
| | ----- 9000 0000
| | |
| | |
| PCI Memory Space | DBAT2
| | - Supervisor R/W
| | - Cache Inhibited
| | - Guarded
| | |
| | |
| | |
8000 0000 |------------------------------------| ----- 8000 0000
| x |
| x not mapped |
| Reserved xxxxxxxxxxxxxx| ----- 1000 0000
| | |
| | |
0200 0000 |------------------------------------| |
| | |
| | |
| | |
| | |
| DRAM (32MB) | DBAT1/IBAT1
| | - Supervisor R/W
| | |
| | |
| | |
| | |
0000 0000 |------------------------------------| ----- 0000 0000
TTCP Performance on First Day Run
=================================
Fedora Core 1 on (according to /proc/cpuinfo) a 300 Mhz P3 using Netgear
10/100 CardBus NIC on a dedicated 10BaseT LAN.
ON MVME2100: ttcp -t -s 192.168.2.107
REPORTED ON MVME2100:
ttcp-t: buflen=8192, nbuf=2048, align=16384/0, port=5001 tcp -> 192.168.2.107
ttcp-t: socket
ttcp-t: connect
ttcp-t: 16777216 bytes in 20.80 real seconds = 787.69 KB/sec +++
ttcp-t: 2048 I/O calls, msec/call = 10.40, calls/sec = 98.46
ttcp-t: 0.0user 20.8sys 0:20real 100% 0i+0d 0maxrss 0+0pf 0+0csw
ON MVME2100: ttcp -t -s 192.168.2.107
REPORTED ON MVME2100:
ttcp -r -s
ttcp-r: buflen=8192, nbuf=2048, align=16384/0, port=5001 tcp
ttcp-r: socket
ttcp-r: accept from 192.168.2.107
ttcp-r: 16777216 bytes in 15.41 real seconds = 1063.21 KB/sec +++
ttcp-r: 11588 I/O calls, msec/call = 1.36, calls/sec = 751.98
ttcp-r: 0.0user 15.4sys 0:15real 100% 0i+0d 0maxrss 0+0pf 0+0csw

View File

@@ -24,8 +24,8 @@ LD = @LD@
DEFAULT_INCLUDES =
# Remove references to EABI when compiling bootloader
BOOTLOADER_CPU_CFLAGS=$(subst -msdata=eabi,,$(subst -meabi,,$(CPU_CFLAGS)))
AM_CPPFLAGS = -D__BOOT__
BOOTLOADER_CPU_FLAGS=$(subst -msdata=eabi,,$(subst -meabi,,$(CPU_CFLAGS)))
AM_CPPFLAGS = -D__BOOT__ -DDEBUG
AM_CFLAGS = \
$(GCC_SPECS) -specs bsp_specs -qrtems -mrelocatable \
-msoft-float -mstrict-align -fno-builtin -Wall -mmultiple \

View File

@@ -3,10 +3,11 @@
%rename startfile old_startfile
%rename link old_link
*lib:
%{!qrtems: %(old_lib)} %{!nostdlib: %{qrtems: --start-group \
%{!qrtems_debug: -lrtemsbsp -lrtemscpu} %{qrtems_debug: -lrtemsbsp_g -lrtemscpu_g} \
-lc -lgcc --end-group \
-lc -lgcc --end-group \
%{!qnolinkcmds: -T linkcmds%s}}}
*startfile:

View File

@@ -20,16 +20,6 @@ AM_CONDITIONAL(HAS_NETWORKING,test "$HAS_NETWORKING" = "yes")
AS=$CC
AM_PROG_AS
RTEMS_BSPOPTS_SET([mvme2100],[mvme2100],[1])
RTEMS_BSPOPTS_SET([mvme2100],[*],[])
RTEMS_BSPOPTS_HELP([mvme2100],
[Defined for MVME2100 -- undefined for others])
RTEMS_BSPOPTS_SET([mpc8240],[mvme2100],[1])
RTEMS_BSPOPTS_SET([mpc8240],[*],[])
RTEMS_BSPOPTS_HELP([mpc8240],
[Defined for boards with MPC8240 -- undefined for others])
RTEMS_BSPOPTS_SET([PPC_USE_DATA_CACHE],[*],[1])
RTEMS_BSPOPTS_HELP([PPC_USE_DATA_CACHE],
[If defined, then the PowerPC specific code in RTEMS will use
@@ -53,7 +43,6 @@ pci/Makefile
residual/Makefile
start/Makefile
startup/Makefile
tod/Makefile
vectors/Makefile
vme/Makefile
wrapup/Makefile])

View File

@@ -5,12 +5,11 @@
include_HEADERS = bspopts.h
include_HEADERS += ../../shared/include/nvram.h ../../shared/include/bsp.h \
../../../shared/include/coverhd.h ../../../shared/tod.h
../../../shared/include/coverhd.h
include_bspdir = $(includedir)/bsp
include_bsp_HEADERS = ../../shared/console/consoleIo.h \
../../shared/console/uart.h ../../shared/irq/irq.h \
../../shared/motorola/motorola.h
include_bsp_HEADERS = ../../shared/console/consoleIo.h ../../shared/console/uart.h \
../../shared/irq/irq.h ../../shared/motorola/motorola.h
$(PROJECT_INCLUDE):
$(mkinstalldirs) $@
@@ -30,9 +29,6 @@ $(PROJECT_INCLUDE)/bsp.h: ../../shared/include/bsp.h
$(PROJECT_INCLUDE)/coverhd.h: ../../../shared/include/coverhd.h
$(INSTALL_DATA) $< $@
$(PROJECT_INCLUDE)/tod.h: ../../../shared/tod.h
$(INSTALL_DATA) $< $@
$(PROJECT_INCLUDE)/bsp/consoleIo.h: ../../shared/console/consoleIo.h
$(INSTALL_DATA) $< $@
@@ -50,7 +46,6 @@ TMPINSTALL_FILES += $(PROJECT_INCLUDE)/bspopts.h
TMPINSTALL_FILES += $(PROJECT_INCLUDE)/bsp.h
TMPINSTALL_FILES += $(PROJECT_INCLUDE)/nvram.h
TMPINSTALL_FILES += $(PROJECT_INCLUDE)/coverhd.h
TMPINSTALL_FILES += $(PROJECT_INCLUDE)/tod.h
TMPINSTALL_FILES += $(PROJECT_INCLUDE)/bsp
TMPINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/motorola.h

View File

@@ -1,22 +0,0 @@
##
## $Id$
##
VPATH = @srcdir@:@srcdir@/../../shared/tod:@srcdir@/../../../shared
C_FILES = todcfg.c tod.c
C_O_FILES = $(C_FILES:%.c=$(ARCH)/%.$(OBJEXT))
OBJS = $(C_O_FILES)
include $(top_srcdir)/../../../../../../automake/compile.am
include $(top_srcdir)/../../../../../../automake/lib.am
#
# (OPTIONAL) Add local stuff here using +=
#
all-local: $(ARCH) $(OBJS)
include $(top_srcdir)/../../../../../../automake/local.am

View File

@@ -2,8 +2,7 @@
## $Id$
##
BSP_PIECES = clock console irq openpic pci residual startup \
tod vectors motorola vme
BSP_PIECES = clock console irq openpic pci residual startup vectors motorola vme
# bummer; have to use $foreach since % pattern subst rules only replace 1x
OBJS = $(foreach piece, $(BSP_PIECES), ../$(piece)/$(ARCH)/*.$(OBJEXT)) \

View File

@@ -1,13 +1,3 @@
2004-09-27 Joel Sherrill <joel@OARcorp.com>
PR 680/bsps
* network/if_hdlcsubr.c: Add missing #include <rtems/rtems_bsdnet.h>.
2004-04-07 Joel Sherrill <joel@OARcorp.com>
PR 602/bsps
* irq/irq.h: Fix typo.
2003-12-19 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
PR 545/bsps

View File

@@ -348,7 +348,7 @@ int BSP_rtems_irq_mngt_get(rtems_irq_global_settings**);
extern void BSP_rtems_irq_mng_init(unsigned cpuId);
#ifdef __cplusplus
}
extern "C" {
#endif
#endif

View File

@@ -48,8 +48,6 @@
* $Id$
*/
#include <rtems/rtems_bsdnet.h>
#include <sys/param.h>
/*#include <sys/systm.h>
#include <sys/kernel.h> */

View File

@@ -1,29 +1,3 @@
2005-04-11 Jennifer Averett <jennifer@OARcorp.com>
PR 777/bsps
* include/bsp.h: Add a Processor_Synchronize command in bsp.h
2005-03-17 Joel Sherrill <joel@OARcorp.com>
* irq/.cvsignore: New file.
2004-11-22 Jennifer Averett <jennifer@OARcorp.com>
* Makefile.am, wrapup/Makefile.am: Pick up SHM driver when MP enabled.
2004-11-22 Jennifer Averett <jennifer@OARcorp.com>
PR 617/bsps
PR 581/bsps
* Makefile.am, bsp_specs, configure.ac, clock/Makefile.am,
include/bsp.h, start/Makefile.am, start/start.S, startup/Makefile.am,
startup/bspstart.c, startup/linkcmds, vectors/Makefile.am,
vectors/vectors.S, wrapup/Makefile.am: Convert PSIM to new exception
model.
* irq/Makefile.am, irq/irq.c, irq/irq.h, irq/irq_asm.S,
irq/irq_init.c: New files.
* clock/clock.c: Removed.
2003-12-16 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
PR 533/bsps

View File

@@ -6,7 +6,7 @@ ACLOCAL_AMFLAGS = -I ../../../../../../aclocal
# wrapup is the one that actually builds and installs the library
# from the individual .rel files built in other directories
SUBDIRS = include start irq clock console startup shmsupp timer vectors \
SUBDIRS = include start clock console startup shmsupp timer vectors \
@exceptions@ wrapup \
tools

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@@ -10,13 +10,13 @@
%{!qnolinkcmds: -T linkcmds%s}}}
*startfile:
%{!qrtems: %(old_startfile)} %{!nostdlib: %{qrtems: ecrti%O%s rtems_crti%O%s crtbegin.o%s \
%{!qrtems: %(old_startfile)} %{!nostdlib: %{qrtems: ecrti%O%s \
%{!qrtems_debug: start.o%s} \
%{qrtems_debug: start_g.o%s}}}
*endfile:
%{!qrtems: %(old_endfile)} %{qrtems: ecrtn%O%s}
*link:
%{!qrtems: %(old_link)} %{qrtems: -Qy -dp -Bstatic -e _start -u __vectors}
*endfile:
%{!qrtems: %(old_endfile)} %{qrtems: crtend.o%s ecrtn.o%s}

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@@ -3,9 +3,9 @@
##
VPATH = @srcdir@:@srcdir@/../../shared/clock
PGM = $(ARCH)/clock.rel
C_FILES = p_clock.c
C_FILES = clock.c
C_O_FILES = $(C_FILES:%.c=$(ARCH)/%.$(OBJEXT))
OBJS = $(C_O_FILES)
@@ -17,8 +17,15 @@ include $(top_srcdir)/../../../../../../automake/lib.am
# (OPTIONAL) Add local stuff here using +=
#
$(PGM): $(OBJS)
$(make-rel)
# the .rel file built here will be put into libbsp.a by ../wrapup/Makefile
all-local: $(ARCH) $(OBJS)
all-local: $(ARCH) $(OBJS) $(PGM)
.PRECIOUS: $(PGM)
EXTRA_DIST = clock.c
include $(top_srcdir)/../../../../../../automake/local.am

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@@ -0,0 +1,51 @@
/*
* Instantiate the clock driver shell for psim based
* on the decrementer register.
*
* $Id$
*/
#include <rtems.h>
/*
* If defined, speed up the clock ticks while the idle task is running so
* time spent in the idle task is minimized. This significantly reduces
* the wall time required to execute the RTEMS test suites.
*/
/* #define CLOCK_DRIVER_USE_FAST_IDLE */
#define CLOCK_VECTOR PPC_IRQ_DECREMENTER
/* On psim, each click of the decrementer register corresponds
* to 1 instruction. By setting this to 100, we are indicating
* that we are assuming it can execute 100 instructions per
* microsecond. This corresponds to sustaining 1 instruction
* per cycle at 100 Mhz. Whether this is a good guess or not
* is anyone's guess.
*/
extern int PSIM_INSTRUCTIONS_PER_MICROSECOND;
unsigned int PPC_DECREMENTER_CLICKS;
#define Clock_driver_support_install_isr( _new, _old ) \
do { \
_old = (rtems_isr_entry) set_vector( _new, CLOCK_VECTOR, 1 ); \
PPC_DECREMENTER_CLICKS = (unsigned int)&PSIM_INSTRUCTIONS_PER_MICROSECOND; \
PPC_DECREMENTER_CLICKS *= rtems_configuration_get_microseconds_per_tick(); \
/* PPC_DECREMENTER_CLICKS = 5000; */ \
} while(0)
#define Clock_driver_support_initialize_hardware() \
do { \
unsigned int _clicks = PPC_DECREMENTER_CLICKS; \
PPC_Set_decrementer( _clicks ); \
} while (0)
#define Clock_driver_support_at_tick() \
Clock_driver_support_initialize_hardware()
#define Clock_driver_support_shutdown_hardware()
#include "../../../shared/clockdrv_shell.c"

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@@ -38,7 +38,6 @@ AC_CONFIG_FILES([Makefile
clock/Makefile
console/Makefile
include/Makefile
irq/Makefile
shmsupp/Makefile
start/Makefile
startup/Makefile
@@ -46,6 +45,6 @@ timer/Makefile
vectors/Makefile
wrapup/Makefile])
RTEMS_PPC_EXCEPTIONS([new])
RTEMS_PPC_EXCEPTIONS([old])
AC_OUTPUT

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@@ -54,39 +54,30 @@ extern "C" {
#else
#include <rtems.h>
#include <console.h>
#include <libcpu/io.h>
#include <clockdrv.h>
#include <console.h>
#include <iosupp.h>
#include <bsp/vectors.h>
/*
* Define the time limits for RTEMS Test Suite test durations.
* Long test and short test duration limits are provided. These
* values are in seconds and need to be converted to ticks for the
* application.
*
*/
#define MAX_LONG_TEST_DURATION 300 /* 5 minutes = 300 seconds */
#define MAX_SHORT_TEST_DURATION 3 /* 3 seconds */
/*
* Stuff for Time Test 27
*/
#if defined(RTEMS_TM27)
#include <bsp/irq.h>
#define MUST_WAIT_FOR_INTERRUPT 1
/* #define Install_tm27_vector( _handler ) \
set_vector( (_handler), PPC_IRQ_DECREMENTER, 1 ) */
void nullFunc() {}
static rtems_irq_connect_data clockIrqData = {BSP_DECREMENTER,
0,
(rtems_irq_enable)nullFunc,
(rtems_irq_disable)nullFunc,
(rtems_irq_is_enabled) nullFunc};
void Install_tm27_vector(void (*_handler)())
{
clockIrqData.hdl = _handler;
if (!BSP_install_rtems_irq_handler (&clockIrqData)) {
printk("Error installing clock interrupt handler!\n");
rtems_fatal_error_occurred(1);
}
}
#define Install_tm27_vector( _handler ) \
set_vector( (_handler), PPC_IRQ_DECREMENTER, 1 )
#define Cause_tm27_intr() \
do { \
@@ -109,7 +100,6 @@ void Install_tm27_vector(void (*_handler)())
_msr |= 0x8002; \
asm volatile( "mtmsr %0 ;" : "=r" (_msr) : "r" (_msr) ); \
} while (0)
#endif
/* Constants */
@@ -130,29 +120,42 @@ void Install_tm27_vector(void (*_handler)())
* Information placed in the linkcmds file.
*/
extern int RAM_START;
extern int RAM_END;
extern int RAM_SIZE;
extern int PROM_START;
extern int PROM_END;
extern int PROM_SIZE;
extern int CLOCK_SPEED;
extern int end; /* last address in the program */
#define BSP_Convert_decrementer( _value ) ( (unsigned long long) _value )
/* macros */
#define Processor_Synchronize() \
asm(" eieio ")
/* functions */
void bsp_start( void );
void bsp_cleanup( void );
rtems_isr_entry set_vector( /* returns old vector */
rtems_isr_entry handler, /* isr routine */
rtems_vector_number vector, /* vector number */
int type /* RTEMS or RAW intr */
);
void bsp_cleanup( void );
void DEBUG_puts( char *string );
void BSP_fatal_return( void );
void bsp_spurious_initialize( void );
extern rtems_configuration_table BSP_Configuration; /* owned by BSP */
extern rtems_cpu_table Cpu_table; /* owned by BSP */
extern rtems_unsigned32 bsp_isr_level;
#endif /* ASM */
#ifdef __cplusplus

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@@ -1,41 +0,0 @@
##
## Makefile.am,v 1.5 2002/12/17 13:37:41 ralf Exp
##
include_bspdir = $(includedir)/bsp
C_FILES = irq.c irq_init.c
OBJS = $(C_FILES:%.c=$(ARCH)/%.$(OBJEXT))
include_bsp_HEADERS = irq.h
S_FILES = irq_asm.S
OBJS += $(S_FILES:%.S=$(ARCH)/%.$(OBJEXT))
include $(top_srcdir)/../../../../../../automake/compile.am
include $(top_srcdir)/../../../../../../automake/lib.am
$(PROJECT_INCLUDE)/bsp:
$(mkinstalldirs) $@
$(PROJECT_INCLUDE)/bsp/%.h: %.h
$(INSTALL_DATA) $< $@
PREINSTALL_FILES = $(PROJECT_INCLUDE)/bsp \
$(include_bsp_HEADERS:%=$(PROJECT_INCLUDE)/bsp/%)
#
# (OPTIONAL) Add local stuff here using +=
#
$(PGM): $(OBJS)
$(make-rel)
# the .rel file built here will be put into libbsp.a by ../wrapup/Makefile
all-local: $(PREINSTALL_FILES) $(ARCH) $(OBJS) $(PGM)
EXTRA_DIST = irq.c irq.h irq_asm.S irq_init.c
include $(top_srcdir)/../../../../../../automake/local.am

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@@ -1,361 +0,0 @@
/*
*
* This file contains the implementation of the function described in irq.h
*
* Copyright (C) 1998, 1999 valette@crf.canon.fr
*
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*
* irq.c,v 1.4.2.8 2003/09/04 18:45:20 joel Exp
*/
#include <rtems/system.h>
#include <bsp.h>
#include <bsp/irq.h>
#if 0
#include <bsp/VME.h>
#include <bsp/openpic.h>
#endif
#include <stdlib.h>
#include <rtems/score/thread.h>
#include <rtems/score/apiext.h>
#include <libcpu/raw_exception.h>
#include <libcpu/io.h>
#include <bsp/vectors.h>
#include <rtems/bspIo.h> /* for printk */
#define RAVEN_INTR_ACK_REG 0xfeff0030
/*
* pointer to the mask representing the additionnal irq vectors
* that must be disabled when a particular entry is activated.
* They will be dynamically computed from teh prioruty table given
* in BSP_rtems_irq_mngt_set();
* CAUTION : this table is accessed directly by interrupt routine
* prologue.
*/
rtems_i8259_masks irq_mask_or_tbl[BSP_IRQ_NUMBER];
/*
* default handler connected on each irq after bsp initialization
*/
static rtems_irq_connect_data default_rtems_entry;
/*
* location used to store initial tables used for interrupt
* management.
*/
static rtems_irq_global_settings* internal_config;
static rtems_irq_connect_data* rtems_hdl_tbl;
/*
* Check if IRQ is an ISA IRQ
*/
static inline int is_isa_irq(const rtems_irq_symbolic_name irqLine)
{
return (((int) irqLine <= BSP_ISA_IRQ_MAX_OFFSET) &
((int) irqLine >= BSP_ISA_IRQ_LOWEST_OFFSET)
);
}
/*
* Check if IRQ is an OPENPIC IRQ
*/
static inline int is_pci_irq(const rtems_irq_symbolic_name irqLine)
{
return (((int) irqLine <= BSP_PCI_IRQ_MAX_OFFSET) &
((int) irqLine >= BSP_PCI_IRQ_LOWEST_OFFSET)
);
}
/*
* Check if IRQ is a Porcessor IRQ
*/
static inline int is_processor_irq(const rtems_irq_symbolic_name irqLine)
{
return (((int) irqLine <= BSP_PROCESSOR_IRQ_MAX_OFFSET) &
((int) irqLine >= BSP_PROCESSOR_IRQ_LOWEST_OFFSET)
);
}
/*
* ------------------------ RTEMS Irq helper functions ----------------
*/
/*
* Caution : this function assumes the variable "internal_config"
* is already set and that the tables it contains are still valid
* and accessible.
*/
static void compute_i8259_masks_from_prio ()
{
int i;
int j;
/*
* Always mask at least current interrupt to prevent re-entrance
*/
for (i=BSP_ISA_IRQ_LOWEST_OFFSET; i < BSP_ISA_IRQ_LOWEST_OFFSET + BSP_ISA_IRQ_NUMBER; i++) {
* ((unsigned short*) &irq_mask_or_tbl[i]) = (1 << i);
for (j = BSP_ISA_IRQ_LOWEST_OFFSET; j < BSP_ISA_IRQ_LOWEST_OFFSET + BSP_ISA_IRQ_NUMBER; j++) {
/*
* Mask interrupts at i8259 level that have a lower priority
*/
if (internal_config->irqPrioTbl [i] > internal_config->irqPrioTbl [j]) {
* ((unsigned short*) &irq_mask_or_tbl[i]) |= (1 << j);
}
}
}
}
/*
* This function check that the value given for the irq line
* is valid.
*/
static int isValidInterrupt(int irq)
{
if ( (irq < BSP_LOWEST_OFFSET) || (irq > BSP_MAX_OFFSET))
return 0;
return 1;
}
/*
* ------------------------ RTEMS Shared Irq Handler Mngt Routines ----------------
*/
int BSP_install_rtems_shared_irq_handler (const rtems_irq_connect_data* irq)
{
printk("BSP_insall_rtems_shared_irq_handler Not supported in psim\n");
return 0;
}
/*
* ------------------------ RTEMS Single Irq Handler Mngt Routines ----------------
*/
int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq)
{
unsigned int level;
if (!isValidInterrupt(irq->name)) {
printk("Invalid interrupt vector %d\n",irq->name);
return 0;
}
/*
* Check if default handler is actually connected. If not issue an error.
* You must first get the current handler via i386_get_current_idt_entry
* and then disconnect it using i386_delete_idt_entry.
* RATIONALE : to always have the same transition by forcing the user
* to get the previous handler before accepting to disconnect.
*/
_CPU_ISR_Disable(level);
if (rtems_hdl_tbl[irq->name].hdl != default_rtems_entry.hdl) {
_CPU_ISR_Enable(level);
printk("IRQ vector %d already connected\n",irq->name);
return 0;
}
/*
* store the data provided by user
*/
rtems_hdl_tbl[irq->name] = *irq;
rtems_hdl_tbl[irq->name].next_handler = (void *)-1;
if (is_isa_irq(irq->name)) {
printk("What's a isa_irq on psim?");
}
if (is_processor_irq(irq->name)) {
/*
* Enable exception at processor level
*/
}
/*
* Enable interrupt on device
*/
irq->on(irq);
_CPU_ISR_Enable(level);
return 1;
}
int BSP_get_current_rtems_irq_handler (rtems_irq_connect_data* irq)
{
unsigned int level;
if (!isValidInterrupt(irq->name)) {
return 0;
}
_CPU_ISR_Disable(level);
*irq = rtems_hdl_tbl[irq->name];
_CPU_ISR_Enable(level);
return 1;
}
int BSP_remove_rtems_irq_handler (const rtems_irq_connect_data* irq)
{
rtems_irq_connect_data *pchain= NULL, *vchain = NULL;
unsigned int level;
if (!isValidInterrupt(irq->name)) {
return 0;
}
/*
* Check if default handler is actually connected. If not issue an error.
* You must first get the current handler via i386_get_current_idt_entry
* and then disconnect it using i386_delete_idt_entry.
* RATIONALE : to always have the same transition by forcing the user
* to get the previous handler before accepting to disconnect.
*/
_CPU_ISR_Disable(level);
if (rtems_hdl_tbl[irq->name].hdl != irq->hdl) {
_CPU_ISR_Enable(level);
return 0;
}
if( (int)rtems_hdl_tbl[irq->name].next_handler != -1 )
{
int found = 0;
for( (pchain= NULL, vchain = &rtems_hdl_tbl[irq->name]);
(vchain->hdl != default_rtems_entry.hdl);
(pchain= vchain, vchain = (rtems_irq_connect_data*)vchain->next_handler) )
{
if( vchain->hdl == irq->hdl )
{
found= -1; break;
}
}
if( !found )
{
_CPU_ISR_Enable(level);
return 0;
}
}
else
{
if (rtems_hdl_tbl[irq->name].hdl != irq->hdl)
{
_CPU_ISR_Enable(level);
return 0;
}
}
if (is_isa_irq(irq->name)) {
printk("isa irq on psim?");
}
if (is_processor_irq(irq->name)) {
/*
* disable exception at processor level
*/
}
/*
* Disable interrupt on device
*/
irq->off(irq);
/*
* restore the default irq value
*/
if( !vchain )
{
/* single handler vector... */
rtems_hdl_tbl[irq->name] = default_rtems_entry;
}
else
{
if( pchain )
{
/* non-first handler being removed */
pchain->next_handler = vchain->next_handler;
}
else
{
/* first handler isn't malloc'ed, so just overwrite it. Since
the contents of vchain are being struct copied, vchain itself
goes away */
rtems_hdl_tbl[irq->name]= *vchain;
}
free(vchain);
}
_CPU_ISR_Enable(level);
return 1;
}
/*
* ------------------------ RTEMS Global Irq Handler Mngt Routines ----------------
*/
int BSP_rtems_irq_mngt_set(rtems_irq_global_settings* config)
{
/*
* Store various code accelerators
*/
internal_config = config;
default_rtems_entry = config->defaultEntry;
rtems_hdl_tbl = config->irqHdlTbl;
return 1;
}
int BSP_rtems_irq_mngt_get(rtems_irq_global_settings** config)
{
*config = internal_config;
return 0;
}
int _BSP_vme_bridge_irq = -1;
unsigned BSP_spuriousIntr = 0;
/*
* High level IRQ handler called from shared_raw_irq_code_entry
*/
void C_dispatch_irq_handler (CPU_Interrupt_frame *frame, unsigned int excNum)
{
register unsigned msr;
register unsigned new_msr;
if (excNum == ASM_DEC_VECTOR) {
_CPU_MSR_GET(msr);
new_msr = msr | MSR_EE;
_CPU_MSR_SET(new_msr);
rtems_hdl_tbl[BSP_DECREMENTER].hdl();
_CPU_MSR_SET(msr);
return;
}
}
void _ThreadProcessSignalsFromIrq (BSP_Exception_frame* ctx)
{
/*
* Process pending signals that have not already been
* processed by _Thread_Displatch. This happens quite
* unfrequently : the ISR must have posted an action
* to the current running thread.
*/
if ( _Thread_Do_post_task_switch_extension ||
_Thread_Executing->do_post_task_switch_extension ) {
_Thread_Executing->do_post_task_switch_extension = FALSE;
_API_extensions_Run_postswitch();
}
/*
* I plan to process other thread related events here.
* This will include DEBUG session requested from keyboard...
*/
}

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@@ -1,333 +0,0 @@
/* irq.h
*
* This include file describe the data structure and the functions implemented
* by rtems to write interrupt handlers.
*
* CopyRight (C) 1999 valette@crf.canon.fr
*
* This code is heavilly inspired by the public specification of STREAM V2
* that can be found at :
*
* <http://www.chorus.com/Documentation/index.html> by following
* the STREAM API Specification Document link.
*
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*
* irq.h,v 1.2.4.2 2003/09/04 18:45:20 joel Exp
*/
#ifndef LIBBSP_POWERPC_MCP750_IRQ_IRQ_H
#define LIBBSP_POWERPC_MCP750_IRQ_IRQ_H
/*
* 8259 edge/level control definitions at VIA
*/
#define ISA8259_M_ELCR 0x4d0
#define ISA8259_S_ELCR 0x4d1
#define ELCRS_INT15_LVL 0x80
#define ELCRS_INT14_LVL 0x40
#define ELCRS_INT13_LVL 0x20
#define ELCRS_INT12_LVL 0x10
#define ELCRS_INT11_LVL 0x08
#define ELCRS_INT10_LVL 0x04
#define ELCRS_INT9_LVL 0x02
#define ELCRS_INT8_LVL 0x01
#define ELCRM_INT7_LVL 0x80
#define ELCRM_INT6_LVL 0x40
#define ELCRM_INT5_LVL 0x20
#define ELCRM_INT4_LVL 0x10
#define ELCRM_INT3_LVL 0x8
#define ELCRM_INT2_LVL 0x4
#define ELCRM_INT1_LVL 0x2
#define ELCRM_INT0_LVL 0x1
#define BSP_ASM_IRQ_VECTOR_BASE 0x0
/* PIC's command and mask registers */
#define PIC_MASTER_COMMAND_IO_PORT 0x20 /* Master PIC command register */
#define PIC_SLAVE_COMMAND_IO_PORT 0xa0 /* Slave PIC command register */
#define PIC_MASTER_IMR_IO_PORT 0x21 /* Master PIC Interrupt Mask Register */
#define PIC_SLAVE_IMR_IO_PORT 0xa1 /* Slave PIC Interrupt Mask Register */
/* Command for specific EOI (End Of Interrupt): Interrupt acknowledge */
#define PIC_EOSI 0x60 /* End of Specific Interrupt (EOSI) */
#define SLAVE_PIC_EOSI 0x62 /* End of Specific Interrupt (EOSI) for cascade */
#define PIC_EOI 0x20 /* Generic End of Interrupt (EOI) */
#ifndef ASM
/*
* Symblolic IRQ names and related definitions.
*/
typedef enum {
/* Base vector for our ISA IRQ handlers. */
BSP_ISA_IRQ_VECTOR_BASE = BSP_ASM_IRQ_VECTOR_BASE,
/*
* ISA IRQ handler related definitions
*/
BSP_ISA_IRQ_NUMBER = 16,
BSP_ISA_IRQ_LOWEST_OFFSET = 0,
BSP_ISA_IRQ_MAX_OFFSET = BSP_ISA_IRQ_LOWEST_OFFSET + BSP_ISA_IRQ_NUMBER - 1,
/*
* PCI IRQ handlers related definitions
* CAUTION : BSP_PCI_IRQ_LOWEST_OFFSET should be equal to OPENPIC_VEC_SOURCE
*/
BSP_PCI_IRQ_NUMBER = 16,
BSP_PCI_IRQ_LOWEST_OFFSET = BSP_ISA_IRQ_NUMBER,
BSP_PCI_IRQ_MAX_OFFSET = BSP_PCI_IRQ_LOWEST_OFFSET + BSP_PCI_IRQ_NUMBER - 1,
/*
* PowerPc exceptions handled as interrupt where a rtems managed interrupt
* handler might be connected
*/
BSP_PROCESSOR_IRQ_NUMBER = 1,
BSP_PROCESSOR_IRQ_LOWEST_OFFSET = BSP_PCI_IRQ_MAX_OFFSET + 1,
BSP_PROCESSOR_IRQ_MAX_OFFSET = BSP_PROCESSOR_IRQ_LOWEST_OFFSET + BSP_PROCESSOR_IRQ_NUMBER - 1,
/* Misc vectors for OPENPIC irqs (IPI, timers)
*/
BSP_MISC_IRQ_NUMBER = 8,
BSP_MISC_IRQ_LOWEST_OFFSET = BSP_PROCESSOR_IRQ_MAX_OFFSET + 1,
BSP_MISC_IRQ_MAX_OFFSET = BSP_MISC_IRQ_LOWEST_OFFSET + BSP_MISC_IRQ_NUMBER - 1,
/*
* Summary
*/
BSP_IRQ_NUMBER = BSP_MISC_IRQ_MAX_OFFSET + 1,
BSP_LOWEST_OFFSET = BSP_ISA_IRQ_LOWEST_OFFSET,
BSP_MAX_OFFSET = BSP_MISC_IRQ_MAX_OFFSET,
/*
* Some ISA IRQ symbolic name definition
*/
BSP_ISA_PERIODIC_TIMER = 0,
BSP_ISA_KEYBOARD = 1,
BSP_ISA_UART_COM2_IRQ = 3,
BSP_ISA_UART_COM1_IRQ = 4,
BSP_ISA_RT_TIMER1 = 8,
BSP_ISA_RT_TIMER3 = 10,
/*
* Some PCI IRQ symbolic name definition
*/
BSP_PCI_IRQ0 = BSP_PCI_IRQ_LOWEST_OFFSET,
BSP_PCI_ISA_BRIDGE_IRQ = BSP_PCI_IRQ0,
/*
* Some Processor execption handled as rtems IRQ symbolic name definition
*/
BSP_DECREMENTER = BSP_PROCESSOR_IRQ_LOWEST_OFFSET
}rtems_irq_symbolic_name;
/*
* Type definition for RTEMS managed interrupts
*/
typedef unsigned char rtems_irq_prio;
typedef unsigned short rtems_i8259_masks;
extern volatile rtems_i8259_masks i8259s_cache;
struct __rtems_irq_connect_data__; /* forward declaratiuon */
typedef void (*rtems_irq_hdl) (void);
typedef void (*rtems_irq_enable) (const struct __rtems_irq_connect_data__*);
typedef void (*rtems_irq_disable) (const struct __rtems_irq_connect_data__*);
typedef int (*rtems_irq_is_enabled) (const struct __rtems_irq_connect_data__*);
typedef struct __rtems_irq_connect_data__ {
/*
* IRQ line
*/
rtems_irq_symbolic_name name;
/*
* handler. See comment on handler properties below in function prototype.
*/
rtems_irq_hdl hdl;
/*
* function for enabling interrupts at device level (ONLY!).
* The BSP code will automatically enable it at i8259s level and openpic level.
* RATIONALE : anyway such code has to exist in current driver code.
* It is usually called immediately AFTER connecting the interrupt handler.
* RTEMS may well need such a function when restoring normal interrupt
* processing after a debug session.
*
*/
rtems_irq_enable on;
/*
* function for disabling interrupts at device level (ONLY!).
* The code will disable it at i8259s level. RATIONALE : anyway
* such code has to exist for clean shutdown. It is usually called
* BEFORE disconnecting the interrupt. RTEMS may well need such
* a function when disabling normal interrupt processing for
* a debug session. May well be a NOP function.
*/
rtems_irq_disable off;
/*
* function enabling to know what interrupt may currently occur
* if someone manipulates the i8259s interrupt mask without care...
*/
rtems_irq_is_enabled isOn;
/*
* Set to -1 for vectors forced to have only 1 handler
*/
void *next_handler;
}rtems_irq_connect_data;
typedef struct {
/*
* size of all the table fields (*Tbl) described below.
*/
unsigned int irqNb;
/*
* Default handler used when disconnecting interrupts.
*/
rtems_irq_connect_data defaultEntry;
/*
* Table containing initials/current value.
*/
rtems_irq_connect_data* irqHdlTbl;
/*
* actual value of BSP_ISA_IRQ_VECTOR_BASE...
*/
rtems_irq_symbolic_name irqBase;
/*
* software priorities associated with interrupts.
* if irqPrio [i] > intrPrio [j] it means that
* interrupt handler hdl connected for interrupt name i
* will not be interrupted by the handler connected for interrupt j
* The interrupt source will be physically masked at i8259 level.
*/
rtems_irq_prio* irqPrioTbl;
}rtems_irq_global_settings;
/*-------------------------------------------------------------------------+
| Function Prototypes.
+--------------------------------------------------------------------------*/
/*
* ------------------------ Intel 8259 (or emulation) Mngt Routines -------
*/
/*
* function to disable a particular irq at 8259 level. After calling
* this function, even if the device asserts the interrupt line it will
* not be propagated further to the processor
*/
int BSP_irq_disable_at_i8259s (const rtems_irq_symbolic_name irqLine);
/*
* function to enable a particular irq at 8259 level. After calling
* this function, if the device asserts the interrupt line it will
* be propagated further to the processor
*/
int BSP_irq_enable_at_i8259s (const rtems_irq_symbolic_name irqLine);
/*
* function to acknoledge a particular irq at 8259 level. After calling
* this function, if a device asserts an enabled interrupt line it will
* be propagated further to the processor. Mainly usefull for people
* writting raw handlers as this is automagically done for rtems managed
* handlers.
*/
int BSP_irq_ack_at_i8259s (const rtems_irq_symbolic_name irqLine);
/*
* function to check if a particular irq is enabled at 8259 level. After calling
*/
int BSP_irq_enabled_at_i8259s (const rtems_irq_symbolic_name irqLine);
/*
* ------------------------ RTEMS Single Irq Handler Mngt Routines ----------------
*/
/*
* function to connect a particular irq handler. This hanlder will NOT be called
* directly as the result of the corresponding interrupt. Instead, a RTEMS
* irq prologue will be called that will :
*
* 1) save the C scratch registers,
* 2) switch to a interrupt stack if the interrupt is not nested,
* 3) store the current i8259s' interrupt masks
* 4) modify them to disable the current interrupt at 8259 level (and may
* be others depending on software priorities)
* 5) aknowledge the i8259s',
* 6) demask the processor,
* 7) call the application handler
*
* As a result the hdl function provided
*
* a) can perfectly be written is C,
* b) may also well directly call the part of the RTEMS API that can be used
* from interrupt level,
* c) It only responsible for handling the jobs that need to be done at
* the device level including (aknowledging/re-enabling the interrupt at device,
* level, getting the data,...)
*
* When returning from the function, the following will be performed by
* the RTEMS irq epilogue :
*
* 1) masks the interrupts again,
* 2) restore the original i8259s' interrupt masks
* 3) switch back on the orinal stack if needed,
* 4) perform rescheduling when necessary,
* 5) restore the C scratch registers...
* 6) restore initial execution flow
*
*/
int BSP_install_rtems_irq_handler (const rtems_irq_connect_data*);
int BSP_install_rtems_shared_irq_handler (const rtems_irq_connect_data*);
#define BSP_SHARED_HANDLER_SUPPORT 1
/*
* function to get the current RTEMS irq handler for ptr->name. It enables to
* define hanlder chain...
*/
int BSP_get_current_rtems_irq_handler (rtems_irq_connect_data* ptr);
/*
* function to get disconnect the RTEMS irq handler for ptr->name.
* This function checks that the value given is the current one for safety reason.
* The user can use the previous function to get it.
*/
int BSP_remove_rtems_irq_handler (const rtems_irq_connect_data*);
/*
* ------------------------ RTEMS Global Irq Handler Mngt Routines ----------------
*/
/*
* (Re) Initialize the RTEMS interrupt management.
*
* The result of calling this function will be the same as if each individual
* handler (config->irqHdlTbl[i].hdl) different from "config->defaultEntry.hdl"
* has been individualy connected via
* BSP_install_rtems_irq_handler(&config->irqHdlTbl[i])
* And each handler currently equal to config->defaultEntry.hdl
* has been previously disconnected via
* BSP_remove_rtems_irq_handler (&config->irqHdlTbl[i])
*
* This is to say that all information given will be used and not just
* only the space.
*
* CAUTION : the various table address contained in config will be used
* directly by the interrupt mangement code in order to save
* data size so they must stay valid after the call => they should
* not be modified or declared on a stack.
*/
int BSP_rtems_irq_mngt_set(rtems_irq_global_settings* config);
/*
* (Re) get info on current RTEMS interrupt management.
*/
int BSP_rtems_irq_mngt_get(rtems_irq_global_settings**);
extern void BSP_rtems_irq_mng_init(unsigned cpuId);
extern void BSP_i8259s_init(void);
#endif
#endif

View File

@@ -1,357 +0,0 @@
/*
* This file contains the assembly code for the PowerPC
* IRQ veneers for RTEMS.
*
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*
* Modified to support the MCP750.
* Modifications Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
*
* Till Straumann <strauman@slac.stanford.edu>, 2003/7:
* - store isr nesting level in _ISR_Nest_level rather than
* SPRG0 - RTEMS relies on that variable.
*
* irq_asm.S,v 1.5.4.3 2003/09/04 18:45:20 joel Exp
*/
#include <asm.h>
#include <rtems/score/cpu.h>
#include <bsp/vectors.h>
#include <libcpu/raw_exception.h>
#define SYNC \
sync; \
isync
.text
.p2align 5
PUBLIC_VAR(decrementer_exception_vector_prolog_code)
SYM (decrementer_exception_vector_prolog_code):
/*
* let room for exception frame
*/
stwu r1, - (EXCEPTION_FRAME_END)(r1)
stw r4, GPR4_OFFSET(r1)
li r4, ASM_DEC_VECTOR
ba shared_raw_irq_code_entry
PUBLIC_VAR (decrementer_exception_vector_prolog_code_size)
decrementer_exception_vector_prolog_code_size = . - decrementer_exception_vector_prolog_code
PUBLIC_VAR(external_exception_vector_prolog_code)
SYM (external_exception_vector_prolog_code):
/*
* let room for exception frame
*/
stwu r1, - (EXCEPTION_FRAME_END)(r1)
stw r4, GPR4_OFFSET(r1)
li r4, ASM_EXT_VECTOR
ba shared_raw_irq_code_entry
PUBLIC_VAR (external_exception_vector_prolog_code_size)
external_exception_vector_prolog_code_size = . - external_exception_vector_prolog_code
PUBLIC_VAR(shared_raw_irq_code_entry)
PUBLIC_VAR(C_dispatch_irq_handler)
.p2align 5
SYM (shared_raw_irq_code_entry):
/*
* Entry conditions :
* Registers already saved : R1, R4
* R1 : points to a location with enough room for the
* interrupt frame
* R4 : vector number
*/
/*
* Save SRR0/SRR1 As soon As possible as it is the minimal needed
* to reenable exception processing
*/
stw r0, GPR0_OFFSET(r1)
/* PPC EABI: R2 is reserved (pointer to short data .sdata2) - we won't touch it
* but we still save/restore it, just in case...
*/
stw r2, GPR2_OFFSET(r1)
stw r3, GPR3_OFFSET(r1)
mfsrr0 r0
mfsrr1 r3
stw r0, SRR0_FRAME_OFFSET(r1)
stw r3, SRR1_FRAME_OFFSET(r1)
mfmsr r3
/*
* Enable data and instruction address translation, exception recovery
*
* also, on CPUs with FP, enable FP so that FP context can be
* saved and restored (using FP instructions)
*/
#if (PPC_HAS_FPU == 0)
ori r3, r3, MSR_RI | MSR_IR | MSR_DR
#else
ori r3, r3, MSR_RI | MSR_FP /* MSR_IR | MSR_DR */
#endif
mtmsr r3
SYNC
/*
* Push C scratch registers on the current stack. It may
* actually be the thread stack or the interrupt stack.
* Anyway we have to make it in order to be able to call C/C++
* functions. Depending on the nesting interrupt level, we will
* switch to the right stack later.
*/
stw r5, GPR5_OFFSET(r1)
stw r6, GPR6_OFFSET(r1)
stw r7, GPR7_OFFSET(r1)
stw r8, GPR8_OFFSET(r1)
stw r9, GPR9_OFFSET(r1)
stw r10, GPR10_OFFSET(r1)
stw r11, GPR11_OFFSET(r1)
stw r12, GPR12_OFFSET(r1)
stw r13, GPR13_OFFSET(r1)
mfcr r5
mfctr r6
mfxer r7
mflr r8
stw r5, EXC_CR_OFFSET(r1)
stw r6, EXC_CTR_OFFSET(r1)
stw r7, EXC_XER_OFFSET(r1)
stw r8, EXC_LR_OFFSET(r1)
/*
* Add some non volatile registers to store information
* that will be used when returning from C handler
*/
stw r14, GPR14_OFFSET(r1)
stw r15, GPR15_OFFSET(r1)
/*
* save current stack pointer location in R14
*/
addi r14, r1, 0
/*
* store part of _Thread_Dispatch_disable_level address in R15
*/
addis r15,0, _Thread_Dispatch_disable_level@ha
#if BROKEN_ISR_NEST_LEVEL
/*
* Get current nesting level in R3
*/
mfspr r3, SPRG0
#else
/*
* Retrieve current nesting level from _ISR_Nest_level
*/
lis r7, _ISR_Nest_level@ha
lwz r3, _ISR_Nest_level@l(r7)
#endif
/*
* Check if stack switch is necessary
*/
cmpwi r3,0
bne nested
mfspr r1, SPRG1
nested:
/*
* Start Incrementing nesting level in R3
*/
addi r3,r3,1
/*
* Start Incrementing _Thread_Dispatch_disable_level R4 = _Thread_Dispatch_disable_level
*/
lwz r6,_Thread_Dispatch_disable_level@l(r15)
#if BROKEN_ISR_NEST_LEVEL
/*
* Store new nesting level in SPRG0
*/
mtspr SPRG0, r3
#else
/* store new nesting level in _ISR_Nest_level */
stw r3, _ISR_Nest_level@l(r7)
#endif
addi r6, r6, 1
mfmsr r5
/*
* store new _Thread_Dispatch_disable_level value
*/
stw r6, _Thread_Dispatch_disable_level@l(r15)
/*
* We are now running on the interrupt stack. External and decrementer
* exceptions are still disabled. I see no purpose trying to optimize
* further assembler code.
*/
/*
* Call C exception handler for decrementer Interrupt frame is passed just
* in case...
*/
addi r3, r14, 0x8
bl C_dispatch_irq_handler /* C_dispatch_irq_handler(cpu_interrupt_frame* r3, vector r4) */
/*
* start decrementing nesting level. Note : do not test result against 0
* value as an easy exit condition because if interrupt nesting level > 1
* then _Thread_Dispatch_disable_level > 1
*/
#if BROKEN_ISR_NEST_LEVEL
mfspr r4, SPRG0
#else
lis r7, _ISR_Nest_level@ha
lwz r4, _ISR_Nest_level@l(r7)
#endif
/*
* start decrementing _Thread_Dispatch_disable_level
*/
lwz r3,_Thread_Dispatch_disable_level@l(r15)
addi r4, r4, -1 /* Continue decrementing nesting level */
addi r3, r3, -1 /* Continue decrementing _Thread_Dispatch_disable_level */
#if BROKEN_ISR_NEST_LEVEL
mtspr SPRG0, r4 /* End decrementing nesting level */
#else
stw r4, _ISR_Nest_level@l(r7) /* End decrementing nesting level */
#endif
stw r3,_Thread_Dispatch_disable_level@l(r15) /* End decrementing _Thread_Dispatch_disable_level */
cmpwi r3, 0
/*
* switch back to original stack (done here just optimize registers
* contention. Could have been done before...)
*/
addi r1, r14, 0
bne easy_exit /* if (_Thread_Dispatch_disable_level != 0) goto easy_exit */
/*
* Here we are running again on the thread system stack.
* We have interrupt nesting level = _Thread_Dispatch_disable_level = 0.
* Interrupt are still disabled. Time to check if scheduler request to
* do something with the current thread...
*/
addis r4, 0, _Context_Switch_necessary@ha
lwz r5, _Context_Switch_necessary@l(r4)
cmpwi r5, 0
bne switch
addis r6, 0, _ISR_Signals_to_thread_executing@ha
lwz r7, _ISR_Signals_to_thread_executing@l(r6)
cmpwi r7, 0
li r8, 0
beq easy_exit
stw r8, _ISR_Signals_to_thread_executing@l(r6)
/*
* going to call _ThreadProcessSignalsFromIrq
* Push a complete exception like frame...
*/
stmw r16, GPR16_OFFSET(r1)
addi r3, r1, 0x8
/*
* compute SP at exception entry
*/
addi r4, r1, EXCEPTION_FRAME_END
/*
* store it at the right place
*/
stw r4, GPR1_OFFSET(r1)
/*
* Call High Level signal handling code
*/
bl _ThreadProcessSignalsFromIrq
/*
* start restoring exception like frame
*/
lwz r31, EXC_CTR_OFFSET(r1)
lwz r30, EXC_XER_OFFSET(r1)
lwz r29, EXC_CR_OFFSET(r1)
lwz r28, EXC_LR_OFFSET(r1)
mtctr r31
mtxer r30
mtcr r29
mtlr r28
lmw r4, GPR4_OFFSET(r1)
lwz r2, GPR2_OFFSET(r1)
lwz r0, GPR0_OFFSET(r1)
/*
* Disable data and instruction translation. Make path non recoverable...
*/
mfmsr r3
xori r3, r3, MSR_RI /* | MSR_IR | MSR_DR */
mtmsr r3
SYNC
/*
* Restore rfi related settings
*/
lwz r3, SRR1_FRAME_OFFSET(r1)
mtsrr1 r3
lwz r3, SRR0_FRAME_OFFSET(r1)
mtsrr0 r3
lwz r3, GPR3_OFFSET(r1)
addi r1,r1, EXCEPTION_FRAME_END
SYNC
rfi
switch:
bl SYM (_Thread_Dispatch)
easy_exit:
/*
* start restoring interrupt frame
*/
lwz r3, EXC_CTR_OFFSET(r1)
lwz r4, EXC_XER_OFFSET(r1)
lwz r5, EXC_CR_OFFSET(r1)
lwz r6, EXC_LR_OFFSET(r1)
mtctr r3
mtxer r4
mtcr r5
mtlr r6
lwz r15, GPR15_OFFSET(r1)
lwz r14, GPR14_OFFSET(r1)
lwz r13, GPR13_OFFSET(r1)
lwz r12, GPR12_OFFSET(r1)
lwz r11, GPR11_OFFSET(r1)
lwz r10, GPR10_OFFSET(r1)
lwz r9, GPR9_OFFSET(r1)
lwz r8, GPR8_OFFSET(r1)
lwz r7, GPR7_OFFSET(r1)
lwz r6, GPR6_OFFSET(r1)
lwz r5, GPR5_OFFSET(r1)
/*
* Disable nested exception processing, data and instruction
* translation.
*/
mfmsr r3
xori r3, r3, MSR_RI /* | MSR_IR | MSR_DR */
mtmsr r3
SYNC
/*
* Restore rfi related settings
*/
lwz r4, SRR1_FRAME_OFFSET(r1)
lwz r3, SRR0_FRAME_OFFSET(r1)
lwz r2, GPR2_OFFSET(r1)
lwz r0, GPR0_OFFSET(r1)
mtsrr1 r4
mtsrr0 r3
lwz r4, GPR4_OFFSET(r1)
lwz r3, GPR3_OFFSET(r1)
addi r1,r1, EXCEPTION_FRAME_END
SYNC
rfi

View File

@@ -1,168 +0,0 @@
/* irq_init.c
*
* This file contains the implementation of rtems initialization
* related to interrupt handling.
*
* CopyRight (C) 1999 valette@crf.canon.fr
*
* Enhanced by Jay Kulpinski <jskulpin@eng01.gdds.com>
* to make it valid for MVME2300 Motorola boards.
*
* Till Straumann <strauman@slac.stanford.edu>, 12/20/2001:
* Use the new interface to openpic_init
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*
* irq_init.c,v 1.6.2.5 2003/09/04 18:45:20 joel Exp
*/
#include <libcpu/io.h>
#include <libcpu/spr.h>
#include <bsp/irq.h>
#include <bsp.h>
#include <libcpu/raw_exception.h>
#include <rtems/bspIo.h>
#if 0
#include <bsp/pci.h>
#include <bsp/residual.h>
#include <bsp/openpic.h>
#include <bsp/motorola.h>
#endif
/*
#define SHOW_ISA_PCI_BRIDGE_SETTINGS
*/
typedef struct {
unsigned char bus; /* few chance the PCI/ISA bridge is not on first bus but ... */
unsigned char device;
unsigned char function;
} pci_isa_bridge_device;
pci_isa_bridge_device* via_82c586 = 0;
extern unsigned int external_exception_vector_prolog_code_size[];
extern void external_exception_vector_prolog_code();
extern unsigned int decrementer_exception_vector_prolog_code_size[];
extern void decrementer_exception_vector_prolog_code();
/*
* default on/off function
*/
static void nop_func(){}
/*
* default isOn function
*/
static int not_connected() {return 0;}
/*
* default possible isOn function
*/
static int connected() {return 1;}
static rtems_irq_connect_data rtemsIrq[BSP_IRQ_NUMBER];
static rtems_irq_global_settings initial_config;
static rtems_irq_connect_data defaultIrq = {
/* vectorIdex, hdl , on , off , isOn */
0, nop_func , nop_func , nop_func , not_connected
};
static rtems_irq_prio irqPrioTable[BSP_IRQ_NUMBER]={
/*
* actual rpiorities for interrupt :
* 0 means that only current interrupt is masked
* 255 means all other interrupts are masked
*/
/*
* ISA interrupts.
* The second entry has a priority of 255 because
* it is the slave pic entry and is should always remain
* unmasked.
*/
0,0,
255,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
/*
* PCI Interrupts
*/
8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, /* for raven prio 0 means unactive... */
/*
* Processor exceptions handled as interrupts
*/
0
};
void VIA_isa_bridge_interrupts_setup(void)
{
printk("VIA_isa_bridge_interrupts_setup - Shouldn't get here!\n");
return;
}
/*
* This code assumes the exceptions management setup has already
* been done. We just need to replace the exceptions that will
* be handled like interrupt. On mcp750/mpc750 and many PPC processors
* this means the decrementer exception and the external exception.
*/
void BSP_rtems_irq_mng_init(unsigned cpuId)
{
rtems_raw_except_connect_data vectorDesc;
int i;
/*
* First initialize the Interrupt management hardware
*/
/*
* Initialize Rtems management interrupt table
*/
/*
* re-init the rtemsIrq table
*/
for (i = 0; i < BSP_IRQ_NUMBER; i++) {
rtemsIrq[i] = defaultIrq;
rtemsIrq[i].name = i;
}
/*
* Init initial Interrupt management config
*/
initial_config.irqNb = BSP_IRQ_NUMBER;
initial_config.defaultEntry = defaultIrq;
initial_config.irqHdlTbl = rtemsIrq;
initial_config.irqBase = BSP_ASM_IRQ_VECTOR_BASE;
initial_config.irqPrioTbl = irqPrioTable;
if (!BSP_rtems_irq_mngt_set(&initial_config)) {
/*
* put something here that will show the failure...
*/
BSP_panic("Unable to initialize RTEMS interrupt Management!!! System locked\n");
}
/*
* We must connect the raw irq handler for the two
* expected interrupt sources : decrementer and external interrupts.
*/
vectorDesc.exceptIndex = ASM_DEC_VECTOR;
vectorDesc.hdl.vector = ASM_DEC_VECTOR;
vectorDesc.hdl.raw_hdl = decrementer_exception_vector_prolog_code;
vectorDesc.hdl.raw_hdl_size = (unsigned) decrementer_exception_vector_prolog_code_size;
vectorDesc.on = nop_func;
vectorDesc.off = nop_func;
vectorDesc.isOn = connected;
if (!mpc60x_set_exception (&vectorDesc)) {
BSP_panic("Unable to initialize RTEMS decrementer raw exception\n");
}
vectorDesc.exceptIndex = ASM_EXT_VECTOR;
vectorDesc.hdl.vector = ASM_EXT_VECTOR;
vectorDesc.hdl.raw_hdl = external_exception_vector_prolog_code;
vectorDesc.hdl.raw_hdl_size = (unsigned) external_exception_vector_prolog_code_size;
if (!mpc60x_set_exception (&vectorDesc)) {
BSP_panic("Unable to initialize RTEMS external raw exception\n");
}
#ifdef TRACE_IRQ_INIT
printk("RTEMS IRQ management is now operationnal\n");
#endif
}

View File

@@ -2,9 +2,7 @@
## $Id$
##
VPATH = @srcdir@:@srcdir@/../../shared/start
S_FILES = start.S rtems_crti.S
S_FILES = start.S
S_O_FILES = $(S_FILES:%.S=$(ARCH)/%.$(OBJEXT))
OBJS = $(S_O_FILES)
@@ -15,22 +13,20 @@ include $(top_srcdir)/../../../../../../automake/lib.am
#
# (OPTIONAL) Add local stuff here using +=
#
bsplib_DATA = $(PROJECT_RELEASE)/lib/start$(LIB_VARIANT).$(OBJEXT)
bsplib_DATA += $(PROJECT_RELEASE)/lib/rtems_crti.$(OBJEXT)
install-data-local: $(PROJECT_RELEASE)/lib/start$(LIB_VARIANT).$(OBJEXT)
@$(mkinstalldirs) $(DESTDIR)$(bsplibdir)
$(INSTALL_DATA) $< $(DESTDIR)$(bsplibdir)
$(PROJECT_RELEASE)/lib/start$(LIB_VARIANT).$(OBJEXT): $(ARCH)/start.$(OBJEXT)
$(INSTALL_DATA) $< $@
$(PROJECT_RELEASE)/lib/rtems_crti.$(OBJEXT): $(ARCH)/rtems_crti.$(OBJEXT)
$(INSTALL_DATA) $< $@
TMPINSTALL_FILES += $(PROJECT_RELEASE)/lib/start$(LIB_VARIANT).$(OBJEXT)
TMPINSTALL_FILES += $(PROJECT_RELEASE)/lib/rtems_crti.$(OBJEXT)
all-local: $(ARCH) $(OBJS) $(ARCH)/start.$(OBJEXT) $(ARCH)/rtems_crti.$(OBJEXT) $(TMPINSTALL_FILES)
all-local: $(ARCH) $(OBJS) $(ARCH)/start.$(OBJEXT) $(TMPINSTALL_FILES)
$(OBJS): $(ARCH)
.PRECIOUS: $(ARCH)/start.$(OBJEXT)
.PRECIOUS: $(ARCH)/start.$(OBJEXT) $(ARCH)/rtems_crti.$(OBJEXT)
EXTRA_DIST = start.S
include $(top_srcdir)/../../../../../../automake/local.am

View File

@@ -17,9 +17,6 @@
* $Id$
*/
#include <asm.h>
#include <rtems/score/cpu.h>
#include <libcpu/io.h>
#include "ppc-asm.h"
.file "startsim.s"
@@ -56,14 +53,9 @@ FUNC_NAME(__atexit): /* tell C's eabi-ctor's we have an atexit function */
.Lptr:
.long .LCTOC1-.Laddr
.globl __rtems_entry_point
.type __rtems_entry_point,@function
__rtems_entry_point:
#if 1
.globl _start
.type _start,@function
_start:
#endif
bl .Laddr /* get current address */
.Laddr:
mflr r4 /* real address of .Laddr */
@@ -72,7 +64,6 @@ _start:
lwz r4,.Ltable(r5) /* get linker's idea of where .Laddr is */
subf r4,r4,r5 /* calculate difference between where linked and current */
bl __eabi /* setup EABI and SYSV environment */
/* clear bss */
lwz r6,.Lbss_start(r5) /* calculate beginning of the BSS */
lwz r7,.Lend(r5) /* calculate end of the BSS */
@@ -109,7 +100,6 @@ _start:
la r5,environ@l(r5) /* environp */
li r4, 0 /* argv */
li r3, 0 /* argc */
/* Let her rip */
bl FUNC_NAME(boot_card)

View File

@@ -8,7 +8,7 @@ VPATH = @srcdir@:@srcdir@/../../../shared
PGM = $(ARCH)/startup.rel
C_FILES = bspclean.c bsplibc.c bsppost.c bspstart.c bootcard.c main.c sbrk.c \
gnatinstallhandler.c
setvec.c gnatinstallhandler.c
C_O_FILES = $(C_FILES:%.c=$(ARCH)/%.$(OBJEXT))
OBJS = $(C_O_FILES)
@@ -38,6 +38,6 @@ all-local: $(ARCH) $(OBJS) $(PGM) $(TMPINSTALL_FILES)
.PRECIOUS: $(PGM)
EXTRA_DIST = bspclean.c bspstart.c device-tree linkcmds
EXTRA_DIST = bspclean.c bspstart.c device-tree linkcmds setvec.c
include $(top_srcdir)/../../../../../../automake/local.am

View File

@@ -16,85 +16,37 @@
#include <string.h>
#include <fcntl.h>
#include <bsp.h>
#include <bsp/irq.h>
#include <rtems/libio.h>
#include <rtems/libcsupport.h>
#include <rtems/bspIo.h>
#include <libcpu/cpuIdent.h>
#include <libcpu/spr.h>
SPR_RW(SPRG0)
SPR_RW(SPRG1)
extern unsigned long __rtems_end[];
void initialize_exceptions(void);
/* On psim, each click of the decrementer register corresponds
* to 1 instruction. By setting this to 100, we are indicating
* that we are assuming it can execute 100 instructions per
* microsecond. This corresponds to sustaining 1 instruction
* per cycle at 100 Mhz. Whether this is a good guess or not
* is anyone's guess.
*/
extern int PSIM_INSTRUCTIONS_PER_MICROSECOND;
/*
* The original table from the application and our copy of it with
* some changes.
*/
extern rtems_configuration_table Configuration;
rtems_configuration_table BSP_Configuration;
rtems_cpu_table Cpu_table;
rtems_unsigned32 bsp_isr_level;
/*
* Tells us where to put the workspace in case remote debugger is present.
*/
#if 0
extern uint32_t rdb_start;
extern rtems_unsigned32 rdb_start;
#endif
/*
* PCI Bus Frequency
*/
unsigned int BSP_bus_frequency;
/*
* * Time base divisior (how many tick for 1 second).
* */
unsigned int BSP_time_base_divisor;
/*
* Use the shared implementations of the following routines
*/
void bsp_postdriver_hook(void);
void bsp_libc_init( void *, uint32_t, int );
/*
* system init stack and soft ir stack size
*/
#define INIT_STACK_SIZE 0x1000
#define INTR_STACK_SIZE CONFIGURE_INTERRUPT_STACK_MEMORY
void BSP_panic(char *s)
{
printk("%s PANIC %s\n",_RTEMS_version, s);
__asm__ __volatile ("sc");
}
void _BSP_Fatal_error(unsigned int v)
{
printk("%s PANIC ERROR %x\n",_RTEMS_version, v);
__asm__ __volatile ("sc");
}
void bsp_libc_init( void *, unsigned32, int );
/*
* bsp_pretasking_hook
@@ -106,10 +58,10 @@ void _BSP_Fatal_error(unsigned int v)
void bsp_pretasking_hook(void)
{
extern int end;
uint32_t heap_start;
uint32_t heap_size;
rtems_unsigned32 heap_start;
rtems_unsigned32 heap_size;
heap_start = (uint32_t) &end;
heap_start = (rtems_unsigned32) &end;
if (heap_start & (CPU_ALIGNMENT-1))
heap_start = (heap_start + CPU_ALIGNMENT) & ~(CPU_ALIGNMENT-1);
@@ -132,14 +84,16 @@ void bsp_pretasking_hook(void)
void bsp_start( void )
{
unsigned char *work_space_start;
register uint32_t intrStack;
register uint32_t *intrStackPtr;
unsigned char *work_space_start;
/*
* Note we can not get CPU identification dynamically, so force current_ppc_cpu.
#if 0
/*
* Set MSR to show vectors at 0 XXX
*/
current_ppc_cpu = PPC_PSIM;
_CPU_MSR_Value( msr_value );
msr_value &= ~PPC_MSR_EP;
_CPU_MSR_SET( msr_value );
#endif
/*
* Set up our hooks
@@ -164,18 +118,15 @@ void bsp_start( void )
Cpu_table.interrupt_stack_size = CONFIGURE_INTERRUPT_STACK_MEMORY;
BSP_bus_frequency = (unsigned int)&PSIM_INSTRUCTIONS_PER_MICROSECOND;
BSP_time_base_divisor = 1;
/*
* The simulator likes the exception table to be at 0xfff00000.
* The monitor likes the exception table to be at 0x0.
*/
Cpu_table.exceptions_in_RAM = FALSE;
Cpu_table.exceptions_in_RAM = TRUE;
BSP_Configuration.work_space_size += 1024;
work_space_start =
work_space_start =
(unsigned char *)&RAM_END - BSP_Configuration.work_space_size;
if ( work_space_start <= (unsigned char *)&end ) {
@@ -185,36 +136,4 @@ void bsp_start( void )
BSP_Configuration.work_space_start = work_space_start;
/*
* Initialize the interrupt related settings
* SPRG1 = software managed IRQ stack
*
* This could be done latter (e.g in IRQ_INIT) but it helps to understand
* some settings below...
*/
intrStack = ((uint32_t) __rtems_end) +
INIT_STACK_SIZE + INTR_STACK_SIZE - CPU_MINIMUM_STACK_FRAME_SIZE;
/* make sure it's properly aligned */
intrStack &= ~(CPU_STACK_ALIGNMENT-1);
/* tag the bottom (T. Straumann 6/36/2001 <strauman@slac.stanford.edu>) */
intrStackPtr = (uint32_t*) intrStack;
*intrStackPtr = 0;
_write_SPRG1(intrStack);
/* signal them that we have fixed PR288 - eventually, this should go away */
_write_SPRG0(PPC_BSP_HAS_FIXED_PR288);
/*
* Initialize default raw exception hanlders. See vectors/vectors_init.c
*/
initialize_exceptions();
/*
* Initalize RTEMS IRQ system
*/
BSP_rtems_irq_mng_init(0);
}

View File

@@ -16,7 +16,7 @@ OUTPUT_ARCH(powerpc)
ENTRY(_start)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
PROVIDE (PSIM_INSTRUCTIONS_PER_MICROSECOND = 10000); /* 100); */
PROVIDE (PSIM_INSTRUCTIONS_PER_MICROSECOND = 100);
PROVIDE (CPU_PPC_CLICKS_PER_MS = 16667);
MEMORY
{
@@ -26,10 +26,10 @@ MEMORY
SECTIONS
{
.entry_point_section :
.vectors 0xFFF00100 :
{
*(.entry_point_section)
} > EPROM
*(.vectors)
} >EPROM
/* Read-only sections, merged into text segment: */
/* . = 0x40000 + SIZEOF_HEADERS; */
@@ -74,15 +74,8 @@ SECTIONS
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
} >RAM
.init :
{
KEEP (*(.init))
} >RAM =0
.fini :
{
_fini = .;
KEEP (*(.fini))
} >RAM =0
.init : { _init = .; __init = .; *(.init) } >RAM
.fini : { _fini = .; __fini = .; *(.fini) } >RAM
.rodata : { *(.rodata*) *(.gnu.linkonce.r*) } >RAM
.rodata1 : { *(.rodata1) } >RAM
.eh_frame : { *.(eh_frame) } >RAM
@@ -150,8 +143,6 @@ SECTIONS
PROVIDE (_GOT_END_ = .);
PROVIDE (__GOT_END__ = .);
.jcr : { KEEP (*(.jcr)) } > RAM
/* We want the small data sections together, so single-instruction offsets
can access them all, and initialized data all before uninitialized, so
we can shorten the on-disk segment size. */
@@ -179,7 +170,6 @@ SECTIONS
*(COMMON)
} >RAM
. = ALIGN(8) + 0x8000;
__rtems_end = . ;
PROVIDE(__stack = .);
PROVIDE(_end = .);
PROVIDE(end = .);

View File

@@ -3,17 +3,12 @@
##
VPATH = @srcdir@:@srcdir@/../console:@srcdir@/../../shared/vectors
PGM = $(ARCH)/vectors.rel
C_FILES = vectors_init.c
C_O_FILES = $(C_FILES:%.c=$(ARCH)/%.$(OBJEXT))
H_FILES = ../../shared/vectors/vectors.h
S_FILES = vectors.S
S_FILES = align_h.S vectors.S
S_O_FILES = $(S_FILES:%.S=$(ARCH)/%.$(OBJEXT))
OBJS = $(S_O_FILES) $(C_O_FILES)
OBJS = $(S_O_FILES)
include $(top_srcdir)/../../../../../../automake/compile.am
include $(top_srcdir)/../../../../../../automake/lib.am
@@ -25,20 +20,12 @@ include $(top_srcdir)/../../../../../../automake/lib.am
$(PGM): $(OBJS)
$(make-rel)
include_bspdir = $(includedir)/bsp
include_bsp_HEADERS = ../../shared/vectors/vectors.h
# the .rel file built here will be put into libbsp.a by ../wrapup/Makefile
$(PROJECT_INCLUDE)/bsp:
$(mkinstalldirs) $@
all-local: $(ARCH) $(OBJS) $(PGM)
$(PROJECT_INCLUDE)/bsp/vectors.h: ../../shared/vectors/vectors.h
$(INSTALL_DATA) $< $@
.PRECIOUS: $(PGM)
TMPINSTALL_FILES += $(PROJECT_INCLUDE)
TMPINSTALL_FILES += $(PROJECT_INCLUDE)/bsp
TMPINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vectors.h
EXTRA_DIST = README align_h.S vectors.S
all-local: $(ARCH) $(TMPINSTALL_FILES) $(OBJS)
include $(top_srcdir)/../../../../../../automake/force-preinstall.am
include $(top_srcdir)/../../../../../../automake/local.am

View File

@@ -1,160 +1,123 @@
/*
* (c) 1999, Eric Valette valette@crf.canon.fr
*
/* vectors.s 1.1 - 95/12/04
*
* This file contains the assembly code for the PowerPC
* exception veneers for RTEMS.
* interrupt vectors for RTEMS.
*
* vectors.S,v 1.3.4.1 2003/02/20 21:48:25 joel Exp
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*
* $Id$
*/
#include <asm.h>
#include <rtems/score/cpu.h>
#include <bsp/vectors.h>
#define SYNC \
sync; \
isync
PUBLIC_VAR (__rtems_start)
.section .entry_point_section,"awx",@progbits
/*
* Entry point information used by bootloader code
* The issue with this file is getting it loaded at the right place.
* The first vector MUST be at address 0x????0100.
* How this is achieved is dependant on the tool chain.
*
* However the basic mechanism for ELF assemblers is to create a
* section called ".vectors", which will be loaded to an address
* between 0x????0000 and 0x????0100 (inclusive) via a link script.
*
* The basic mechanism for XCOFF assemblers is to place it in the
* normal text section, and arrange for this file to be located
* at an appropriate position on the linker command line.
*
* The variable 'PPC_VECTOR_FILE_BASE' must be defined to be the
* offset from 0x????0000 to the first location in the file. This
* will usually be 0x0000 or 0x0100.
*/
SYM (__rtems_start):
.long __rtems_entry_point
/*
* end of special Entry point section
*/
.text
.p2align 5
PUBLIC_VAR(default_exception_vector_code_prolog)
SYM (default_exception_vector_code_prolog):
/*
* let room for exception frame
*/
stwu r1, - (EXCEPTION_FRAME_END)(r1)
stw r3, GPR3_OFFSET(r1)
/* R2 should never change (EABI: pointer to .sdata2) - we
* save it nevertheless..
*/
stw r2, GPR2_OFFSET(r1)
mflr r3
stw r3, EXC_LR_OFFSET(r1)
bl 0f
0: /*
* r3 = exception vector entry point
* (256 * vector number) + few instructions
*/
mflr r3
/*
* r3 = r3 >> 8 = vector
*/
srwi r3,r3,8
ba push_normalized_frame
PUBLIC_VAR (default_exception_vector_code_prolog_size)
default_exception_vector_code_prolog_size= . - default_exception_vector_code_prolog
.p2align 5
PUBLIC_VAR (push_normalized_frame)
SYM (push_normalized_frame):
stw r3, EXCEPTION_NUMBER_OFFSET(r1)
stw r0, GPR0_OFFSET(r1)
mfsrr0 r3
stw r3, SRR0_FRAME_OFFSET(r1)
mfsrr1 r3
stw r3, SRR1_FRAME_OFFSET(r1)
/*
* Save general purpose registers
* Already saved in prolog : R1, R2, R3, LR.
* Saved a few line above : R0
*
* Manual says that "stmw" instruction may be slower than
* series of individual "stw" but who cares about performance
* for the DEFAULT exception handler?
*/
stmw r4, GPR4_OFFSET(r1) /* save R4->R31 */
#include <bsp.h>
#include "asm.h"
mfcr r31
stw r31, EXC_CR_OFFSET(r1)
mfctr r30
stw r30, EXC_CTR_OFFSET(r1)
mfxer r28
stw r28, EXC_XER_OFFSET(r1)
mfmsr r28
stw r28, EXC_MSR_OFFSET(r1)
mfdar r28
stw r28, EXC_DAR_OFFSET(r1)
/*
* compute SP at exception entry
*/
addi r3, r1, EXCEPTION_FRAME_END
/*
* store it at the right place
*/
stw r3, GPR1_OFFSET(r1)
/*
* Enable data and instruction address translation, exception nesting
*/
mfmsr r3
ori r3,r3, MSR_RI /* | MSR_IR | MSR_DR */
mtmsr r3
SYNC
/*
* Call C exception handler
*/
/*
* store the execption frame address in r3 (first param)
*/
addi r3, r1, 0x8
/*
* globalExceptHdl(r3)
*/
addis r4, 0, globalExceptHdl@ha
lwz r5, globalExceptHdl@l(r4)
mtlr r5
blrl
/*
* Restore registers status
*/
lwz r31, EXC_CR_OFFSET(r1)
mtcr r31
lwz r30, EXC_CTR_OFFSET(r1)
mtctr r30
lwz r29, EXC_LR_OFFSET(r1)
mtlr r29
lwz r28, EXC_XER_OFFSET(r1)
mtxer r28
#ifndef PPC_VECTOR_FILE_BASE
#error "PPC_VECTOR_FILE_BASE is not defined."
#endif
lmw r4, GPR4_OFFSET(r1)
lwz r2, GPR2_OFFSET(r1)
lwz r0, GPR0_OFFSET(r1)
/* Where this file will be loaded */
.set file_base, PPC_VECTOR_FILE_BASE
/*
* Disable data and instruction translation. Make path non recoverable...
*/
mfmsr r3
xori r3, r3, MSR_RI | MSR_IR | MSR_DR
mtmsr r3
SYNC
/*
* Restore rfi related settings
*/
lwz r3, SRR1_FRAME_OFFSET(r1)
mtsrr1 r3
lwz r3, SRR0_FRAME_OFFSET(r1)
mtsrr0 r3
/* Offset to store reg 0 */
.set IP_LINK, 0
#if (PPC_ABI == PPC_ABI_POWEROPEN || PPC_ABI == PPC_ABI_GCC27)
.set IP_0, (IP_LINK + 56)
#else
.set IP_0, (IP_LINK + 8)
#endif
.set IP_2, (IP_0 + 4)
.set IP_3, (IP_2 + 4)
.set IP_4, (IP_3 + 4)
.set IP_5, (IP_4 + 4)
.set IP_6, (IP_5 + 4)
lwz r3, GPR3_OFFSET(r1)
addi r1,r1, EXCEPTION_FRAME_END
SYNC
rfi
.set IP_7, (IP_6 + 4)
.set IP_8, (IP_7 + 4)
.set IP_9, (IP_8 + 4)
.set IP_10, (IP_9 + 4)
.set IP_11, (IP_10 + 4)
.set IP_12, (IP_11 + 4)
.set IP_13, (IP_12 + 4)
.set IP_28, (IP_13 + 4)
.set IP_29, (IP_28 + 4)
.set IP_30, (IP_29 + 4)
.set IP_31, (IP_30 + 4)
.set IP_CR, (IP_31 + 4)
.set IP_CTR, (IP_CR + 4)
.set IP_XER, (IP_CTR + 4)
.set IP_LR, (IP_XER + 4)
.set IP_PC, (IP_LR + 4)
.set IP_MSR, (IP_PC + 4)
.set IP_END, (IP_MSR + 16)
/* Vector offsets */
.set begin_vector,0xFFF00000
.set crit_vector,0xFFF00100
.set mach_vector,0xFFF00200
.set prot_vector,0xFFF00300
.set ext_vector,0xFFF00500
.set align_vector,0xFFF00600
.set prog_vector,0xFFF00700
.set dec_vector,0xFFF00900
.set sys_vector,0xFFF00C00
.set pit_vector,0xFFF01000
.set fit_vector,0xFFF01010
.set wadt_vector,0xFFF01020
.set debug_vector,0xFFF02000
/* Go to the right section */
#if PPC_ASM == PPC_ASM_ELF
.section .vectors,"awx",@progbits
#elif PPC_ASM == PPC_ASM_XCOFF
.csect .text[PR]
#endif
PUBLIC_VAR (__vectors)
SYM (__vectors):
/* Decrementer interrupt */
.org dec_vector - file_base
#if (PPC_ABI == PPC_ABI_POWEROPEN || PPC_ABI == PPC_ABI_GCC27)
#if (PPC_HAS_FPU)
stwu r1, -(20*4 + 18*8 + IP_END)(r1)
#else
stwu r1, -(20*4 + IP_END)(r1)
#endif
#else
stwu r1, -(IP_END)(r1)
#endif
stw r0, IP_0(r1)
li r0, PPC_IRQ_DECREMENTER
b PROC (_ISR_Handler)

View File

@@ -2,28 +2,25 @@
## $Id$
##
if HAS_MP
BSP_MP_O_FILES = shmsupp
endif
BSP_PIECES = startup clock console irq vectors $(BSP_MP_O_FILES)
if HAS_MP
GENERIC_MP_REL_FILES = shmdr
endif
GENERIC_FILES = $(GENERIC_MP_REL_FILES)
# bummer; have to use $foreach since % pattern subst rules only replace 1x
OBJS = $(foreach piece, $(BSP_PIECES), ../$(piece)/$(ARCH)/*.$(OBJEXT)) \
$(foreach piece, $(GENERIC_FILES), ../../../$(piece)/$(ARCH)/$(piece).rel) \
$(wildcard ../../../../libcpu/$(RTEMS_CPU)/shared/*/$(ARCH)/*.$(OBJEXT)) \
$(wildcard ../../../../libcpu/$(RTEMS_CPU)/mpc6xx/*/$(ARCH)/*.$(OBJEXT)) \
../@exceptions@/$(ARCH)/rtems-cpu.rel \
$(wildcard ../../../../libcpu/$(RTEMS_CPU)/$(RTEMS_CPU_MODEL)/*/$(ARCH)/*.$(OBJEXT))
LIB = $(ARCH)/libbsp.a
include $(top_srcdir)/../../../../../../automake/compile.am
include $(top_srcdir)/../../../../../../automake/lib.am
if HAS_MP
GENERIC_MP_REL_PIECES = shmdr
endif
GENERIC_PIECES = $(GENERIC_MP_REL_PIECES)
if HAS_MP
BSP_MP_O_PIECES = shmsupp
endif
BSP_PIECES = startup clock console timer vectors $(BSP_MP_O_PIECES)
# bummer; have to use $foreach since % pattern subst rules only replace 1x
OBJS = $(foreach piece, $(BSP_PIECES), $(wildcard ../$(piece)/$(ARCH)/*.$(OBJEXT))) \
../@exceptions@/$(ARCH)/rtems-cpu.rel \
$(foreach piece, $(GENERIC_PIECES), ../../../$(piece)/$(ARCH)/$(piece).rel)
LIB = $(ARCH)/libbsp.a
#
# (OPTIONAL) Add local stuff here using +=
#

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