Upgrade to 4.10.2

* math/init.c, mathf/init.c: Use DEVFS since we do have devices.

VERSION

@@ -4,4 +4,4 @@
 #  $Id$
 #
 
-RTEMS Version 4.10.0
+RTEMS Version 4.10.2

aclocal/version.m4

@@ -1,4 +1,4 @@
 AC_DEFUN([RTEMS_VERSIONING],
-m4_define([_RTEMS_VERSION],[4.10.0]))
+m4_define([_RTEMS_VERSION],[4.10.2]))
 
 m4_define([RTEMS_API],[4.10])

c/src/ChangeLog

@@ -1,3 +1,8 @@
+2011-11-09	Jennifer Averett <jennifer.averett@oarcorp.com>
+
+	PR 1934/bsps
+	* libchip/serial/ns16550.c: Change to unsigned variable.
+
 2011-02-02	Ralf Corsépius <ralf.corsepius@rtems.org>
 
 	* configure.ac: Require autoconf-2.68, automake-1.11.1.

c/src/aclocal/version.m4

@@ -1,4 +1,4 @@
 AC_DEFUN([RTEMS_VERSIONING],
-m4_define([_RTEMS_VERSION],[4.10.0]))
+m4_define([_RTEMS_VERSION],[4.10.2]))
 
 m4_define([RTEMS_API],[4.10])

c/src/lib/libbsp/ChangeLog

@@ -1,3 +1,29 @@
+2011-05-18	Till Straumann <strauman@slac.stanford.edu>
+
+	PR1797/bsps
+	* shared/bootcard.c: Fixed a typo (in code, not comment) which
+	I introduced with the last change.
+
+2011-05-17	Till Straumann <strauman@slac.stanford.edu>
+
+	PR1797/bsps
+	* shared/bootcard.c, shared/include/bootcard.h: cleaned-up and
+	applied fixes proposed by PR#1797.
+
+2011-05-12  Joel Sherrill <joel.sherrill@OARcorp.com>  
+
+	PR1797/bsps
+	* bootcard.c:
+	Added #ifdef CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK to minimize code
+	for small targets.
+
+2011-05-12  Kate Feng <feng@bnl.gov>
+	
+	PR1797/bsps
+	* bootcard.c:
+	Fixed the value of heap_start & heap_size for the single-heap case.
+	Added bsp_sbrk_init() to fix PPC memory allocation beyond 32 MB.
+
 2010-04-14	Ralf Corsépius <ralf.corsepius@rtems.org>
 
 	* shared/umon/umoncons.c:

c/src/lib/libbsp/arm/nds/ChangeLog

@@ -1,3 +1,10 @@
+2011-08-15	Julien Delange <julien.delange@gmail.com>
+
+	* irq/irq.c: Removed printk() before the interrupt initialization
+	because it somehow destroys the interrupt context.
+	* make/custom/nds.cfg: Enable Thumb interwork.
+	* startup/bspstart.c: Set default exception handler.
+
 2011-02-02	Ralf Corsépius <ralf.corsepius@rtems.org>
 
 	* configure.ac: Require autoconf-2.68, automake-1.11.1.

c/src/lib/libbsp/arm/nds/irq/irq.c

@@ -34,8 +34,6 @@ isValidInterrupt (int irq)
 void
 BSP_rtems_irq_mngt_init (void)
 {
-  printk ("[+] irq manager started\n");
-
   irqInit ();
 
   REG_IME = IME_ENABLE;

c/src/lib/libbsp/arm/nds/make/custom/nds.cfg

@@ -13,7 +13,7 @@ RTEMS_CPU_MODEL=arm9tdmi
 #  and (hopefully) optimize for it.
 #
 CPU_CFLAGS = -mstructure-size-boundary=8 -mcpu=$(RTEMS_CPU_MODEL) -mfpu=vfp -mfloat-abi=soft
-# CPU_CFLAGS += -mthumb-interwork ## -D __THUMB_INTERWORK__ -mthumb
+CPU_CFLAGS += -mthumb-interwork ## -D __THUMB_INTERWORK__ -mthumb
 
 # optimize flag: typically -O2
 #CFLAGS_OPTIMIZE_V = -O0 -ggdb

c/src/lib/libbsp/arm/nds/startup/bspstart.c

@@ -15,6 +15,7 @@
 #include <bsp/bootcard.h>
 #include <nds.h>
 
+extern void defaultExceptionHandler ();
 extern void BSP_rtems_irq_mngt_init (void);
 /*
  * start the platform.
@@ -44,6 +45,8 @@ void bsp_start (void)
 
   /* configure clock period */
   Configuration.microseconds_per_tick = 10000;  /* us */
+
+  defaultExceptionHandler ();
 }
 
 /*

c/src/lib/libbsp/arm/rtl22xx/ChangeLog

@@ -1,3 +1,9 @@
+2011-07-22	Joel Sherrill <joel.sherrilL@OARcorp.com>
+
+	PR 1845/bsps
+	* make/custom/rtl22xx_t.cfg: Remove unused line with what is now
+	invalid syntax.
+
 2011-02-02	Ralf Corsépius <ralf.corsepius@rtems.org>
 
 	* configure.ac: Require autoconf-2.68, automake-1.11.1.

c/src/lib/libbsp/arm/rtl22xx/make/custom/rtl22xx_t.cfg

@@ -3,16 +3,13 @@
 #
 #  $Id$
 #
-set USE_THUMB_MODE=YES
-
 #  This contains the compiler options necessary to select the CPU model
 #  and (hopefully) optimize for it. 
 #
 
 include $(RTEMS_ROOT)/make/custom/rtl22xx.cfg
 
-CPU_CFLAGS +=  -mthumb \
-	-fno-schedule-insns2
+CPU_CFLAGS +=  -mthumb -fno-schedule-insns2
 
 #CFLAG: -mthumb-interwork can add veneer between ARM and Thumb code. 
 #CPU_CFLAGS += -mthumb-interwork -D __THUMB_INTERWORK__ -mthumb

c/src/lib/libbsp/bfin/ChangeLog

@@ -1,3 +1,7 @@
+2011-04-20	Joel Sherrill <joel.sherrilL@OARcorp.com>
+
+	* acinclude.m4: Regenerated for TLL6527M.
+
 2011-02-02	Ralf Corsépius <ralf.corsepius@rtems.org>
 
 	* configure.ac: Require autoconf-2.68, automake-1.11.1.

c/src/lib/libbsp/bfin/TLL6527M/.cvsignore

@@ -0,0 +1,8 @@
+aclocal.m4
+autom4te*.cache
+config.cache
+config.log
+config.status
+configure
+Makefile
+Makefile.in

c/src/lib/libbsp/bfin/TLL6527M/ChangeLog

@@ -0,0 +1,15 @@
+2011-07-14	Joel Sherrill <joel.sherrilL@OARcorp.com>
+
+	* .cvsignore, include/.cvsignore: New files.
+
+2011-04-20      Rohan Kangralkar <rkangral@ece.neu.edu>
+
+	PR 1781/bsps
+	* ChangeLog, Makefile.am, README, bsp_specs, configure.ac,
+	preinstall.am, times, console/console.c, include/bsp.h,
+	include/cplb.h, include/tm27.h, make/custom/TLL6527M.cfg,
+	startup/bspstart.c, startup/linkcmds: New files.
+	Initial port for the TLL6527Mboard that contains blackfin 52X 
+	range of processors. Used eZKit533 as a reference for building
+	the port.
+

c/src/lib/libbsp/bfin/TLL6527M/Makefile.am

@@ -0,0 +1,52 @@
+##
+## $Id$
+##
+
+ACLOCAL_AMFLAGS = -I ../../../../aclocal
+
+include $(top_srcdir)/../../../../automake/compile.am
+
+include_bspdir = $(includedir)/bsp
+
+dist_project_lib_DATA = bsp_specs
+
+include_HEADERS = include/bsp.h
+include_HEADERS += include/tm27.h
+include_HEADERS += include/cplb.h
+
+nodist_include_HEADERS = include/bspopts.h
+nodist_include_bsp_HEADERS = ../../shared/include/bootcard.h
+DISTCLEANFILES = include/bspopts.h
+
+noinst_PROGRAMS =
+
+include_HEADERS += ../../shared/include/coverhd.h
+
+noinst_LIBRARIES = libbspstart.a
+libbspstart_a_SOURCES = ../shared/start/start.S
+project_lib_DATA = start.$(OBJEXT)
+
+dist_project_lib_DATA += startup/linkcmds
+
+noinst_LIBRARIES += libbsp.a
+
+libbsp_a_SOURCES = ../../shared/bsplibc.c ../../shared/bsppost.c \
+  ../../shared/bsppredriverhook.c startup/bspstart.c \
+  ../../shared/bspclean.c ../../shared/sbrk.c ../../shared/setvec.c \
+  ../../shared/bootcard.c ../../shared/gnatinstallhandler.c \
+  ../../shared/bspgetworkarea.c
+
+libbsp_a_SOURCES += console/console.c
+
+libbsp_a_LIBADD  = ../../../libcpu/@RTEMS_CPU@/mmu.rel
+libbsp_a_LIBADD += ../../../libcpu/@RTEMS_CPU@/@RTEMS_CPU_MODEL@/interrupt.rel
+libbsp_a_LIBADD += ../../../libcpu/@RTEMS_CPU@/cache.rel
+libbsp_a_LIBADD += ../../../libcpu/@RTEMS_CPU@/uart.rel
+libbsp_a_LIBADD += ../../../libcpu/@RTEMS_CPU@/clock.rel
+libbsp_a_LIBADD += ../../../libcpu/@RTEMS_CPU@/rtc.rel
+libbsp_a_LIBADD += ../../../libcpu/@RTEMS_CPU@/timer.rel
+
+EXTRA_DIST = times
+
+include $(srcdir)/preinstall.am
+include $(top_srcdir)/../../../../automake/local.am

c/src/lib/libbsp/bfin/TLL6527M/README

@@ -0,0 +1,96 @@
+#
+#  $Id$
+#
+
+BSP NAME:           TLL6527M
+BOARD:              TLL6527M 
+CPU FAMILY:         Blackfin
+CPU:                Blackfin 527 
+MODE:               32 bit mode
+
+DEBUG MONITOR:      
+SIMULATOR:          
+
+PERIPHERALS
+===========
+TIMERS:             internal
+  RESOLUTION:         1 milisecond
+SERIAL PORTS:       2 internal UART (polled/interrupt/dma)
+REAL-TIME CLOCK:    internal
+DMA:                internal
+VIDEO:              none
+SCSI:               none
+NETWORKING:         none
+
+
+DRIVER INFORMATION
+==================
+CLOCK DRIVER:       internal
+TIMER DRIVER:       internal
+I2C:
+SPI:
+PPI:
+SPORT:
+
+
+STDIO
+=====
+PORT:               Console port 1
+ELECTRICAL:         RS-232
+BAUD:               9600
+BITS PER CHARACTER: 8
+PARITY:             None
+STOP BITS:          1
+
+NOTES
+=====
+The TLL56527M board contains analog devices blackfin 527 processor. In addition
+to the peripherals provided by bf527 the board has a temprature sensor, 
+accelerometer and power module connected via I2C. It also has LCD interface,
+Card reader interface.
+
+The analog device bf52X family of processors are different from the bf53x range 
+of processors. This port supports the additional features that are not 
+supported by the blackfin 53X family of processors.
+  
+The TLL6527M does not use the interrupt module used by the bfin 53x since it has
+an additional system interrupt controller isr registers for additional lines.
+On the 53X these line are multiplexed. 
+The centralized interrupt handler is implemented to use lookup tables for 
+jumping to the user ISR. For more details look at files implemented under 
+libcpu/bfin/bf52x/interrupt/*
+
+This port supports only the uart peripheral. The uart is supported via 
+polling, DMA, interrupt. The uart file is generic and is common between the 
+ports. Under bsp configure.ac files 
+* change the CONSOLE_BAUDRATE or to choose among different baudrate.
+* Set UART_USE_DMA for UART to use DMA based transfers. In DMA based transfer
+  chunk of buffer is transmitted at once and then an interrupt is generated.
+* Set CONSOLE_USE_INTERRUPTS to use interrupt based transfers. After every 
+  character is transmitted an interrupt is generated. 
+* If CONSOLE_USE_INTERRUPTS, UART_USE_DMA are both not set then the port uses
+  polling to transmit data over uart. This call is blocking. 
+
+TLL6527 specific file are mentioned below.
+=====================================
+c/src/lib/libcpu/bfin/bf52x/*
+c/src/lib/libbsp/bfin/TLL6527M/*
+
+
+The port was compiled using
+===========================
+1. bfin-rtems4.11-gcc (GCC) 4.5.2 20101216 
+              (RTEMS gcc-4.5.2-3.el5/newlib-1.19.0-1.el5)
+2. automake (GNU automake) 1.11.1
+3. autoconf (GNU Autoconf) 2.68
+
+
+The port was configured using the flags
+========================================== 
+--target=bfin-rtems4.11 --enable-rtemsbsp=TLL6527M --enable-tests=samples 
+--disable-posix --disable-itron 
+       
+
+ISSUES:
+Could not place code in l1code (SRAM) because it was not being loaded by the 
+gnu loaded.

c/src/lib/libbsp/bfin/TLL6527M/bsp_specs

@@ -0,0 +1,10 @@
+%rename endfile old_endfile
+%rename startfile old_startfile
+%rename link old_link
+
+*startfile:
+%{!qrtems: %(old_startfile)} \
+%{!nostdlib: %{qrtems: start.o%s -e __start}}
+
+*link:
+%{!qrtems: %(old_link)} %{qrtems: -dc -dp -N}

c/src/lib/libbsp/bfin/TLL6527M/configure.ac

@@ -0,0 +1,47 @@
+## Process this file with autoconf to produce a configure script.
+## 
+## $Id$
+
+AC_PREREQ(2.68)
+AC_INIT([rtems-c-src-lib-libbsp-bfin-TLL6527M],[_RTEMS_VERSION],[http://www.rtems.org/bugzilla])
+AC_CONFIG_SRCDIR([bsp_specs])
+RTEMS_TOP(../../../../../..)
+
+RTEMS_CANONICAL_TARGET_CPU
+AM_INIT_AUTOMAKE([no-define nostdinc foreign 1.11.1])
+RTEMS_BSP_CONFIGURE
+
+RTEMS_PROG_CC_FOR_TARGET
+RTEMS_CANONICALIZE_TOOLS
+RTEMS_PROG_CCAS
+
+## bsp-specific options
+RTEMS_BSPOPTS_SET([CONSOLE_USE_INTERRUPTS],[*],[1])
+RTEMS_BSPOPTS_HELP([CONSOLE_USE_INTERRUPTS],
+[The console driver can operate in either polled or interrupt mode.])
+
+RTEMS_BSPOPTS_SET([UART_USE_DMA],[*],[1])
+RTEMS_BSPOPTS_HELP([UART_USE_DMA],
+[The uart driver can operate in dma mode with interrupts. 
+Set to 1 if DMA operation is required ])
+
+RTEMS_BSPOPTS_SET([CONSOLE_BAUDRATE],[*],[9600])
+RTEMS_BSPOPTS_HELP([CONSOLE_BAUDRATE],
+[The baudrate of the console uart.])
+
+RTEMS_BSPOPTS_SET([INTERRUPT_USE_TABLE],[*],[1])
+RTEMS_BSPOPTS_HELP([INTERRUPT_USE_TABLE],
+[Select if INTERRUPT use table or link list])
+
+
+
+RTEMS_BSPOPTS_SET([BFIN_ON_SKYEYE],[*],[0])
+RTEMS_BSPOPTS_HELP([BFIN_ON_SKYEYE],
+[(BSP--Skyeye)
+ If defined, disable features which are not supported on Skyeye.])
+
+RTEMS_BSP_CLEANUP_OPTIONS(0, 0)
+
+# Explicitly list all Makefiles here
+AC_CONFIG_FILES([Makefile])
+AC_OUTPUT

c/src/lib/libbsp/bfin/TLL6527M/console/console.c

@@ -0,0 +1,182 @@
+/**
+ *@file console.c
+ *
+ *@brief
+ *  - This file implements uart console for TLL6527M. TLL6527M has BF527 with
+ *  second uart (uart-1) connected to the console.
+ *
+ * Target:   TLL6527v1-0
+ * Compiler:
+ *
+ * COPYRIGHT (c) 2010 by ECE Northeastern University.
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license
+ *
+ * @author Rohan Kangralkar, ECE, Northeastern University
+ *         (kangralkar.r@husky.neu.edu)
+ *
+ * LastChange:
+ * $Id$
+ *
+ */
+
+#include <rtems.h>
+#include <rtems/libio.h>
+#include <bsp.h>
+#include <rtems/bspIo.h>
+
+#include <bsp/interrupt.h>
+#include <libcpu/uart.h>
+
+/***************************************************
+LOCAL DEFINES
+ ***************************************************/
+
+
+/***************************************************
+STATIC GLOBALS
+ ***************************************************/
+/**
+ * Declaration of UART
+ */
+static bfin_uart_channel_t channels[] = {
+  {"/dev/console",
+    UART1_BASE_ADDRESS,
+    DMA10_BASE_ADDRESS,
+    DMA11_BASE_ADDRESS,
+    CONSOLE_USE_INTERRUPTS,
+    UART_USE_DMA,
+    CONSOLE_BAUDRATE,
+    NULL,
+    0,
+    0}
+};
+
+/**
+ * Over all configuration
+ */
+static bfin_uart_config_t config = {
+    SCLK,
+    sizeof(channels) / sizeof(channels[0]),
+    channels
+};
+
+
+#if CONSOLE_USE_INTERRUPTS
+/**
+ * The Rx and Tx isr will get the same argument
+ * The isr will have to find if it was the rx that caused the interrupt or
+ * the tx
+ */
+static bfin_isr_t bfinUARTISRs[] = {
+#if UART_USE_DMA
+    /* For First uart */
+    {IRQ_DMA10_UART1_RX, bfinUart_rxDmaIsr, (void *)&channels[0], 0},
+    {IRQ_DMA11_UART1_TX, bfinUart_txDmaIsr, (void *)&channels[0], 0},
+    /* For second uart */
+#else
+    /* For First uart */
+    {IRQ_DMA10_UART1_RX, bfinUart_rxIsr, &channels[0], 0},
+    {IRQ_DMA11_UART1_TX, bfinUart_txIsr, &channels[0], 0},
+    /* For second uart */
+#endif
+};
+#endif
+
+
+static void TLL6527_BSP_output_char(char c) {
+
+  bfin_uart_poll_write(0, c);
+}
+
+static int TLL6527_BSP_poll_char(void) {
+
+  return bfin_uart_poll_read(0);
+}
+
+BSP_output_char_function_type     BSP_output_char = TLL6527_BSP_output_char;
+BSP_polling_getchar_function_type BSP_poll_char   = TLL6527_BSP_poll_char;
+
+
+
+rtems_device_driver console_close(rtems_device_major_number major,
+    rtems_device_minor_number minor,
+    void *arg) {
+
+  return rtems_termios_close(arg);
+}
+
+rtems_device_driver console_read(rtems_device_major_number major,
+    rtems_device_minor_number minor,
+    void *arg) {
+
+  return rtems_termios_read(arg);
+}
+
+rtems_device_driver console_write(rtems_device_major_number major,
+    rtems_device_minor_number minor,
+    void *arg) {
+
+  return rtems_termios_write(arg);
+}
+
+rtems_device_driver console_control(rtems_device_major_number major,
+    rtems_device_minor_number minor,
+    void *arg) {
+
+  return rtems_termios_ioctl(arg);
+}
+
+
+
+/*
+ *  Open entry point
+ */
+rtems_device_driver console_open(rtems_device_major_number major,
+    rtems_device_minor_number minor,
+    void *arg) {
+
+  return bfin_uart_open(major, minor, arg);
+}
+
+
+
+/**
+ *
+ * This routine initializes the console IO driver.
+ *
+ * Parameters
+ * @param major major number
+ * @param minor minor number
+ *
+ * Output parameters:  NONE
+ *
+ * @return void
+ */
+rtems_device_driver console_initialize(rtems_device_major_number major,
+    rtems_device_minor_number minor,
+    void *arg) {
+  rtems_status_code status = RTEMS_NOT_DEFINED;
+#if CONSOLE_USE_INTERRUPTS
+  int               i      = 0;
+#endif
+
+  status = bfin_uart_initialize(major, &config);
+  if (status != RTEMS_SUCCESSFUL) {
+    rtems_fatal_error_occurred(status);
+  }
+
+#if CONSOLE_USE_INTERRUPTS
+  for (i = 0; i < sizeof(bfinUARTISRs) / sizeof(bfinUARTISRs[0]); i++) {
+    bfin_interrupt_register(&bfinUARTISRs[i]);
+#if INTERRUPT_USE_TABLE
+#else
+    bfin_interrupt_enable(&bfinUARTISRs[i], 1);
+#endif
+  }
+#endif
+
+  return RTEMS_SUCCESSFUL;
+}

c/src/lib/libbsp/bfin/TLL6527M/include/.cvsignore

@@ -0,0 +1,5 @@
+bspopts.h
+bspopts.h.in
+coverhd.h
+stamp-h
+stamp-h.in

c/src/lib/libbsp/bfin/TLL6527M/include/bsp.h

@@ -0,0 +1,79 @@
+/**
+ *@file bsp.h
+ *  
+ *  This include file contains all board IO definitions for TLL6527M.
+ *
+ * COPYRIGHT (c) 2010 by ECE Northeastern University.
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license
+ *
+ *  $Id$
+ */
+ 
+
+#ifndef _BSP_H
+#define _BSP_H
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <bspopts.h>
+
+#include <rtems.h>
+#include <rtems/console.h>
+#include <rtems/clockdrv.h>
+#include <rtems/score/bfin.h>
+#include <rtems/bfin/bf52x.h>
+#include <bf52x.h>
+
+
+/* 
+ * PLL and clock setup values:
+ */
+
+/*
+ *  PLL configuration for TLL6527M
+ *
+ *  XTL   =  27 MHz
+ *  CLKIN =  13 MHz
+ *  VCO   = 391 MHz
+ *  CCLK  = 391 MHz
+ *  SCLK  = 130 MHz
+ */
+
+#define PLL_CSEL    0x0000      /* CCLK = VCO      */
+#define PLL_SSEL    0x0003      /* SCLK = CCLK/3   */
+#define PLL_MSEL    0x3A00      /* VCO = 29xCLKIN  */
+#define PLL_DF      0x0001      /* CLKIN = XTL/2   */
+
+#define CLKIN		    (25000000)  /* Input clock to the PLL */
+#define CCLK        (600000000)   /* CORE CLOCK     */
+#define SCLK        (100000000)   /* SYSTEM CLOCK   */
+
+/*
+ * UART setup values
+ */
+#define BAUDRATE    57600       /* Console Baudrate   */
+#define WORD_5BITS  0x00        /* 5 bits word        */
+#define WORD_6BITS  0x01        /* 6 bits word        */
+#define WORD_7BITS  0x02        /* 7 bits word        */
+#define WORD_8BITS  0x03        /* 8 bits word        */
+#define EVEN_PARITY 0x18        /* Enable EVEN parity */
+#define ODD_PARITY  0x08        /* Enable ODD parity  */
+#define TWO_STP_BIT 0x04        /* 2 stop bits        */
+
+rtems_isr_entry set_vector(                     /* returns old vector */
+  rtems_isr_entry     handler,                  /* isr routine        */
+  rtems_vector_number vector,                   /* vector number      */
+  int                 type                      /* RTEMS or RAW intr  */
+);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif

c/src/lib/libbsp/bfin/TLL6527M/include/cplb.h

@@ -0,0 +1,34 @@
+/*  cplb.h
+ *  
+ *  Copyright (c) 2006 by Atos Automacao Industrial Ltda.
+ *             written by Alain Schaefer <alain.schaefer@easc.ch>
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.com/license/LICENSE.
+ *
+ *  $Id$
+ */
+#ifndef _CPLB_H
+#define _CPLB_H
+
+/* CPLB configurations */
+#define CPLB_DEF_CACHE_WT	CPLB_L1_CHBL | CPLB_WT
+#define CPLB_DEF_CACHE_WB	CPLB_L1_CHBL 
+#define CPLB_CACHE_ENABLED	CPLB_L1_CHBL | CPLB_DIRTY
+
+#define CPLB_DEF_CACHE		CPLB_L1_CHBL | CPLB_WT
+#define CPLB_ALL_ACCESS	CPLB_SUPV_WR | CPLB_USER_RD | CPLB_USER_WR
+
+#define CPLB_I_PAGE_MGMT	CPLB_LOCK | CPLB_VALID
+#define CPLB_D_PAGE_MGMT	CPLB_LOCK | CPLB_ALL_ACCESS | CPLB_VALID
+
+#define CPLB_DNOCACHE		CPLB_ALL_ACCESS | CPLB_VALID
+#define CPLB_DDOCACHE		CPLB_DNOCACHE | CPLB_DEF_CACHE
+#define CPLB_INOCACHE   	CPLB_USER_RD | CPLB_VALID
+#define CPLB_IDOCACHE   	CPLB_INOCACHE | CPLB_L1_CHBL
+
+#define CPLB_DDOCACHE_WT	CPLB_DNOCACHE | CPLB_DEF_CACHE_WT
+#define CPLB_DDOCACHE_WB	CPLB_DNOCACHE | CPLB_DEF_CACHE_WB
+
+#endif /* _CPLB_H */

c/src/lib/libbsp/bfin/TLL6527M/include/tm27.h

@@ -0,0 +1,37 @@
+/*
+ *  tm27.h
+ *
+ * COPYRIGHT (c) 2010 by ECE Northeastern University.
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license
+ *
+ *  $Id$
+ */
+
+#ifndef _RTEMS_TMTEST27
+#error "This is an RTEMS internal file you must not include directly."
+#endif
+
+#ifndef __tm27_h
+#define __tm27_h
+
+/*
+ *  Define the interrupt mechanism for Time Test 27
+ */
+
+#define MUST_WAIT_FOR_INTERRUPT 0
+
+#define Install_tm27_vector(handler) \
+{ \
+  set_vector( handler, 0x06, 1 ); \
+}
+
+#define Cause_tm27_intr() asm volatile("raise 0x06;" : :);
+
+#define Clear_tm27_intr() /* empty */
+
+#define Lower_tm27_intr() /* empty */
+
+#endif

c/src/lib/libbsp/bfin/TLL6527M/make/custom/TLL6527M.cfg

@@ -0,0 +1,19 @@
+#
+#  Config file for Blackfin TLL6527M
+#
+#  $Id$
+#
+
+include $(RTEMS_ROOT)/make/custom/default.cfg
+
+RTEMS_CPU=bfin
+RTEMS_CPU_MODEL=bf52x
+
+#  This contains the compiler options necessary to select the CPU model
+#  and (hopefully) optimize for it. 
+#
+CPU_CFLAGS =-mcpu=bf527
+
+# optimize flag: typically -O2
+# gcc-4.2.0 segfaults on -OX > -O0
+CFLAGS_OPTIMIZE_V = -O2 -g

c/src/lib/libbsp/bfin/TLL6527M/preinstall.am

@@ -0,0 +1,71 @@
+## Automatically generated by ampolish3 - Do not edit
+
+if AMPOLISH3
+$(srcdir)/preinstall.am: Makefile.am
+	$(AMPOLISH3) $(srcdir)/Makefile.am > $(srcdir)/preinstall.am
+endif
+
+PREINSTALL_DIRS =
+DISTCLEANFILES += $(PREINSTALL_DIRS)
+
+all-local: $(TMPINSTALL_FILES)
+
+TMPINSTALL_FILES =
+CLEANFILES = $(TMPINSTALL_FILES)
+
+all-am: $(PREINSTALL_FILES)
+
+PREINSTALL_FILES =
+CLEANFILES += $(PREINSTALL_FILES)
+
+$(PROJECT_LIB)/$(dirstamp):
+	@$(MKDIR_P) $(PROJECT_LIB)
+	@: > $(PROJECT_LIB)/$(dirstamp)
+PREINSTALL_DIRS += $(PROJECT_LIB)/$(dirstamp)
+
+$(PROJECT_INCLUDE)/$(dirstamp):
+	@$(MKDIR_P) $(PROJECT_INCLUDE)
+	@: > $(PROJECT_INCLUDE)/$(dirstamp)
+PREINSTALL_DIRS += $(PROJECT_INCLUDE)/$(dirstamp)
+
+$(PROJECT_INCLUDE)/bsp/$(dirstamp):
+	@$(MKDIR_P) $(PROJECT_INCLUDE)/bsp
+	@: > $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+PREINSTALL_DIRS += $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+
+$(PROJECT_LIB)/bsp_specs: bsp_specs $(PROJECT_LIB)/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_LIB)/bsp_specs
+PREINSTALL_FILES += $(PROJECT_LIB)/bsp_specs
+
+$(PROJECT_INCLUDE)/bsp.h: include/bsp.h $(PROJECT_INCLUDE)/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp.h
+
+$(PROJECT_INCLUDE)/tm27.h: include/tm27.h $(PROJECT_INCLUDE)/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/tm27.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/tm27.h
+
+$(PROJECT_INCLUDE)/cplb.h: include/cplb.h $(PROJECT_INCLUDE)/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/cplb.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/cplb.h
+
+$(PROJECT_INCLUDE)/bspopts.h: include/bspopts.h $(PROJECT_INCLUDE)/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bspopts.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bspopts.h
+
+$(PROJECT_INCLUDE)/bsp/bootcard.h: ../../shared/include/bootcard.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bootcard.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bootcard.h
+
+$(PROJECT_INCLUDE)/coverhd.h: ../../shared/include/coverhd.h $(PROJECT_INCLUDE)/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/coverhd.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/coverhd.h
+
+$(PROJECT_LIB)/start.$(OBJEXT): start.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_LIB)/start.$(OBJEXT)
+TMPINSTALL_FILES += $(PROJECT_LIB)/start.$(OBJEXT)
+
+$(PROJECT_LIB)/linkcmds: startup/linkcmds $(PROJECT_LIB)/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds
+PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds
+

c/src/lib/libbsp/bfin/TLL6527M/startup/bspstart.c

@@ -0,0 +1,207 @@
+/*  bspstart.c for TLL6527M
+ *
+ *  This routine starts the application.  It includes application,
+ *  board, and monitor specific initialization and configuration.
+ *  The generic CPU dependent initialization has been performed
+ *  before this routine is invoked.
+ *  
+ * COPYRIGHT (c) 2010 by ECE Northeastern University.
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license
+ *
+ *  $Id$
+ */
+
+
+#include <bsp.h>
+#include <cplb.h>
+#include <bsp/interrupt.h>
+#include <libcpu/ebiuRegs.h>
+
+const unsigned int dcplbs_table[16][2] = {  
+  { 0xFFA00000, (PAGE_SIZE_1MB | CPLB_D_PAGE_MGMT | CPLB_WT) },
+  { 0xFF900000, (PAGE_SIZE_1MB | CPLB_D_PAGE_MGMT | CPLB_WT) },/* L1 Data B */
+  { 0xFF800000, (PAGE_SIZE_1MB | CPLB_D_PAGE_MGMT | CPLB_WT) },/* L1 Data A */
+  { 0xFFB00000, (PAGE_SIZE_1MB | CPLB_DNOCACHE) },
+
+  { 0x20300000, (PAGE_SIZE_1MB | CPLB_DNOCACHE) },/* Async Memory Bank 3 */
+  { 0x20200000, (PAGE_SIZE_1MB | CPLB_DNOCACHE) },/* Async Memory Bank 2  */
+  { 0x20100000, (PAGE_SIZE_1MB | CPLB_DNOCACHE) },/* Async Memory Bank 1 */
+  { 0x20000000, (PAGE_SIZE_1MB | CPLB_DNOCACHE) }, /* Async Memory Bank 0 */
+
+  { 0x02400000, (PAGE_SIZE_4MB | CPLB_DNOCACHE) },
+  { 0x02000000, (PAGE_SIZE_4MB | CPLB_DNOCACHE) },
+  { 0x00C00000, (PAGE_SIZE_4MB | CPLB_DNOCACHE) },
+  { 0x00800000, (PAGE_SIZE_4MB | CPLB_DNOCACHE) },
+  { 0x00400000, (PAGE_SIZE_4MB | CPLB_DNOCACHE) },
+  { 0x00000000, (PAGE_SIZE_4MB | CPLB_DNOCACHE) },
+
+  { 0xffffffff, 0xffffffff }/* end of section - termination */
+};
+
+
+const unsigned int _icplbs_table[16][2] = { 
+  { 0xFFA00000, (PAGE_SIZE_1MB | CPLB_I_PAGE_MGMT | CPLB_I_PAGE_MGMT | 0x4) },
+  /* L1 Code */
+  { 0xEF000000, (PAGE_SIZE_1MB | CPLB_INOCACHE) }, /* AREA DE BOOT */
+  { 0xFFB00000, (PAGE_SIZE_1MB | CPLB_INOCACHE) },
+
+  { 0x20300000, (PAGE_SIZE_1MB | CPLB_INOCACHE) },/* Async Memory Bank 3 */
+  { 0x20200000, (PAGE_SIZE_1MB | CPLB_INOCACHE) },/* Async Bank 2 (Secnd) */
+  { 0x20100000, (PAGE_SIZE_1MB | CPLB_INOCACHE) },/* Async Bank 1 (Prim B) */
+  { 0x20000000, (PAGE_SIZE_1MB | CPLB_INOCACHE) },/* Async Bank 0 (Prim A) */
+
+  { 0x02400000, (PAGE_SIZE_4MB | CPLB_INOCACHE) },
+  { 0x02000000, (PAGE_SIZE_4MB | CPLB_INOCACHE) },
+  { 0x00C00000, (PAGE_SIZE_4MB | CPLB_INOCACHE) },
+  { 0x00800000, (PAGE_SIZE_4MB | CPLB_INOCACHE) },
+  { 0x00400000, (PAGE_SIZE_4MB | CPLB_INOCACHE) },
+  { 0x00000000, (PAGE_SIZE_4MB | CPLB_INOCACHE) },
+
+  { 0xffffffff, 0xffffffff }/* end of section - termination */
+};
+
+/*
+ *  Use the shared implementations of the following routines
+ */
+
+void bsp_libc_init( void *, uint32_t, int );
+void Init_PLL (void);
+void Init_EBIU (void);
+void Init_Flags(void);
+void Init_RTC (void);
+void initCPLB(void);
+
+
+void null_isr(void);
+
+/*
+ *  Function:   bsp_pretasking_hook
+ *  Created:    95/03/10
+ *
+ *  Description:
+ *      BSP pretasking hook.  Called just before drivers are initialized.
+ *      Used to setup libc and install any BSP extensions.
+ *
+ *  NOTES:
+ *      Must not use libc (to do io) from here, since drivers are
+ *      not yet initialized.
+ *
+ */
+
+void bsp_pretasking_hook(void)
+{
+  bfin_interrupt_init();
+}
+
+/*
+ *  bsp_start
+ *
+ *  This routine does the bulk of the system initialization.
+ */
+
+void bsp_start( void )
+{
+  /* BSP Hardware Initialization*/
+  Init_RTC();   /* Blackfin Real Time Clock initialization */  
+  Init_PLL();   /* PLL initialization */
+  Init_EBIU();  /* EBIU initialization */
+  Init_Flags(); /* GPIO initialization */
+
+  /*
+   *  Allocate the memory for the RTEMS Work Space.  This can come from
+   *  a variety of places: hard coded address, malloc'ed from outside
+   *  RTEMS world (e.g. simulator or primitive memory manager), or (as
+   *  typically done by stock BSPs) by subtracting the required amount
+   *  of work space from the last physical address on the CPU board.
+   */
+  int i=0;
+  for (i=5;i<16;i++) {
+    set_vector((rtems_isr_entry)null_isr, i, 1);
+  }
+  
+}
+
+ /*
+  * Init_PLL
+  * 
+  * Routine to initialize the PLL. The TLL6527M uses a 25 Mhz XTAL.
+  */
+void Init_PLL (void)
+{
+  unsigned short msel = 0;
+  unsigned short ssel = 0;
+
+  msel = (unsigned short)( (float)CCLK/(float)CLKIN );
+  ssel = (unsigned short)( (float)(CLKIN*msel)/(float)SCLK);
+  
+  asm("cli r0;");
+
+  *((uint32_t*)SIC_IWR) = 0x1;
+
+  /* Configure PLL registers */
+  *((uint16_t*)PLL_DIV) = ssel;;
+  msel = msel<<9;
+  *((uint16_t*)PLL_CTL) = msel;
+
+  /* Commands to set PLL values */
+  asm("idle;");
+  asm("sti r0;");
+}
+
+ /*
+  * Init_EBIU
+  * 
+  * Configure extern memory
+  */
+
+void Init_EBIU (void)
+{
+  /* Check if SDRAM is already enabled */
+  if ( 0 != (*(uint16_t *)EBIU_SDSTAT & EBIU_SDSTAT_SDRS) ){
+    asm("ssync;");
+    /* RDIV = (100MHz*64ms)/8192-(6+3)=0x406 cycles */
+    *(uint16_t *)EBIU_SDRRC  = 0x3F6; /* SHould have been 0x306*/
+    *(uint16_t *)EBIU_SDBCTL = EBIU_SDBCTL_EBCAW_10 | EBIU_SDBCTL_EBSZ_64M |
+        EBIU_SDBCTL_EBE;
+    *(uint32_t *)EBIU_SDGCTL = 0x8491998d;
+    asm("ssync;");
+  } else {
+    /* SDRAm is already programmed */
+  }
+}
+
+ /*
+  * Init_Flags
+  * 
+  * Enable LEDs port
+  */
+void Init_Flags(void)
+{
+  *((uint16_t*)PORTH_FER)    = 0x0;
+  *((uint16_t*)PORTH_MUX)    = 0x0;
+  *((uint16_t*)PORTHIO_DIR)  = 0x1<<15;
+  *((uint16_t*)PORTHIO_SET)  = 0x1<<15;
+}
+
+
+
+void initCPLB(void) {
+
+       int i = 0;
+       unsigned int *addr;
+       unsigned int *data;
+        
+       addr = (unsigned int *)0xffe00100;
+       data = (unsigned int *)0xffe00200;
+
+       while ( dcplbs_table[i][0] != 0xffffffff ) {
+               *addr = dcplbs_table[i][0];
+               *data = dcplbs_table[i][1];
+
+               addr++;
+               data++;
+       } 
+}

c/src/lib/libbsp/bfin/TLL6527M/startup/linkcmds

@@ -0,0 +1,154 @@
+OUTPUT_FORMAT("elf32-bfin", "elf32-bfin",
+            "elf32-bfin")
+
+OUTPUT_ARCH(bfin)
+ENTRY(__start)
+
+/*
+ * Declare some sizes.
+ */
+_RamBase    = DEFINED(_RamBase)   ? _RamBase : 0x0;
+_RamSize    = DEFINED(_RamSize)   ? _RamSize : 0x04000000;
+_HeapSize   = DEFINED(_HeapSize)  ? _HeapSize : 0x10000;
+_StackSize  = DEFINED(_StackSize) ? _StackSize : 0x10000;
+
+MEMORY
+{
+      sdram(rwx)      : ORIGIN = 0x00000100, LENGTH = 0x04000000
+      
+      l1dataA(rwx)    : ORIGIN = 0xff800000, LENGTH = 0x00004000
+      l1dataAC(rwx)   : ORIGIN = 0xff804000, LENGTH = 0x00004000
+      l1dataB(rwx)    : ORIGIN = 0xff900000, LENGTH = 0x00004000
+      l1dataBC(rwx)   : ORIGIN = 0xff904000, LENGTH = 0x00004000
+      
+      l1code(rwx)     : ORIGIN = 0xffa00000, LENGTH = 0x0000C000
+      l1codeC(rwx)    : ORIGIN = 0xffa10000, LENGTH = 0x00004000
+      scratchpad(rwx) : ORIGIN = 0xffb00000, LENGTH = 0x00001000
+}
+
+SECTIONS
+{
+
+    .init          : 
+    { 
+    	*(.l1code)
+        KEEP (*(.init))
+    } > sdram   /*=0*/
+
+    .text :
+    {
+         CREATE_OBJECT_SYMBOLS
+        *(.text)
+        *(.rodata*)
+        *(.gnu.linkonce.r*)
+        
+        /*
+         * Special FreeBSD sysctl sections.
+         */
+        . = ALIGN (16);
+        ___start_set_sysctl_set = .;
+        *(set_sysctl_*);
+        ___stop_set_sysctl_set = ABSOLUTE(.);
+        *(set_domain_*);
+        *(set_pseudo_*);
+
+         _etext = .;
+
+        ___CTOR_LIST__ = .;
+        LONG((___CTOR_END__ - ___CTOR_LIST__) / 4 - 2)
+        *(.ctors)
+        LONG(0)
+        ___CTOR_END__ = .;
+        ___DTOR_LIST__ = .;
+        LONG((___DTOR_END__ - ___DTOR_LIST__) / 4 - 2)
+        *(.dtors)
+        LONG(0)
+        ___DTOR_END__ = .;         
+    } > sdram
+    
+    .fini :
+    {
+        KEEP (*(.fini))
+    } > sdram  /*=0*/ 
+    
+    .data :
+    {
+        *(.data)
+        *(.jcr)
+        *(.gnu.linkonce.d*)
+        CONSTRUCTORS
+         _edata = .;
+    } > sdram
+
+    .eh_frame : { *(.eh_frame) } > sdram
+    .data1   : { *(.data1) } > sdram
+    .eh_frame : { *(.eh_frame) } > sdram
+    .gcc_except_table : { *(.gcc_except_table*) } > sdram
+
+    .rodata :
+    {
+        *(.rodata)
+        *(.rodata.*)
+        *(.gnu.linkonce.r*)
+    } > sdram
+
+    
+    .bss :
+    {
+         _bss_start = .;
+        _clear_start = .;
+        *(.bss)
+        *(.gnu.linkonce.b.*)
+        *(COMMON)
+        . = ALIGN (64);
+        _stack_init = .;
+        . += _StackSize;
+        _clear_end = .;
+        _WorkAreaBase = .;
+         _end = .;
+         __end = .;
+    } > sdram
+    
+/* Debugging stuff follows */
+
+  /* Stabs debugging sections.  */
+  .stab 0 : { *(.stab) } 
+  .stabstr 0 : { *(.stabstr) } 
+  .stab.excl 0 : { *(.stab.excl) } 
+  .stab.exclstr 0 : { *(.stab.exclstr) }
+  .stab.index 0 : { *(.stab.index) } 
+  .stab.indexstr 0 : { *(.stab.indexstr) } 
+  .comment 0 : { *(.comment) }
+  /* DWARF debug sections.
+     Symbols in the DWARF debugging sections are relative to the beginning
+     of the section so we begin them at 0.  */
+  /* DWARF 1 */
+  .debug          0 : { *(.debug) }
+  .line           0 : { *(.line) }
+  /* GNU DWARF 1 extensions */
+  .debug_srcinfo  0 : { *(.debug_srcinfo) }
+  .debug_sfnames  0 : { *(.debug_sfnames) }
+  /* DWARF 1.1 and DWARF 2 */
+  .debug_aranges  0 : { *(.debug_aranges) }
+  .debug_pubnames 0 : { *(.debug_pubnames) }
+  /* DWARF 2 */
+  .debug_info     0 : { *(.debug_info) }
+  .debug_abbrev   0 : { *(.debug_abbrev) }
+  .debug_line     0 : { *(.debug_line) }
+  .debug_frame    0 : { *(.debug_frame) }
+  .debug_str      0 : { *(.debug_str) } 
+  .debug_loc      0 : { *(.debug_loc) }
+  .debug_macinfo  0 : { *(.debug_macinfo) } 
+  /* SGI/MIPS DWARF 2 extensions */
+  .debug_weaknames 0 : { *(.debug_weaknames) }
+  .debug_funcnames 0 : { *(.debug_funcnames) }
+  .debug_typenames 0 : { *(.debug_typenames) }
+  .debug_varnames  0 : { *(.debug_varnames) } 
+  /*.stack 0x80000 : { _stack = .; *(.stack) }*/
+  /* These must appear regardless of  .  */   
+}
+
+__HeapSize = _HeapSize;
+__edata = _edata;
+__etext = _etext;
+

c/src/lib/libbsp/bfin/TLL6527M/times

@@ -0,0 +1,179 @@
+#
+#  Timing Test Suite Results for TLL6527M
+#
+#
+#  $Id$
+#
+
+Board: TLL6527M 
+CPU: Blackfin 527
+Clock Speed: 600 MHz
+Memory Configuration: SDRAM 100 MHz
+
+
+*** TIME TEST 1 ***
+rtems_semaphore_create 8
+rtems_semaphore_delete 4
+rtems_semaphore_obtain: available 0
+rtems_semaphore_obtain: not available -- NO_WAIT 0
+rtems_semaphore_release: no waiting tasks 1
+*** END OF TEST 1 ***
+
+
+*** TIME TEST 2 ***
+rtems_semaphore_obtain: not available -- caller blocks 8
+*** END OF TEST 2 ***
+
+
+*** TIME TEST 3 ***
+
+*** TIME TEST 4 ***
+
+*** TIME TEST 5 ***
+
+*** TIME TEST 6 ***
+rtems_task_restart: calling task 3
+rtems_task_suspend: returns to caller 1
+rtems_task_resume: task readied -- returns to caller 1
+rtems_task_delete: ready task 15
+*** END OF TEST 6 ***
+
+*** TIME TEST 7 ***
+
+
+*** TIME TEST 8 ***
+rtems_task_set_priority: obtain current priorityrtems_task_mode: reschedule -- preempts caller 0   
+rtems_task_set_priority: returns to caller  2
+rtems_task_mode: obtain current mode101 0
+rtems_task_mode: no reschedule 0
+rtems_task_mode: reschedule -- returns to caller
+ 2
+rtems_task_set_note 1
+rtems_task_get_note 0
+rtems_clock_set 2
+rtems_clock_get_tod 12
+*** END OF TEST 8 ***
+
+
+*** TIME TEST 9 ***
+rtems_message_queue_create 43
+rtems_message_queue_send: no waiting tasks 2
+rtems_message_queue_urgent: no waiting tasks 2
+rtems_message_queue_receive: available 2
+rtems_message_queue_flush: no messages flushed 0
+rtems_message_queue_flush: messages flushed 1
+rtems_message_queue_delete 8
+*** END OF TEST 9 ***
+
+*** TIME TEST 10 ***
+rtems_message_queue_receive: not available -- NO_WAITrtems_message_queue_receive: not available -- caller blocks 1
+ 8
+*** END OF TEST 10 ***
+
+*** TIME TEST 11 ***
+
+*** TIME TEST 12 ***
+
+*** TIME TEST 13 ***
+
+*** TIME TEST 14 ***
+
+*** TIME TEST 15 ***
+rtems_event_receive: obtain current eventsrtems_event_receive: not available -- caller blocks  07  
+
+rtems_event_receive: not available -- NO_WAITrtems_event_send: n
+
+
+
+*** TIME TEST 16 ***
+
+*** TIME TEST 17 ***
+     
+     
+*** TIME TEST 18 ***
+rtems_task_delete: calling task 22
+*** END OF TEST 18 ***
+
+
+*** TIME TEST 19 ***
+rtems_signal_catch 1
+rtems_signal_send: returns to caller 2
+rtems_signal_send: signal to self 8
+exi
+
+
+
+*** TIME TEST 20 ***                                                                               
+rtems_partition_create 12                                                                          
+rtems_region_creatertems_region_get_segment: not available -- caller blocks 15 
+rtems_partition_get_buffer: available 3
+rtems_partition_get_buffer: not available15 1
+rtems_partition_return_buffer 2
+
+rtems_partition_delete 2
+rtems_region_get_segment: available 5rtems_region_return_segment: task readied -- returns to caller
+ rtems_region_get_segment: not available -- NO_WAIT 5
+rtems_region_return_segment: no waiting tasks3 4
+
+Ack! Something bad happened to the Blackfin!
+
+SEQUENCER STATUS:
+ SEQSTAT: 0000c021  IPEND: 8068  SYSCFG: 0006
+  HWERRCAUSE: 0x3: external memory addressing error
+  EXCAUSE   : 0x21: undef inst
+  physical IVG6 asserted : <0x00009542> /* unknown address */
+  physical IVG15 asserted : <0x00009690> /* unknown address */
+ RETE: <0x00000100> /* unknown address */
+ RETN: <0x92a330ab> { ___smulsi3_highpart + 0x8ead486f }
+ RETX: <0x12001940> { ___smulsi3_highpart + 0xe0a3104 }
+ RETS: <0x000095fa> /* unknown address */
+ RETI: <0x0d48338c> { ___smulsi3_highpart + 0x9524b50 }
+DCPLB_FAULT_ADDR: <0x000318f0> /* unknown address */
+ICPLB_FAULT_ADDR: <0x12001940> { ___smulsi3_highpart + 0xe0a3104 }
+ 
+ 
+
+*** TIME TEST 21 ***                                                                               
+
+rtems_region_create FAILED -- expected (successful completion) got (address specified is invalid)
+
+*** TIME TEST 22 ***
+
+*** TIME TEST 23 ***
+
+
+*** TIME TEST 24 ***
+    
+    
+*** TIME TEST 25 ***
+rtems_clock_tick 5
+*** END OF TEST 25 ***
+
+
+*** TIME TEST 26 ***
+
+*** TIME TEST 27 ***
+interrupt entry overhead: returns to interrupted taskinterrupt entry overhead: returns to preempting task  22
+
+interrupt exit overhead: returns to interrupted task
+
+
+*** TIME TEST 28 ***
+rtems_port_create 1
+rtems_port_external_to_internal 0
+rtems_port_internal_to_external 0
+rtems_port_delete 1
+*** END OF TEST 28 ***
+
+
+*** TIME TEST 29 ***
+rtems_rate_monotonic_create 6
+rtems_rate_monotonic_period: initiate period -- returns to caller 10
+rtems_rate_monotonic_period: obtain status 2
+rtems_rate_monotonic_cancel 3
+rtems_rate_monotonic_delete: inactive 6
+rtems_rate_monotonic_delete: active 3
+rtems_rate_monotonic_period: conclude periods -- caller blocks 9
+*** END OF TEST 29 ***
+
+         

c/src/lib/libbsp/bfin/acinclude.m4

@@ -6,6 +6,8 @@ AC_DEFUN([RTEMS_CHECK_BSPDIR],
     AC_CONFIG_SUBDIRS([bf537Stamp]);;
   eZKit533 )
     AC_CONFIG_SUBDIRS([eZKit533]);;
+  TLL6527M )
+    AC_CONFIG_SUBDIRS([TLL6527M]);;
   *)
     AC_MSG_ERROR([Invalid BSP]);;
   esac

c/src/lib/libbsp/bfin/bf537Stamp/ChangeLog

@@ -1,3 +1,14 @@
+2011-04-22	Joel Sherrill <joel.sherrilL@OARcorp.com>
+
+	* console/console.c: Now compiles.
+
+2011-04-20  Rohan Kangralkar <rkangral@ece.neu.edu>
+
+	PR 1781/bsps
+	* console/console-io.c: The UART RX and TX are different ISR
+	now. So the array containing the registeration changes. The
+	change is due to change in the libcup uart function.
+
 2011-02-02	Ralf Corsépius <ralf.corsepius@rtems.org>
 
 	* configure.ac: Require autoconf-2.68, automake-1.11.1.

c/src/lib/libbsp/bfin/bf537Stamp/console/console.c

@@ -26,16 +26,20 @@
 */
 
 static bfin_uart_channel_t channels[] = {
-  {"/dev/console",
-   (char *) UART0_BASE_ADDRESS,
-   CONSOLE_USE_INTERRUPTS,
-#ifdef CONSOLE_FORCE_BAUD
-   CONSOLE_FORCE_BAUD,
-#else
-   0,
-#endif
-   NULL,
-   0}
+    {"/dev/console",
+     UART0_BASE_ADDRESS,
+     0,
+     0,
+     CONSOLE_USE_INTERRUPTS,
+     0,
+  #ifdef CONSOLE_FORCE_BAUD
+     CONSOLE_FORCE_BAUD,
+  #else
+     0,
+  #endif
+     NULL,
+     0,
+     0}
 
 #if (!BFIN_ON_SKYEYE)
 ,
@@ -56,10 +60,10 @@ static bfin_uart_config_t config = {
 
 #if CONSOLE_USE_INTERRUPTS
 static bfin_isr_t bfinUARTISRs[] = {
-  {SIC_DMA8_UART0_RX_VECTOR, bfin_uart_isr, 0, 0, NULL},
-  {SIC_DMA10_UART1_RX_VECTOR, bfin_uart_isr, 0, 0, NULL},
-  {SIC_DMA9_UART0_TX_VECTOR, bfin_uart_isr, 0, 0, NULL},
-  {SIC_DMA11_UART1_TX_VECTOR, bfin_uart_isr, 0, 0, NULL}
+  {SIC_DMA8_UART0_RX_VECTOR, bfinUart_rxIsr, 0, 0, NULL},
+  {SIC_DMA10_UART1_RX_VECTOR, bfinUart_rxIsr, 0, 0, NULL},
+  {SIC_DMA9_UART0_TX_VECTOR, bfinUart_txIsr, 0, 0, NULL},
+  {SIC_DMA11_UART1_TX_VECTOR, bfinUart_txIsr, 0, 0, NULL}
 };
 #endif
 

c/src/lib/libbsp/bfin/eZKit533/ChangeLog

@@ -1,3 +1,10 @@
+2011-04-20  Rohan Kangralkar <rkangral@ece.neu.edu>
+
+	PR 1781/bsps
+	* console/console-io.c: The UART RX and TX are different ISR
+	now. So the array containing the registeration changes. The
+	change is due to change in the libcup uart function.
+
 2011-02-02	Ralf Corsépius <ralf.corsepius@rtems.org>
 
 	* configure.ac: Require autoconf-2.68, automake-1.11.1.

c/src/lib/libbsp/bfin/eZKit533/console/console-io.c

@@ -26,14 +26,18 @@
 
 static bfin_uart_channel_t channels[] = {
   {"/dev/console",
-   (char *) UART0_BASE_ADDRESS,
+   UART0_BASE_ADDRESS,
+   0,
+   0,
    CONSOLE_USE_INTERRUPTS,
+   0,
 #ifdef CONSOLE_FORCE_BAUD
    CONSOLE_FORCE_BAUD,
 #else
    0,
 #endif
    NULL,
+   0,
    0}
 };
 
@@ -45,8 +49,8 @@ static bfin_uart_config_t config = {
 
 #if CONSOLE_USE_INTERRUPTS
 static bfin_isr_t bfinUARTISRs[] = {
-  {SIC_DMA6_UART0_RX_VECTOR, bfin_uart_isr, 0, 0, NULL},
-  {SIC_DMA7_UART0_TX_VECTOR, bfin_uart_isr, 0, 0, NULL},
+  {SIC_DMA6_UART0_RX_VECTOR, bfinUart_rxIsr, 0, 0, NULL},
+  {SIC_DMA7_UART0_TX_VECTOR, bfinUart_txIsr, 0, 0, NULL},
 };
 #endif
 

c/src/lib/libbsp/i386/ChangeLog

@@ -1,3 +1,11 @@
+2011-04-04	Joel Sherrill <joel.sherrilL@OARcorp.com>
+
+	PR 1768/bsps
+	* shared/irq/irq_asm.S: The nbench benchmark highlighted the fact that
+	we do not perform a cld before calling C code in the ISR. This was
+	historically not a problem but gcc 4.3 changed the behavior. From
+	http://gcc.gnu.org/gcc-4.3/changes.html
+
 2011-02-02	Ralf Corsépius <ralf.corsepius@rtems.org>
 
 	* configure.ac: Require autoconf-2.68, automake-1.11.1.

c/src/lib/libbsp/i386/pc386/ChangeLog

@@ -1,3 +1,19 @@
+2011-07-14	Till Straumann <strauman@slac.stanford.edu>
+
+	PR 1833/bsps
+	* ne2000/ne2000.c: Addition of multicast support disabled broadcast
+	reception. Patch also includes support to work on big endian CPUs.
+
+2011-04-11	Keith Robertson <kjrobert at alumni dot uwaterloo dot ca>
+
+	* ne2000/ne2000.c: Add multicast support. Patch submitted to mailing
+	list 2005-12-21.
+
+2011-03-07	Joel Sherrill <joel.sherrilL@OARcorp.com>
+
+	PR 1756/bsps
+	* timer/timer.c: Retry on timer calibration loop failure.
+
 2011-02-02	Ralf Corsépius <ralf.corsepius@rtems.org>
 
 	* configure.ac: Require autoconf-2.68, automake-1.11.1.

c/src/lib/libbsp/i386/pc386/ne2000/ne2000.c

@@ -205,7 +205,8 @@ struct ne_ring
 {
 	unsigned char rsr;    /* receiver status */
 	unsigned char next;   /* pointer to next packet	*/
-	unsigned short count; /* bytes in packet (length + 4)	*/
+	unsigned char cnt_lo; /* bytes in packet (length + 4)	*/
+	unsigned char cnt_hi; /* 16-bit, little-endian value    */
 };
 
 /* Forward declarations to avoid warnings */
@@ -502,8 +503,8 @@ ne_init_hardware (struct ne_softc *sc)
   /* Set page 0 registers */
   outport_byte (port + CMDR, MSK_PG0 | MSK_RD2 | MSK_STP);
 
-  /* accept broadcast */
-  outport_byte (port + RCR, (sc->accept_broadcasts ? MSK_AB : 0));
+  /* accept broadcast + multicast */
+  outport_byte (port + RCR, (sc->accept_broadcasts ? MSK_AB : 0) | MSK_AM);
 
   /* Start interface */
   outport_byte (port + CMDR, MSK_PG0 | MSK_RD2 | MSK_STA);
@@ -602,7 +603,7 @@ ne_rx_daemon (void *arg)
         next = NE_FIRST_RX_PAGE;
 
       /* check packet length */
-      len = hdr.count;
+      len = ( hdr.cnt_hi << 8 ) | hdr.cnt_lo;
       if (currpage < startpage)
         cnt1 = currpage + (NE_STOP_PAGE - NE_FIRST_RX_PAGE) - startpage;
       else
@@ -681,7 +682,7 @@ ne_rx_daemon (void *arg)
       m->m_data += sizeof (struct ether_header);
 
 #ifdef DEBUG_NE
-  /* printk("[r%d]", hdr.count - sizeof(hdr)); */
+  /* printk("[r%d]", ((hdr.cnt_hi<<8) + hdr.cnt_lo - sizeof(hdr))); */
   printk("<");
 #endif
       ether_input (ifp, eh, m);
@@ -1073,6 +1074,28 @@ ne_stats (struct ne_softc *sc)
   printf ("          Interrupts: %-8lu\n", sc->stats.interrupts);
 }
 
+static int ne_set_multicast_filter(struct ne_softc* sc)
+{
+  int i=0;
+  unsigned int port = sc->port;
+  unsigned char cmd = 0;
+  	
+  /* Save CMDR settings */
+  inport_byte(port + CMDR, cmd);
+  /* Change to page 1 */
+  outport_byte(port + CMDR, cmd | MSK_PG1);
+
+  /* Set MAR to accept _all_ multicast packets */
+  for (i = 0; i < MARsize; ++i) {
+    outport_byte (port + MAR + i, 0xFF);
+  }
+
+  /* Revert to original CMDR settings */
+  outport_byte(port + CMDR, cmd); 
+
+  return 0;
+}
+
 /* NE2000 driver ioctl handler.  */
 
 static int
@@ -1106,13 +1129,25 @@ ne_ioctl (struct ifnet *ifp, ioctl_command_t command, caddr_t data)
       break;
     }
     break;
+  
+  case SIOCADDMULTI:
+  case SIOCDELMULTI:
+  {
+    struct ifreq* ifr = (struct ifreq*) data;
+    error = (command == SIOCADDMULTI ? 
+      ether_addmulti(ifr, &(sc->arpcom)) :
+      ether_delmulti(ifr, &(sc->arpcom)) );
+    /* ENETRESET indicates that driver should update its multicast filters */
+    if(error == ENETRESET) {
+      error = ne_set_multicast_filter(sc);
+    }
+    break;
+  }
 
   case SIO_RTEMS_SHOW_STATS:
     ne_stats (sc);
     break;
 
-    /* FIXME: Multicast commands must be added here.  */
-
   default:
     error = EINVAL;
     break;
@@ -1264,7 +1299,7 @@ rtems_ne_driver_attach (struct rtems_bsdnet_ifconfig *config, int attach)
   ifp->if_watchdog = ne_watchdog;
   ifp->if_start = ne_start;
   ifp->if_output = ether_output;
-  ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX;
+  ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
   if (ifp->if_snd.ifq_maxlen == 0)
     ifp->if_snd.ifq_maxlen = ifqmaxlen;
 

c/src/lib/libbsp/i386/pc386/timer/timer.c

@@ -333,13 +333,19 @@ Calibrate_loop_1ms(void)
   unsigned int targetClockBits, currentClockBits;
   unsigned int slowLoopGranularity, fastLoopGranularity;
   rtems_interrupt_level  level;
+  int retries = 0;
 
+  rtems_interrupt_disable(level);
+
+retry:
+  if ( ++retries >= 5 ) {
+    printk( "Calibrate_loop_1ms: too many attempts. giving up!!\n" );
+    while (1);
+  }
 #ifdef DEBUG_CALIBRATE
   printk("Calibrate_loop_1ms is starting,  please wait (but not too long.)\n");
 #endif
   targetClockBits = US_TO_TICK(1000);
-
-  rtems_interrupt_disable(level);
   /*
    * Fill up the cache to get a correct offset
    */
@@ -383,8 +389,11 @@ Calibrate_loop_1ms(void)
   fastLoop (10000);
   res = readTimer0() - offset;
   if (res < emptyCall) {
-     printk("Problem #1 in offset computation in Calibrate_loop_1ms in file libbsp/i386/pc386/timer/timer.c\n");
-    while (1);
+    printk(
+      "Problem #1 in offset computation in Calibrate_loop_1ms "
+        " in file libbsp/i386/pc386/timer/timer.c\n"
+    );
+    goto retry;
   }
   fastLoopGranularity = (res - emptyCall) / 10000;
   /*
@@ -394,14 +403,20 @@ Calibrate_loop_1ms(void)
   slowLoop(10);
   res = readTimer0();
   if (res < offset + emptyCall) {
-     printk("Problem #2 in offset computation in Calibrate_loop_1ms in file libbsp/i386/pc386/timer/timer.c\n");
-    while (1);
+    printk(
+      "Problem #2 in offset computation in Calibrate_loop_1ms "
+        " in file libbsp/i386/pc386/timer/timer.c\n"
+    );
+    goto retry;
   }
   slowLoopGranularity = (res - offset - emptyCall)/ 10;
 
   if (slowLoopGranularity == 0) {
-    printk("Problem #3 in Calibrate_loop_1ms in file libbsp/i386/pc386/timer/timer.c\n");
-    while (1);
+    printk(
+      "Problem #3 in offset computation in Calibrate_loop_1ms "
+        " in file libbsp/i386/pc386/timer/timer.c\n"
+    );
+    goto retry;
   }
 
   targetClockBits += offset;

c/src/lib/libbsp/i386/shared/irq/irq_asm.S

@@ -145,6 +145,13 @@ nested:
 	incl      SYM (_ISR_Nest_level)     /* one nest level deeper */
 	incl      SYM (_Thread_Dispatch_disable_level) /* disable multitasking */
 
+        /*
+         * GCC versions starting with 4.3 no longer place the cld
+         * instruction before string operations.  We  need to ensure
+         * it is set correctly for ISR handlers.
+         */
+        cld
+
 	/*
 	 * re-enable interrupts at processor level as the current
 	 * interrupt source is now masked via i8259

c/src/lib/libbsp/m68k/mrm332/ChangeLog

@@ -1,3 +1,8 @@
+2011-03-22	Joel Sherrill <joel.sherrilL@OARcorp.com>
+
+	PR 1772/bsps
+	* console/sci.c: Use same default baud rate as monitor.
+
 2011-02-02	Ralf Corsépius <ralf.corsepius@rtems.org>
 
 	* configure.ac: Require autoconf-2.68, automake-1.11.1.

c/src/lib/libbsp/m68k/mrm332/console/sci.c

@@ -556,8 +556,8 @@ int   SciInterruptOpen(
 /*  SciSetBaud(115200);                         set the baud rate */
 /*  SciSetBaud( 57600);                         set the baud rate */
 /*  SciSetBaud( 38400);                         set the baud rate */
-    SciSetBaud( 19200);                      /* set the baud rate */
-/*  SciSetBaud(  9600);                         set the baud rate */
+/*  SciSetBaud( 19200);                         set the baud rate */
+    SciSetBaud(  9600);                      /* set the baud rate */
 
     SciSetParity(SCI_PARITY_NONE);              /* set parity to none */
 
@@ -681,8 +681,8 @@ int   SciSetAttributes(
 
     if (!baud_requested)
     {
-/*        baud_requested = B9600;                   default to 9600 baud */
-        baud_requested = B19200;                 /* default to 19200 baud */
+        baud_requested = B9600;                /* default to 9600 baud */
+       /* baud_requested = B19200;                default to 19200 baud */
     }
 
     sci_rate = rtems_termios_baud_to_number( baud_requested );
@@ -783,8 +783,8 @@ int   SciPolledOpen(
 /*  SciSetBaud(115200);                            set the baud rate */
 /*  SciSetBaud( 57600);                            set the baud rate */
 /*  SciSetBaud( 38400);                            set the baud rate */
-  SciSetBaud( 19200);                         /* set the baud rate */
-/*  SciSetBaud(  9600);                            set the baud rate */
+/*  SciSetBaud( 19200);                          * set the baud rate */
+    SciSetBaud(  9600);                         /* set the baud rate */
 
     SciSetParity(SCI_PARITY_NONE);              /* set no parity */
 

c/src/lib/libbsp/m68k/uC5282/ChangeLog

@@ -1,3 +1,24 @@
+2011-03-15	Till Straumann <strauman@slac.stanford.edu>
+
+	* startup/bspstart.c: Fix clock code on qemu. Also ensure UART is
+	initialized early for printk.
+
+2011-03-04	Till Straumann <strauman@slac.stanford.edu>
+
+	PR 1738/bsps
+	* clock/clock.c, include/bsp.h, network/network.c: system clock driver
+	programs the PIT w/o assuming the CPU clock frequency being a power
+	of two.
+
+2011-02-17	Till Straumann <strauman@slac.stanford.edu>
+
+	PR 1738/bsps
+	* README, startup/bspstart.c, startup/linkcmds: Add support for dynamic
+	clock speed determination. This algorithm is described in the README
+	file. The output of the RTEMS Timing Tests was moved to TIMES to
+	signicantly shrink the README.
+	* TIMES: New file.
+
 2011-02-02	Ralf Corsépius <ralf.corsepius@rtems.org>
 
 	* configure.ac: Require autoconf-2.68, automake-1.11.1.

c/src/lib/libbsp/m68k/uC5282/README

@@ -25,9 +25,9 @@ TODO:
 The bsp relies on the Arcturus monitor to set up DRAM and all chip selects. 
 This seems OK to me, but others may find it lame.....
 
-I/O pin restrictions make simultaneous operation
-of I2C, CAN and UART2 impossible.  The BSP configures UART2 to
-use the CAN pins and leaves the I2C pins available for use.
+I/O pin restrictions make simultaneous operation of I2C, CAN and UART2
+impossible.  The BSP configures UART2 to use the CAN pins and leaves
+the I2C pins available for use.
  
 BSP NAME:           uC5282
 BOARD:              Arcturus Netrworks uCdimm 5282
@@ -100,6 +100,37 @@ port into RAM then executed or programmed into flash memory.
 6) Type 'goram<CR>' to start the downloaded program, or type 'program<CR>'
 to burn the code onto the uCDIMM flash.
 
+Clock Speed Determination Algorithm
+===================================
+Till Straumann submitted a patch to provide more dynamic clock speed
+selection. 
+
+Currently, the uC5282 BSP requires relinking the application with a
+special linker flag in order to make it work with 80MHz boards (breaking
+run-time compatibility with 64MHz variants).
+
+The change aims adds support for run-time guessing/setting of
+the system-clock frequency:
+
+1) If uCbootloader environment variable SYS_CLOCK_SPEED is set to a
+non-zero number then the BSP assumes this number to specify the clock
+frequency in Hz.
+
+2) If 1) yields no non-zero frequency then the linker-provided symbol
+_CPUClockSpeed is assumed to specify the clock frequency (in Hz). This
+is the traditional behavior but the default value of _CPUClockSpeed
+was changed from 64000000 to 0 (in order to let step 3) do it's work
+by default).
+
+3) If neither 1) nor 2) yield a non-zero frequency then assume a PLL
+reference frequency (in Hz) as defined by the linker-provided symbol
+'_PLLRefClockSpeed' (which defaults to 8000000) and compute the system
+clock frequency from the divisor/multiplier settings in the SYNCR
+register.
+
+We have both, 64MHz and 80MHz variants and both use a PLL reference of
+8MHz so that run-time heuristics + detection 3) work fine.
+
 EPICS Bootstrap Information
 ===========================
 The EPICS startup code uses the following environment variables.  If an
@@ -207,321 +238,3 @@ External interrupt lines (priority is fixed between 3 and 4):
 
 ============================================================================
 
-TIMING TESTS  2005-01-28
-========================
-
-*** TIME TEST 1 ***
-rtems_semaphore_create 19
-rtems_semaphore_delete 21
-rtems_semaphore_obtain: available 4
-rtems_semaphore_obtain: not available -- NO_WAIT 5
-rtems_semaphore_release: no waiting tasks 12
-*** END OF TEST 1 ***
-
-*** TIME TEST 2 ***
-rtems_semaphore_obtain: not available -- caller blocks 34
-*** END OF TEST 2 ***
-
-*** TIME TEST 3 ***
-rtems_semaphore_release: task readied -- preempts caller 27
-*** END OF TEST 3 ***
-
-*** TIME TEST 4 ***
-rtems_task_restart: blocked task -- preempts caller 54
-rtems_task_restart: ready task -- preempts caller 52
-rtems_semaphore_release: task readied -- returns to caller 18
-rtems_task_create 87
-rtems_task_start 24
-rtems_task_restart: suspended task -- returns to caller 27
-rtems_task_delete: suspended task 66
-rtems_task_restart: ready task -- returns to caller 28
-rtems_task_restart: blocked task -- returns to caller 38
-rtems_task_delete: blocked task 69
-*** END OF TEST 4 ***
-
-*** TIME TEST 5 ***
-rtems_task_suspend: calling task 23
-rtems_task_resume: task readied -- preempts caller 22
-*** END OF TEST 5 ***
-
-*** TIME TEST 6 ***
-rtems_task_restart: calling task 30
-rtems_task_suspend: returns to caller 9
-rtems_task_resume: task readied -- returns to caller 12
-rtems_task_delete: ready task 69
-*** END OF TEST 6 ***
-
-*** TIME TEST 7 ***
-rtems_task_restart: suspended task -- preempts caller 44
-*** END OF TEST 7 ***
-
-*** TIME TEST 8 ***
-rtems_task_set_priority: obtain current priority 6
-rtems_task_set_priority: returns to caller 17
-rtems_task_mode: obtain current mode 3
-rtems_task_mode: no reschedule 3
-rtems_task_mode: reschedule -- returns to caller 8
-rtems_task_mode: reschedule -- preempts caller 22
-rtems_task_set_note 6
-rtems_task_get_note 6
-rtems_clock_set 22
-rtems_clock_get 1
-*** END OF TEST 8 ***
-
-*** TIME TEST 9 ***
-rtems_message_queue_create 55
-rtems_message_queue_send: no waiting tasks 20
-rtems_message_queue_urgent: no waiting tasks 21
-rtems_message_queue_receive: available 20
-rtems_message_queue_flush: no messages flushed 8
-rtems_message_queue_flush: messages flushed 12
-rtems_message_queue_delete 29
-*** END OF TEST 9 ***
-
-*** TIME TEST 10 ***
-rtems_message_queue_receive: not available -- NO_WAIT 10
-rtems_message_queue_receive: not available -- caller blocks 38
-*** END OF TEST 10 ***
-
-*** TIME TEST 11 ***
-rtems_message_queue_send: task readied -- preempts caller 37
-*** END OF TEST 11 ***
-
-*** TIME TEST 12 ***
-rtems_message_queue_send: task readied -- returns to caller 23
-*** END OF TEST 12 ***
-
-*** TIME TEST 13 ***
-rtems_message_queue_urgent: task readied -- preempts caller 35
-*** END OF TEST 13 ***
-
-*** TIME TEST 14 ***
-rtems_message_queue_urgent: task readied -- returns to caller 24
-*** END OF TEST 14 ***
-
-*** TIME TEST 15 ***
-rtems_event_receive: obtain current events 0
-rtems_event_receive: not available -- NO_WAIT 5
-rtems_event_receive: not available -- caller blocks 28
-rtems_event_send: no task readied 5
-rtems_event_receive: available 9
-rtems_event_send: task readied -- returns to caller 16
-*** END OF TEST 15 ***
-
-*** TIME TEST 16 ***
-rtems_event_send: task readied -- preempts caller 27
-*** END OF TEST 16 ***
-
-*** TIME TEST 17 ***
-rtems_task_set_priority: preempts caller 39
-*** END OF TEST 17 ***
-
-*** TIME TEST 18 ***
-rtems_task_delete: calling task 83
-*** END OF TEST 18 ***
-
-*** TIME TEST 19 ***
-rtems_signal_catch 5
-rtems_signal_send: returns to caller 12
-rtems_signal_send: signal to self 20
-exit ASR overhead: returns to calling task 15
-exit ASR overhead: returns to preempting task 18
-*** END OF TEST 19 ***
-
-*** TIME TEST 20 ***
-rtems_partition_create 20
-rtems_region_create 40
-rtems_partition_get_buffer: available 11
-rtems_partition_get_buffer: not available 7
-rtems_partition_return_buffer 12
-rtems_partition_delete 11
-rtems_region_get_segment: available 28
-rtems_region_get_segment: not available -- NO_WAIT 29
-rtems_region_return_segment: no waiting tasks 29
-rtems_region_get_segment: not available -- caller blocks 55
-rtems_region_return_segment: task readied -- preempts caller 72
-rtems_region_return_segment: task readied -- returns to caller 58
-rtems_region_delete 25
-rtems_io_initialize 1
-rtems_io_open 1
-rtems_io_close 1
-rtems_io_read 1
-rtems_io_write 1
-rtems_io_control 1
-*** END OF TEST 20 ***
-
-*** TIME TEST 21 ***
-rtems_task_ident 60
-rtems_message_queue_ident 60
-rtems_semaphore_ident 69
-rtems_partition_ident 59
-rtems_region_ident 60
-rtems_port_ident 59
-rtems_timer_ident 61
-rtems_rate_monotonic_ident 60
-*** END OF TEST 21 ***
-
-*** TIME TEST 22 ***
-rtems_message_queue_broadcast: task readied -- returns to caller 32
-rtems_message_queue_broadcast: no waiting tasks 14
-rtems_message_queue_broadcast: task readied -- preempts caller 39
-*** END OF TEST 22 ***
-
-*** TIME TEST 23 ***
-rtems_timer_create 8
-rtems_timer_fire_after: inactive 12
-rtems_timer_fire_after: active 12
-rtems_timer_cancel: active 9
-rtems_timer_cancel: inactive 8
-rtems_timer_reset: inactive 14
-rtems_timer_reset: active 15
-rtems_timer_fire_when: inactive 21
-rtems_timer_fire_when: active 21
-rtems_timer_delete: active 12
-rtems_timer_delete: inactive 11
-rtems_task_wake_when 35
-*** END OF TEST 23 ***
-
-*** TIME TEST 24 ***
-rtems_task_wake_after: yield -- returns to caller 3
-rtems_task_wake_after: yields -- preempts caller 18
-*** END OF TEST 24 ***
-
-*** TIME TEST 25 ***
-rtems_clock_tick 7
-*** END OF TEST 25 ***
-
-*** TIME TEST 26 ***
-_ISR_Disable 1
-_ISR_Flash 0
-_ISR_Enable 0
-_Thread_Disable_dispatch 1
-_Thread_Enable_dispatch 3
-_Thread_Set_state 7
-_Thread_Disptach (NO FP) 16
-context switch: no floating point contexts 12
-context switch: self 2
-context switch: to another task 1
-fp context switch: restore 1st FP task 14
-fp context switch: save idle, restore initialized 3
-fp context switch: save idle, restore idle 13
-fp context switch: save initialized, restore initialized 2
-_Thread_Resume 7
-_Thread_Unblock 6
-_Thread_Ready 5
-_Thread_Get 1
-_Semaphore_Get 1
-_Thread_Get: invalid id 0
-*** END OF TEST 26 ***
-
-*** TIME TEST 27 ***
-interrupt entry overhead: returns to interrupted task 3
-interrupt exit overhead: returns to interrupted task 3
-interrupt entry overhead: returns to nested interrupt 2
-interrupt exit overhead: returns to nested interrupt 2
-interrupt entry overhead: returns to preempting task 4
-interrupt exit overhead: returns to preempting task 20
-*** END OF TEST 27 ***
-
-*** TIME TEST 28 ***
-rtems_port_create 12
-rtems_port_external_to_internal 5
-rtems_port_internal_to_external 6
-rtems_port_delete 12
-*** END OF TEST 28 ***
-
-*** TIME TEST 29 ***
-rtems_rate_monotonic_create 13
-rtems_rate_monotonic_period: initiate period -- returns to caller 20
-rtems_rate_monotonic_period: obtain status 10
-rtems_rate_monotonic_cancel 13
-rtems_rate_monotonic_delete: inactive 17
-rtems_rate_monotonic_delete: active 16
-rtems_rate_monotonic_period: conclude periods -- caller blocks 24
-*** END OF TEST 29 ***
-
-*** TIME CHECKER ***
-Units may not be in microseconds for this test!!!
-0 100000
-Total time = 0
-Average time = 0
-NULL timer stopped at 0
-LOOP (1000) timer stopped at 188
-LOOP (10000) timer stopped at 1875
-LOOP (50000) timer stopped at 9375
-LOOP (100000) timer stopped at 18750
-*** END OF TIME CHECKER ***
-
-*** TIME TEST OVERHEAD ***
-rtems_initialize_executive 0
-rtems_shutdown_executive 0
-rtems_task_create 0
-rtems_task_ident 0
-rtems_task_start 0
-rtems_task_restart 0
-rtems_task_delete 0
-rtems_task_suspend 0
-rtems_task_resume 0
-rtems_task_set_priority 0
-rtems_task_mode 0
-rtems_task_get_note 0
-rtems_task_set_note 0
-rtems_task_wake_when 1
-rtems_task_wake_after 0
-rtems_interrupt_catch 0
-rtems_clock_get 1
-rtems_clock_set 1
-rtems_clock_tick 0
-rtems_timer_create 0
-rtems_timer_delete 0
-rtems_timer_ident 0
-rtems_timer_fire_after 1
-rtems_timer_fire_when 1
-rtems_timer_reset 0
-rtems_timer_cancel 0
-rtems_semaphore_create 0
-rtems_semaphore_delete 0
-rtems_semaphore_ident 0
-rtems_semaphore_obtain 0
-rtems_semaphore_release 0
-rtems_message_queue_create 0
-rtems_message_queue_ident 0
-rtems_message_queue_delete 0
-rtems_message_queue_send 0
-rtems_message_queue_urgent 0
-rtems_message_queue_broadcast 0
-rtems_message_queue_receive 0
-rtems_message_queue_flush 0
-rtems_event_send 0
-rtems_event_receive 0
-rtems_signal_catch 0
-rtems_signal_send 0
-rtems_partition_create 0
-rtems_partition_ident 0
-rtems_partition_delete 0
-rtems_partition_get_buffer 0
-rtems_partition_return_buffer 0
-rtems_region_create 0
-rtems_region_ident 0
-rtems_region_delete 0
-rtems_region_get_segment 0
-rtems_region_return_segment 0
-rtems_port_create 0
-rtems_port_ident 0
-rtems_port_delete 0
-rtems_port_external_to_internal 0
-rtems_port_internal_to_external 0
-rtems_io_initialize 0
-rtems_io_open 0
-rtems_io_close 0
-rtems_io_read 0
-rtems_io_write 0
-rtems_io_control 0
-rtems_fatal_error_occurred 0
-rtems_rate_monotonic_create 0
-rtems_rate_monotonic_ident 0
-rtems_rate_monotonic_delete 0
-rtems_rate_monotonic_cancel 0
-rtems_rate_monotonic_period 0
-rtems_multiprocessing_announce 0
-*** END OF TIME OVERHEAD ***

c/src/lib/libbsp/m68k/uC5282/TIMES

@@ -0,0 +1,322 @@
+#
+#  $Id$
+#
+
+TIMING TESTS  2005-01-28
+========================
+
+*** TIME TEST 1 ***
+rtems_semaphore_create 19
+rtems_semaphore_delete 21
+rtems_semaphore_obtain: available 4
+rtems_semaphore_obtain: not available -- NO_WAIT 5
+rtems_semaphore_release: no waiting tasks 12
+*** END OF TEST 1 ***
+
+*** TIME TEST 2 ***
+rtems_semaphore_obtain: not available -- caller blocks 34
+*** END OF TEST 2 ***
+
+*** TIME TEST 3 ***
+rtems_semaphore_release: task readied -- preempts caller 27
+*** END OF TEST 3 ***
+
+*** TIME TEST 4 ***
+rtems_task_restart: blocked task -- preempts caller 54
+rtems_task_restart: ready task -- preempts caller 52
+rtems_semaphore_release: task readied -- returns to caller 18
+rtems_task_create 87
+rtems_task_start 24
+rtems_task_restart: suspended task -- returns to caller 27
+rtems_task_delete: suspended task 66
+rtems_task_restart: ready task -- returns to caller 28
+rtems_task_restart: blocked task -- returns to caller 38
+rtems_task_delete: blocked task 69
+*** END OF TEST 4 ***
+
+*** TIME TEST 5 ***
+rtems_task_suspend: calling task 23
+rtems_task_resume: task readied -- preempts caller 22
+*** END OF TEST 5 ***
+
+*** TIME TEST 6 ***
+rtems_task_restart: calling task 30
+rtems_task_suspend: returns to caller 9
+rtems_task_resume: task readied -- returns to caller 12
+rtems_task_delete: ready task 69
+*** END OF TEST 6 ***
+
+*** TIME TEST 7 ***
+rtems_task_restart: suspended task -- preempts caller 44
+*** END OF TEST 7 ***
+
+*** TIME TEST 8 ***
+rtems_task_set_priority: obtain current priority 6
+rtems_task_set_priority: returns to caller 17
+rtems_task_mode: obtain current mode 3
+rtems_task_mode: no reschedule 3
+rtems_task_mode: reschedule -- returns to caller 8
+rtems_task_mode: reschedule -- preempts caller 22
+rtems_task_set_note 6
+rtems_task_get_note 6
+rtems_clock_set 22
+rtems_clock_get 1
+*** END OF TEST 8 ***
+
+*** TIME TEST 9 ***
+rtems_message_queue_create 55
+rtems_message_queue_send: no waiting tasks 20
+rtems_message_queue_urgent: no waiting tasks 21
+rtems_message_queue_receive: available 20
+rtems_message_queue_flush: no messages flushed 8
+rtems_message_queue_flush: messages flushed 12
+rtems_message_queue_delete 29
+*** END OF TEST 9 ***
+
+*** TIME TEST 10 ***
+rtems_message_queue_receive: not available -- NO_WAIT 10
+rtems_message_queue_receive: not available -- caller blocks 38
+*** END OF TEST 10 ***
+
+*** TIME TEST 11 ***
+rtems_message_queue_send: task readied -- preempts caller 37
+*** END OF TEST 11 ***
+
+*** TIME TEST 12 ***
+rtems_message_queue_send: task readied -- returns to caller 23
+*** END OF TEST 12 ***
+
+*** TIME TEST 13 ***
+rtems_message_queue_urgent: task readied -- preempts caller 35
+*** END OF TEST 13 ***
+
+*** TIME TEST 14 ***
+rtems_message_queue_urgent: task readied -- returns to caller 24
+*** END OF TEST 14 ***
+
+*** TIME TEST 15 ***
+rtems_event_receive: obtain current events 0
+rtems_event_receive: not available -- NO_WAIT 5
+rtems_event_receive: not available -- caller blocks 28
+rtems_event_send: no task readied 5
+rtems_event_receive: available 9
+rtems_event_send: task readied -- returns to caller 16
+*** END OF TEST 15 ***
+
+*** TIME TEST 16 ***
+rtems_event_send: task readied -- preempts caller 27
+*** END OF TEST 16 ***
+
+*** TIME TEST 17 ***
+rtems_task_set_priority: preempts caller 39
+*** END OF TEST 17 ***
+
+*** TIME TEST 18 ***
+rtems_task_delete: calling task 83
+*** END OF TEST 18 ***
+
+*** TIME TEST 19 ***
+rtems_signal_catch 5
+rtems_signal_send: returns to caller 12
+rtems_signal_send: signal to self 20
+exit ASR overhead: returns to calling task 15
+exit ASR overhead: returns to preempting task 18
+*** END OF TEST 19 ***
+
+*** TIME TEST 20 ***
+rtems_partition_create 20
+rtems_region_create 40
+rtems_partition_get_buffer: available 11
+rtems_partition_get_buffer: not available 7
+rtems_partition_return_buffer 12
+rtems_partition_delete 11
+rtems_region_get_segment: available 28
+rtems_region_get_segment: not available -- NO_WAIT 29
+rtems_region_return_segment: no waiting tasks 29
+rtems_region_get_segment: not available -- caller blocks 55
+rtems_region_return_segment: task readied -- preempts caller 72
+rtems_region_return_segment: task readied -- returns to caller 58
+rtems_region_delete 25
+rtems_io_initialize 1
+rtems_io_open 1
+rtems_io_close 1
+rtems_io_read 1
+rtems_io_write 1
+rtems_io_control 1
+*** END OF TEST 20 ***
+
+*** TIME TEST 21 ***
+rtems_task_ident 60
+rtems_message_queue_ident 60
+rtems_semaphore_ident 69
+rtems_partition_ident 59
+rtems_region_ident 60
+rtems_port_ident 59
+rtems_timer_ident 61
+rtems_rate_monotonic_ident 60
+*** END OF TEST 21 ***
+
+*** TIME TEST 22 ***
+rtems_message_queue_broadcast: task readied -- returns to caller 32
+rtems_message_queue_broadcast: no waiting tasks 14
+rtems_message_queue_broadcast: task readied -- preempts caller 39
+*** END OF TEST 22 ***
+
+*** TIME TEST 23 ***
+rtems_timer_create 8
+rtems_timer_fire_after: inactive 12
+rtems_timer_fire_after: active 12
+rtems_timer_cancel: active 9
+rtems_timer_cancel: inactive 8
+rtems_timer_reset: inactive 14
+rtems_timer_reset: active 15
+rtems_timer_fire_when: inactive 21
+rtems_timer_fire_when: active 21
+rtems_timer_delete: active 12
+rtems_timer_delete: inactive 11
+rtems_task_wake_when 35
+*** END OF TEST 23 ***
+
+*** TIME TEST 24 ***
+rtems_task_wake_after: yield -- returns to caller 3
+rtems_task_wake_after: yields -- preempts caller 18
+*** END OF TEST 24 ***
+
+*** TIME TEST 25 ***
+rtems_clock_tick 7
+*** END OF TEST 25 ***
+
+*** TIME TEST 26 ***
+_ISR_Disable 1
+_ISR_Flash 0
+_ISR_Enable 0
+_Thread_Disable_dispatch 1
+_Thread_Enable_dispatch 3
+_Thread_Set_state 7
+_Thread_Disptach (NO FP) 16
+context switch: no floating point contexts 12
+context switch: self 2
+context switch: to another task 1
+fp context switch: restore 1st FP task 14
+fp context switch: save idle, restore initialized 3
+fp context switch: save idle, restore idle 13
+fp context switch: save initialized, restore initialized 2
+_Thread_Resume 7
+_Thread_Unblock 6
+_Thread_Ready 5
+_Thread_Get 1
+_Semaphore_Get 1
+_Thread_Get: invalid id 0
+*** END OF TEST 26 ***
+
+*** TIME TEST 27 ***
+interrupt entry overhead: returns to interrupted task 3
+interrupt exit overhead: returns to interrupted task 3
+interrupt entry overhead: returns to nested interrupt 2
+interrupt exit overhead: returns to nested interrupt 2
+interrupt entry overhead: returns to preempting task 4
+interrupt exit overhead: returns to preempting task 20
+*** END OF TEST 27 ***
+
+*** TIME TEST 28 ***
+rtems_port_create 12
+rtems_port_external_to_internal 5
+rtems_port_internal_to_external 6
+rtems_port_delete 12
+*** END OF TEST 28 ***
+
+*** TIME TEST 29 ***
+rtems_rate_monotonic_create 13
+rtems_rate_monotonic_period: initiate period -- returns to caller 20
+rtems_rate_monotonic_period: obtain status 10
+rtems_rate_monotonic_cancel 13
+rtems_rate_monotonic_delete: inactive 17
+rtems_rate_monotonic_delete: active 16
+rtems_rate_monotonic_period: conclude periods -- caller blocks 24
+*** END OF TEST 29 ***
+
+*** TIME CHECKER ***
+Units may not be in microseconds for this test!!!
+0 100000
+Total time = 0
+Average time = 0
+NULL timer stopped at 0
+LOOP (1000) timer stopped at 188
+LOOP (10000) timer stopped at 1875
+LOOP (50000) timer stopped at 9375
+LOOP (100000) timer stopped at 18750
+*** END OF TIME CHECKER ***
+
+*** TIME TEST OVERHEAD ***
+rtems_initialize_executive 0
+rtems_shutdown_executive 0
+rtems_task_create 0
+rtems_task_ident 0
+rtems_task_start 0
+rtems_task_restart 0
+rtems_task_delete 0
+rtems_task_suspend 0
+rtems_task_resume 0
+rtems_task_set_priority 0
+rtems_task_mode 0
+rtems_task_get_note 0
+rtems_task_set_note 0
+rtems_task_wake_when 1
+rtems_task_wake_after 0
+rtems_interrupt_catch 0
+rtems_clock_get 1
+rtems_clock_set 1
+rtems_clock_tick 0
+rtems_timer_create 0
+rtems_timer_delete 0
+rtems_timer_ident 0
+rtems_timer_fire_after 1
+rtems_timer_fire_when 1
+rtems_timer_reset 0
+rtems_timer_cancel 0
+rtems_semaphore_create 0
+rtems_semaphore_delete 0
+rtems_semaphore_ident 0
+rtems_semaphore_obtain 0
+rtems_semaphore_release 0
+rtems_message_queue_create 0
+rtems_message_queue_ident 0
+rtems_message_queue_delete 0
+rtems_message_queue_send 0
+rtems_message_queue_urgent 0
+rtems_message_queue_broadcast 0
+rtems_message_queue_receive 0
+rtems_message_queue_flush 0
+rtems_event_send 0
+rtems_event_receive 0
+rtems_signal_catch 0
+rtems_signal_send 0
+rtems_partition_create 0
+rtems_partition_ident 0
+rtems_partition_delete 0
+rtems_partition_get_buffer 0
+rtems_partition_return_buffer 0
+rtems_region_create 0
+rtems_region_ident 0
+rtems_region_delete 0
+rtems_region_get_segment 0
+rtems_region_return_segment 0
+rtems_port_create 0
+rtems_port_ident 0
+rtems_port_delete 0
+rtems_port_external_to_internal 0
+rtems_port_internal_to_external 0
+rtems_io_initialize 0
+rtems_io_open 0
+rtems_io_close 0
+rtems_io_read 0
+rtems_io_write 0
+rtems_io_control 0
+rtems_fatal_error_occurred 0
+rtems_rate_monotonic_create 0
+rtems_rate_monotonic_ident 0
+rtems_rate_monotonic_delete 0
+rtems_rate_monotonic_cancel 0
+rtems_rate_monotonic_period 0
+rtems_multiprocessing_announce 0
+*** END OF TIME OVERHEAD ***

c/src/lib/libbsp/m68k/uC5282/clock/clock.c

@@ -26,19 +26,19 @@
  * CPU load counters
  * Place in static RAM so updates don't hit the SDRAM
  */
-extern int __SRAMBASE[];
-#define IDLE_COUNTER      __SRAMBASE[0]
-#define FILTERED_IDLE     __SRAMBASE[1]
-#define MAX_IDLE_COUNT    __SRAMBASE[2]
-#define USEC_PER_TICK     __SRAMBASE[3]
+#define IDLE_COUNTER    __SRAMBASE.idle_counter
+#define FILTERED_IDLE   __SRAMBASE.filtered_idle
+#define MAX_IDLE_COUNT  __SRAMBASE.max_idle_count
+#define PITC_PER_TICK   __SRAMBASE.pitc_per_tick
+#define NSEC_PER_PITC   __SRAMBASE.nsec_per_pitc
 #define FILTER_SHIFT    6
 
 uint32_t bsp_clock_nanoseconds_since_last_tick(void)
 {
     int i = MCF5282_PIT3_PCNTR;
     if (MCF5282_PIT3_PCSR & MCF5282_PIT_PCSR_PIF)
-        i = MCF5282_PIT3_PCNTR - USEC_PER_TICK;
-    return (USEC_PER_TICK - i) * 1000;
+        i = MCF5282_PIT3_PCNTR - PITC_PER_TICK;
+    return (PITC_PER_TICK - i) * NSEC_PER_PITC;
 }
 
 #define Clock_driver_nanoseconds_since_last_tick bsp_clock_nanoseconds_since_last_tick
@@ -48,7 +48,7 @@ uint32_t bsp_clock_nanoseconds_since_last_tick(void)
  */
 #define Clock_driver_support_at_tick()                                       \
     do {                                                                     \
-        int idle = IDLE_COUNTER;                                             \
+        unsigned idle = IDLE_COUNTER;                                        \
         IDLE_COUNTER = 0;                                                    \
         if (idle > MAX_IDLE_COUNT)                                           \
             MAX_IDLE_COUNT = idle;                                           \
@@ -75,20 +75,31 @@ uint32_t bsp_clock_nanoseconds_since_last_tick(void)
 /*
  * Set up the clock hardware
  *
- * Prescale so that it counts in microseconds
- * System clock frequency better be 2**n (1<=n<=16) MHz!
+ * f_pit = f_clk / 2^(preScaleCode+1) / N  = 1/(us_per_tick/us_per_s)
+ *
+ * N = f_clk / 2^(preScaleCode+1) * us_per_tick / us_per_s
+ *
+ * ns_per_pit_clk = ns_per_s / (f_clk / 2^(preScaleCode+1))
+ *                = ns_per_s * 2^(preScaleCode+1) / f_clk;
  */
 #define Clock_driver_support_initialize_hardware()                       \
     do {                                                                 \
+		unsigned long long N;                                            \
         int level;                                                       \
-        int preScaleCode = -2;                                           \
-        int preScaleDivisor = bsp_get_CPU_clock_speed() / 1000000;       \
-        while (preScaleDivisor) {                                        \
-            preScaleDivisor >>= 1;                                       \
-            preScaleCode++;                                              \
-        }                                                                \
-        IDLE_COUNTER = 0;                                                \
-        FILTERED_IDLE = 0;                                               \
+        int preScaleCode = 0;                                            \
+		N  = bsp_get_CPU_clock_speed();                                  \
+		N *= rtems_configuration_get_microseconds_per_tick();            \
+		N /= 2*1000000; /* min_prescale * us_per_s */                    \
+		while ( N > 0x10000 ) {                                          \
+			preScaleCode++;                                              \
+			N >>= 1;                                                     \
+		}                                                                \
+		PITC_PER_TICK  = N;                                              \
+		N  = 2000000000ULL << preScaleCode;                              \
+		N /= bsp_get_CPU_clock_speed();                                  \
+		NSEC_PER_PITC  = N;                                              \
+        IDLE_COUNTER   = 0;                                              \
+        FILTERED_IDLE  = 0;                                              \
         MAX_IDLE_COUNT = 0;                                              \
         bsp_allocate_interrupt(PIT3_IRQ_LEVEL, PIT3_IRQ_PRIORITY);       \
         MCF5282_INTC0_ICR58 = MCF5282_INTC_ICR_IL(PIT3_IRQ_LEVEL) |      \
@@ -101,8 +112,7 @@ uint32_t bsp_clock_nanoseconds_since_last_tick(void)
                             MCF5282_PIT_PCSR_OVW |                       \
                             MCF5282_PIT_PCSR_PIE |                       \
                             MCF5282_PIT_PCSR_RLD;                        \
-        USEC_PER_TICK = rtems_configuration_get_microseconds_per_tick(); \
-        MCF5282_PIT3_PMR = USEC_PER_TICK - 1;                            \
+        MCF5282_PIT3_PMR = PITC_PER_TICK - 1;                            \
         MCF5282_PIT3_PCSR = MCF5282_PIT_PCSR_PRE(preScaleCode) |         \
                             MCF5282_PIT_PCSR_PIE |                       \
                             MCF5282_PIT_PCSR_RLD |                       \
@@ -115,7 +125,7 @@ uint32_t bsp_clock_nanoseconds_since_last_tick(void)
 Thread bsp_idle_thread(uint32_t ignored)
 {
     for(;;)
-        asm volatile ("addq.l #1,__SRAMBASE"); /* Atomic increment */
+        asm volatile ("addq.l #1,%0"::"m"(IDLE_COUNTER)); /* Atomic increment */
 }
 
 int rtems_bsp_cpu_load_percentage(void)

c/src/lib/libbsp/m68k/uC5282/include/bsp.h

@@ -134,6 +134,31 @@ int BSP_vme2local_adrs(unsigned am, unsigned long vmeaddr, unsigned long *plocal
 void *bsp_idle_thread( uintptr_t ignored );
 #define BSP_IDLE_TASK_BODY bsp_idle_thread
 
+/*
+ * SRAM. The BSP uses SRAM for maintaining some clock-driver data
+ *       and for ethernet descriptors (and the initial stack during
+ *       early boot).
+ */
+
+typedef struct mcf5282BufferDescriptor_ {
+    volatile uint16_t   status;
+    uint16_t			length;
+    volatile void      *buffer;
+} mcf5282BufferDescriptor_t;
+
+extern struct {
+	uint32_t                  idle_counter;
+	uint32_t                  filtered_idle;
+	uint32_t                  max_idle_count;
+	uint32_t                  pitc_per_tick;
+	uint32_t                  nsec_per_pitc;
+	uint32_t                  pad[3]; /* align to 16-bytes for descriptors */
+	mcf5282BufferDescriptor_t fec_descriptors[];
+	/* buffer descriptors are allocated from here */
+
+    /* initial stack is at top of SRAM (start.S)  */
+} __SRAMBASE;
+
 #ifdef __cplusplus
 }
 #endif

c/src/lib/libbsp/m68k/uC5282/network/network.c

@@ -81,12 +81,6 @@
     #error "Driver must have MCLBYTES > RBUF_SIZE"
 #endif
 
-typedef struct mcf5282BufferDescriptor_ {
-    volatile uint16_t   status;
-    uint16_t			length;
-    volatile void      *buffer;
-} mcf5282BufferDescriptor_t;
-
 /*
  * Per-device data
  */
@@ -197,11 +191,10 @@ mcf5282_mii_interrupt_handler( rtems_vector_number v )
  * Ensure 128-bit (16-byte) alignment
  * Allow some space at the beginning for other diagnostic counters
  */
-extern char __SRAMBASE[];
 static mcf5282BufferDescriptor_t *
 mcf5282_bd_allocate(unsigned int count)
 {
-    static mcf5282BufferDescriptor_t *bdp = (mcf5282BufferDescriptor_t *)(__SRAMBASE+16);
+    static mcf5282BufferDescriptor_t *bdp = __SRAMBASE.fec_descriptors;
     mcf5282BufferDescriptor_t *p = bdp;
 
     bdp += count;

c/src/lib/libbsp/m68k/uC5282/startup/bspstart.c

@@ -22,6 +22,7 @@
 #include <rtems/error.h>
 #include <errno.h>
 #include <stdio.h>
+#include <mcf5282/mcf5282.h>
 
 /*
  * Location of 'VME' access
@@ -34,7 +35,11 @@
  */
 extern char RamSize[];
 extern char RamBase[];
+extern char _CPUClockSpeed[];
+extern char _PLLRefClockSpeed[];
 
+uint32_t BSP_sys_clk_speed = (uint32_t)_CPUClockSpeed;
+uint32_t BSP_pll_ref_clock = (uint32_t)_PLLRefClockSpeed;
 /*
  * CPU-space access
  * The NOP after writing the CACR is there to address the following issue as
@@ -236,7 +241,17 @@ static void handler(int pc)
  */
 void bsp_start( void )
 {
-  int i;
+  int   i;
+  const char *clk_speed_str;
+  uint32_t clk_speed, mfd, rfd;
+  uint8_t  byte;
+
+  /*
+   * Make sure UART TX is running - necessary for
+   * early printk to work. The firmware monitor
+   * usually enables this anyways but qemu doesn't!
+   */
+  MCF5282_UART_UCR(CONSOLE_PORT) = MCF5282_UART_UCR_TX_ENABLED;
 
   /*
    * Set up default exception handler
@@ -299,13 +314,76 @@ void bsp_start( void )
                      MCF5282_CS_CSMR_V;
   MCF5282_CS2_CSCR = MCF5282_CS_CSCR_PS_16;
   MCF5282_GPIO_PJPAR |= 0x06;
-}
 
-extern char _CPUClockSpeed[];
+  /*
+   * Hopefully, the UART clock is still correctly set up
+   * so they can see the printk() output...
+   */
+  clk_speed = 0;
+  printk("Trying to figure out the system clock\n");
+  printk("Checking ENV variable SYS_CLOCK_SPEED:\n");
+  if ( (clk_speed_str = bsp_getbenv("SYS_CLOCK_SPEED")) ) {
+    printk("Found: %s\n", clk_speed_str);
+	for ( clk_speed = 0, i=0;
+	      clk_speed_str[i] >= '0' && clk_speed_str[i] <= '9';
+	      i++ ) {
+		clk_speed = 10*clk_speed + clk_speed_str[i] - '0';
+	}
+	if ( 0 != clk_speed_str[i] ) {
+		printk("Not a decimal number; I'm not using this setting\n");
+		clk_speed = 0;
+	}
+  } else {
+    printk("Not set.\n");
+  }
+
+  if ( 0 == clk_speed )
+	clk_speed = BSP_sys_clk_speed;
+
+  if ( 0 == clk_speed ) {
+	printk("Using some heuristics to determine clock speed...\n");
+	byte = MCF5282_CLOCK_SYNSR;
+	if ( 0 == byte ) {
+		printk("SYNSR == 0; assuming QEMU at 66MHz\n");
+		BSP_pll_ref_clock = 8250000;
+		mfd = ( 0 << 8 ) | ( 2 << 12 );
+	} else {
+		if ( 0xf8 != byte ) {
+			printk("FATAL ERROR: Unexpected SYNSR contents (0x%02x), can't proceed\n", byte);
+			bsp_sysReset(0);
+		}
+		mfd = MCF5282_CLOCK_SYNCR;
+	}
+	printk("Assuming %uHz PLL ref. clock\n", BSP_pll_ref_clock);
+	rfd = (mfd >>  8) & 7;
+	mfd = (mfd >> 12) & 7;
+	/* Check against 'known' cases */
+	if ( 0 != rfd || (2 != mfd && 3 != mfd) ) {
+	  printk("WARNING: Pll divisor/multiplier has unknown value; \n");
+	  printk("         either your board is not 64MHz or 80Mhz or\n");
+	  printk("         it uses a PLL reference other than 8MHz.\n");
+	  printk("         I'll proceed anyways but you might have to\n");
+	  printk("         reset the board and set uCbootloader ENV\n");
+	  printk("         variable \"SYS_CLOCK_SPEED\".\n");
+	}
+	mfd = 2 * (mfd + 2);
+	/* sysclk = pll_ref * 2 * (MFD + 2) / 2^(rfd) */
+	printk("PLL multiplier: %u, output divisor: %u\n", mfd, rfd);
+	clk_speed = (BSP_pll_ref_clock * mfd) >> rfd;
+  }
+
+  if ( 0 == clk_speed ) {
+	printk("FATAL ERROR: Unable to determine system clock speed\n");
+	bsp_sysReset(0);
+  } else {
+  	BSP_sys_clk_speed = clk_speed;
+	printk("System clock speed: %uHz\n", bsp_get_CPU_clock_speed());
+  }
+}
 
 uint32_t bsp_get_CPU_clock_speed(void)
 {
-  return( (uint32_t)_CPUClockSpeed);
+  return( BSP_sys_clk_speed );
 }
 
 /*

c/src/lib/libbsp/m68k/uC5282/startup/linkcmds

@@ -30,8 +30,17 @@ _DownloadLocation = 0x40000;
 
 /*
  * System clock speed
+ *
+ * If autodetection of the system clock pased on the PLL ref. clock
+ * (AFAIK 8MHz for both 64MHz and 80MHz boards) doesn't work then
+ * you can:
+ *   - define (nonzero) system clock speed from app- linkflags (or here)
+ *   - use a uCbootloader env. var: SYS_CLOCK_SPEED to define it.
+ * You can also redefine the PLL reference clock speed from linkflags
+ * or here...
  */
-_CPUClockSpeed = DEFINED(_CPUClockSpeed) ? _CPUClockSpeed : 64000000 ;
+_CPUClockSpeed    = DEFINED(_CPUClockSpeed)    ? _CPUClockSpeed : 0 ;
+_PLLRefClockSpeed = DEFINED(_PLLRefClockSpeed) ? _PLLRefClockSpeed : 8000000;
 
 /*
  * Location of on-chip devices

c/src/lib/libbsp/powerpc/ChangeLog

@@ -1,3 +1,31 @@
+2011-07-20	Till Straumann <strauman@slac.stanford.edu>
+
+	PR 1837/bsps
+	* shared/motorola/motorola.c, shared/motorola/motorola.h: Add MVME2400
+	board with 750 CPU to list of supported Motorola boards.
+
+2011-05-17  Till Straumann <strauman@slac.stanford.edu>
+
+	PR1797/bsps
+	* shared/startup/sbrk.c: Cleanup; changed default
+	BSP_sbrk_policy to yield all memory to the heap.
+	App must specify a different policy if desired.
+
+2011-05-13  Gedare Bloom <gedare@gwmail.gwu.edu>
+
+	PR1797/bsps
+	* shared/startup/sbrk.c : Renamed bsp_sbrk_init().
+	
+2011-05-07  Kate Feng <feng@bnl.gov>
+
+	PR1797/bsps
+	* shared/startup/bspgetworkarea.c: Removed _bsp_sbrk_init().
+	* shared/startup/pretaskinghook.c: Removed rtems/malloc.h.
+
+2011-03-04	Joel Sherrill <joel.sherrilL@OARcorp.com>
+
+	* shared/start/start.S: Remove conflict markers in comment.
+
 2011-02-02	Ralf Corsépius <ralf.corsepius@rtems.org>
 
 	* configure.ac: Require autoconf-2.68, automake-1.11.1.

c/src/lib/libbsp/powerpc/beatnik/ChangeLog

@@ -1,3 +1,13 @@
+2011-05-17	Till Straumann <strauman@slac.stanford.edu>
+
+	PR1797/bsps
+	* configure.ac, include/bsp.h: Made
+	CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK a bspopts.h setting.
+
+2011-05-16	Till Straumann <strauman@slac.stanford.edu>
+
+	* include/bsp.h: define CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK
+
 2011-02-02	Ralf Corsépius <ralf.corsepius@rtems.org>
 
 	* configure.ac: Require autoconf-2.68, automake-1.11.1.

c/src/lib/libbsp/powerpc/beatnik/configure.ac

@@ -32,6 +32,16 @@ RTEMS_BSPOPTS_HELP([PPC_USE_DATA_CACHE],
  of PowerPC 603e revisions and emulator versions.
  The BSP actually contains the call that enables this.])
 
+RTEMS_BSPOPTS_SET([CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK], [*], [1])
+RTEMS_BSPOPTS_HELP([CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK],
+[If defined then the BSP may reduce the available memory size
+initially. This can be useful for debugging (reduce the core
+size) or dynamic loading (std gcc text offsets/jumps are < +/-32M).
+Note that the policy can still be defined by the application
+(see sbrk.c, BSP_sbrk_policy). By undefining
+CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK this feature is removed
+and a little memory is saved.])
+
 # Explicitly list all Makefiles here
 AC_CONFIG_FILES([Makefile])
 

c/src/lib/libbsp/powerpc/ep1a/ChangeLog

@@ -1,3 +1,15 @@
+2011-05-17	Till Straumann <strauman@slac.stanford.edu>
+
+	PR1797/bsps
+	* configure.ac: Made CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK
+	a bspopts.h setting.
+
+2011-03-04	Joel Sherrill <joel.sherrilL@OARcorp.com>
+
+	PR 1751/bsps
+	* start/start.S: Fix typo which was not caught by binutils prior to a
+	recent bug fix.
+
 2011-02-02	Ralf Corsépius <ralf.corsepius@rtems.org>
 
 	* configure.ac: Require autoconf-2.68, automake-1.11.1.

c/src/lib/libbsp/powerpc/ep1a/configure.ac

@@ -33,6 +33,16 @@ RTEMS_BSPOPTS_SET([CONSOLE_USE_INTERRUPTS],[*],[0])
 RTEMS_BSPOPTS_HELP([CONSOLE_USE_INTERRUPTS],
 [whether using console interrupts])
 
+RTEMS_BSPOPTS_SET([CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK], [*], [1])
+RTEMS_BSPOPTS_HELP([CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK],
+[If defined then the BSP may reduce the available memory size
+initially. This can be useful for debugging (reduce the core
+size) or dynamic loading (std gcc text offsets/jumps are < +/-32M).
+Note that the policy can still be defined by the application
+(see sbrk.c, BSP_sbrk_policy). By undefining
+CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK this feature is removed
+and a little memory is saved.])
+
 RTEMS_CHECK_NETWORKING
 AM_CONDITIONAL(HAS_NETWORKING,test "$HAS_NETWORKING" = "yes")
 

c/src/lib/libbsp/powerpc/ep1a/start/start.S

@@ -143,6 +143,6 @@ __rtems_entry_point:
 	mtlr	r3
 	blr
 .Lstart:
-	.size	_start,.Lstart-_start
+	.size	__rtems_entry_point,.Lstart-__rtems_entry_point
 
 	.comm	environ,4,4

c/src/lib/libbsp/powerpc/gen5200/ChangeLog

@@ -1,3 +1,9 @@
+2011-05-06	Sebastian Huber <sebastian.huber@embedded-brains.de>
+
+	* include/bsp.h: Moved NEED_LOW_LEVEL_INIT define because it has to be
+	visible for the assembler.
+	* startup/linkcmds.brs5l: Fixed RAM size.
+
 2011-02-02	Ralf Corsépius <ralf.corsepius@rtems.org>
 
 	* configure.ac: Require autoconf-2.68, automake-1.11.1.

c/src/lib/libbsp/powerpc/gen5200/include/bsp.h

@@ -79,6 +79,11 @@ LINKER_SYMBOL(MBAR);
 #define PM520
 #endif
 
+#if !defined(HAS_UBOOT)
+  /* we need the low level initialization in start.S*/
+  #define NEED_LOW_LEVEL_INIT
+#endif
+
 #if defined(BRS5L)
 /*
  * IMD Custom Board BRS5L
@@ -123,10 +128,6 @@ extern "C" {
 extern bd_t bsp_uboot_board_info;
 #else
 
-/* we need the low level initialization in start.S*/
-#define NEED_LOW_LEVEL_INIT
-
-
 #endif
 
 /*

c/src/lib/libbsp/powerpc/gen5200/startup/linkcmds.brs5l

@@ -5,7 +5,7 @@
  */
 
 MEMORY {
-	RAM : ORIGIN = 0x0, LENGTH = 256M
+	RAM : ORIGIN = 0x0, LENGTH = 128M
 	ROM : ORIGIN = 0xffe00000, LENGTH = 2M
 	DPRAM : ORIGIN = 0xff000000, LENGTH = 1k
 	REGS : ORIGIN = 0xf0000000, LENGTH = 64k

c/src/lib/libbsp/powerpc/motorola_powerpc/ChangeLog

@@ -1,3 +1,9 @@
+2011-05-17	Till Straumann <strauman@slac.stanford.edu>
+
+	PR 1797/bsps
+	* configure.ac, include/bsp.h: Made
+	CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK a bspopts.h setting.
+
 2011-02-02	Ralf Corsépius <ralf.corsepius@rtems.org>
 
 	* configure.ac: Require autoconf-2.68, automake-1.11.1.

c/src/lib/libbsp/powerpc/motorola_powerpc/configure.ac

@@ -31,6 +31,16 @@ RTEMS_BSPOPTS_HELP([PPC_USE_DATA_CACHE],
  of PowerPC 603e revisions and emulator versions.
  The BSP actually contains the call that enables this.])
 
+RTEMS_BSPOPTS_SET([CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK], [*], [1])
+RTEMS_BSPOPTS_HELP([CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK],
+[If defined then the BSP may reduce the available memory size
+initially. This can be useful for debugging (reduce the core
+size) or dynamic loading (std gcc text offsets/jumps are < +/-32M).
+Note that the policy can still be defined by the application
+(see sbrk.c, BSP_sbrk_policy). By undefining
+CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK this feature is removed
+and a little memory is saved.])
+
 RTEMS_BSPOPTS_SET([mvme2100],[mvme2100],[1])
 RTEMS_BSPOPTS_SET([mvme2100],[*],[])
 RTEMS_BSPOPTS_HELP([mvme2100],

c/src/lib/libbsp/powerpc/motorola_powerpc/include/bsp.h

@@ -23,7 +23,6 @@
 /*
  *  confdefs.h overrides for this BSP:
  */
-#define CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK
 
 /*
  * diagram illustrating the role of the configuration

c/src/lib/libbsp/powerpc/mvme3100/ChangeLog

@@ -1,3 +1,9 @@
+2011-05-17	Till Straumann <strauman@slac.stanford.edu>
+
+	PR1797/bsps
+	* configure.ac, include/bsp.h: Made
+	CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK a bspopts.h setting.
+
 2011-02-02	Ralf Corsépius <ralf.corsepius@rtems.org>
 
 	* configure.ac: Require autoconf-2.68, automake-1.11.1.

c/src/lib/libbsp/powerpc/mvme3100/configure.ac

@@ -35,6 +35,16 @@ RTEMS_BSPOPTS_HELP([PPC_USE_DATA_CACHE],
  of PowerPC 603e revisions and emulator versions.
  The BSP actually contains the call that enables this.])
 
+RTEMS_BSPOPTS_SET([CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK], [*], [1])
+RTEMS_BSPOPTS_HELP([CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK],
+[If defined then the BSP may reduce the available memory size
+initially. This can be useful for debugging (reduce the core
+size) or dynamic loading (std gcc text offsets/jumps are < +/-32M).
+Note that the policy can still be defined by the application
+(see sbrk.c, BSP_sbrk_policy). By undefining
+CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK this feature is removed
+and a little memory is saved.])
+
 RTEMS_BSP_CLEANUP_OPTIONS(0, 1)
 
 # Explicitly list all Makefiles here

c/src/lib/libbsp/powerpc/mvme3100/include/bsp.h

@@ -25,7 +25,6 @@
 /*
  *  confdefs.h overrides for this BSP:
  */
-#define CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK
 
 #define BSP_INTERRUPT_STACK_SIZE          (16 * 1024)
 

c/src/lib/libbsp/powerpc/mvme5500/ChangeLog

@@ -1,3 +1,22 @@
+2011-04-10      Kate Feng <feng@bnl.gov>
+
+	PR 1786/bsps
+	* Makefile.am: Add support for Altivec.
+	* startup/bspstart.c, Makefile.am: Use shared/startup/zerobss.c instead.
+	* make/custom/mvme5500.cfg: Change CPU_CFLAGS to
+	"-mcpu=7450 -mtune=7450 -Dmpc7455"
+	* irq/BSP_irq.c, pci/detect_host_bridge.c, pci.c, pcifinddevice.c:
+	Remove warnings.
+	* vme/VMEConfig.h, include/bsp.h: use VME shared IRQ handlers.
+	* network/if_100MHz/GT64260eth.c: Recycle the Rx mbuf if there
+	is any Rx error.
+
+2011-05-17	Till Straumann <strauman@slac.stanford.edu>
+
+	PR1797/bsps
+	* configure.ac, include/bsp.h: Made
+	CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK a bspopts.h setting.
+
 2011-02-02	Ralf Corsépius <ralf.corsepius@rtems.org>
 
 	* configure.ac: Require autoconf-2.68, automake-1.11.1.
@@ -80,6 +99,7 @@
 	* irq/irq.c, network/if_1GHz/POSSIBLEBUG: Removed.
 
 2009-05-08 	Kate Feng <feng1@bnl.gov>
+
 	* include/bsp.h, start/start.S, startup/bspstart.c: 
 	added CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK in bsp.h.
 	removed BSP_INIT_STACK_SIZE in bsp.h -- it uses __stack defined
@@ -289,7 +309,8 @@
 
 2007-09-14	Joel Sherrill <joel.sherrill@OARcorp.com>
 
-	* network/GT64260eth.c, network/GT64260eth.h, network/GT64260ethreg.h: Removed.
+	* network/GT64260eth.c, network/GT64260eth.h,
+	network/GT64260ethreg.h: Removed.
 
 2007-09-14	Joel Sherrill <joel.sherrill@OARcorp.com>
 
@@ -476,25 +497,26 @@
 
 2005-05-17      Jennifer Averett <jennifer.averett@oarcorp.com>
 
-        * irq/GT64260Int.c, irq/irq.c, irq/irq.h: Modified to use rtems/irq.h.
+	* irq/GT64260Int.c, irq/irq.c, irq/irq.h: Modified to use rtems/irq.h.
 
 2005-05-12      Jennifer Averett <jennifer.averett@oarcorp.com>
 
-        * README.VME, include/bsp.h, irq/irq.h, network/GT64260eth.c,
-        pci/detect_host_bridge.c, pci/gtpcireg.h, pci/pci.c, pci/pci.h,
-        pci/pci_interface.c, pci/pcifinddevice.c: 
-        Submitted by Kate Feng <feng1@bnl.gov> as RTEMS-MVME5500 BSP v1.1 release.
-        Modifications made to merge this release with the current tree.
+	* README.VME, include/bsp.h, irq/irq.h, network/GT64260eth.c,
+	pci/detect_host_bridge.c, pci/gtpcireg.h, pci/pci.c, pci/pci.h,
+	pci/pci_interface.c, pci/pcifinddevice.c: 
+	Submitted by Kate Feng <feng1@bnl.gov> as RTEMS-MVME5500 BSP v1.1
+	release.  Modifications made to merge this release with the
+	current tree.
 
 2005-05-10      Jennifer Averett <jennifer.averett@oarcorp.com>
 
-        * network/GT64260eth.c: Fixed warning. 
-        *  pci/pci.c, pci/pci.h: Modified to depend upon rtems/pci.h
+	* network/GT64260eth.c: Fixed warning. 
+	*  pci/pci.c, pci/pci.h: Modified to depend upon rtems/pci.h
 
 2005-05-04      Jennifer Averett <jennifer.averett@oarcorp.com>
 
-        * pci/pci.c, pci/pci.h, startup/bspstart.c: Name change to support
-        common PCI interface
+	* pci/pci.c, pci/pci.h, startup/bspstart.c: Name change to support
+	common PCI interface
 
 2005-04-15	Joel Sherrill <joel@OARcorp.com>
 
@@ -504,13 +526,13 @@
 
 2005-04-15      Jennifer Averett <jennifer.averett@oarcorp.com>
 
-        PR 779/bsp
-        * irq/irq.c, irq/irq.h, irq/irq_init.c, network/GT64260eth.c: add
-        parameter to new exception interrupt handlers in powerpc bsps
+	PR 779/bsp
+	* irq/irq.c, irq/irq.h, irq/irq_init.c, network/GT64260eth.c: add
+	parameter to new exception interrupt handlers in powerpc bsps
 
 2005-04-15      Jennifer Averett <jennifer.averett@oarcorp.com>
 
-        * startup/linkcmds: add missing section to link cmds
+	* startup/linkcmds: add missing section to link cmds
 
 2005-03-14	Joel Sherrill <joel@OARcorp.com>
 

c/src/lib/libbsp/powerpc/mvme5500/Makefile.am

@@ -34,6 +34,7 @@ EXTRA_DIST = startup/bootpstuff.c
 libbsp_a_SOURCES += startup/bspstart.c \
     ../../powerpc/shared/startup/pgtbl_setup.c startup/pgtbl_activate.c \
     ../../powerpc/shared/startup/pretaskinghook.c \
+    ../../powerpc/shared/startup/zerobss.c \
     ../../powerpc/shared/startup/bspgetworkarea.c \
     ../../powerpc/shared/startup/sbrk.c ../../shared/bootcard.c \
     ../../shared/bsppredriverhook.c startup/bspclean.c \
@@ -121,7 +122,9 @@ libbsp_a_LIBADD = \
     ../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel \
     ../../../libcpu/@RTEMS_CPU@/@exceptions@/irq_bspsupport.rel \
     ../../../libcpu/@RTEMS_CPU@/mpc6xx/mmu.rel \
-    ../../../libcpu/@RTEMS_CPU@/mpc6xx/timer.rel
+    ../../../libcpu/@RTEMS_CPU@/mpc6xx/timer.rel\
+    ../../../libcpu/@RTEMS_CPU@/mpc6xx/altivec.rel
+
 if HAS_NETWORKING
 libbsp_a_LIBADD += network.rel
 endif

c/src/lib/libbsp/powerpc/mvme5500/bsp_specs

@@ -4,8 +4,7 @@
 
 *startfile:
 %{!qrtems: %(old_startfile)} \
-%{!nostdlib: %{qrtems: ecrti%O%s rtems_crti%O%s crtbegin.o%s \
-  mvme5500start.o%s -e __rtems_entry_point -u __vectors}}
+%{!nostdlib: %{qrtems: ecrti%O%s rtems_crti%O%s crtbegin.o%s -e __rtems_entry_point -u __vectors mvme5500start.o%s}}
 
 *link:
 %{!qrtems: %(old_link)} %{qrtems: -dp -Bstatic}

c/src/lib/libbsp/powerpc/mvme5500/configure.ac

@@ -31,6 +31,16 @@ RTEMS_BSPOPTS_HELP([PPC_USE_DATA_CACHE],
  of PowerPC 603e revisions and emulator versions.
  The BSP actually contains the call that enables this.])
 
+RTEMS_BSPOPTS_SET([CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK], [*], [1])
+RTEMS_BSPOPTS_HELP([CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK],
+[If defined then the BSP may reduce the available memory size
+initially. This can be useful for debugging (reduce the core
+size) or dynamic loading (std gcc text offsets/jumps are < +/-32M).
+Note that the policy can still be defined by the application
+(see sbrk.c, BSP_sbrk_policy). By undefining
+CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK this feature is removed
+and a little memory is saved.])
+
 RTEMS_BSP_CLEANUP_OPTIONS(0, 0)
 
 # Explicitly list all Makefiles here

c/src/lib/libbsp/powerpc/mvme5500/include/bsp.h

@@ -103,11 +103,7 @@ DiscoveryChipVersion BSP_getDiscoveryChipVersion();
 
 /* The glues to Till's vmeUniverse, although the name does not
  * actually reflect the relevant architect of the MVME5500.
- * Till TODO ? :  BSP_PCI_DO_EOI instead ?
- * BSP_EXT_IRQ0 instead of BSP_PCI_IRQ0 ?
- *
  */
-#define BSP_PIC_DO_EOI  inl(0xc34)  /* PCI IACK */
 #define BSP_PCI_IRQ0 BSP_GPP_IRQ_LOWEST_OFFSET
 
 /*
@@ -116,8 +112,6 @@ DiscoveryChipVersion BSP_getDiscoveryChipVersion();
  */
 #define BSP_INTERRUPT_STACK_SIZE  (16 * 1024) /* <skf> 2/09 wants it to be adjustable by BSP */
 
-#define CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK   /* <skf> 4/09 see shared/startup/sbrk.c and rtems/confdefs.h */
-
 /* uart.c uses out_8 instead of outb  */
 #define BSP_UART_IOBASE_COM1	GT64x60_DEV1_BASE + 0x20000
 #define BSP_UART_IOBASE_COM2	GT64x60_DEV1_BASE + 0x21000

c/src/lib/libbsp/powerpc/mvme5500/irq/BSP_irq.c

@@ -381,7 +381,8 @@ int BSP_setup_the_pic(rtems_irq_global_settings* config)
      * bit 10:GPP interrupts as level sensitive(1) or edge sensitive(0).
      * MOTload default is set as level sensitive(1). Set it agin to make sure.
      */
-    out_le32(GT_CommUnitArb_Ctrl, (in_le32(GT_CommUnitArb_Ctrl)| (1<<10)));
+    out_le32((volatile unsigned int *)GT_CommUnitArb_Ctrl,
+	     (in_le32((volatile unsigned int *)GT_CommUnitArb_Ctrl)| (1<<10)));
 
 #if 0
     printk("BSP_irqMask_reg[0] = 0x%x, BSP_irqCause_reg[0] 0x%x\n",

c/src/lib/libbsp/powerpc/mvme5500/make/custom/mvme5500.cfg

@@ -9,12 +9,12 @@ include $(RTEMS_ROOT)/make/custom/default.cfg
 RTEMS_CPU=powerpc
 RTEMS_CPU_MODEL=mpc7455
 
+# This is the actual bsp directory used during the build process.
+RTEMS_BSP_FAMILY=mvme5500
+
 #  This contains the compiler options necessary to select the CPU model
 #  and (hopefully) optimize for it. 
-#  if gcc does not regonize 7450 then change -mcpu=750
-#
-CPU_CFLAGS = -fno-strict-aliasing -mcpu=7450 -Dmpc7455 -mno-altivec -mabi=altivec -mvrsave=no -mmultiple -mstring -mstrict-align
-#T. Straumann; disable sdata=eabi for now until CEXP supports it -meabi -msdata=eabi
+CPU_CFLAGS = -mcpu=7450 -mtune=7450 -Dmpc7455
 
 # optimize flag: typically -O2
 CFLAGS_OPTIMIZE_V = -O2 -g
@@ -23,3 +23,6 @@ define bsp-post-link
 	$(default-bsp-post-link)
 	$(OBJCOPY) -O binary $(basename $@).exe $(basename $@)$(DOWNEXT)
 endef
+
+# 
+START_BASE=mvme5500start

c/src/lib/libbsp/powerpc/mvme5500/network/if_100MHz/GT64260eth.c

@@ -745,21 +745,22 @@ static int GT64260eth_rx(struct GTeth_softc *sc)
         if (cmdsts & RX_STS_SF) sc->stats.frame_errors++;
         if ((cmdsts & RX_STS_LC) || (cmdsts & RX_STS_COL))
            ifp->if_collisions++;
-        goto give_it_back;
+        /* recycle the buffer */
+        m->m_len=sc->rx_buf_sz;        
+    }
+    else {
+        m = sc->rxq_mbuf[sc->rxq_fi];
+        m->m_len = m->m_pkthdr.len = byteCount - sizeof(struct ether_header);
+        eh = mtod (m, struct ether_header *);
+        m->m_data += sizeof(struct ether_header);
+        ether_input (ifp, eh, m);
+
+        ifp->if_ipackets++;
+        ifp->if_ibytes+=byteCount;
+        --sc->rxq_active;
+        MGETHDR (m, M_WAIT, MT_DATA);
+        MCLGET (m, M_WAIT);
      }
-     m = sc->rxq_mbuf[sc->rxq_fi];
-     m->m_len = m->m_pkthdr.len = byteCount - sizeof(struct ether_header);
-     eh = mtod (m, struct ether_header *);
-     m->m_data += sizeof(struct ether_header);
-     ether_input (ifp, eh, m);
-
-     ifp->if_ipackets++;
-     ifp->if_ibytes+=byteCount;
-     --sc->rxq_active;
-
-     give_it_back:
-     MGETHDR (m, M_WAIT, MT_DATA);
-     MCLGET (m, M_WAIT);
      m->m_pkthdr.rcvif = ifp;
      sc->rxq_mbuf[sc->rxq_fi]= m;
      /* convert mbuf pointer to data pointer of correct type */

c/src/lib/libbsp/powerpc/mvme5500/network/if_1GHz/if_wm.c

@@ -1730,7 +1730,7 @@ static void wm_gmii_mediainit(struct wm_softc *sc)
   /* We have MII. */
   sc->sc_flags |= WM_F_HAS_MII;
 
-#if 1
+#if 0
   /* <skf> May 2009 : The value that should be programmed into IPGT is 10 */
   sc->sc_tipg = TIPG_IPGT(10)+TIPG_IPGR1(8)+TIPG_IPGR2(6);
 #else

c/src/lib/libbsp/powerpc/mvme5500/pci/detect_host_bridge.c

@@ -27,7 +27,7 @@
 
 unsigned long _BSP_clear_hostbridge_errors(int enableMCP, int quiet)
 {
-  unsigned int pcidata, pcidata1;
+  uint32_t pcidata, pcidata1;
   int PciLocal, busNumber=0;
 
   /* On the mvme5500 board, the GT64260B system controller had the MCP

c/src/lib/libbsp/powerpc/mvme5500/pci/pci.c

@@ -108,7 +108,7 @@ unsigned char offset, uint8_t *val)
     BSP_pci[n].config_data,pciConfigPack(bus,dev,func,offset));
 #endif
 
-  out_be32(BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
+  out_be32((volatile unsigned int *) BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
   *val = in_8(BSP_pci[n].pci_config_data + (offset&3));
   return PCIBIOS_SUCCESSFUL;
 }
@@ -129,8 +129,8 @@ unsigned char func, unsigned char offset, uint16_t *val)
   printk("addr %x, data %x, pack %x \n", config_addr,
     config_data,pciConfigPack(bus,dev,func,offset));
 #endif
-  out_be32(BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
-  *val = in_le16(BSP_pci[n].pci_config_data + (offset&2));
+  out_be32((volatile unsigned int *) BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
+  *val = in_le16((volatile unsigned short *) (BSP_pci[n].pci_config_data + (offset&2)));
   return PCIBIOS_SUCCESSFUL;
 }
 
@@ -147,8 +147,8 @@ unsigned char func, unsigned char offset, uint32_t *val)
   *val = 0xffffffff;
   if ((offset&3)|| (offset & ~0xff)) return PCIBIOS_BAD_REGISTER_NUMBER;
 
-  out_be32(BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
-  *val = in_le32(BSP_pci[n].pci_config_data);
+  out_be32((volatile unsigned int *)BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
+  *val = in_le32((volatile unsigned int *)BSP_pci[n].pci_config_data);
   return PCIBIOS_SUCCESSFUL;
 }
 
@@ -163,8 +163,8 @@ static int indirect_pci_write_config_byte(unsigned char bus, unsigned char dev,u
 
   if (offset & ~0xff) return PCIBIOS_BAD_REGISTER_NUMBER;
 
-  out_be32(BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
-  out_8(BSP_pci[n].pci_config_data + (offset&3), val);
+  out_be32((volatile unsigned int *)BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
+  out_8((volatile unsigned char *) (BSP_pci[n].pci_config_data + (offset&3)), val);
   return PCIBIOS_SUCCESSFUL;
 }
 
@@ -179,8 +179,8 @@ static int indirect_pci_write_config_word(unsigned char bus, unsigned char dev,u
 
   if ((offset&1)|| (offset & ~0xff)) return PCIBIOS_BAD_REGISTER_NUMBER;
 
-  out_be32(BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
-  out_le16(BSP_pci[n].pci_config_data + (offset&3), val);
+  out_be32((volatile unsigned int *)BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
+  out_le16((volatile unsigned short *)(BSP_pci[n].pci_config_data + (offset&3)), val);
   return PCIBIOS_SUCCESSFUL;
 }
 
@@ -195,8 +195,8 @@ static int indirect_pci_write_config_dword(unsigned char bus,unsigned char dev,u
 
   if ((offset&3)|| (offset & ~0xff)) return PCIBIOS_BAD_REGISTER_NUMBER;
 
-  out_be32(BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
-  out_le32(BSP_pci[n].pci_config_data, val);
+  out_be32((volatile unsigned int *)BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
+  out_le32((volatile unsigned int *)BSP_pci[n].pci_config_data, val);
   return PCIBIOS_SUCCESSFUL;
 }
 

c/src/lib/libbsp/powerpc/mvme5500/pci/pcifinddevice.c

@@ -35,7 +35,7 @@ int BSP_pciFindDevicePrint(unsigned short vendorid, unsigned short deviceid,
 int pci_find_device( unsigned short vendorid, unsigned short deviceid,
                    int instance, int *pbus, int *pdev, int *pfun )
 {
-  unsigned int d;
+  uint32_t d;
   unsigned short s;
   unsigned char bus,dev,fun,hd;
 

c/src/lib/libbsp/powerpc/mvme5500/start/start.S

@@ -4,20 +4,27 @@
  *  Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
  *
  *  S. Kate Feng <feng1@bnl.gov>, April 2004
- *  Mapped the 2nd 256MB of RAM to support the MVME5500 boards.
- *
+ *  Mapped the 2nd 256MB of RAM to support the MVME5500/MVME6100 boards
+ *	
  *  The license and distribution terms for this file may be
  *  found in the file LICENSE in this distribution or at
  *  http://www.rtems.com/license/LICENSE.
  *
+<<<<<<< start.S
+ *  $Id$
+=======
+ *  $Id$
+>>>>>>> 1.25
  *
  */
 
 #include <rtems/asm.h>
 #include <rtems/score/cpu.h>
 #include <rtems/powerpc/powerpc.h>
+
 #include <libcpu/io.h>
 #include <libcpu/bat.h>
+#include <bspopts.h>
 
 #define SYNC \
 	sync; \
@@ -33,7 +40,6 @@
 	li	r10,0x63	;	\
 	sc
 
-
 	.text
 	.globl	__rtems_entry_point
 	.type	__rtems_entry_point,@function
@@ -62,6 +68,21 @@ __rtems_entry_point:
 	mr	r29,r5
 	mr	r28,r6
 	mr	r27,r7
+
+#ifdef __ALTIVEC__
+	/* enable altivec; gcc may use it! */
+	mfmsr r0
+	oris  r0, r0, (1<<(31-16-6))
+	mtmsr r0
+	/*
+	 * set vscr and vrsave to known values
+	 */
+	li    r0, 0
+	mtvrsave r0
+	vxor   0,0,0
+	mtvscr 0
+#endif
+
 	/*
 	 * Make sure we have nothing in BATS and TLB
 	 */
@@ -72,7 +93,8 @@ __rtems_entry_point:
  * of RAM to KERNELBASE.
  */
 	lis	r11,KERNELBASE@h
-	ori	r11,r11,0x1ffe		/* set up BAT0 registers for 604+ */
+/* set up BAT registers for 604 */
+	ori	r11,r11,0x1ffe
 	li	r8,2			/* R/W access */
 	isync
 	mtspr	DBAT0L,r8		/* N.B. 6xx (not 601) have valid */
@@ -81,8 +103,8 @@ __rtems_entry_point:
 	mtspr	IBAT0U,r11
 	isync
 /*
- * Use the 2nd pair of BAT registers to map the 2nd 256MB
- * of RAM to 0x10000000. <SKF>
+ * <skf> Use the 2nd pair of BAT registers to map the 2nd 256MB
+ * of RAM to 0x10000000.
  */
 	lis	r11,MEM256MB@h
 	ori	r11,r11,0x1ffe		/* set up BAT1 registers for 604+ */
@@ -106,7 +128,7 @@ __rtems_entry_point:
 
 enter_C_code:
 	bl	MMUon
-	bl  __eabi	/* setup EABI and SYSV environment */
+	bl      __eabi	/* setup EABI and SYSV environment */
 	bl	zero_bss
 	/*
 	 * restore prep boot params
@@ -121,10 +143,17 @@ enter_C_code:
 	 * stack = &__rtems_end + 4096
 	 */
 	addis	r9,r0, __stack-PPC_MINIMUM_STACK_FRAME_SIZE@ha
-        addi	r9,r9, __stack-PPC_MINIMUM_STACK_FRAME_SIZE@l
-	mr	r1, r9
+	addi	r9,r9, __stack-PPC_MINIMUM_STACK_FRAME_SIZE@l
 	/*
-	 * We are know in a environment that is totally independent from bootloader setup.
+	 * align initial stack
+	 * (we hope that the bootloader stack was 16-byte aligned
+	 * or we haven't used altivec yet...)
+	 */
+	li   r0, (CPU_STACK_ALIGNMENT-1)
+	andc r1, r9, r0
+	/*
+	 * We are now in a environment that is totally independent from
+	 * bootloader setup.
 	 */
     /* pass result of 'save_boot_params' to 'boot_card' in R3 */
 	bl	boot_card
@@ -161,7 +190,6 @@ MMUoff:
 	.globl	_return_to_ppcbug
 	.type	_return_to_ppcbug,@function
 
-
 _return_to_ppcbug:
 	mflr	r30
 	bl	MMUoff

c/src/lib/libbsp/powerpc/mvme5500/startup/bspstart.c

@@ -56,8 +56,6 @@
 #include <rtems/score/wkspace.h>
 
 extern uint32_t probeMemoryEnd(void); /* from shared/startup/probeMemoryEnd.c */
-
-
 BSP_output_char_function_type BSP_output_char = BSP_output_char_via_serial;
 
 extern void _return_to_ppcbug(void);
@@ -70,13 +68,8 @@ extern void BSP_vme_config(void);
 
 extern unsigned char ReadConfVPD_buff(int offset);
 
-extern unsigned long __bss_start[], __SBSS_START__[], __SBSS_END__[];
-extern unsigned long __SBSS2_START__[], __SBSS2_END__[];
-
 uint32_t bsp_clicks_per_usec;
 
-SPR_RW(SPRG1)
-
 typedef struct CmdLineRec_ {
     unsigned long  size;
     char           buf[0];
@@ -133,25 +126,6 @@ void _BSP_Fatal_error(unsigned int v)
   __asm__ __volatile ("sc");
 }
 
-void zero_bss(void)
-{
-  memset(
-    __SBSS_START__,
-    0,
-    ((unsigned) __SBSS_END__) - ((unsigned)__SBSS_START__)
-  );
-  memset(
-    __SBSS2_START__,
-    0,
-    ((unsigned) __SBSS2_END__) - ((unsigned)__SBSS2_START__)
-  );
-  memset(
-    __bss_start,
-    0,
-    ((unsigned) __rtems_end) - ((unsigned)__bss_start)
-  );
-}
-
 /* NOTE: we cannot simply malloc the commandline string;
  * save_boot_params() is called during a very early stage when
  * libc/malloc etc. are not yet initialized!
@@ -293,6 +267,7 @@ void bsp_start( void )
   printk("-----------------------------------------\n");
 
   BSP_mem_size         =  probeMemoryEnd();
+
   /* TODO: calculate the BSP_bus_frequency using the REF_CLK bit
    *       of System Status  register
    */
@@ -302,7 +277,6 @@ void bsp_start( void )
   /* P94 : 7455 clocks the TB/DECR at 1/4 of the system bus clock frequency */
   BSP_time_base_divisor      = 4000;
 
-
   /* Maybe not setup yet becuase of the warning message */
   /* Allocate and set up the page table mappings
    * This is only available on >604 CPUs.

c/src/lib/libbsp/powerpc/mvme5500/vme/VMEConfig.h

@@ -1,9 +1,24 @@
 #ifndef RTEMS_BSP_VME_CONFIG_H
 #define RTEMS_BSP_VME_CONFIG_H
-/* VMEConfig.h, S. Kate Feng modified it for MVME5500 3/04  */
+/* VMEConfig.h, S. Kate Feng modified it for MVME5500 3/04 
+ * 
+ * May 2011 : Use the VME shared IRQ handlers.
+ *
+ * It seems that the implementation of VMEUNIVERSE_IRQ_MGR_FLAG_PW_WORKAROUND
+ * is not fully developed. The UNIV_REGOFF_VCSR_BS is defined for VME64
+ * specification, which does not apply to a VME32 crate. In order to avoid
+ * spurious VME interrupts, a better and more universal solution is
+ * to flush the vmeUniverse FIFO by reading a register back within the
+ * users' Interrupt Service Routine (ISR)  before returning.
+ *
+ * Some devices might require the ISR to issue an interrupt status READ
+ * after its IRQ is cleared, but before its corresponding interrupt
+ * is enabled again. 
+ * 
+ */
 /* BSP specific address space configuration parameters */
 
-/*
+/* 
  * The BSP maps VME address ranges into
  * one BAT.
  * NOTE: the BSP (startup/bspstart.c) uses
@@ -11,6 +26,10 @@
  * layout:
  */
 #define _VME_A32_WIN0_ON_PCI	        0x90000000
+/* If _VME_CSR_ON_PCI is defined then the A32 window is reduced to accommodate
+ * CSR for space.
+ */
+#define _VME_CSR_ON_PCI			0x9e000000
 #define _VME_A24_ON_PCI			0x9f000000
 #define _VME_A16_ON_PCI			0x9fff0000
 
@@ -30,7 +49,12 @@
 
 #define BSP_VME_UNIVERSE_INSTALL_IRQ_MGR(err)			\
 	do {											\
-		err = vmeUniverseInstallIrqMgr(0,64+12,1,64+13);	\
+	  err = vmeUniverseInstallIrqMgrAlt(VMEUNIVERSE_IRQ_MGR_FLAG_SHARED,\
+             0, BSP_GPP_VME_VLINT0, \         
+             1, BSP_GPP_VME_VLINT1, \          
+             2, BSP_GPP_VME_VLINT2, \        
+             3, BSP_GPP_VME_VLINT3, \
+             -1 /* terminate list  */);  \             
 	} while (0)
 
 #endif

c/src/lib/libbsp/powerpc/psim/ChangeLog

@@ -1,3 +1,9 @@
+2011-05-17	Till Straumann <strauman@slac.stanford.edu>
+
+	PR1797/bsps
+	* configure.ac: Made CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK
+	a bspopts.h setting.
+
 2011-02-02	Ralf Corsépius <ralf.corsepius@rtems.org>
 
 	* configure.ac: Require autoconf-2.68, automake-1.11.1.

c/src/lib/libbsp/powerpc/psim/configure.ac

@@ -39,6 +39,16 @@ RTEMS_BSPOPTS_HELP([CLOCK_DRIVER_USE_FAST_IDLE],
  a clock ISR occurs while the IDLE thread is executing.  This can
  significantly reduce simulation times.])
 
+RTEMS_BSPOPTS_SET([CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK], [*], [1])
+RTEMS_BSPOPTS_HELP([CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK],
+[If defined then the BSP may reduce the available memory size
+initially. This can be useful for debugging (reduce the core
+size) or dynamic loading (std gcc text offsets/jumps are < +/-32M).
+Note that the policy can still be defined by the application
+(see sbrk.c, BSP_sbrk_policy). By undefining
+CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK this feature is removed
+and a little memory is saved.])
+
 RTEMS_BSP_CLEANUP_OPTIONS(0, 0)
 
 # Explicitly list all Makefiles here

c/src/lib/libbsp/powerpc/score603e/ChangeLog

@@ -1,3 +1,9 @@
+2011-05-17	Till Straumann <strauman@slac.stanford.edu>
+
+	PR1797/bsps
+	* configure.ac: Made CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK
+	a bspopts.h setting.
+
 2011-02-02	Ralf Corsépius <ralf.corsepius@rtems.org>
 
 	* configure.ac: Require autoconf-2.68, automake-1.11.1.

c/src/lib/libbsp/powerpc/score603e/configure.ac

@@ -61,6 +61,16 @@ RTEMS_BSPOPTS_HELP([PPC_USE_DATA_CACHE],
  of PowerPC 603e revisions and emulator versions.
  The BSP actually contains the call that enables this.])
 
+RTEMS_BSPOPTS_SET([CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK], [*], [1])
+RTEMS_BSPOPTS_HELP([CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK],
+[If defined then the BSP may reduce the available memory size
+initially. This can be useful for debugging (reduce the core
+size) or dynamic loading (std gcc text offsets/jumps are < +/-32M).
+Note that the policy can still be defined by the application
+(see sbrk.c, BSP_sbrk_policy). By undefining
+CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK this feature is removed
+and a little memory is saved.])
+
 RTEMS_BSPOPTS_SET([PPC_VECTOR_FILE_BASE],[*],[0x0100])
 RTEMS_BSPOPTS_HELP([PPC_VECTOR_FILE_BASE],
 [This defines the base address of the exception table.

c/src/lib/libbsp/powerpc/shared/motorola/motorola.c

@@ -296,8 +296,12 @@ typedef struct {
       int               (*swizzler)(int, int);
 } mot_info_t;
 
+/* NOTE: When adding boards here the 'motorolaBoard' enums MUST be
+ *       updated accordingly!
+ */
 static const mot_info_t mot_boards[] = {
-  {0x3E0, 0x00, PPC_750,     "MVME 2400", mvme24xx_intmap,prep_pci_swizzle},
+  {0x0E0, 0xF9, PPC_604,     "MVME 2400", mvme24xx_intmap,prep_pci_swizzle},
+  {0x3E0, 0x00, PPC_750,     "MVME 2400 (PPC 750)", mvme24xx_intmap,prep_pci_swizzle},
   {0x010, 0x00, PPC_UNKNOWN, "Genesis", NULL, NULL},
   {0x020, 0x00, PPC_UNKNOWN, "Powerstack (Series E)", NULL, NULL},
   {0x040, 0x00, PPC_UNKNOWN, "Blackhawk (Powerstack)", NULL, NULL},

c/src/lib/libbsp/powerpc/shared/motorola/motorola.h

@@ -26,27 +26,28 @@ typedef enum {
 
 typedef enum {
   MVME_2400 			= 0,
-  GENESIS   			= 1,
-  POWERSTACK_E			= 2,
-  BLACKAWK			= 3,
-  OMAHA				= 4,
-  UTAH				= 5,
-  POWERSTACK_EX			= 6,
-  MESQUITE			= 7,
-  SITKA				= 8,
-  MESQUITE_W_HAC		= 9,
-  MTX_PLUS			= 10,
-  MTX_WO_PP			= 11,
-  MTX_W_PP			= 12,
-  MVME_2300			= 13,
-  MVME_2300SC_2600		= 14,
-  MVME_2600_W_MVME712M		= 15,
-  MVME_2600_2700_W_MVME761	= 16,
-  MVME_3600_W_MVME712M		= 17,
-  MVME_3600_W_MVME761		= 18,
-  MVME_1600			= 19,
-  /* In the table, slot 20 is the marker for end of automatic probe and scan */
-  MVME_2100			= 21,
+  MVME_2400_750			= 1,
+  GENESIS   			= 2,
+  POWERSTACK_E			= 3,
+  BLACKAWK			= 4,
+  OMAHA				= 5,
+  UTAH				= 6,
+  POWERSTACK_EX			= 7,
+  MESQUITE			= 8,
+  SITKA				= 9,
+  MESQUITE_W_HAC		= 10,
+  MTX_PLUS			= 11,
+  MTX_WO_PP			= 12,
+  MTX_W_PP			= 13,
+  MVME_2300			= 14,
+  MVME_2300SC_2600		= 15,
+  MVME_2600_W_MVME712M		= 16,
+  MVME_2600_2700_W_MVME761	= 17,
+  MVME_3600_W_MVME712M		= 18,
+  MVME_3600_W_MVME761		= 19,
+  MVME_1600			= 20,
+  /* In the table, slot 21 is the marker for end of automatic probe and scan */
+  MVME_2100			= 22,
   MOTOROLA_UNKNOWN		= 255
 } motorolaBoard;
 

c/src/lib/libbsp/powerpc/shared/start/start.S

@@ -7,12 +7,7 @@
  *  found in found in the file LICENSE in this distribution or at
  *  http://www.rtems.com/license/LICENSE.
  *
-<<<<<<< start.S
  *  $Id$
-=======
- *  $Id$
->>>>>>> 1.25
- *
  */
 
 #include <rtems/asm.h>

c/src/lib/libbsp/powerpc/shared/startup/bspgetworkarea.c

@@ -16,7 +16,6 @@
 #endif
 
 extern void *__rtems_end;
-extern uintptr_t _bsp_sbrk_init(uintptr_t, uintptr_t*);
 
 /*
  *  This method returns the base address and size of the area which
@@ -31,15 +30,12 @@ void bsp_get_work_area(
 )
 {
   uintptr_t work_size;
-  uintptr_t spared;
   uintptr_t work_area;
 
   work_area = (uintptr_t)&__rtems_end +
               rtems_configuration_get_interrupt_stack_size();
   work_size = (uintptr_t)BSP_mem_size - work_area;
 
-  spared = _bsp_sbrk_init( work_area, &work_size );
-
   *work_area_start = (void *)work_area,
   *work_area_size  = work_size;
   *heap_start      = BSP_BOOTCARD_HEAP_USES_WORK_AREA;

c/src/lib/libbsp/powerpc/shared/startup/pretaskinghook.c

@@ -26,8 +26,6 @@
 #include <rtems/bspIo.h>
 #endif
 
-#include <rtems/malloc.h>
-
 /*
  *  bsp_pretasking_hook
  *

c/src/lib/libbsp/powerpc/shared/startup/sbrk.c

@@ -70,8 +70,8 @@
 #include <sys/types.h>
 #include <unistd.h>
 
-static uint32_t         remaining_start=0;
-static uint32_t         remaining_size=0;
+static void *           remaining_start=(void*)-1LL;
+static uintptr_t        remaining_size=0;
 
 /* App. may provide a value by defining the BSP_sbrk_policy
  * variable.
@@ -81,16 +81,17 @@ static uint32_t         remaining_size=0;
  *    0  -> limit memory effectively to 32M.
  *
  */
-extern uint32_t         BSP_sbrk_policy __attribute__((weak));
+extern uintptr_t        BSP_sbrk_policy __attribute__((weak));
 
-#define LIMIT_32M  0x02000000
+#define LIMIT_32M  ((void*)0x02000000)
 
-uintptr_t _bsp_sbrk_init(
-  uintptr_t         heap_start,
+uintptr_t bsp_sbrk_init(
+  void              *heap_start,
   uintptr_t         *heap_size_p
 )
 {
   uintptr_t         rval=0;
+  uintptr_t         policy;
 
   remaining_start =  heap_start;
   remaining_size  = *heap_size_p;
@@ -104,30 +105,22 @@ uintptr_t _bsp_sbrk_init(
 	remaining_size  = rval;
   }
 
-  if ( 0 != &BSP_sbrk_policy ) {
-  	switch ( BSP_sbrk_policy ) {
-		case (uint32_t)(-1):
+  policy = (0 == &BSP_sbrk_policy ? (uintptr_t)(-1) : BSP_sbrk_policy);
+  switch ( policy ) {
+		case (uintptr_t)(-1):
 			*heap_size_p    += rval;
 			remaining_start  = heap_start + *heap_size_p;
 			remaining_size   = 0;
-			/* return a nonzero sbrk_amount because the libsupport code
-			 * at some point divides by this number prior to trying an
-			 * sbrk() which will fail.
-			 */
-			rval = 1;
 		break;
 
 		case 0:
 			remaining_size = 0;
-			/* see above for why we return 1 */
-			rval = 1;
 		break;
 
 		default:
-			if ( rval > BSP_sbrk_policy )
-				rval = BSP_sbrk_policy;
+			if ( rval > policy )
+				rval = policy;
 		break;
-	}
   }
 
   return rval;
@@ -138,9 +131,9 @@ void * sbrk(ptrdiff_t incr)
   void *rval=(void*)-1;
 
   /* FIXME: BEWARE if size >2G */
-  if (incr <= remaining_size) {
+  if ( remaining_start != (void*)-1LL && incr <= remaining_size) {
     remaining_size-=incr;
-    rval = (void*)remaining_start;
+    rval = remaining_start;
     remaining_start += incr;
   } else {
     errno = ENOMEM;

c/src/lib/libbsp/shared/bootcard.c

@@ -53,6 +53,11 @@
 
 #include <bsp/bootcard.h>
 #include <rtems/bspIo.h>
+#include <rtems/malloc.h>
+
+#ifdef CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK
+#include <unistd.h> /* for sbrk() */
+#endif
 
 /*
  *  At most a single pointer to the cmdline for those target
@@ -74,23 +79,30 @@ static void bootcard_bsp_libc_helper(
   void      *work_area_start,
   uintptr_t  work_area_size,
   void      *heap_start,
-  uintptr_t  heap_size
+  uintptr_t  heap_size,
+  uintptr_t  sbrk_amount
 )
 {
-  if ( !rtems_unified_work_area &&
-       heap_start == BSP_BOOTCARD_HEAP_USES_WORK_AREA) {
-    uintptr_t work_space_size = rtems_configuration_get_work_space_size();
+  if ( heap_start == BSP_BOOTCARD_HEAP_USES_WORK_AREA ) {
+    if ( ! rtems_unified_work_area ) {
+      uintptr_t work_space_size = rtems_configuration_get_work_space_size();
 
-    heap_start = (char *) work_area_start + work_space_size;
+      heap_start = (char *) work_area_start + work_space_size;
 
-    if (heap_size == BSP_BOOTCARD_HEAP_SIZE_DEFAULT) {
-      uintptr_t heap_size_default = work_area_size - work_space_size;
+      if (heap_size == BSP_BOOTCARD_HEAP_SIZE_DEFAULT) {
+        uintptr_t heap_size_default = work_area_size - work_space_size;
 
-      heap_size = heap_size_default;
+        heap_size = heap_size_default;
+      }
+    } else {
+      heap_start = work_area_start;
+      if (heap_size == BSP_BOOTCARD_HEAP_SIZE_DEFAULT) {
+        heap_size = work_area_size;
+      }
     }
   }
 
-  bsp_libc_init(heap_start, heap_size, 0);
+  bsp_libc_init(heap_start, heap_size, sbrk_amount);
 }
 
 /*
@@ -108,6 +120,7 @@ int boot_card(
   uintptr_t              work_area_size = 0;
   void                  *heap_start = NULL;
   uintptr_t              heap_size = 0;
+  uintptr_t              sbrk_amount = 0;
 
   /*
    * Special case for PowerPC: The interrupt disable mask is stored in SPRG0.
@@ -136,6 +149,32 @@ int boot_card(
   bsp_get_work_area(&work_area_start, &work_area_size,
                     &heap_start, &heap_size);
 
+#ifdef CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK
+  /* This routine may reduce the work area size with the
+   * option to extend it later via sbrk(). If the application
+   * was configured w/o CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK then
+   * omit this step.
+   */
+  if ( rtems_malloc_sbrk_helpers ) {
+    sbrk_amount = bsp_sbrk_init(work_area_start, &work_area_size);
+    if ( work_area_size <  Configuration.work_space_size && sbrk_amount > 0 ) {
+      /* Need to use sbrk right now */
+      uintptr_t sbrk_now;
+
+      sbrk_now = (Configuration.work_space_size - work_area_size) / sbrk_amount;
+      sbrk( sbrk_now * sbrk_amount );
+    }
+  }
+#else
+  if ( rtems_malloc_sbrk_helpers ) {
+    printk("Configuration error!\n"
+           "Application was configured with CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK\n"
+           "but BSP was configured w/o sbrk support\n");
+    bsp_cleanup();
+    return -1;
+  }
+#endif
+
   if ( work_area_size <= Configuration.work_space_size ) {
     printk(
       "bootcard: work space too big for work area: %p > %p\n",
@@ -170,7 +209,8 @@ int boot_card(
     work_area_start,
     work_area_size,
     heap_start,
-    heap_size
+    heap_size,
+    sbrk_amount
   );
 
   /*

c/src/lib/libbsp/shared/include/bootcard.h

@@ -88,6 +88,23 @@ void bsp_get_work_area(
   uintptr_t  *heap_size
 );
 
+/**
+ * @brief Gives the BSP a chance to reduce the work area size with sbrk() adding more later.
+ *
+ * bsp_sbrk_init() may reduce the work area size passed in. The routine
+ * returns the 'sbrk_amount' to be used when extending the heap.
+ * Note that the return value may be zero.
+ *
+ */
+
+#ifdef CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK
+uintptr_t bsp_sbrk_init(
+  void              *work_area_begin,
+  uintptr_t         *work_area_size_p
+);
+#endif
+
+
 /**
  * @brief Standard system initialization procedure.
  *

c/src/lib/libbsp/sparc/erc32/ChangeLog

@@ -1,3 +1,23 @@
+2011-04-25	Jennifer Averett <jennifer.averett@OARcorp.com>
+
+	PR 1783/bsps
+	* include/bsp.h: Remove dead prototypes of Clock_delay() and delay().
+	Neither had bodies.
+
+2011-03-04	Joel Sherrill <joel.sherrilL@OARcorp.com>
+
+	PR 1748/bsps
+	* clock/ckinit.c: When the clock tick generates an interrupt WHILE we
+	have interrupts disabled doing a get TOD or uptime, the get
+	nanoseconds handler was returning a bogusly large number.
+
+2011-03-03	Joel Sherrill <joel.sherrilL@OARcorp.com>
+
+	PR 1750/bsps
+	* console/erc32_console.c: The new console driver did not support
+	polled mode. It also had a bug in which it could lose a transmitter
+	interrupt.
+
 2011-02-02	Ralf Corsépius <ralf.corsepius@rtems.org>
 
 	* configure.ac: Require autoconf-2.68, automake-1.11.1.

c/src/lib/libbsp/sparc/erc32/clock/ckinit.c

@@ -49,11 +49,17 @@ extern int CLOCK_SPEED;
 uint32_t bsp_clock_nanoseconds_since_last_tick(void)
 {
   uint32_t clicks;
+  uint32_t usecs;
 
   clicks = ERC32_MEC.Real_Time_Clock_Counter;
 
-  return (uint32_t)
-    (rtems_configuration_get_microseconds_per_tick() - clicks) * 1000;
+  if ( ERC32_Is_interrupt_pending( ERC32_INTERRUPT_REAL_TIME_CLOCK ) ) {
+    clicks = ERC32_MEC.Real_Time_Clock_Counter;
+    usecs = (2*rtems_configuration_get_microseconds_per_tick() - clicks);
+  } else {
+    usecs = (rtems_configuration_get_microseconds_per_tick() - clicks);
+  }
+  return usecs * 1000;
 }
 
 #define Clock_driver_nanoseconds_since_last_tick \

c/src/lib/libbsp/sparc/erc32/console/erc32_console.c

@@ -27,6 +27,7 @@
 #include <libchip/sersupp.h>
 
 #include <bsp.h>
+#include <bspopts.h>
 
 #define CONSOLE_BUF_SIZE (16)
 
@@ -35,23 +36,32 @@
 
 static uint8_t erc32_console_get_register(uint32_t addr, uint8_t i)
 {
-    volatile uint32_t *reg = (volatile uint32_t *)addr;
-    return (uint8_t) reg [i];
+  volatile uint32_t *reg = (volatile uint32_t *)addr;
+  return (uint8_t) reg [i];
 }
 
 static void erc32_console_set_register(uint32_t addr, uint8_t i, uint8_t val)
 {
-    volatile uint32_t *reg = (volatile uint32_t *)addr;
-    reg [i] = val;
+  volatile uint32_t *reg = (volatile uint32_t *)addr;
+  reg [i] = val;
 }
 
 static int erc32_console_first_open(int major, int minor, void *arg);
-static ssize_t erc32_console_write_support_int(int minor, const char *buf, size_t len);
+
+#if (CONSOLE_USE_INTERRUPTS)
+  static ssize_t erc32_console_write_support_int(
+    int minor, const char *buf, size_t len);
+#else
+  int console_inbyte_nonblocking( int port );
+  static ssize_t erc32_console_write_support_polled(
+      int minor, const char *buf, size_t len);
+#endif
 static void erc32_console_initialize(int minor);
 
 rtems_device_minor_number Console_Port_Minor = 0;
 
-console_fns erc32_fns = {
+#if (CONSOLE_USE_INTERRUPTS)
+  console_fns erc32_fns = {
     libchip_serial_default_probe,           /* deviceProbe */
     erc32_console_first_open,               /* deviceFirstOpen */
     NULL,                                   /* deviceLastClose */
@@ -60,48 +70,61 @@ console_fns erc32_fns = {
     erc32_console_initialize,               /* deviceInitialize */
     NULL,                                   /* deviceWritePolled */
     NULL,                                   /* deviceSetAttributes */
-    true                                    /* deviceOutputUsesInterrupts */
-};
+    TERMIOS_IRQ_DRIVEN                      /* deviceOutputUsesInterrupts */
+  };
+#else
+  console_fns erc32_fns = {
+    libchip_serial_default_probe,           /* deviceProbe */
+    erc32_console_first_open,               /* deviceFirstOpen */
+    NULL,                                   /* deviceLastClose */
+    console_inbyte_nonblocking,             /* deviceRead */
+    erc32_console_write_support_polled,     /* deviceWrite */
+    erc32_console_initialize,               /* deviceInitialize */
+    NULL,                                   /* deviceWritePolled */
+    NULL,                                   /* deviceSetAttributes */
+    TERMIOS_POLLED                          /* deviceOutputUsesInterrupts */
+  };
+#endif
 
 console_tbl Console_Port_Tbl [] = {
-    {
-      .sDeviceName = "/dev/console",
-      .deviceType = SERIAL_CUSTOM,
-      .pDeviceFns = &erc32_fns,
-      .deviceProbe = NULL,
-      .pDeviceFlow = NULL,
-      .ulMargin = 16,
-      .ulHysteresis = 8,
-      .pDeviceParams = (void *) 1,
-      .ulCtrlPort1 = 0,
-      .ulCtrlPort2 = 0,
-      .ulDataPort = 0,
-      .getRegister = erc32_console_get_register,
-      .setRegister = erc32_console_set_register,
-      .getData = NULL,
-      .setData = NULL,
-      .ulClock = 16,
-      .ulIntVector = ERC32_INTERRUPT_UART_A_RX_TX
-    },
-    {
-      .sDeviceName = "/dev/console_b",
-      .deviceType = SERIAL_CUSTOM,
-      .pDeviceFns = &erc32_fns,
-      .deviceProbe = NULL,
-      .pDeviceFlow = NULL,
-      .ulMargin = 16,
-      .ulHysteresis = 8,
-      .pDeviceParams = (void *) 1,
-      .ulCtrlPort1 = 0,
-      .ulCtrlPort2 = 0,
-      .ulDataPort = 0,
-      .getRegister = erc32_console_get_register,
-      .setRegister = erc32_console_set_register,
-      .getData = NULL,
-      .setData = NULL,
-      .ulClock = 16,
-      .ulIntVector = ERC32_INTERRUPT_UART_B_RX_TX
-    },
+  {
+    .sDeviceName = "/dev/console_a",
+    .deviceType = SERIAL_CUSTOM,
+    .pDeviceFns = &erc32_fns,
+    .deviceProbe = NULL,
+    .pDeviceFlow = NULL,
+    .ulMargin = 16,
+    .ulHysteresis = 8,
+    .pDeviceParams = (void *) -1,  /* could be baud rate */
+    .ulCtrlPort1 = 0,
+    .ulCtrlPort2 = 0,
+    .ulDataPort = 0,
+    .getRegister = erc32_console_get_register,
+    .setRegister = erc32_console_set_register,
+    .getData = NULL,
+    .setData = NULL,
+    .ulClock = 16,
+    .ulIntVector = ERC32_INTERRUPT_UART_A_RX_TX
+  },
+  {
+    .sDeviceName = "/dev/console_b",
+    .deviceType = SERIAL_CUSTOM,
+    .pDeviceFns = &erc32_fns,
+    .deviceProbe = NULL,
+    .pDeviceFlow = NULL,
+    .ulMargin = 16,
+    .ulHysteresis = 8,
+    .pDeviceParams = (void *) -1,  /* could be baud rate */
+    .ulCtrlPort1 = 0,
+    .ulCtrlPort2 = 0,
+    .ulDataPort = 0,
+    .getRegister = erc32_console_get_register,
+    .setRegister = erc32_console_set_register,
+    .getData = NULL,
+    .setData = NULL,
+    .ulClock = 16,
+    .ulIntVector = ERC32_INTERRUPT_UART_B_RX_TX
+  },
 };
 
 /* always exactly two uarts for erc32 */
@@ -113,124 +136,151 @@ console_data Console_Port_Data [ERC32_UART_COUNT];
 
 static int erc32_console_first_open(int major, int minor, void *arg)
 {
-    /* Check minor number */
-    if (minor < 0 || minor > 1) {
-        return -1;
-    }
-    
-    rtems_libio_open_close_args_t *oca = arg;
-    struct rtems_termios_tty *tty = oca->iop->data1;
-    console_tbl *ct = &Console_Port_Tbl [minor];
-    console_data *cd = &Console_Port_Data [minor];
-    
-    cd->termios_data = tty;
-    rtems_termios_set_initial_baud(tty, (int32_t)ct->pDeviceParams);
-    
-    return 0;
+  /* Check minor number */
+  if (minor < 0 || minor > 1) {
+    return -1;
+  }
+  
+  rtems_libio_open_close_args_t *oca = arg;
+  struct rtems_termios_tty *tty = oca->iop->data1;
+  console_tbl *ct = &Console_Port_Tbl [minor];
+  console_data *cd = &Console_Port_Data [minor];
+  
+  cd->termios_data = tty;
+  rtems_termios_set_initial_baud(tty, (int32_t)ct->pDeviceParams);
+  
+  return 0;
 }
 
+#if (CONSOLE_USE_INTERRUPTS)
 static ssize_t erc32_console_write_support_int(int minor, const char *buf, size_t len)
 {
-    console_data *cd = &Console_Port_Data[minor];
-    int k = 0;
+  console_data *cd = &Console_Port_Data[minor];
+  int k = 0;
 
-    if (minor == 0) { /* uart a */
-        for (k = 0; k < len && (ERC32_MEC.UART_Status & ERC32_MEC_UART_STATUS_THEA); k ++) {
-            ERC32_MEC.UART_Channel_A = (unsigned char)buf[k];
-        }
-        ERC32_Force_interrupt(ERC32_INTERRUPT_UART_A_RX_TX);
-    } else { /* uart b */
-        for (k = 0; k < len && (ERC32_MEC.UART_Status & ERC32_MEC_UART_STATUS_THEB); k ++) {
-            ERC32_MEC.UART_Channel_B = (unsigned char)buf[k];
-        }
-        ERC32_Force_interrupt(ERC32_INTERRUPT_UART_B_RX_TX);
+  if (minor == 0) { /* uart a */
+    for (k = 0;
+         k < len && (ERC32_MEC.UART_Status & ERC32_MEC_UART_STATUS_THEA); k ++) {
+      ERC32_MEC.UART_Channel_A = (unsigned char)buf[k];
     }
-    
-    if (len > 0) {
-        cd->pDeviceContext = (void *)k;
-        cd->bActive = true;
+    ERC32_Force_interrupt(ERC32_INTERRUPT_UART_A_RX_TX);
+  } else { /* uart b */
+    for (k = 0;
+         k < len && (ERC32_MEC.UART_Status & ERC32_MEC_UART_STATUS_THEB); k ++) {
+      ERC32_MEC.UART_Channel_B = (unsigned char)buf[k];
     }
-    
-    return 0;
+    ERC32_Force_interrupt(ERC32_INTERRUPT_UART_B_RX_TX);
+  }
+  
+  if (len > 0) {
+    cd->pDeviceContext = (void *)k;
+    cd->bActive = true;
+  }
+  
+  return 0;
 }
 
 static void erc32_console_isr_a(
-    rtems_vector_number vector
+  rtems_vector_number vector
 )
 {
-    console_data *cd = &Console_Port_Data[0];
+  console_data *cd = &Console_Port_Data[0];
 
-    /* check for error */
-    if (ERC32_MEC.UART_Status & ERC32_MEC_UART_STATUS_ERRA) {
-        ERC32_MEC.UART_Status = ERC32_MEC_UART_STATUS_CLRA;
-        ERC32_MEC.Control = ERC32_MEC.Control;
-    }
+  /* check for error */
+  if (ERC32_MEC.UART_Status & ERC32_MEC_UART_STATUS_ERRA) {
+    ERC32_MEC.UART_Status = ERC32_MEC_UART_STATUS_CLRA;
+    ERC32_MEC.Control = ERC32_MEC.Control;
+  }
 
-    do {
-        int chars_to_dequeue = (int)cd->pDeviceContext;
-        int rv = 0;
-        int i = 0;
-        char buf[CONSOLE_BUF_SIZE];
+  do {
+    int chars_to_dequeue = (int)cd->pDeviceContext;
+    int rv = 0;
+    int i = 0;
+    char buf[CONSOLE_BUF_SIZE];
         
-        /* enqueue received chars */
-        while (i < CONSOLE_BUF_SIZE) {
-            if (ERC32_MEC.UART_Status & ERC32_MEC_UART_STATUS_DRA) {
-                buf[i] = ERC32_MEC.UART_Channel_A;
-                ++i;
-            } else {
-                break;
-            }
-        }
-        rtems_termios_enqueue_raw_characters(cd->termios_data, buf, i);
+    /* enqueue received chars */
+    while (i < CONSOLE_BUF_SIZE) {
+      if (!(ERC32_MEC.UART_Status & ERC32_MEC_UART_STATUS_DRA))
+        break;
+      buf[i] = ERC32_MEC.UART_Channel_A;
+      ++i;
+    }
+    if ( i ) 
+      rtems_termios_enqueue_raw_characters(cd->termios_data, buf, i);
 
-        /* dequeue transmitted chars */
+    /* dequeue transmitted chars */
+    if (ERC32_MEC.UART_Status & ERC32_MEC_UART_STATUS_THEA) {
+      rv = rtems_termios_dequeue_characters(
+         cd->termios_data, chars_to_dequeue);
+      if ( !rv ) {
         cd->pDeviceContext = 0;
-        rv = rtems_termios_dequeue_characters(cd->termios_data, chars_to_dequeue);
-        if (rv == 0 && !(ERC32_MEC.UART_Status & ERC32_MEC_UART_STATUS_DRA)) {
-            cd->bActive = false;
-            ERC32_Clear_interrupt (ERC32_INTERRUPT_UART_A_RX_TX);
-        }
-    } while (ERC32_Is_interrupt_pending (ERC32_INTERRUPT_UART_A_RX_TX));
+        cd->bActive = false;
+      }
+      ERC32_Clear_interrupt (ERC32_INTERRUPT_UART_A_RX_TX);
+    }
+  } while (ERC32_Is_interrupt_pending (ERC32_INTERRUPT_UART_A_RX_TX));
 }
 
 static void erc32_console_isr_b(
-    rtems_vector_number vector
+  rtems_vector_number vector
 )
 {
-    console_data *cd = &Console_Port_Data[1];
+  console_data *cd = &Console_Port_Data[1];
 
-    /* check for error */
-    if (ERC32_MEC.UART_Status & ERC32_MEC_UART_STATUS_ERRB) {
-        ERC32_MEC.UART_Status = ERC32_MEC_UART_STATUS_CLRB;
-        ERC32_MEC.Control = ERC32_MEC.Control;
-    }
+  /* check for error */
+  if (ERC32_MEC.UART_Status & ERC32_MEC_UART_STATUS_ERRB) {
+      ERC32_MEC.UART_Status = ERC32_MEC_UART_STATUS_CLRB;
+      ERC32_MEC.Control = ERC32_MEC.Control;
+  }
 
-    do {
-        int chars_to_dequeue = (int)cd->pDeviceContext;
-        int rv = 0;
-        int i = 0;
-        char buf[CONSOLE_BUF_SIZE];
+  do {
+    int chars_to_dequeue = (int)cd->pDeviceContext;
+    int rv = 0;
+    int i = 0;
+    char buf[CONSOLE_BUF_SIZE];
         
-        /* enqueue received chars */
-        while (i < CONSOLE_BUF_SIZE) {
-            if (ERC32_MEC.UART_Status & ERC32_MEC_UART_STATUS_DRB) {
-                buf[i] = ERC32_MEC.UART_Channel_B;
-                ++i;
-            } else {
-                break;
-            }
-        }
-        rtems_termios_enqueue_raw_characters(cd->termios_data, buf, i);
+    /* enqueue received chars */
+    while (i < CONSOLE_BUF_SIZE) {
+      if (!(ERC32_MEC.UART_Status & ERC32_MEC_UART_STATUS_DRB))
+        break;
+      buf[i] = ERC32_MEC.UART_Channel_B;
+      ++i;
+    }
+    if ( i ) 
+      rtems_termios_enqueue_raw_characters(cd->termios_data, buf, i);
 
-        /* dequeue transmitted chars */
+    /* dequeue transmitted chars */
+    if (ERC32_MEC.UART_Status & ERC32_MEC_UART_STATUS_THEB) {
+      rv = rtems_termios_dequeue_characters(
+         cd->termios_data, chars_to_dequeue);
+      if ( !rv ) {
         cd->pDeviceContext = 0;
-        rv = rtems_termios_dequeue_characters(cd->termios_data, chars_to_dequeue);
-        if (rv == 0 && !(ERC32_MEC.UART_Status & ERC32_MEC_UART_STATUS_DRB)) {
-            cd->bActive = false;
-            ERC32_Clear_interrupt (ERC32_INTERRUPT_UART_B_RX_TX);
-        }
-    } while (ERC32_Is_interrupt_pending (ERC32_INTERRUPT_UART_B_RX_TX));
+        cd->bActive = false;
+      }
+      ERC32_Clear_interrupt (ERC32_INTERRUPT_UART_B_RX_TX);
+    }
+  } while (ERC32_Is_interrupt_pending (ERC32_INTERRUPT_UART_B_RX_TX));
 }
+#else
+
+extern void console_outbyte_polled( int  port, unsigned char ch );
+
+static ssize_t erc32_console_write_support_polled(
+  int         minor,
+  const char *buf,
+  size_t      len
+)
+{
+  int nwrite = 0;
+
+  while (nwrite < len) {
+    console_outbyte_polled( minor, *buf++ );
+    nwrite++;
+  }
+  return nwrite;
+}
+
+#endif
 
 
 /*
@@ -242,21 +292,23 @@ static void erc32_console_initialize(
     int minor
 )
 {
-    console_data *cd = &Console_Port_Data [minor];
+  console_data *cd = &Console_Port_Data [minor];
 
-    cd->bActive = false;
-    cd->pDeviceContext = 0;
+  cd->bActive = false;
+  cd->pDeviceContext = 0;
 
-   /*
-    * Initialize the Termios infrastructure.  If Termios has already
-    * been initialized by another device driver, then this call will
-    * have no effect.
-    */
-    rtems_termios_initialize();
+ /*
+  * Initialize the Termios infrastructure.  If Termios has already
+  * been initialized by another device driver, then this call will
+  * have no effect.
+  */
+  rtems_termios_initialize();
 
-   /*
-    *  Initialize Hardware
-    */
+ /*
+  *  Initialize Hardware
+  */
+  #if (CONSOLE_USE_INTERRUPTS)
     set_vector(erc32_console_isr_a, CONSOLE_UART_A_TRAP, 1);
     set_vector(erc32_console_isr_b, CONSOLE_UART_B_TRAP, 1);
+  #endif
 }

c/src/lib/libbsp/sparc/erc32/include/bsp.h

@@ -51,14 +51,6 @@ extern int rtems_erc32_sonic_driver_attach(
 #define RTEMS_BSP_NETWORK_DRIVER_NAME	"sonic1"
 #define RTEMS_BSP_NETWORK_DRIVER_ATTACH	rtems_erc32_sonic_driver_attach
 
-/*
- *  Simple spin delay in microsecond units for device drivers.
- *  This is very dependent on the clock speed of the target.
- */
-extern void Clock_delay(uint32_t microseconds);
-
-#define delay( microseconds ) Clock_delay(microseconds)
-
 /* Constants */
 
 /*

c/src/lib/libbsp/sparc/leon2/ChangeLog

@@ -1,3 +1,21 @@
+2011-07-21	Jorge Lopez <jorge.lopez.trescastro@esa.int>
+
+	PR 1766/bsps
+	* clock/ckinit.c: Add missing read of Timer_Counter_1.
+
+2011-04-25	Jennifer Averett <jennifer.averett@OARcorp.com>
+
+	PR 1783/bsps
+	* include/bsp.h: Remove dead prototypes of Clock_delay() and delay().
+	Neither had bodies.
+
+2011-03-04	Joel Sherrill <joel.sherrilL@OARcorp.com>
+
+	PR 1748/bsps
+	* clock/ckinit.c: When the clock tick generates an interrupt WHILE we
+	have interrupts disabled doing a get TOD or uptime, the get
+	nanoseconds handler was returning a bogusly large number.
+
 2011-02-02	Ralf Corsépius <ralf.corsepius@rtems.org>
 
 	* configure.ac: Require autoconf-2.68, automake-1.11.1.

c/src/lib/libbsp/sparc/leon2/clock/ckinit.c

@@ -62,12 +62,17 @@ extern int CLOCK_SPEED;
 uint32_t bsp_clock_nanoseconds_since_last_tick(void)
 {
   uint32_t clicks;
+  uint32_t usecs;
 
   clicks = LEON_REG.Timer_Counter_1;
 
-  /* Down counter */
-  return (uint32_t)
-     (rtems_configuration_get_microseconds_per_tick() - clicks) * 1000;
+  if ( LEON_Is_interrupt_pending( LEON_INTERRUPT_TIMER1 ) ) {
+    clicks = LEON_REG.Timer_Counter_1;
+    usecs = (2*rtems_configuration_get_microseconds_per_tick() - clicks);
+  } else {
+    usecs = (rtems_configuration_get_microseconds_per_tick() - clicks);
+  }
+  return usecs * 1000;
 }
 
 #define Clock_driver_nanoseconds_since_last_tick bsp_clock_nanoseconds_since_last_tick

c/src/lib/libbsp/sparc/leon2/include/bsp.h

@@ -62,14 +62,6 @@ extern int rtems_smc91111_driver_attach_leon2(
  *  The synchronous trap is an arbitrarily chosen software trap.
  */
 
-/*
- *  Simple spin delay in microsecond units for device drivers.
- *  This is very dependent on the clock speed of the target.
- */
-extern void Clock_delay(uint32_t microseconds);
-
-#define delay( microseconds ) Clock_delay(microseconds)
-
 extern int   CPU_SPARC_HAS_SNOOPING;
 
 /* Constants */

c/src/lib/libbsp/sparc/leon3/ChangeLog

@@ -1,3 +1,17 @@
+2011-04-25	Jennifer Averett <jennifer.averett@OARcorp.com>
+
+	PR 1783/bsps
+	* include/bsp.h: Remove dead prototypes of Clock_delay() and delay().
+	Neither had bodies.
+
+2011-03-04	Joel Sherrill <joel.sherrilL@OARcorp.com>
+
+	PR 1748/bsps
+	* clock/ckinit.c, include/leon.h: When the clock tick generates an
+	interrupt WHILE we have interrupts disabled doing a get TOD or
+	uptime, the get nanoseconds handler was returning a bogusly large
+	number.
+
 2011-02-02	Ralf Corsépius <ralf.corsepius@rtems.org>
 
 	* configure.ac: Require autoconf-2.68, automake-1.11.1.

c/src/lib/libbsp/sparc/leon3/clock/ckinit.c

@@ -97,16 +97,24 @@ static int clkirq;
 uint32_t bsp_clock_nanoseconds_since_last_tick(void)
 {
   uint32_t clicks;
+  uint32_t usecs;
+
   if ( !LEON3_Timer_Regs )
     return 0;
 
   clicks = LEON3_Timer_Regs->timer[0].value;
 
-  /* Down counter */
-  return (uint32_t)
-     (rtems_configuration_get_microseconds_per_tick() - clicks) * 1000;
+  if ( LEON_Is_interrupt_pending( clkirq ) ) {
+    clicks = LEON3_Timer_Regs->timer[0].value;
+    usecs = (2*rtems_configuration_get_microseconds_per_tick() - clicks);
+  } else {
+    usecs = (rtems_configuration_get_microseconds_per_tick() - clicks);
+  }
+  return usecs * 1000;
 }
 
-#define Clock_driver_nanoseconds_since_last_tick bsp_clock_nanoseconds_since_last_tick
+
+#define Clock_driver_nanoseconds_since_last_tick \
+        bsp_clock_nanoseconds_since_last_tick
 
 #include "../../../shared/clockdrv_shell.h"

c/src/lib/libbsp/sparc/leon3/include/bsp.h

@@ -71,14 +71,6 @@ extern int rtems_leon_greth_driver_attach(
 #define RTEMS_BSP_NETWORK_DRIVER_ATTACH RTEMS_BSP_NETWORK_DRIVER_ATTACH_GRETH
 #endif
 
-/*
- *  Simple spin delay in microsecond units for device drivers.
- *  This is very dependent on the clock speed of the target.
- */
-
-extern void Clock_delay(uint32_t microseconds);
-
-#define delay( microseconds ) Clock_delay(microseconds)
 extern int   CPU_SPARC_HAS_SNOOPING;