Commit Graph

32620 Commits

Author SHA1 Message Date
Joel Sherrill
dc632e02e8 lpc2362-testsuite.tcfg: Update to account for static allocation and BSP small memory 2019-03-12 11:01:21 -05:00
Joel Sherrill
aafae0d3f5 lpc1768_mbed_ahb_ram_eth-testsuite.tcfg: Update to account for static allocation and BSP small memory 2019-03-12 11:01:21 -05:00
Joel Sherrill
774ea37ab9 lpc1768_mbed_ahb_ram-testsuite.tcfg: Update to account for static allocation and BSP small memory 2019-03-12 11:01:21 -05:00
Joel Sherrill
17046c9b9a lpc1768_mbed-testsuite.tcfg: Update to account for static allocation and BSP small memory 2019-03-12 11:01:20 -05:00
Joel Sherrill
1526b7b827 lm4f120-testsuite.tcfg: Update to account for static allocation and BSP small memory 2019-03-12 11:01:20 -05:00
Joel Sherrill
bb1f3b48d2 lm3s6965-testsuite.tcfg: Update to account for static allocation and BSP small memory 2019-03-12 11:01:20 -05:00
Joel Sherrill
c8e71bf8db lm3s3749-testsuite.tcfg: Update to account for static allocation and BSP small memory 2019-03-12 11:01:20 -05:00
Joel Sherrill
c10e8b6004 coremsgseize.c: Fix spelling error 2019-03-12 11:01:19 -05:00
Sebastian Huber
1400210989 bsp/lpc24xx: Convert SSP driver to Linux API
Use interrupts instead of polled or DMA driven mode.  Change license to
BSD-2-Clause.

Close #3724.
2019-03-12 15:59:26 +01:00
Sebastian Huber
b2eaa6c69c bsp/lpc24xx: Add alternative SSP2 pins 2019-03-12 15:59:26 +01:00
Sebastian Huber
01a5ced5e6 record: Add more system events
Update #3665.
2019-03-12 13:59:15 +01:00
Sebastian Huber
ebb8c28ee9 record: Add system call entry/exit events
This corresponds to the Linux syscall_entry_* and syscall_exit_* events.

Update #3665.
2019-03-12 13:59:11 +01:00
Sebastian Huber
d91951fbc0 record: Rename internal per-CPU events
Update #3665.
2019-03-12 13:44:24 +01:00
Shashvat Jain
0a154d5c9c Correct psxtmtests_plan.csv 2019-03-11 18:56:56 -05:00
Sebastian Huber
ba34ed9c24 bsp/atsam: Fix use after free 2019-03-11 07:13:05 +01:00
Sebastian Huber
529b58687f bsps: Adjust umon Doxygen groups
Update #3706.
2019-03-08 08:00:47 +01:00
Sebastian Huber
cbf773d310 bsp/atsam: Add Doxygen groups
Add Doxygen groups for contributed code which would otherwise end up at
the top level (about 178 groups).

Update #3706.
2019-03-08 07:42:54 +01:00
Sebastian Huber
f3db383528 bsp/altera-cyclone-v: Add Doxygen groups
Add Doxygen groups for contributed code which would otherwise end up at
the top level.

Update #3706.
2019-03-08 07:42:54 +01:00
Sebastian Huber
15359bb6cb bsps/arm: Adjust CMSIS Doxygen groups
Update #3706.
2019-03-08 07:42:54 +01:00
Sebastian Huber
828276b081 bsps: Adjust shared Doxygen groups
Update #3706.
2019-03-08 07:42:54 +01:00
Sebastian Huber
c991eeeccc bsps: Adjust bsp.h Doxygen groups
Update #3706.
2019-03-08 07:42:54 +01:00
Jonathan Brandmeyer
2e8a66d13f shell: Correct argument order of mfill
Close #3720.
2019-03-08 07:39:42 +01:00
Jonathan Brandmeyer
b1ac3a5770 cpukit/arm: Correct register definition
The register definition for the CP15 PMCR (performance monitor control
register) has the bits for X (export enable) and D (clock divider
enable) backwards.  Correct them according to ARMv7-A/R Architecture
Reference Manual, Rev C, Section B4.1.117.

Consequences: On an implementation that starts off with D set at reset,
the clock divider will not be disabled by using RTEMS' definition of the
D bit.

Tested by using the counter on Xilinx Zynq 7020 to measure some atomic
accesses and cache flushing operations.
2019-03-08 07:39:42 +01:00
Sebastian Huber
3b68442f28 bsps/powerpc: Move mpc55xx header files
They are only used by this BSP.
2019-03-07 10:44:19 +01:00
Chris Johns
ec1dd51aae libdl: Add small data support to the remaining PowerPC BSPs.
Updates #3687
2019-03-07 06:33:47 +11:00
Chris Johns
96e4b22312 testsuite: Make the OPERATION_COUNT a test configuration parameter.
- Add a small memory test config file.
- Update the small memory PowerPC BSPs to use the new test config.
2019-03-07 06:33:47 +11:00
Chris Johns
a06356b455 testsuite: Add rexclude, rinclude and cflags to test config files. 2019-03-07 06:33:47 +11:00
Sebastian Huber
85d5f6c17c bsp/atsam: Accept only 8/16 bits per word
For proper 16 bits per word support we need probably some DMA
adjustments.  For 9 to 15 bits per word we need support for the variable
peripheral select, see SR_MR[PS] register bit.
2019-03-06 13:29:04 +01:00
Sebastian Huber
b82a4b4f52 bsp/atsam: Optimize XDMAD_Handler()
Load the channel interrupt mask only once.
2019-03-06 13:07:17 +01:00
Sebastian Huber
847638af35 bsp/atsam: Fix SPI CS change support
The previous approach contained a severe bug which disabled the SPI
module in some cases leading to a blocked SPI bus.
2019-03-06 13:07:17 +01:00
Sebastian Huber
923a033f57 bsp/atsam: Change CS delay after transfer 2019-03-06 13:07:16 +01:00
Sebastian Huber
b934898562 bsp/atsam: Make SPI CS delays configurable 2019-03-06 13:07:16 +01:00
Sebastian Huber
029262902b bsp/atsam: Simplify SPI configuration
Do not use SPID_Configure() since this will enable the peripheral each
time and performs a software reset.
2019-03-06 13:07:16 +01:00
Sebastian Huber
7604a13087 bsps: Move VME header files
They are only used by PowerPC BSPs.
2019-03-05 09:03:58 +01:00
Sebastian Huber
dbe6e0ad09 bsps/powerpc: Move .rtemstack section
Move the .rtemsstack section from a read-only to a read-write area, see
page table setup in __BSP_default_pgtbl_setup().
2019-03-04 09:25:21 +01:00
Sebastian Huber
e1fc23f057 bsps/powerpc: Fix PAGE_ALIGN() macros
Previous warning fixes which include <sys/param.h> broke this macro.
The definition of PAGE_MASK changed.
2019-03-04 09:25:21 +01:00
Sebastian Huber
9d41fca725 bsp/altera-cyclone-v: Adjust Doxygen file groups
Update #3707.
2019-03-04 07:53:44 +01:00
Sebastian Huber
631ccd7cab bsp/altera-cyclone-v: Adjust Doxygen groups
Update #3706
2019-03-04 07:53:44 +01:00
Sebastian Huber
212663bede bsps: Adjust architecture Doxygen groups
- Use CamelCase as it is not used in our C code.  Enables simple search and
   replace.

 - Prefix with "RTEMS" to aid deployment and integration.  It aids
   searching and sorting.

Update #3706.
2019-03-04 07:51:38 +01:00
Sebastian Huber
a6e39d4a59 Update Doxyfile to Doxygen 1.8.15
Generate Doxygen output in doc and ignore this directory in Git.  Add
RTEMS logo.  The Doxygen documentation is now built using the source
tree.  Just invoke "doxygen" in the top-level source directory.

The Doxyfile works also with at least Doxygen 1.8.13 and Doxygen 1.8.14.

Update #3705.
2019-03-04 07:07:05 +01:00
Sebastian Huber
6016894e0c bsp/lpc1768_mbed*: Disable unsupported tests 2019-03-04 07:06:52 +01:00
Sebastian Huber
5ff61810bc bsp/mpc5643l_*: Disable unsupported tests 2019-03-04 07:04:16 +01:00
Sebastian Huber
77971b6617 bsp/lm4f120: Disable unsupported tests 2019-03-04 07:04:15 +01:00
Sebastian Huber
e6dd36ca70 bsp/gen5200: Remove offending @mainpage
Update #3705.
2019-03-01 11:01:28 +01:00
Sebastian Huber
03b21633d9 score: Fix _Scheduler_EDF_Cancel_job()
Remove the priority node only in case it is active.
2019-03-01 10:12:42 +01:00
Sebastian Huber
a3db5001e5 bsp/altera-cyclone-v: Enable FIQ for group 0 irqs 2019-02-28 11:52:35 +01:00
Sebastian Huber
76918e180a bsps/arm: Add BSP_ARM_GIC_ENABLE_FIQ_FOR_GROUP_0
The following variants

 * GICv1 with Security Extensions,
 * GICv2 without Security Extensions, or
 * within Secure processor mode

have the ability to assign group 0 or 1 to individual interrupts.  Group
0 interrupts can be configured to raise an FIQ exception.  This enables
the use of NMIs with respect to RTEMS.

BSPs can enable this feature with the BSP_ARM_GIC_ENABLE_FIQ_FOR_GROUP_0
define.  Use arm_gic_irq_set_group() to change the group of an
interrupt (default group is 1, if BSP_ARM_GIC_ENABLE_FIQ_FOR_GROUP_0 is
defined).
2019-02-28 11:52:30 +01:00
Sebastian Huber
8e8e269b3e bsps/arm: Fix typo 2019-02-28 11:50:52 +01:00
Sebastian Huber
e33be09cfb bsps/arm: Support GIC group 0/1 2019-02-28 11:50:18 +01:00
Sebastian Huber
feea03b625 Remove explicit file names from @file
This makes the @file documentation independent of the actual file name.

Update #3707.
2019-02-28 11:47:33 +01:00