Commit Graph

35508 Commits

Author SHA1 Message Date
Sebastian Huber
d37baa17e6 libtests/sha: Add tests for SHA384 2022-09-08 16:14:56 +02:00
Sebastian Huber
bea7e5a0ff libtests/sha: Add tests for SHA224 2022-09-08 16:14:56 +02:00
Xin LI
f5ee9a0e0b libmd: Always erase context in _Final method,
and when doing it, consistently use explicit_bzero().

Update manual pages to match the behavior.

Reviewed by:	pfg, allanjude, jmg
MFC after:	1 month
Differential Revision:	https://reviews.freebsd.org/D16316
2022-09-08 16:14:56 +02:00
Conrad Meyer
efd19aa7c1 Implement SHA2-224 submode of SHA2-256
Like SHA2-384:SHA2-512, SHA2-224 is simply a truncated SHA2-256 with a
different initial vector.  Add to round out the complete basic SHA2 family.
2022-09-08 16:14:56 +02:00
Alan Somers
48f7979f5d Fix C++ includability of crypto headers with static array sizes
C99 allows array function parameters to use the static keyword for their
sizes. This tells the compiler that the parameter will have at least the
specified size, and calling code will fail to compile if that guarantee is
not met. However, this syntax is not legal in C++.

This commit reverts r300824, which worked around the problem for
sys/sys/md5.h only, and introduces a new macro: min_size(). min_size(x) can
be used in headers as a static array size, but will still compile in C++
mode.

Reviewed by:	cem, ed
MFC after:	4 weeks
Sponsored by:	Spectra Logic Corp
Differential Revision:	https://reviews.freebsd.org/D8277
2022-09-08 16:14:56 +02:00
Colin Percival
4ebb5f893e Retune SHA2 code for improved performance on CPUs
with more ILP and a preference for memory load instructions over large code
footprints with embedded immediate variables.

On amd64 CPUs from 2007-2008 there is not a significant change, but
amd64 CPUs from 2009-2010 get roughly 10% more throughput with this
code; amd64 CPUs from 2011-2012 get roughly 15% more throughput; and
AMD64 CPUs from 2013-2015 get 20-25% more throughput.  The Raspberry
Pi 2 increases its throughput by 6-8%.

Sponsored by:	Tarsnap Backup Inc.
Performance tested by:	allanjude
MFC after:	3 weeks
2022-09-08 16:14:56 +02:00
Allan Jude
7b4296ed19 Implement SHA-512 truncated (224 and 256 bits)
This implements SHA-512/256, which generates a 256 bit hash by
calculating the SHA-512 then truncating the result. A different initial
value is used, making the result different from the first 256 bits of
the SHA-512 of the same input. SHA-512 is ~50% faster than SHA-256 on
64bit platforms, so the result is a faster 256 bit hash.

The main goal of this implementation is to enable support for this
faster hashing algorithm in ZFS. The feature was introduced into ZFS
in r289422, but is disconnected because SHA-512/256 support was missing.
A further commit will enable it in ZFS.

This is the follow on to r292782

Reviewed by:	cem
Sponsored by:	ScaleEngine Inc.
Differential Revision:	https://reviews.freebsd.org/D6061
2022-09-08 16:14:56 +02:00
Conrad Meyer
3a22e5d30f crypto routines: Hint minimum buffer sizes to the compiler
Use the C99 'static' keyword to hint to the compiler IVs and output digest
sizes.  The keyword informs the compiler of the minimum valid size for a given
array.  Obviously not every pointer can be validated (i.e., the compiler can
produce false negative but not false positive reports).

No functional change.  No ABI change.

Sponsored by:	EMC / Isilon Storage Division
2022-09-08 16:14:56 +02:00
Allan Jude
225e7b9e75 Replace sys/crypto/sha2/sha2.c with lib/libmd/sha512c.c
cperciva's libmd implementation is 5-30% faster

The same was done for SHA256 previously in r263218

cperciva's implementation was lacking SHA-384 which I implemented, validated against OpenSSL and the NIST documentation

Extend sbin/md5 to create sha384(1)

Chase dependancies on sys/crypto/sha2/sha2.{c,h} and replace them with sha512{c.c,.h}

Reviewed by:	cperciva, des, delphij
Approved by:	secteam, bapt (mentor)
MFC after:	2 weeks
Sponsored by:	ScaleEngine Inc.
Differential Revision:	https://reviews.freebsd.org/D3929
2022-09-08 16:14:56 +02:00
Sebastian Huber
120c857ea1 minimum: Do not use unified work areas
The CONFIGURE_UNIFIED_WORK_AREAS option pulls in a system initialization
handler which initializes the unified heap.

Close #4108.
2022-09-08 16:14:56 +02:00
Sebastian Huber
52d566c864 bsp/qoriq: Enable VRSAVE optimization
Close #4712.
2022-09-08 15:54:23 +02:00
Sebastian Huber
d907c2294a powerpc: Add support for VRSAVE
The VRSAVE feature of the Altivec unit can be used to reduce the amount of
Altivec registers which need to be saved/restored during interrupt processing
and context switches.

In order to use the VRSAVE optimization a corresponding multilib (-mvrsave) is
required, see GCC configuration.  The -mvrsave option must be added to the
ABI_FLAGS of the BSP.

Currently only the -mcpu=e6500 based QorIQ BSP support this optimization.

Update #4712.
2022-09-08 15:54:23 +02:00
Sebastian Huber
85d482f122 rtems: Include <rtems/score/cpuopts.h>
Directly include <rtems/score/cpuopts.h> in header files using CPU build
options.
2022-09-08 15:28:54 +02:00
Sebastian Huber
548d005079 score: Improve formatting 2022-09-08 15:28:54 +02:00
Joel Sherrill
dbba943044 pthread_atfork(): Change to behavior from FACE Technical Standard
Closes #4713.
2022-09-06 17:09:11 -05:00
Martin Aberg
9ec9be834d bsp/riscv: Add NOEL-V BSP
Added support for Cobham Gaisler NOEL-V systems. The NOEL-V support
is implemented as a riscv BSP. Both 32-bit and 64-bit processor
systems are supported. Cobham Gaisler's NOEL-V RISC-V processor IP
is described here:
  https://www.gaisler.com/NOELV

Compatible with the following NOEL-V FPGA example design ranges
available from Cobham Gaisler. Follow the links for free
bit-streams, DTS/DTB, user's manuals and quick-start guides:
- NOEL-ARTYA7-EX    (https://www.gaisler.com/NOEL-ARTYA7)
- NOEL-PF-EX        (https://www.gaisler.com/NOEL-PF)
- NOEL-XCKU-EX      (https://www.gaisler.com/NOEL-XCKU)

Uses the shared GRLIB APBUART console driver "apbuart_termios.c".
APBUART devices are probed using device tree.

Closes #4225.
2022-09-06 16:15:58 +02:00
Daniel Cederman
ca07efd571 bsp/riscv: Work area size based on /memory node in fdt
Uses the first entry in the /memory node to determine the end of the
work area. Falls back on linker symbol if unable to parse the node.
2022-09-06 15:51:58 +02:00
Sebastian Huber
33f1223cab config: Add SMP scheduler configuration errors
Issue an error message if an SMP-specific scheduler is used and
RTEMS_SMP is disabled.  This might be a more informative compared to
compiler or linker errors.
2022-09-05 16:21:14 +02:00
Sebastian Huber
4e227f460c validation: CONFIGURE_SCHEDULER_TABLE_ENTRIES
Test this option in a configuration with only one processor.

Update #3716.
2022-09-05 15:46:32 +02:00
Sebastian Huber
444f56cdd8 score: Regenerate <rtems/score/basedefs.h>
Two interface specification items moved.
2022-09-05 15:46:32 +02:00
Sebastian Huber
98353136dd validation: Refine basedefs specification
Update #3716.
2022-09-05 15:46:32 +02:00
Sebastian Huber
e770067283 rtems: Add constraints for rtems_clock_tick() 2022-09-05 15:46:32 +02:00
Sebastian Huber
3247b16f7a Add items to Doxygen groups 2022-09-05 15:46:32 +02:00
Sebastian Huber
9e9ce43dcb validation: Regenerate
Update #4702.
2022-09-05 08:57:42 +02:00
Sebastian Huber
b06ec5b6d7 config: Document CONFIGURE_POSIX_TIMERS_FACE_BEHAVIOR
Update #4691.
2022-09-05 08:57:28 +02:00
Sebastian Huber
b1072f5ae2 validation: Ignore array bounds warnings
Update #4702.
2022-08-31 13:21:02 +02:00
Sebastian Huber
dad6d32271 Fix pedanic warnings without a storage increase
Use RTEMS_ZERO_LENGTH_ARRAY for flexible array member.

Update #4662.
2022-08-31 13:21:02 +02:00
Sebastian Huber
1be6dc18d3 libtest: Fix warnings without a pragma
It seems that recent GCC versions expect that functions with a "const type *"
parameter will read from the referenced location.

Update #4662.
2022-08-31 13:20:49 +02:00
Sebastian Huber
b3d2e3fefe config: Include <rtems/posix/timer.h> on demand
Updates #4691.
2022-08-31 13:18:19 +02:00
Sebastian Huber
c4472cef3e validation: Move flush filter stop validation
This gets rid of a cyclic dependency in the specification graph.

Update #3716.
2022-08-31 11:29:56 +02:00
Sebastian Huber
1dca588f63 validation: Support a partial thread queue flush
Update #3716.
2022-08-31 11:29:37 +02:00
Sebastian Huber
44b3bc65af validation: Fix use of uninitialized variables
Update #4662.
2022-08-30 07:30:42 +02:00
Sebastian Huber
c226990836 score: Do not expose <limits.h> to <rtems.h>
The <rtems.h> header file should not unnecessarily include standard C
header files.  The <string.h> and <limits.h> header includes were
removed in 2017.

Update #4662.
2022-08-30 06:59:37 +02:00
Sebastian Huber
9b16f24d9c score: Fix format
Update #4706.
2022-08-29 09:19:26 +02:00
Sebastian Huber
23b42f79f9 score: Fix format
Update #4706.
2022-08-29 09:15:03 +02:00
Sebastian Huber
3d2fbaf4a3 Revert "linkersets.h: Fix gcc 12 warning"
This reverts commit f930206724.

The linker set begin must be a symbol and not a zero-initialized item.
2022-08-29 08:53:22 +02:00
Chris Johns
a932829b01 libdebugger/aarch64: Set .start section to RW
- Stops the server crashing when setting breakpoints in .start
2022-08-25 14:10:21 +10:00
Chris Johns
a3b0f7d5a8 bsps/xilinx/versal: Add Cadence I2C driver support 2022-08-25 09:25:03 +10:00
Stephen Clark
c738be92a0 bsps/amd64: remove -Werror from ABI flags
The ABI flags for the amd64 BSP contain the -Werror=return-type flag. There is no reason for this to be there so it has been removed. The same option has also been removed amd64.cfg file.
2022-08-23 11:37:21 -05:00
Chris Johns
dee5ea8147 bsps/xilinx/versal: Remove IPL32 BSPs, add aiedge and change defaults
- Versal has IO mapped to the upper 64bit address space and
  needs full 64bit addresses.

- Add xilinx_versal_aiedge for custom hardware

- Make the hardware settings the defaults and qemu as variants

Closes #4693
2022-08-23 07:55:25 +10:00
Chris Johns
a329579ed5 cpukit/include: Fix including in C++
UPdates #4706
2022-08-22 08:30:00 +10:00
Chris Johns
f5233fe51c cpukit/include: Fixes for C++
Updates #4706
2022-08-22 08:30:00 +10:00
Chris Johns
eae542c02f spec/librtemscpu: Fix installed headers
- pci.h is only for sparc

- keyimpl.h is not referenced and so not needed

Updates #4705
2022-08-22 08:30:00 +10:00
Chris Johns
bb09755086 spec/bsps/aarch64: Install ELF machine types for libdl
Updates #4705
2022-08-22 08:30:00 +10:00
Chris Johns
e49a1c9b38 spec/bsps: Do not install tm27.h
Updates #4705
2022-08-22 08:30:00 +10:00
Ryan Long
f045b9ddd8 psxkey07/init.c: Add pragma for gcc 12 warning
Updates #4662
2022-08-19 15:34:47 -05:00
Ryan Long
f60f349d86 psxclock/init.c: Change print format for warning
Updates #4662
2022-08-19 15:34:47 -05:00
Ryan Long
978022eeb0 ttest01/test-checks.c: Initialize variables
These uninitialized variables were causing warnings to be generated.

Updates #4662
2022-08-19 15:34:47 -05:00
Ryan Long
a447b9b377 malloctest/init.c: Added pragmas to address gcc 12 warnings
Updates #4662
2022-08-19 15:34:47 -05:00
Ryan Long
dc0dcccf41 dl09/dl-load.c: Fix gcc 12 warning
Changed format of size_t variable being printed.

Updates #4662
2022-08-19 15:34:47 -05:00