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28,910 Commits 7 Branches 54 Tags
d0cffc73fcd75ddb468fb0639969bbcb8e4931ec
Commit Graph

1677 Commits

Author SHA1 Message Date
Joel Sherrill
d0cffc73fc libcpu/m68k/mcf5206/clock/ckinit.c: Fix warning by including <rtems/clockdrv.h> 2016-03-27 18:41:51 -05:00
Joel Sherrill
6b597c397b libcpu/bfin/clock/clock.c: Fix warning by including <rtems/clockdrv.h> 2016-03-27 18:41:34 -05:00
Daniel Hellstrom
6c4aaf4f31 sparc: Fix window underflow trap handler 
The window underflow trap handler used %i5 which destroyed the %o5 of
the calling context.  Bug introduced by
0d3b5d4742.

Go back to the pre 0d3b5d4742 behaviour
and use the two unused instructions in the trap vector to optimize a
bit.

Update #2651.
 2016-03-17 11:09:08 +01:00
Joel Sherrill
328bd350aa i386: refactor libcpu/cpu.h into rtems/score/i386.h 
Fixes #2515.
 2016-03-03 16:36:30 -05:00
Martin Galvan
8c5c53f478 am335x irq handling improvement 
This patch makes the following changes to the Beaglebone IRQ handling code:

- Disable support for nested interrupts.
- Detect spurious IRQs using the SPURIOUSIRQ field of the INTC_SIR_IRQ register.
- Acknowledge spurious IRQs by setting the NewIRQAgr bit of the INTC_CONTROL
  register. This cleans the SPURIOUSIRQ field and allows new interrupts
  to be generated.
- Improve the get_mir_reg function a bit.

Closes #2580.
 2016-02-28 00:23:02 +01:00
Sebastian Huber
3bc12a8f5a Delete unused API extensions 2016-02-03 10:00:58 +01:00
Sebastian Huber
a8865f8b41 score: Introduce CPU_CACHE_LINE_BYTES 
Add CPU_CACHE_LINE_BYTES for the maximum cache line size in bytes.  The
actual processor may use no cache or a smaller cache line size.
 2016-01-26 09:07:30 +01:00
Sebastian Huber
76ac1ee3bb score: Fix simple timecounter support 
Update #2502.
 2016-01-19 08:36:14 +01:00
Sebastian Huber
ccd54344d9 score: Introduce Thread_Entry_information 
This avoids potential dead code in _Thread_Handler().  It gets rid of
the dangerous function pointer casts.

Update #2514.
 2016-01-11 08:47:01 +01:00
Sebastian Huber
5c7bfcf82e Fix interrupt epilogue for ARMv7-AR and PowerPC 2015-11-12 08:21:45 +01:00
Sebastian Huber
bc792bb3bd basdefs.h: Add and use RTEMS_PACKED 2015-10-26 09:13:19 +01:00
Sebastian Huber
258ad71e96 SMP: Fix and optimize thread dispatching 
According to the C11 and C++11 memory models only a read-modify-write
operation guarantees that we read the last value written in modification
order.  Avoid the sequential consistent thread fence and instead use the
inter-processor interrupt to set the thread dispatch necessary
indicator.
 2015-09-28 13:56:57 +02:00
Ketul Shah
151e53feab Beagle: GPIO support (for BBB) 
GPIO Driver Development for BeagleBone Black based on the generic GPIO API
 2015-08-18 17:05:55 +02:00
Sebastian Huber
e5a79e54d9 bsp/mpc83xx: Update due to header guard change 
Close #2373.
 2015-07-17 07:59:35 +02:00
Sebastian Huber
b171982439 bsps/powerpc: Provide debug and trace symbols 2015-07-08 10:07:59 +02:00
Sebastian Huber
48fed9a56e score: Simplify <rtems/system.h> 
Drop the <rtems/score/percpu.h> include since this file exposes a lot of
implementation details.
 2015-06-26 09:16:25 +02:00
Sebastian Huber
335e5caa9a score: Add Thread_Control::is_fp 
Store the floating-point unit property in the thread control block
regardless of the CPU_HARDWARE_FP and CPU_SOFTWARE_FP settings.  Make
sure the floating-point unit is only enabled for the corresponding
multilibs.  This helps targets which have a volatile only floating point
context like SPARC for example.
 2015-06-09 09:05:50 +02:00
Sebastian Huber
aff220db7a bsps/powerpc: Fix potential integer overflow 
Update #2356.
 2015-05-29 08:59:59 +02:00
ragunath
d55d7a067f beagle bsp: RTC support for BBB 2015-05-28 14:41:37 +02:00
Joel Sherrill
60e4c0094a arm/s3c24xx/clock/clockdrv.c: Remove unused variable warning 2015-05-21 08:28:58 -07:00
Joel Sherrill
562c1b1b6d arm/lpc22xx/clock/clockdrv.c: Remove unused variable warning 2015-05-21 08:28:56 -07:00
Alexander Krutwig
75acd9e69f bsps: Convert clock drivers to use a timecounter 
Update #2271.
 2015-05-20 08:40:34 +02:00
Sebastian Huber
7f53035504 bsps/sparc: Use inline functions for cache manager 2015-04-27 10:11:47 +02:00
Sebastian Huber
4bf2a6aa09 bsps/cache: Clarify range functions support 2015-04-27 09:40:16 +02:00
Hesham ALMatary
1602bf3973 Fix broken BSPs due to a shared cache function declaration. 
Get rid of _CPU_cache_invalidate_instruction_range declaration
as it doesn't make sense here.
 2015-04-27 09:25:39 +02:00
Sebastian Huber
26c142e5ad score: Refactor SMP cache manager support 2015-04-20 08:23:25 +02:00
Sebastian Huber
d4edbdbcbf Replace www.rtems.com with www.rtems.org 2015-03-20 15:42:34 +01:00
Daniel Cederman
665928a9b5 rtems: Use atomic operation with correct type 2015-03-20 12:00:00 +01:00
Joel Sherrill
24868ecb92 libcpu/bfin/clock/rtc.c: Do not use rtems_clock_get() 2015-03-17 10:05:05 -05:00
Joel Sherrill
9cc1892650 libcpu/powerpc/mpc8260/console-generic/console-generic.c: Include bsp.h to fix warning 2015-03-09 16:14:18 -05:00
Gedare Bloom
9d090fb70a sparc64: fix copyright notices. 
The sparc64 port had some incorrect copyright notices affixed to
source code files.
 2015-02-23 15:42:59 -05:00
Nick Withers
d11b711b3e bsps/powerpc: Fix a clock driver 
PowerPC Book E: Account for an extra tick period if a tick increment's
pending.

Close #2230.
 2015-01-30 06:57:00 +01:00
Sebastian Huber
f63e9a3aa8 bsps/powerpc: Fix switch statement in CPU ident 
Close #2237.
 2015-01-23 11:31:54 +01:00
Sebastian Huber
60d39b66e0 powerpc: Fix AltiVec VSCR save/restore 2015-01-20 14:01:50 +01:00
Joel Sherrill
85dbf520f8 libcpu/powerpc/mpc6xx/mmu/bat.c: Now compiles with gcc 5.x 2015-01-13 15:41:32 -06:00
Sebastian Huber
3e2647a714 powerpc: AltiVec and FPU context support 
Add AltiVec and FPU support to the Context_Control in case we use the
e6500 multilib.

Add PPC_MULTILIB_ALTIVEC and PPC_MULTILIB_FPU multilib defines.  Add
non-volatile AltiVec and FPU context to Context_Control.  Add save/restore of
non-volatile AltiVec and FPU to _CPU_Context_switch().  Add save/restore
of volatile AltiVec and FPU context to the exception code.  Adjust data
cache optimizations for the new context and cache line size.
 2015-01-13 11:37:28 +01:00
Sebastian Huber
c279d0a33f bsps/powerpc: Use e500 exc categories for e6500 
This is not correct, but works for now.
 2015-01-13 11:37:28 +01:00
Sebastian Huber
2e19bfde2f powerpc: Use PPC_HAS_FPU 
Provide floating point context support only if PPC_HAS_FPU == 1.
 2015-01-09 14:05:46 +01:00
Sebastian Huber
7c16e1a514 powerpc: Set PPC_DEFAULT_CACHE_LINE_SIZE for e6500 2015-01-09 14:05:08 +01:00
Sebastian Huber
84d3b9b0a2 powerpc: Use PPC_DEFAULT_CACHE_LINE_SIZE 
Use it for the default PPC_CACHE_ALIGNMENT.  Use it for
PPC_STRUCTURE_ALIGNMENT.
 2015-01-09 14:03:35 +01:00
Sebastian Huber
71b611d172 bsps/powerpc: ppc_exc_initialize_interrupt_stack() 2015-01-09 14:03:34 +01:00
Sebastian Huber
7bad67256e bsps/powerpc: Add TMR access macros 2015-01-09 14:03:34 +01:00
Sebastian Huber
c32a128cb2 bsps/powerpc: Add cache size functions 2015-01-09 14:03:34 +01:00
Sebastian Huber
7d26f60a1b bsps/powerpc: Delete C pre-processor warning 
Do not warn about not implemented cache functions.
 2015-01-09 14:03:34 +01:00
Sebastian Huber
5175ac6a87 bsps/powerpc: Support a cache alignment of 64 
Give the BSP the ability to define PPC_CACHE_ALIGNMENT.
 2015-01-09 14:03:33 +01:00
Sebastian Huber
f6660bfba4 bsps/powerpc: Support e6500 indentification 2015-01-09 14:03:33 +01:00
Sebastian Huber
fca5892454 bsps/mpc83xx: Fix warnings 2015-01-09 14:03:33 +01:00
Nick Withers
2d5c486914 Use fixed-width C99 types for PowerPC in_be16() and co. 
Also use the const qualifier on the address pointer's target in in_*()

Closes #2128
 2014-12-23 22:40:32 -05:00
Sebastian Huber
3cd3a260a6 bsp/mpc8xx: Fix warnings 
close #2211
 2014-12-12 16:36:39 +01:00
Sebastian Huber
3507f3f953 bsp/mpc8xx: Fix warnings 
close #2211
 2014-12-12 15:32:40 +01:00