Commit Graph

264 Commits

Author SHA1 Message Date
Joel Sherrill
9da42fb87a powerpc/cpu.h: Define CPU_SIMPLE_VECTORED_INTERRUPTS and remove _CPU_ISR_Initialize 2012-06-11 13:00:57 -05:00
Sebastian Huber
1869bb7101 powerpc: Simplify context switch
PowerPC cores with the SPE (Signal Processing Extension) have 64-bit
general-purpose registers.  The SPE context switch code has been merged
with the standard context switch code.  The context switch may use cache
operations to increase the performance.  It will be ensured that the
context is 32-byte aligned (PPC_DEFAULT_CACHE_LINE_SIZE).  This
increases the overall memory size of the context area in the thread
control block slightly.  The general-purpose registers GPR2 and GPR13
are no longer part of the context.  The BSP must initialize these
registers during startup (usually initialized by the __eabi() function).

The new BSP option BSP_USE_DATA_CACHE_BLOCK_TOUCH can be used to enable
the dcbt instruction in the context switch.

The new BSP option BSP_USE_SYNC_IN_CONTEXT_SWITCH can be used to enable
sync and isync instructions in the context switch.  This should be not
necessary in most cases.
2012-06-04 09:54:31 +02:00
Joel Sherrill
9b4422a251 Remove All CVS Id Strings Possible Using a Script
Script does what is expected and tries to do it as
smartly as possible.

+ remove occurrences of two blank comment lines
  next to each other after Id string line removed.
+ remove entire comment blocks which only exited to
  contain CVS Ids
+ If the processing left a blank line at the top of
  a file, it was removed.
2012-05-11 08:44:13 -05:00
Joel Sherrill
826fa6b169 Score ISR - Minimize Capabilities When Not Simple Vectored
In particular CPU_INTERRUPT_NUMBER_OF_VECTORS and
CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER are only used on
Simple Vectored Architectures, so do not depend on
them being defined. This disables as much as possible
that is specific to the Simple Vectored Model and
not expected to be used on architectures which use
the Programmable Interrupt Controller model for
interrupt handler vectoring.
2012-05-09 16:55:10 -05:00
Joel Sherrill
33a105fb69 Revert: Remove CVS Ids
See http://www.rtems.org/pipermail/rtems-devel/2012-May/001006.html
for details.
2012-05-07 11:08:48 -05:00
Ralf Corsépius
ee32f67a6f Remove CVS-Ids. 2012-05-04 09:36:25 +02:00
Ric Claus
16a86162a2 Add Virtex4 and Virtex5 BSPs
This commit covers at least PR2020, 2022, and 2023. This
patch adds all of the code for both BSPs, modifications
to libcpu/powerpc for the ppc440, and some updates to the
BSPs from follow up review and testing.

These BSPs should be good baselines for future development.
The configurations used by Ric are custom and have a non-standard
NIC. They also do not have a UART.  Thus the current console
driver just prints to a RAM buffer.

The NIC and UART support are left for future work. When the UART
support is added, moving the existing "to RAM" console driver to
a shared location is likely desirable because boards with no debug
UART port are commonly deployed. This would let printk() go to RAM.
2012-03-30 10:03:43 -05:00
Joel Sherrill
61250b4ce9 Remove all .cvsignore files. 2012-02-01 10:59:44 -06:00
Sebastian Huber
7e0ef0f7b3 2011-12-06 Sebastian Huber <sebastian.huber@embedded-brains.de>
* rtems/powerpc/registers.h: More register defines.
2011-12-06 14:06:39 +00:00
Sebastian Huber
9c121991d7 2011-09-27 Sebastian Huber <sebastian.huber@embedded-brains.de>
PR 1914/cpukit
	* rtems/score/cpu.h: Select timestamp implementation.
2011-09-27 09:18:25 +00:00
Sebastian Huber
5be93c2a24 2011-08-30 Peter Dufault <dufault@hda.com>
* rtems/score/cpu.h: Add more context access functionality.  Needed to
	get GDB debugger hooks working.
2011-08-30 14:05:50 +00:00
Sebastian Huber
cf3d1948b0 2011-08-24 Sebastian Huber <sebastian.huber@embedded-brains.de>
* rtems/powerpc/registers.h: Renamed defines XER in PPC_XER, LR in
	PPC_LR, CTR in PPC_CTR, PVR in PPC_PVR, RPA in PPC_RPA, DAR in
	PPC_DAR, DEC in PPC_DEC, and EAR in PPC_EAR.
2011-08-24 09:43:06 +00:00
Sebastian Huber
c3ba11ac68 2011-07-21 Sebastian Huber <sebastian.huber@embedded-brains.de>
* rtems/score/cpu.h: Added SPE support to CPU context.
2011-07-21 14:49:47 +00:00
Ralf Corsepius
b3eb2fb9e8 2011-05-17 Ralf Corsépius <ralf.corsepius@rtems.org>
* Makefile.am: Reformat.
2011-05-17 14:54:13 +00:00
Sebastian Huber
259609765f 2011-05-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
* rtems/powerpc/registers.h: Added FSL_EIS_SVR define.
2011-05-11 08:43:28 +00:00
Sebastian Huber
8224b76f1a 2011-02-16 Sebastian Huber <sebastian.huber@embedded-brains.de>
* rtems/powerpc/registers.h: Added FSL_EIS_ATBL, FSL_EIS_ATBL, and
	FSL_EIS_SPEFSCR defines.
2011-02-16 08:27:14 +00:00
Sebastian Huber
cffdf7b3f6 2011-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
* rtems/powerpc/registers.h: Added MSR_UCLE, MSR_SPE, MSR_WE, and
	MSR_UBLE defines.
2011-02-15 07:45:16 +00:00
Ralf Corsepius
3631c234d8 2011-02-11 Ralf Corsépius <ralf.corsepius@rtems.org>
* rtems/powerpc/registers.h, rtems/score/cpu.h:
	Use "__asm__" instead of "asm" for improved c99-compliance.
2011-02-11 09:24:09 +00:00
Sebastian Huber
7171baf72b 2011-01-31 Sebastian Huber <sebastian.huber@embedded-brains.de>
* rtems/powerpc/registers.h: Changed Freescale EIS prefix.  More
	Freescale EIS defines.  Added MSR_IS, MSR_DS, and MSR_PMM defines.
2011-01-31 15:46:13 +00:00
Joel Sherrill
dcf368747f 2011-01-28 Joel Sherrill <joel.sherrilL@OARcorp.com>
* include/rtems/bspIo.h, include/rtems/concat.h, include/rtems/irq.h,
	score/cpu/i386/rtems/score/idtr.h,
	score/cpu/powerpc/rtems/powerpc/registers.h,
	score/src/objectidtoname.c, score/src/schedulerpriorityblock.c,
	score/src/schedulerpriorityschedule.c,
	score/src/schedulerpriorityunblock.c,
	score/src/schedulerpriorityyield.c, score/src/thread.c,
	score/src/threadchangepriority.c, score/src/threadclearstate.c,
	score/src/threadclose.c, score/src/threadcreateidle.c,
	score/src/threaddelayended.c, score/src/threaddispatch.c,
	score/src/threadget.c, score/src/threadhandler.c,
	score/src/threadinitialize.c, score/src/threadloadenv.c,
	score/src/threadready.c, score/src/threadreset.c,
	score/src/threadrestart.c, score/src/threadresume.c,
	score/src/threadsetpriority.c, score/src/threadsetstate.c,
	score/src/threadsettransient.c, score/src/threadstackallocate.c,
	score/src/threadstackfree.c, score/src/threadstart.c,
	score/src/threadstartmultitasking.c, score/src/threadsuspend.c,
	score/src/threadtickletimeslice.c, score/src/threadyieldprocessor.c:
	Fix typo where license said found in found in.
2011-01-28 20:24:54 +00:00
Sebastian Huber
20109f3089 2011-01-26 Sebastian Huber <sebastian.huber@embedded-brains.de>
* rtems/powerpc/registers.h: Added BOOKE_PIR define.
2011-01-26 15:20:46 +00:00
Sebastian Huber
4b25ab8b9c 2010-10-29 Sebastian Huber <sebastian.huber@embedded-brains.de>
* rtems/powerpc/registers.h: Added HID2 define.  Fixed comments.
2010-10-29 07:32:30 +00:00
Joel Sherrill
479cbaf81d 2010-10-21 Joel Sherrill <joel.sherrill@oarcorp.com>
* rtems/score/cpu.h: Add RTEMS_COMPILER_NO_RETURN_ATTRIBUTE to
	_CPU_Context_restore() because it does not return. Telling GCC this
	avoids generation of dead code.
2010-10-21 22:18:05 +00:00
Joel Sherrill
4ef13360d6 2010-07-29 Gedare Bloom <giddyup44@yahoo.com>
PR 1635/cpukit
	* rtems/score/cpu.h, rtems/score/types.h: Refactoring of priority
	handling, to isolate the bitmap implementation of priorities in the
	supercore so that priority management is a little more modular. This
	change is in anticipation of scheduler implementations that can
	select how they manage tracking priority levels / finding the highest
	priority ready task. Note that most of the changes here are simple
	renaming, to clarify the use of the bitmap-based priority management.
2010-07-29 17:51:56 +00:00
Sebastian Huber
af16a7d29a 2010-07-16 Sebastian Huber <sebastian.huber@embedded-brains.de>
* rtems/new-exceptions/cpu.h: Removed file.
	* Makefile.am, preinstall.am: Reflect change above.
	* rtems/score/cpu.h: Include <rtems/score/types.h> first.  Added
	contents of <rtems/new-exceptions/cpu.h>.
	* rtems/score/types.h: Use <rtems/score/basedefs.h> header file.
2010-07-16 08:45:02 +00:00
Sebastian Huber
390dadd2c5 2010-06-30 Peter Dufault <dufault@hda.com>
PR 1588/cpukit
	* rtems/powerpc/registers.h: Renamed defines SR0 .. SR15 in
	PPC_SR0 ..  PPC_SR15.
2010-06-30 07:43:00 +00:00
Joel Sherrill
b275a14463 2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com>
PR 1573/cpukit
	* rtems/new-exceptions/cpu.h: Add a per cpu data structure which
	contains the information required by RTEMS for each CPU core. This
	encapsulates information such as thread executing, heir, idle and
	dispatch needed.
2010-06-29 00:33:15 +00:00
Joel Sherrill
8eff201acf 2010-03-27 Joel Sherrill <joel.sherrill@oarcorp.com>
* cpu.c: Add include of config.h
2010-03-27 15:02:31 +00:00
Ralf Corsepius
5bb38e1566 Whitespace removal. 2009-12-04 05:25:30 +00:00
Till Straumann
6c28773ec4 2009-12-01 Till Straumann <strauman@slac.stanford.edu>
* score/cpu/powerpc/rtems/score/cpu.h: Added space for non-
	volatile AltiVec registers to context struct. Added declaration
	for AltiVec-related routines to be implemented by CPU/BSP
	support.
2009-12-02 01:24:52 +00:00
Thomas Doerfler
3fcc78aef9 move timebase access functions from cpukit to libcpu 2009-10-30 19:28:46 +00:00
Thomas Doerfler
2067679bb3 * rtems/powerpc/registers.h: Added defines DEAR_BOOKE and DEAR_405.
* rtems/score/cpu.h: Changed fpscr field to an integer type in
        Context_Control_fp.  Fixed warnings in PPC_Set_timebase_register().
        Changed _CPU_Context_Initialize_fp() to initialize all fields and
        avoid floating-point instructions.
        * rtems/score/powerpc.h: Removed PPC_INIT_FPSCR define.
2009-10-21 13:19:09 +00:00
Thomas Doerfler
cd4ed38422 * rtems/powerpc/registers.h: Added Freescale Book E Implementation
Standards (EIS) special purpose register definitions for MMU and L1
	cache.
2009-02-27 11:06:21 +00:00
Joel Sherrill
ef1be69b65 2009-02-11 Joel Sherrill <joel.sherrill@oarcorp.com>
* rtems/new-exceptions/cpu.h, rtems/score/cpu.h: Eliminate
	_CPU_Thread_dispatch_pointer and passing address of _Thread_Dispatch
	to _CPU_Initialize. Clean up comments.
2009-02-11 21:44:59 +00:00
Ralf Corsepius
1cb54d1f38 #include <stdint.h> instead of <rtems/stdint.h>. 2008-12-11 00:47:56 +00:00
Joel Sherrill
5c8d42b7b2 2008-09-14 Joel Sherrill <joel.sherrill@oarcorp.com>
* rtems/score/cpu.h: Move extern of bsp_clicks_per_usec so it is not
	nested inside braces.
2008-09-14 23:17:13 +00:00
Ralf Corsepius
6162bc2a1d 2008-09-11 Ralf Corsépius <ralf.corsepius@rtems.org>
* rtems/score/types.h: Do not define boolean, single_precision,
	double_precision unless RTEMS_DEPRECATED_TYPES is given.
2008-09-11 14:10:16 +00:00
Ralf Corsepius
5d42c1b7bc Convert to "bool". 2008-09-05 02:00:15 +00:00
Ralf Corsepius
8f5cdbb8ec 2008-09-05 Ralf Corsépius <ralf.corsepius@rtems.org>
* rtems/new-exceptions/cpu.h, rtems/score/cpu.h: Convert to "bool".
2008-09-05 01:59:18 +00:00
Ralf Corsepius
b7b6100115 2008-08-21 Ralf Corsépius <ralf.corsepius@rtems.org>
* rtems/score/types.h: Include stdbool.h.
	Use bool as base-type for boolean.
2008-08-21 04:10:51 +00:00
Ralf Corsepius
30e2df697a Include stdbool.h. Use bool as base-type for boolean. 2008-08-21 04:10:35 +00:00
Ralf Corsepius
75da3f5599 Cosmetic indentation fixes. 2008-08-16 04:06:34 +00:00
Joel Sherrill
b281e425ab 2008-08-14 Sebastian Huber <sebastian.huber@embedded-brains.de>
* rtems/powerpc/registers.h: Removed obsolete defines MSR_, MSR_KERNEL
	and MSR_USER.  Added missing prototypes.
2008-08-14 15:24:51 +00:00
Joel Sherrill
334b3c1e83 2008-08-04 Sebastian Huber <sebastian.huber@embedded-brains.de>
* rtems/new-exceptions/cpu.h: Changed define
	CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER to UINT32_MAX to avoid comparison
	between signed and unsigned.
2008-08-05 13:32:27 +00:00
Thomas Doerfler
d3c321367c Changed special purpose register inline functions to macros.
fixed some minors in mpc83xx support
added file for mpc55xx watchdog support
2008-07-18 15:56:48 +00:00
Till Straumann
3d28361d19 2008-07-16 Till Straumann <strauman@slac.stanford.edu>
* score/cpu/powerpc/rtems/new-exceptions/cpu.h:
	use ppc_interrupt_get_disable_mask() to determine
	which bits to set/clear from _CPU_ISR_Set_level().
2008-07-16 21:52:04 +00:00
Till Straumann
441c930dc1 2008-07-16 Till Straumann <strauman@slac.stanford.edu>
* score/cpu/powerpc/rtems/powerpc/registers.h:
	added ppc_interrupt_get_disable_mask() inline function.
2008-07-16 21:47:04 +00:00
Thomas Doerfler
3c6fe2e7f9 added haleakala BSP contributed by Michael Hamel 2008-07-14 08:46:06 +00:00
Thomas Doerfler
767cdd8470 adapted for modified exception code 2008-07-11 10:04:40 +00:00
Till Straumann
06aab392f0 2008-07-10 Till Straumann <strauman@slac.stanford.edu>
* cpukit/score/cpu/powerpc/rtems/new-exceptions/cpu.h,
	cpukit/score/cpu/powerpc/rtems/score/cpu.h,
	cpukit/score/cpu/powerpc/rtems/score/powerpc.h:
	Removed all macro definitions which depended on
	the compiler defining a PPC CPU-model dependent
	symbol.
	Macros which were not used by cpukit have been
	moved to libcpu/powerpc/rtems/powerpc/powerpc.h.
2008-07-10 21:48:24 +00:00