The number of GPIO devices along with each of their particular
configurations is application-specific. Encoding this information as
build options also introduced a lot of clutter.
The new amd64efi BSP supports:
- multiboot2 boot format. Runs well with GRUB.
- console based on either EFI simple text output or GOP-based framebuffer
- clock based on EFI event/timer API
- early console using either hard-wired PC-AT serial or just memory buffer
- with EFI support disabled the BSP is more or less equivalent to amd64 BSP
with multiboot2 support
The library is imported in minimalist version just to support future
amd64efi BSP.
The FreeBSD tree commit id with imported libefi version is:
ce7b20e5129cf0f269951b313d336a9c7d54d790
The MMU must be enabled during mapping changes and TLB invalidations.
When this is not the case, TLB updates do not occur correctly in all
cases. This is especially apparent when changing a block entry to a
table entry when remapping small memory ranges in an otherwise
contiguous block.
This patch adds support for the Kendryte K210 RISC-V BSP variant.
The SoC uses the existing Interrupt Controller, Timer, and console UART.
It only needs SoC specific initialization and an embedded device tree binary
similar to the polarfire SoC BSP.
Updates #4876
This patch adds the k210 device tree source and the corresponding
device tree blob encoded in the header which is used for the
embedded device tree blob for the Kendryte K210 BSP variant.
Updates #4876
The existing include path only works from inside the RTEMS build. This
fixes the include path to work both in the RTEMS build and with builds
of external apps since this file gets installed with the BSP.
Use the mtimecmp from the PLIC/CLINT initialization in the clock driver. This
register is defined by the device tree and does not assume a fixed mapping.
In SMP configurations, check that we run on a configured processor. If not,
then there is not much that can be done since we do not have a stack available
for this processor. Just loop forever in this case. Do this in assemlby to
ensure that no stack memory is used.
Interrupts must be disabled during MMU remapping since the majority of
RTEMS including interrupts expects normal memory mapping semantics such
as unaligned accesses.
The whole cache invalidation and flushing functions only ended up
flusing the first N-1 levels of cache due to an off by one error. This
resovles that issue and makes consistent the usage of levels as they
relate to caching.
To ensure data consistency, the cache much be flushed before disabling
the MMU. When the MMU is disabled, all accesses are treated as
non-cachced and thus will bypass the cache.
The LEON3_Boot_Cpu global object is only used by start.S. Move the definition
of this object to start.S and use a local symbol .Lbootcpuindex for it.
Use a compare-and-swap instruction to assign the boot CPU. This allows a
concurrent initialization.
Close#4845.
This imports the full xil_exception.h instead of an empty stub. This is
required for some Xilinx drivers. The imported files adhere to the
current VERSION file.
This makes xil/sleep.h a stub to prevent multiple differing definitions
of sleep functions from toolchain and local headers. The non-standard
sleep definitions were not in use and can be added later if needed.
The QSPI memory is initialized and used only when the BSP configure file
sets QSPI memory size to non-zero value. Currently QSPI is run in memory
mapped mode which allows future RTEMS binary linkage and upload into QSPI
memory.
Sponsored-By: Precidata
