Rename NGMP to GR740 and add configs for UT699, UT700, and GR712RC
The UT699 requires -mcpu=leon as it does not support the CAS instruction
provided by -mcpu=leon3. It also requires -mfix-ut699 for errata fixes.
UT700 and GR712RC requires the -mfix-ut700 and -mfix-gr712rc flags that
have been recently added to GCC's master and 7-branch.
Remove -msoft-float from the leon3 config to make the more common case
of using the FPU the default.
Update #3057.
This patch adds NOP instructions to prevent instruction sequences
that are sensitive to the LEON3FT B2BST errata. See GRLIB-TN-0009:
"LEON3FT Stale Cache Entry After Store with Data Tag Parity Error"
for more information.
The sequences are only modified if __FIX_LEON3FT_B2BST is defined.
The patch works in conjunction with the -mfix-ut700, -mfix-gr712rc,
and -mfix-ut699 GCC flags that prevents the sensitive sequences from
being generated.
Update #3057.
Added a mmap file handler to struct _rtems_filesystem_file_handlers_r.
Updated each file handler object to support the default mmap handler.
Updated mmap() to call the mmap handler for MAP_SHARED.
Added a mmap file handler for shm
Added support for MAP_ANON in mmap().
Updates #2859
The EDF SMP scheduler supports simple thread processor affinities
(see #3059) with a small run-time overhead. The current default SMP
scheduler lacks support for thread processor affinities at all. The EDF
SMP scheduler offers a good feature set for most applications. So, use
it by default. Run-time libraries like libgomp, MTAPI, work stealing
schedulers, language interpreters (e.g. Erlang virtual machine),
maintainence of per-processor data (e.g. Universal Memory Allocator
(UMA)), etc. use a one-to-one thread processor affinity for example.
Update #3063.
The set of online processors must be a subset of the thread processor
affinity for the schedulers without arbitrary processor affinity support
to avoid problems in case of processor addition and removal.
Update #3059.
Account for the thread processor affinity and make sure that it is
possible to allocate a processor to each thread dedicated to a scheduler
instance.
Update #3059.
Implement the Processor_mask via <sys/bitset.h>. Provide
_Processor_mask_To_uint32_t() to enable its use in device specific
routines, e.g. interrupt affinity register in an interrupt controller.
Update #3059.
Right after a "msr basepri_max, %[basepri]" instruction an interrupt
service may still take place (observed at least on Cortex-M7). However,
pendable service calls that are activated during this interrupt service
may be delayed until interrupts are enable again. The
_ARMV7M_Pendable_service_call() did not check that a thread dispatch is
allowed. Move this test from _ARMV7M_Interrupt_service_leave() to
_ARMV7M_Pendable_service_call().
Update #3060.
