forked from Imagelibrary/rtems
@@ -153,20 +153,24 @@ rtems_status_code arm_gic_irq_get_priority(
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return sc;
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}
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rtems_status_code arm_gic_irq_set_affinity(
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void bsp_interrupt_set_affinity(
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rtems_vector_number vector,
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uint8_t targets
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const Processor_mask *affinity
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)
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{
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rtems_status_code sc = RTEMS_SUCCESSFUL;
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volatile gic_dist *dist = ARM_GIC_DIST;
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uint8_t targets = (uint8_t) _Processor_mask_To_uint32_t(affinity, 0);
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if (bsp_interrupt_is_valid_vector(vector)) {
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volatile gic_dist *dist = ARM_GIC_DIST;
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gic_id_set_targets(dist, vector, targets);
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} else {
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sc = RTEMS_INVALID_ID;
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}
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return sc;
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gic_id_set_targets(dist, vector, targets);
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}
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void bsp_interrupt_get_affinity(
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rtems_vector_number vector,
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Processor_mask *affinity
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)
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{
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volatile gic_dist *dist = ARM_GIC_DIST;
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uint8_t targets = gic_id_get_targets(dist, vector);
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_Processor_mask_From_uint32_t(affinity, targets, 0);
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}
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@@ -58,9 +58,14 @@ rtems_status_code arm_gic_irq_get_priority(
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uint8_t *priority
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);
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rtems_status_code arm_gic_irq_set_affinity(
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void bsp_interrupt_set_affinity(
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rtems_vector_number vector,
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uint8_t targets
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const Processor_mask *affinity
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);
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void bsp_interrupt_get_affinity(
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rtems_vector_number vector,
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Processor_mask *affinity
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);
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typedef enum {
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@@ -56,12 +56,11 @@ static void qoriq_clock_handler_install(rtems_isr_entry *old_isr)
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*old_isr = NULL;
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#if defined(RTEMS_MULTIPROCESSING) && !defined(RTEMS_SMP)
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sc = qoriq_pic_set_affinity(
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CLOCK_INTERRUPT,
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ppc_processor_id()
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);
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if (sc != RTEMS_SUCCESSFUL) {
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rtems_fatal_error_occurred(0xdeadbeef);
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{
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Processor_mask affinity;
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_Processor_mask_From_index(&affinity, ppc_processor_id());
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bsp_interrupt_set_affinity(CLOCK_INTERRUPT, &affinity);
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}
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#endif
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@@ -133,10 +132,7 @@ static void qoriq_clock_cleanup(void)
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qoriq_clock_handler_install(&old_isr)
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#define Clock_driver_support_set_interrupt_affinity(online_processors) \
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qoriq_pic_set_affinities( \
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CLOCK_INTERRUPT, \
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_Processor_mask_To_uint32_t(online_processors, 0) \
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)
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bsp_interrupt_set_affinity(CLOCK_INTERRUPT, online_processors)
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#define Clock_driver_support_shutdown_hardware() \
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qoriq_clock_cleanup()
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@@ -372,14 +372,14 @@ rtems_status_code qoriq_pic_set_priority(
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int *old_priority
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);
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rtems_status_code qoriq_pic_set_affinity(
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void bsp_interrupt_set_affinity(
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rtems_vector_number vector,
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uint32_t processor_index
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const Processor_mask *affinity
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);
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rtems_status_code qoriq_pic_set_affinities(
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void bsp_interrupt_get_affinity(
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rtems_vector_number vector,
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uint32_t processor_affinities
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Processor_mask *affinity
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);
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/** @} */
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@@ -147,30 +147,24 @@ rtems_status_code qoriq_pic_set_priority(
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return sc;
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}
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rtems_status_code qoriq_pic_set_affinities(
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void bsp_interrupt_set_affinity(
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rtems_vector_number vector,
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uint32_t processor_affinities
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const Processor_mask *affinity
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||||
)
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{
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rtems_status_code sc = RTEMS_SUCCESSFUL;
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volatile qoriq_pic_src_cfg *src_cfg = get_src_cfg(vector);
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if (bsp_interrupt_is_valid_vector(vector)) {
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volatile qoriq_pic_src_cfg *src_cfg = get_src_cfg(vector);
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src_cfg->dr = processor_affinities;
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} else {
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sc = RTEMS_INVALID_ID;
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}
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return sc;
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src_cfg->dr = _Processor_mask_To_uint32_t(affinity, 0);
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}
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||||
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rtems_status_code qoriq_pic_set_affinity(
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void bsp_interrupt_get_affinity(
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||||
rtems_vector_number vector,
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||||
uint32_t processor_index
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||||
Processor_mask *affinity
|
||||
)
|
||||
{
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||||
return qoriq_pic_set_affinities(vector, BSP_BIT32(processor_index));
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volatile qoriq_pic_src_cfg *src_cfg = get_src_cfg(vector);
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||||
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_Processor_mask_From_uint32_t(affinity, src_cfg->dr, 0);
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}
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static rtems_status_code pic_vector_enable(rtems_vector_number vector, uint32_t msk)
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@@ -9,7 +9,7 @@
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/*
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* Based on concepts of Pavel Pisa, Till Straumann and Eric Valette.
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*
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||||
* Copyright (c) 2008-2014 embedded brains GmbH.
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* Copyright (c) 2008, 2017 embedded brains GmbH.
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*
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* embedded brains GmbH
|
||||
* Dornierstr. 4
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||||
@@ -573,3 +573,54 @@ bool bsp_interrupt_handler_is_empty(rtems_vector_number vector)
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||||
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return empty;
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}
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||||
rtems_status_code rtems_interrupt_set_affinity(
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||||
rtems_vector_number vector,
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||||
size_t affinity_size,
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||||
const cpu_set_t *affinity
|
||||
)
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||||
{
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||||
Processor_mask set;
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Processor_mask_Copy_status status;
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||||
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if (!bsp_interrupt_is_valid_vector(vector)) {
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return RTEMS_INVALID_ID;
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||||
}
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||||
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||||
status = _Processor_mask_From_cpu_set_t(&set, affinity_size, affinity);
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if (status != PROCESSOR_MASK_COPY_LOSSLESS) {
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return RTEMS_INVALID_SIZE;
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||||
}
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#if defined(RTEMS_SMP)
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||||
bsp_interrupt_set_affinity(vector, &set);
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||||
#endif
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return RTEMS_SUCCESSFUL;
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||||
}
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||||
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||||
rtems_status_code rtems_interrupt_get_affinity(
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||||
rtems_vector_number vector,
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||||
size_t affinity_size,
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||||
cpu_set_t *affinity
|
||||
)
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||||
{
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||||
Processor_mask set;
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||||
Processor_mask_Copy_status status;
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if (!bsp_interrupt_is_valid_vector(vector)) {
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||||
return RTEMS_INVALID_ID;
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||||
}
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||||
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||||
#if defined(RTEMS_SMP)
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||||
bsp_interrupt_get_affinity(vector, &set);
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||||
#else
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||||
_Processor_mask_From_index(&set, 0);
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||||
#endif
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||||
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||||
status = _Processor_mask_To_cpu_set_t(&set, affinity_size, affinity);
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||||
if (status != PROCESSOR_MASK_COPY_LOSSLESS) {
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||||
return RTEMS_INVALID_SIZE;
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||||
}
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||||
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return RTEMS_SUCCESSFUL;
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||||
}
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@@ -18,6 +18,8 @@
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#ifndef LIBBSP_ERC32_IRQ_CONFIG_H
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#define LIBBSP_ERC32_IRQ_CONFIG_H
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#include <rtems.h>
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#define BSP_INTERRUPT_VECTOR_MAX_STD 15 /* Standard IRQ controller */
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#define BSP_INTERRUPT_VECTOR_MIN 0
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#define BSP_INTERRUPT_VECTOR_MAX BSP_INTERRUPT_VECTOR_MAX_STD
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@@ -25,4 +27,22 @@
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/* No extra check is needed */
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#undef BSP_INTERRUPT_CUSTOM_VALID_VECTOR
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RTEMS_INLINE_ROUTINE void bsp_interrupt_set_affinity(
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rtems_vector_number vector,
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||||
const Processor_mask *affinity
|
||||
)
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||||
{
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||||
(void) vector;
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||||
(void) affinity;
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||||
}
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||||
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||||
RTEMS_INLINE_ROUTINE void bsp_interrupt_get_affinity(
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||||
rtems_vector_number vector,
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||||
Processor_mask *affinity
|
||||
)
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||||
{
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||||
(void) vector;
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_Processor_mask_From_index( affinity, 0 );
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}
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#endif /* LIBBSP_ERC32_IRQ_CONFIG_H */
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@@ -192,16 +192,7 @@ static void bsp_clock_handler_install(rtems_isr *new)
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}
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||||
#define Clock_driver_support_set_interrupt_affinity(online_processors) \
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do { \
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uint32_t cpu_count = _SMP_Processor_count; \
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||||
uint32_t cpu_index; \
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||||
LEON_Enable_interrupt_broadcast(clkirq); \
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||||
for (cpu_index = 0; cpu_index < cpu_count; ++cpu_index) { \
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if (_Processor_mask_Is_set(online_processors, cpu_index)) { \
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BSP_Cpu_Unmask_interrupt(clkirq, cpu_index); \
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} \
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||||
} \
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||||
} while (0)
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bsp_interrupt_set_affinity(clkirq, online_processors)
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||||
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||||
static void leon3_clock_initialize(void)
|
||||
{
|
||||
|
||||
@@ -41,4 +41,14 @@ static inline bool bsp_interrupt_is_valid_vector(rtems_vector_number vector)
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||||
LEON3_IrqCtrl_EIrq != 0));
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||||
}
|
||||
|
||||
void bsp_interrupt_set_affinity(
|
||||
rtems_vector_number vector,
|
||||
const Processor_mask *affinity
|
||||
);
|
||||
|
||||
void bsp_interrupt_get_affinity(
|
||||
rtems_vector_number vector,
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||||
Processor_mask *affinity
|
||||
);
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||||
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||||
#endif /* LIBBSP_LEON3_IRQ_CONFIG_H */
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||||
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@@ -11,6 +11,7 @@
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||||
*/
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||||
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||||
#include <leon.h>
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||||
#include <bsp/irq.h>
|
||||
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||||
/* GRLIB extended IRQ controller IRQ number */
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||||
int LEON3_IrqCtrl_EIrq = -1;
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||||
@@ -23,3 +24,43 @@ void leon3_ext_irq_init(void)
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||||
LEON3_IrqCtrl_EIrq = (LEON3_IrqCtrl_Regs->mpstat >> 16) & 0xf;
|
||||
}
|
||||
}
|
||||
|
||||
void bsp_interrupt_set_affinity(
|
||||
rtems_vector_number vector,
|
||||
const Processor_mask *affinity
|
||||
)
|
||||
{
|
||||
uint32_t unmasked = 0;
|
||||
uint32_t cpu_count = rtems_get_processor_count();
|
||||
uint32_t cpu_index;
|
||||
|
||||
for (cpu_index = 0; cpu_index < cpu_count; ++cpu_index) {
|
||||
if (_Processor_mask_Is_set(affinity, cpu_index)) {
|
||||
BSP_Cpu_Unmask_interrupt(vector, cpu_index);
|
||||
++unmasked;
|
||||
}
|
||||
}
|
||||
|
||||
if (unmasked > 1) {
|
||||
LEON_Enable_interrupt_broadcast(vector);
|
||||
} else {
|
||||
LEON_Disable_interrupt_broadcast(vector);
|
||||
}
|
||||
}
|
||||
|
||||
void bsp_interrupt_get_affinity(
|
||||
rtems_vector_number vector,
|
||||
Processor_mask *affinity
|
||||
)
|
||||
{
|
||||
uint32_t cpu_count = rtems_get_processor_count();
|
||||
uint32_t cpu_index;
|
||||
|
||||
_Processor_mask_Zero(affinity);
|
||||
|
||||
for (cpu_index = 0; cpu_index < cpu_count; ++cpu_index) {
|
||||
if (!BSP_Cpu_Is_interrupt_masked(vector, cpu_index)) {
|
||||
_Processor_mask_Set(affinity, cpu_index);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
@@ -22,6 +22,7 @@
|
||||
#include <bsp/genirq.h>
|
||||
|
||||
#include <bsp.h>
|
||||
#include <bsp/irq.h>
|
||||
|
||||
#define DBG(args...)
|
||||
/*#define DBG(args...) printk(args)*/
|
||||
@@ -236,24 +237,7 @@ int ambapp_grlib_int_set_affinity
|
||||
const Processor_mask *cpus
|
||||
)
|
||||
{
|
||||
uint32_t cpu_count = rtems_get_processor_count();
|
||||
uint32_t cpu_index;
|
||||
int enabled_cnt = 0;
|
||||
|
||||
for (cpu_index = 0; cpu_index < cpu_count; cpu_index++) {
|
||||
if (_Processor_mask_Is_set(cpus, cpu_index)) {
|
||||
BSP_Cpu_Unmask_interrupt(irq, cpu_index);
|
||||
enabled_cnt++;
|
||||
}
|
||||
}
|
||||
|
||||
/* Propagate the interrupt to all CPUs */
|
||||
if (enabled_cnt > 1) {
|
||||
LEON_Enable_interrupt_broadcast(irq);
|
||||
} else {
|
||||
LEON_Disable_interrupt_broadcast(irq);
|
||||
}
|
||||
|
||||
bsp_interrupt_set_affinity(irq, cpus);
|
||||
return DRVMGR_OK;
|
||||
}
|
||||
#endif
|
||||
|
||||
@@ -203,6 +203,43 @@ rtems_status_code rtems_interrupt_handler_iterate(
|
||||
void *arg
|
||||
);
|
||||
|
||||
/**
|
||||
* @brief Sets the processor affinity set of an interrupt vector.
|
||||
*
|
||||
* @param[in] vector The interrupt vector number.
|
||||
* @param[in] affinity_size The storage size of the affinity set.
|
||||
* @param[in] affinity_set The new processor affinity set for the interrupt
|
||||
* vector. This pointer must not be @c NULL.
|
||||
*
|
||||
* @retval RTEMS_SUCCESSFUL Successful operation.
|
||||
* @retval RTEMS_INVALID_ID The vector number is invalid.
|
||||
* @retval RTEMS_INVALID_SIZE Invalid affinity set size.
|
||||
* @retval RTEMS_INVALID_NUMBER Invalid processor affinity set.
|
||||
*/
|
||||
rtems_status_code rtems_interrupt_set_affinity(
|
||||
rtems_vector_number vector,
|
||||
size_t affinity_size,
|
||||
const cpu_set_t *affinity
|
||||
);
|
||||
|
||||
/**
|
||||
* @brief Gets the processor affinity set of an interrupt vector.
|
||||
*
|
||||
* @param[in] vector The interrupt vector number.
|
||||
* @param[in] affinity_size The storage size of the affinity set.
|
||||
* @param[out] affinity_set The current processor affinity set for the
|
||||
* interrupt vector. This pointer must not be @c NULL.
|
||||
*
|
||||
* @retval RTEMS_SUCCESSFUL Successful operation.
|
||||
* @retval RTEMS_INVALID_ID The vector number is invalid.
|
||||
* @retval RTEMS_INVALID_SIZE Invalid affinity set size.
|
||||
*/
|
||||
rtems_status_code rtems_interrupt_get_affinity(
|
||||
rtems_vector_number vector,
|
||||
size_t affinity_size,
|
||||
cpu_set_t *affinity
|
||||
);
|
||||
|
||||
/**
|
||||
* @brief An interrupt server action.
|
||||
*
|
||||
|
||||
@@ -203,6 +203,31 @@ RTEMS_INLINE_ROUTINE uint32_t _Processor_mask_To_uint32_t(
|
||||
return (uint32_t) (bits >> (32 * (index % _BITSET_BITS) / 32));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Creates a processor set from an unsigned 32-bit integer relative to
|
||||
* the specified index.
|
||||
*/
|
||||
RTEMS_INLINE_ROUTINE void _Processor_mask_From_uint32_t(
|
||||
Processor_mask *mask,
|
||||
uint32_t bits,
|
||||
uint32_t index
|
||||
)
|
||||
{
|
||||
_Processor_mask_Zero( mask );
|
||||
mask->__bits[ __bitset_words( index ) ] = ((long) bits) << (32 * (index % _BITSET_BITS) / 32);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Creates a processor set from the specified index.
|
||||
*/
|
||||
RTEMS_INLINE_ROUTINE void _Processor_mask_From_index(
|
||||
Processor_mask *mask,
|
||||
uint32_t index
|
||||
)
|
||||
{
|
||||
BIT_SETOF( CPU_MAXIMUM_PROCESSORS, (int) index, mask );
|
||||
}
|
||||
|
||||
typedef enum {
|
||||
PROCESSOR_MASK_COPY_LOSSLESS,
|
||||
PROCESSOR_MASK_COPY_PARTIAL_LOSS,
|
||||
|
||||
Reference in New Issue
Block a user