Avoid reading from the pl011 data register unnecessarily. There is no
need to preserve the contents of this register as it is not normal
memory. This unnecessary read causes console spam when running under the
Xen hypervisor when the read FIFO is empty since the read is not
expected.
Before, the console driver needed
`BSP_CONSOLE_USE_INTERRUPTS` to be defined or it
would not build. The intent was to use polled
mode if the macro was equal to zero.
This change makes it so interrupt mode is used if
the macro is defined and polled mode is used if
the macro is not defined.
The old logic would lead to an error when
multiprocessing was enabled and
`LEON3_GPTIMER_BASE` was defined due to
`leon3_timer_core_index` being undefined.
The new logic fixes this and keeps the same
intent:
- If multiprocessing is not enabled, the timer
index is 0
- If multiprocessing is enabled and
`LEON3_GPTIMER_BASE` is defined, the timer
index is twice the CPU boot index
- If multiprocessing is enabled and
`LEON3_GPTIMER_BASE` is not defined, we
fallback to the old logic using the GPTIMER
core index.
Close#5258
- Provide an option for a file system to support close wtih
references held. This can happen in more complex file systems
and file descriptor handling with more complete reference
handling implementations where an fd can hold other fds and
close can be call on any fd and succeed.
- Fix open IOP leaks in the error paths.
- Provide better definition of the IOP flags to help clarify
the code.
Fixes#5201
The gen5200, gen83xx, and tqm8xx BSP families have multiple variants
which produced the same stray semi-colon warning from GCC 15 for
using LINKER_SYMBOLS() with a semi-colon at the end of the line.
Closes#5277.
This zlib source is a hacked down version just for the decompression
phase for the bootloader used by this family of BSPs. The proper
fix is to redo the hackery with a new version of zlib. But that
is risky so this is just addressing the warnings.
Updates #5276
GCC 14 generates an error for the wrong signature function being
passed in. The underlying type was a void * so adjusting the
signature of the ISR handler was not an option. Added cast.
Closes#5272
Provide missing GCC atomics helpers as part of BSPs where GCC
does not know how to provide it since the CPU's ISA has no
atomic instructions. The implementation provided in
bsps/shared/atomics/__atomic_test_and_set.c should work
on any single core CPU.
The BSPs that need thie function tend to have older cores. This
is the list of BSPs:
arm - csb336, csb337, csb637, edb7312, gumstix, kit637_v6, lpc24xx_ea,
lpc24xx_ncs_ram, lpc24xx_ncs_rom_ext, lpc24xx_ncs_rom_int,
lpc24xx_plx800_ram, lpc24xx_plx800_rom_int, lpc32xx_mzx,
lpc32xx_mzx_stage_1, lpc32xx_mzx_stage_2, lpc32xx_phycore,
rtl22xx, rtl22xx_t, smdk2410
m68k - av5282, mcf5329
mips - jmr3904
moxie - moxiesim
nios2 - nios2_iss
riscv - grv32i, grv32im, niosvc10lp, noel32im, rv32i, rv32im,
sparc - ut699
GCCC 14 introduced a linking warning about not knowing which
__sync_synchronize implementation to use. The BSPs impacted
are updated in this commit. The suggested correction is to
use -specs to pick up a GCC specific specs file which changes
__sync_synchronize to the desired implementation
__sync_synchronize_MECHANISM. Using this solution ties
the code to GCC 14+ since the spec files are not in GCC 13.
This solution maps __sync_synchronize to a RTEMS specific
__sync_synchronize implementation which avoids using of a
GCC extension and requiring GCC 14+,
Closes#5268
When memory is accessed by the remote debugging client, the access is
sandboxed with setjmp/longjmp and appropriate exception handlers to
prevent the attempted access from causing a failure of the debugger or
otherwise altering execution. The existing implementation works as
expected when the context executing the memory access and the exception
context resulting from a failed access do not share a stack.
In the case of AArch64, a failed access when the debugger is already in
exception context causes a re-entry into exception context where the
machine state is pushed onto the same stack that was in use where the
exception occurred. When setjmp is called inside a stack frame and the
exception occurs outside that stack frame, the stack frame is unwound
before the exception occurs and the exception entry overwrites the area
previously occupied by the stack frame housing the setjmp and corrupting
the link register that is stored there. After restoration of state using
longjmp(), this corrupted link register information is loaded from the
stack frame and undesired behavior occurs.
In the instance of this bug that was encountered, the corrupted link
register contained an unaligned pointer which caused an unending cascade
of prefetch abort exceptions presenting as a hard hang.
Applied suggested formatting changes to the following files which
were modified for technical reasons in the previous commit.
bsps/powerpc/gen5200/include/tm27.h
bsps/powerpc/mvme5500/include/tm27.h
bsps/powerpc/psim/include/tm27.h
The gen5200, mvme5500, and psim BSP families had an implementation of
tm27.h which used stub functions with casts as null handlers to fill
in the IRQ structure. The IRQ structure as also missing a field. The
change was to use a set of appropriately signatured stub functions
and correct the structure initialization.
This code likely has produced warnings for a long time but with
GCC 14, these warnings turned into errors.
Closes#5266
This updates the AArch64 Raspberry Pi BSP to use the watchdog to perform
the system reset instead of attempting to use the PSCI reset which isn't
present on the Raspberry Pi platform.
This reworks the linker script configuration to be more comprehensible
and to remain within the 1GB guaranteed available on all Pi4 systems and
accounting for the memory dedicated to the GPU and the memory dedicated
to the low level firmware.
* Cleaned up the uC5282 ISR stuff to make the casts and whatnot more
readable. Also made the offsets relative to the VBR (which is at 0x0
for this BSP) to silence a GCC warning.
* Refactored the default exception handler to map a struct to the stack
instead of taking the address of pc and under-indexing it. The
compiler was not particularly happy about the previous implementation.
- Remove the `fsmount_me_t` handler moving its signature to `mount_t`.
- The `mount_t` signature with the `data` lets file systems handle
options and that means the shell `mount` command can mount
more file systems.
- Clean up the `mount` call's handling of the `mount_t` and
`fsmount_me_t` structures.
The register keyword was never more than a suggestion but in more
recent versions of C and C++, it has been reduced to a reserved
keyword with no semantics. GCC has a documented extension for
global register variables. Add the __extension__ keyword to avoid
warnings.
See Issue #5250 for a more detailed discussion including a link
to a discussion on the GCC mailing list.
The use of g6 as a pointer to the per CPU information is documented
in the SPARC chapter of the CPU Supplement Guide.
Closes#5250.
_SMP_Processor_configured_maximum is 32 bit, LREG macro is ld on rv64,
lw on rv32. Changing the load to explicit 'lw' to always load 4 bytes
Closes#5251
There are only the 3 names in our entire source that use non-ASCII characters.
Our documentation can still use any type of character. We want to limit source
to ASCII for safety reasons.
board_memories: WINDOWS-1250
aes.c: ISO-8859-3
sdramc.c: WINDOWS-1250
These have been converted to utf-8 with the broken characters fixed. The
original encoding is wrong and has been corrupted. Now they are ASCII.
