Commit Graph

13013 Commits

Author SHA1 Message Date
Joel Sherrill
79b45a1a8e lpc1768_mbed-testsuite.tcfg: Add ftp01 2015-02-13 16:27:22 -06:00
Sebastian Huber
a9df916988 IMFS: Add fine grained configuration
Remove miniIMFS.  Statically initialize the root IMFS.

Add configuration options to disable individual
features of the root IMFS, e.g.
  o CONFIGURE_IMFS_DISABLE_CHOWN,
  o CONFIGURE_IMFS_DISABLE_FCHMOD,
  o CONFIGURE_IMFS_DISABLE_LINK,
  o CONFIGURE_IMFS_DISABLE_MKNOD,
  o CONFIGURE_IMFS_DISABLE_MOUNT,
  o CONFIGURE_IMFS_DISABLE_READLINK,
  o CONFIGURE_IMFS_DISABLE_RENAME,
  o CONFIGURE_IMFS_DISABLE_RMNOD,
  o CONFIGURE_IMFS_DISABLE_SYMLINK,
  o CONFIGURE_IMFS_DISABLE_UNMOUNT, and
  o CONFIGURE_IMFS_DISABLE_UTIME.
2015-02-12 20:53:36 +01:00
Daniel Cederman
5efbb6619c grspw: Fix typos 2015-02-11 15:35:30 +01:00
Daniel Cederman
0c94a46fa3 bsp/sparc: Move BSP_ISR_handler to a separate file and rename it
This allows it to be wrapped by another function at link-time
and can be used to trace interrupts. If not placed in a separate
file, the function pointer address used in BSP_shared_interrupt_init
will be resolved at compile-time, and the function will not be wrappable.
2015-02-11 15:35:23 +01:00
Sebastian Huber
eb7753437f Filesystem: Delete unused fsmountme_h handler 2015-02-09 15:38:48 +01:00
Pavel Pisa
cf4dfc1901 arm/tms570: sci context has to be writable because it holds state variable.
The structure tms570_sci_context holds state variable
tx_chars_in_hw which holds if and how many characters
(in the optional FIFO support for some Ti SCIs) are submitted
into hardware.

When field is not writable then code breaks when RTEMS
is build for Flash area.

The problem found and analyzed by Martin Galvan from tallertechnologies.

Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
2015-02-04 19:36:22 +01:00
Nick Withers
d11b711b3e bsps/powerpc: Fix a clock driver
PowerPC Book E: Account for an extra tick period if a tick increment's
pending.

Close #2230.
2015-01-30 06:57:00 +01:00
Joel Sherrill
296846acec mcf5206elite/include/i2c.h: Fix spelling error 2015-01-23 09:45:23 -06:00
Joel Sherrill
b1dcae0db6 stm32f4/.../stm32f105rc-testsuite.tcfg: Add more tests 2015-01-23 09:45:23 -06:00
Joel Sherrill
3d3455081a lpc24xx/.../lpc23xx_tli800-testsuite.tcfg: Add more tests 2015-01-23 09:45:22 -06:00
Joel Sherrill
b302880e75 lpc24xx/.../lpc2362-testsuite.tcfg: Add more tests 2015-01-23 09:45:22 -06:00
Joel Sherrill
05eaca89b9 lm3s69xx/.../lm3s6965-testsuite.tcfg: Add more tests 2015-01-23 09:45:22 -06:00
Joel Sherrill
c1c45f503c lm3s69xx/.../lm3s3749-testsuite.tcfg: Add more tests 2015-01-23 09:45:22 -06:00
Sebastian Huber
e6a7896f35 bsp/altera-cyclone-v: Use proper free function 2015-01-23 14:49:36 +01:00
Sebastian Huber
2a0923c528 bsps/sparc: Use calloc()
Close #2242.
2015-01-23 12:55:02 +01:00
Sebastian Huber
f63e9a3aa8 bsps/powerpc: Fix switch statement in CPU ident
Close #2237.
2015-01-23 11:31:54 +01:00
Sebastian Huber
2f16001d98 libchip: Fix high capacity detection for MMC
Close #2239.
2015-01-23 11:24:01 +01:00
javamonn
2486c49285 grspw: descriptor tables no longer statically allocated 2015-01-22 16:15:42 -05:00
Sebastian Huber
c625a64121 Filesystem: Delete node type operation
Use the fstat handler instead.
2015-01-22 07:52:40 +01:00
Sebastian Huber
60d39b66e0 powerpc: Fix AltiVec VSCR save/restore 2015-01-20 14:01:50 +01:00
Sebastian Huber
f1c044dc29 bsps/powerpc: Fix conditional compilation 2015-01-14 20:07:59 +01:00
Sebastian Huber
6042fdb7dd bsp/mcf5206elite: Remove <i2c.h> inlude in <bsp.h>
This prevents a compile-time error in libtests/i2c01.
2015-01-14 07:53:00 +01:00
Joel Sherrill
85dbf520f8 libcpu/powerpc/mpc6xx/mmu/bat.c: Now compiles with gcc 5.x 2015-01-13 15:41:32 -06:00
Sebastian Huber
f2e6c3e84a bsp/qoriq: Add T2080RDB and T4240RDB variants 2015-01-13 11:38:18 +01:00
Sebastian Huber
3e2647a714 powerpc: AltiVec and FPU context support
Add AltiVec and FPU support to the Context_Control in case we use the
e6500 multilib.

Add PPC_MULTILIB_ALTIVEC and PPC_MULTILIB_FPU multilib defines.  Add
non-volatile AltiVec and FPU context to Context_Control.  Add save/restore of
non-volatile AltiVec and FPU to _CPU_Context_switch().  Add save/restore
of volatile AltiVec and FPU context to the exception code.  Adjust data
cache optimizations for the new context and cache line size.
2015-01-13 11:37:28 +01:00
Sebastian Huber
c279d0a33f bsps/powerpc: Use e500 exc categories for e6500
This is not correct, but works for now.
2015-01-13 11:37:28 +01:00
Anthony Green
5139d21430 moxiesim: Add conditional logic to handle old and new gas syntax 2015-01-10 13:04:06 -06:00
Sebastian Huber
2e19bfde2f powerpc: Use PPC_HAS_FPU
Provide floating point context support only if PPC_HAS_FPU == 1.
2015-01-09 14:05:46 +01:00
Sebastian Huber
7c16e1a514 powerpc: Set PPC_DEFAULT_CACHE_LINE_SIZE for e6500 2015-01-09 14:05:08 +01:00
Sebastian Huber
84d3b9b0a2 powerpc: Use PPC_DEFAULT_CACHE_LINE_SIZE
Use it for the default PPC_CACHE_ALIGNMENT.  Use it for
PPC_STRUCTURE_ALIGNMENT.
2015-01-09 14:03:35 +01:00
Sebastian Huber
bb7bd148ba powerpc: Use alternate time base for CPU counter 2015-01-09 14:03:35 +01:00
Sebastian Huber
691cc20289 bsp/qoriq: Fix nanoseconds extension 2015-01-09 14:03:35 +01:00
Sebastian Huber
a532301c30 bsp/qoriq: Increase MAS0[ESEL] width 2015-01-09 14:03:34 +01:00
Sebastian Huber
0e05095ab5 bsp/qoriq: Add MAS7 support for MMU
This enables usage of the full real address space which is 40-bit on the
T2080 for example.
2015-01-09 14:03:34 +01:00
Sebastian Huber
71b611d172 bsps/powerpc: ppc_exc_initialize_interrupt_stack() 2015-01-09 14:03:34 +01:00
Sebastian Huber
7bad67256e bsps/powerpc: Add TMR access macros 2015-01-09 14:03:34 +01:00
Sebastian Huber
c32a128cb2 bsps/powerpc: Add cache size functions 2015-01-09 14:03:34 +01:00
Sebastian Huber
7d26f60a1b bsps/powerpc: Delete C pre-processor warning
Do not warn about not implemented cache functions.
2015-01-09 14:03:34 +01:00
Sebastian Huber
494df99f1c bsps/powerpc: Support for 64 byte cache lines 2015-01-09 14:03:33 +01:00
Sebastian Huber
5175ac6a87 bsps/powerpc: Support a cache alignment of 64
Give the BSP the ability to define PPC_CACHE_ALIGNMENT.
2015-01-09 14:03:33 +01:00
Sebastian Huber
f6660bfba4 bsps/powerpc: Support e6500 indentification 2015-01-09 14:03:33 +01:00
Sebastian Huber
06251bb415 bsps/u-boot: Add optional text and data sections 2015-01-09 14:03:33 +01:00
Sebastian Huber
b79f98f68a bsps/u-boot: Update due to API changes 2015-01-09 14:03:33 +01:00
Sebastian Huber
fca5892454 bsps/mpc83xx: Fix warnings 2015-01-09 14:03:33 +01:00
Sebastian Huber
2a4f9d7f18 smp: Add and use _SMP_Should_start_processor() 2015-01-09 14:03:32 +01:00
Joel Sherrill
7cdabc49ca pc386: Add Edison base support
The current support for the Edison supports a single polled
UART for input and output plus a simulated clock tick. The
activities forward for supporting the Edison have been posted
on the RTEMS mailing lists and at:

http://rtemsramblings.blogspot.com/2014/12/intel-edison-and-rtems-road-forward.html
2015-01-04 13:44:57 -06:00
Joel Sherrill
1ae7baf2d8 clock_driver_simidle.c: Add BSP_CLOCK_DRIVER_DELAY
This allows the BSP to define an optional spin delay which is
useful for making time appear to pass at a rate closer to
wall time. On the Edison, this was used with a polled console
driver to slow polling to a reasonable rate and make time
pass reasonably close to correctly even with no clock tick
support.
2015-01-04 13:44:57 -06:00
Joel Sherrill
0a36af04bb pc386: Add BSP_ENABLE_COM1_COM4 BSP option
This allows the support for the legacy COM1-COM4 serial ports
to be completely disabled. It is needed to prevent hangs on some
hardware. In particular, the Intel Edison where it is not present.
2015-01-04 13:44:56 -06:00
Joel Sherrill
93546b879f pc386: Add BSP_ENABLE_IDE BSP option
This allows the IDE support to be completely disabled. It is needed to
prevent hangs on some hardware. In particular, the Intel Edison where
it is not present.
2015-01-04 13:44:56 -06:00
Joel Sherrill
607c85465d pc386: Add BSP_ENABLE_VGA BSP option
This allows the VGA and keyboard console to be completely disabled.
It is useful on PCs without displays and prevents a very slow boot
time on the Intel Edison.
2015-01-04 13:44:56 -06:00