Commit Graph

18 Commits

Author SHA1 Message Date
Sebastian Huber
ab8817ca03 rtems: Add get/set interrupt priorities
Add directives to get and set the priority of an interrupt vector.

Implement the directives for the following BSP families:

* arm/lpc24xx
* arm/lpc32xx
* powerpc/mpc55xxevb
* powerpc/qoriq

Implement the directives for the following interrupt controllers:

* GICv2 and GICv3 (arm and aarch64)
* NVIC (arm)
* PLIC (riscv)

Update #5002.
2024-05-10 13:26:22 +00:00
Sebastian Huber
bc7e6ae550 dev/irq: Improve Doxgyen group assignments
Make the GIC interrupt controller support a subgroup of the generic interrupt
controller support.
2024-04-30 01:39:06 -04:00
Sebastian Huber
bcef89f236 Update company name
The embedded brains GmbH & Co. KG is the legal successor of embedded
brains GmbH.
2023-05-20 11:05:26 +02:00
Sebastian Huber
5cc075712e irq/arm-gicv3.h: Customize CPU Interface init
Use the existing WRITE_SR() abstraction to access the interrupt group 0 and 1
enable registers.  This fixes the build for the AArch32 target.

Add BSP options which define the initial values of CPU Interface registers.
2022-07-12 08:26:46 +02:00
Chris Johns
e70384d3f4 aarch64/gicv3: Remove accesses to secure registers
RTEMS runs at EL1 and the removed register accesses are for
EL3 or the TF-A. This change aligns our driver with the Linux
and FreeBSD ones.
2022-06-16 10:21:46 +10:00
Sebastian Huber
0725b200e7 bsps: Add gicv3_get_attributes() 2022-04-06 09:48:52 +02:00
Sebastian Huber
d8b23fa488 bsps: Add gicv3_sgi_ppi_get_priority() 2022-04-06 09:48:52 +02:00
Sebastian Huber
f828ddd1a9 bsps: Add gicv3_sgi_ppi_set_priority() 2022-04-06 09:48:52 +02:00
Sebastian Huber
3026859d41 bsps: Move gicv3_init_cpu_interface()
Make the processor index a parameter.
2022-04-06 09:48:52 +02:00
Sebastian Huber
b3519336fd bsps: Move gicv3_init_dist()
Make the distributor register block a parameter.
2022-04-06 09:48:52 +02:00
Sebastian Huber
ea353b4bfa bsps: Add gicv3_sgi_ppi_disable() 2022-04-06 09:48:52 +02:00
Sebastian Huber
f74b120c24 bsps: Add gicv3_sgi_ppi_enable() 2022-04-06 09:48:52 +02:00
Sebastian Huber
42c806fc84 bsps: Add gicv3_sgi_ppi_is_enabled() 2022-04-06 09:48:52 +02:00
Sebastian Huber
be25de5ff8 bsps: Add gicv3_ppi_clear_pending() 2022-04-06 09:48:52 +02:00
Sebastian Huber
2e5b1312c8 bsps: Add gicv3_ppi_set_pending() 2022-04-06 09:48:52 +02:00
Sebastian Huber
518330069d bsps: Add gicv3_trigger_sgi() 2022-04-06 09:48:52 +02:00
Sebastian Huber
f10c551f54 bsps: Add gicv3_sgi_ppi_is_pending() 2022-04-06 09:48:52 +02:00
Sebastian Huber
9abcaaebc3 bsps: Add <dev/irq/arm-gicv3.h>
Separate the Interrupt Manager implementation from the generic Arm GICv3
support.  Move parts of the Arm GICv3 support into a new header file.  This
helps to support systems with a clustered structure in which multiple GICv3
instances are present.  For example, two clusters of two Cortex-R52 cores where
each cluster has a dedicated GICv3 instance.
2022-04-06 09:48:51 +02:00