* c/src/lib/libbsp/i386/i386ex/startup/linkcmds,
c/src/lib/libbsp/powerpc/eth_comm/canbus/Makefile.am,
c/src/libnetworking/pppd/ipxcp.c: These files had latent single
bit mistakes from the CVS server's RAM failure.
* cpu_asm.S: This patch was co-developed with Eric Norum
<eric.norum@usask.ca>. It closes a one instruction window
on some m68k CPU cores. It fixes symptoms seen as:
1) No more `interrupt handler invoked twice for
a single interrupt'.
2) No more `lockup when mc68360 CPM and PIT interrupts
are at different levels'.
It does insert a little more overhead on machines without hardware
interrupt stacks but correctness has a price.
* c/src/exec/itron/src/snd_mbx.c, c/src/exec/itron/src/tsnd_mbf.c
c/src/exec/posix/src/mqueuesendsupp.c,
c/src/exec/rtems/src/msgqsubmit.c,
c/src/exec/score/include/rtems/score/coremsg.h,
c/src/exec/score/inline/rtems/score/coremsg.inl,
c/src/exec/score/src/coremsgsubmit.c: Unblocking message queue
operations should NOT use _Thread_Executing for return status
since it is permissible to invoke message send operations from
an ISR. This was reported by Suvrat Gupta <suvrat@utstar.com>.
* src/eventsurrender.c: Clear event condition when task is unblocked.
This makes sure that subsequent event send thinks the task is still
blocked and overwrites the initial events received.
* src/heapallocate.c: Do not allow the size to overflow when
adjusting it. A test allocated a stack of -1 (~0). This
actually resulted in a stack being allocated but with a
size of 0xb. The allocator did not test the size to see if
it rolled through 0 and so allowed the allocation to happen, the
thread to get created. The task crashed as you would expect.
where alarm() did not correctly account for the watchdog start_time
and stop_time fields being based on ticks not seconds. This resulted
in alarm() returning a bogus number of seconds remaining.
that is a hack to workaround a switch generation compiler bug for the
SH2 and cleaned up some warnings.
CVS: ----------------------------------------------------------------------
CVS: Enter Log. Lines beginning with `CVS:' are removed automatically
CVS:
CVS: Committing in .
CVS:
CVS: Modified Files:
CVS: c/src/tests/libtests/termios/init.c
CVS: ----------------------------------------------------------------------
Jennifer Averett <jennifer.averett@oarcorp.com> to fix
appends (O_APPEND at open time) on in-memory files.
A call such as:
fd = open (file, O_APPEND | O_WRONLY);
did not append to the end of the file.
1. Fixes a typo in the code conditionalized by GEN68360_WITH_SRAM
2. Mods the code to add support for an additional bank of SRAM (needed more RAM
to run the web server!)
From <vac4050@cae597.rsc.raytheon.com> reviewed by Eric Norum <eric@cls.usask.ca>.
* updated README
* improved misc script for running the RTEMS test programs
* Updated 332 SIM configuration in start.c
* C++ global constructor fix (USE_INIT_FINI)
* change __end_of_ram to _RamEnd to match changes by others
of an experiment to determine what it will take to multilib most of
RTEMS per GNU multilib conventions. It is thought that only
interrupt processing and IO are not multlib-able. This means that
a BSP Kit should include IRQ processing from score/cpu, all peripheral
support (header files from score/cpu, libchip, and libcpu), and the
BSPs themselves. The rest of RTEMS should be multlib-able. But to do
this, all RTEMS CPU model feature flags must be derivable from gcc
cpp predefines. By configuring the bare bsp with the rtems_multilib
CPU model, you can try any combination of CPU CFLAGS and see well how the
logic in that section of the <CPU>.h works. Once all CPU multilib
variations can be built, then RTEMS proper can be multilib'ed and
separated from the BSPs.
