* configure.in: Added new directories.
* shared/interrupts/Makefile.am: Added AM_CPPFLAGS to define TX39
when compiling for a TX3904.
* shared/interrupts/maxvectors.c: Corrected conditional logic.
* tx39/Makefile.am: Added vectorisrs.
* tx39/vectorisrs/Makefile.am, tx39/vectorisrs/vectorisrs.c,
* tx39/vectorisrs/.cvsignore: New files. This decodes the
interrupt pending information on the TX3904 and vectors
an interrupt.
* README: Updated. We are now vectoring a clock tick ISR handler.
But RTEMS is not returning from the ISR properly.
* clock/clockdrv.c: Now causes interrupts but has not been calibrated.
* include/bsp.h: Use <libcpu/tx3904.h>
* startup/Makefile.am: Add setvec.c from shared.
* startup/bspstart.c: Initialize the status register (SR) so
no interrupts are masked but global interrupts (SR_IEC) are off.
Added call to install the ISR prologue code.
* wrapup/Makefile.am: Pick up more pieces from libcpu.
* include/rtems/score/isr.h, src/isr.c: Allocate it from the
workspace rather than explicitly declaring it. This allows
the size to be a non-constant from the perspective of score/cpu.
* cpu.c: Removed duplicate declaration for _ISR_Vector_table.
* cpu_asm.S: Removed assembly language to vector ISR handler
on MIPS ISA I. Now call mips_vector_isr_handlers() in libcpu or BSP.
* rtems/score/cpu.h (CPU_INTERRUPT_NUMBER_OF_VECTORS): No
longer a constant -- get the real value from libcpu.
* configure.in: Added new directories.
* shared/interrupts/Makefile.am: Added AM_CPPFLAGS to define TX39
when compiling for a TX3904.
* shared/interrupts/maxvectors.c: Corrected conditional logic.
* tx39/Makefile.am: Added vectorisrs.
* tx39/vectorisrs/Makefile.am, tx39/vectorisrs/vectorisrs.c,
* tx39/vectorisrs/.cvsignore: New files. This decodes the
interrupt pending information on the TX3904 and vectors
an interrupt.
* cpu_asm.h: Removed.
* Makefile.am: Remove cpu_asm.h.
* rtems/score/mips64orion.h: Renamed mips.h.
* rtems/score/mips.h: New file, formerly mips64orion.h.
Header rewritten.
(mips_get_sr, mips_set_sr, mips_enable_in_interrupt_mask,
mips_disable_in_interrupt_mask): New macros.
* rtems/score/Makefile.am: Reflect renaming mips64orion.h.
* asm.h: Include <mips.h> not <mips64orion.h>. Now includes the
few defines that were in <cpu_asm.h>.
* cpu.c (_CPU_ISR_Get_level): Added MIPS ISA I version of this routine.
MIPS ISA 3 is still in assembly for now.
(_CPU_Thread_Idle_body): Rewrote in C.
* cpu_asm.S: Rewrote file header.
(FRAME,ENDFRAME) now in asm.h.
(_CPU_ISR_Get_level): Removed ISA I version and rewrote in C.
(_CPU_ISR_Set_level): Removed ISA I version and rewrote in C.
(_CPU_Context_switch): MIPS ISA I now manages preserves SR_IEC and
leaves other bits in SR alone on task switch.
(mips_enable_interrupts,mips_disable_interrupts,
mips_enable_global_interrupts,mips_disable_global_interrupts,
disable_int, enable_int): Removed.
(mips_get_sr): Rewritten as C macro.
(_CPU_Thread_Idle_body): Rewritten in C.
(init_exc_vecs): Rewritten in C as mips_install_isr_entries() and
placed in libcpu.
(exc_tlb_code, exc_xtlb_code, exc_cache_code, exc_norm_code): Moved
to libcpu/mips/shared/interrupts.
(general): Cleaned up comment blocks and #if 0 areas.
* idtcpu.h: Made ifdef report an error.
* iregdef.h: Removed warning.
* rtems/score/cpu.h (CPU_INTERRUPT_NUMBER_OF_VECTORS): Now a variable
number defined by libcpu.
(_CPU_ISR_Disable, _CPU_ISR_Enable): Rewritten to use new routines
to access SR.
(_CPU_ISR_Set_level): Rewritten as macro for ISA I.
(_CPU_Context_Initialize): Honor ISR level in task initialization.
(_CPU_Fatal_halt): Use new _CPU_ISR_Disable() macro.
* src/imfs/linearfile.c, src/imfs/imfs_load_tar.c: New files.
* src/imfs/Makefile.am, src/imfs/imfs.h,
src/imfs/imfs_creat.c, src/imfs/imfs_debug.c,
src/imfs/imfs_eval.c, src/imfs/imfs_handlers_memfile.c,
src/imfs/imfs_init.c, src/imfs/imfs_initsupp.c,
src/imfs/imfs_stat.c, src/imfs/miniimfs_init.c: Added "tarfs".
This is not really a tar filesystem. It is a way to load a tar
image into the IMFS but actually leave bulky file contents in the
original tar image. It essentially adds the linear file type and
associated support and a loader routine.
* shared/.cvsignore, shared/Makefile.am,
shared/cache/.cvsignore, shared/cache/Makefile.am,
shared/cache/cache.c, shared/cache/cache_.h,
shared/interrupts/.cvsignore, shared/interrupts/Makefile.am,
shared/interrupts/installisrentries.c,
shared/interrupts/isr_entries.S,
shared/interrupts/maxvectors.c, tx39/.cvsignore,
tx39/Makefile.am, tx39/include/.cvsignore,
tx39/include/Makefile.am, tx39/include/tx3904.h: New file.
Moved some pieces of interrupt processing from score/cpu to
libcpu/mips since many interrupt servicing characteristics are
CPU model dependent. This patch addresses the number of interrupt
sources and where the ISR prologues are located. The only way to
currently install the ISR prologues requires that the prologues
be installed into RAM.
* libc/linkaddr.c: Initialized variable to remove warning.
* modem/ppp.c, modem/ppp_tty.c: Made numerous variable declarations
conditional on PPP_COMPRESS and PPP_FILTER. Commented out variables
that were not used because the code using them was commented out.
Removed totally unused variables.
* modem/pppcompress.c: Added parentheses to avoid warnings.
* pppd/pppmain.c: Removed numerous warnings.
* console/inch.c, console/keyboard.c, console/pc_keyb.c,
console/vt.c, include/bsp.h: Correct incorrect interrupt level
handling in new keyboard management code. Correct
BSP_poll_char initialization routine.
* start/start.S, startup/bspstart.c: Correct when the video is
initialized.
* timer/timer.c (Calibrate_1ms_loop): Address problem where this
did not work correctly on all PC speeds. The new calibrate routine
has been tested on Pentium 166, pentium II 200, pentium III
300 Mhz and does work as expected.
* macros/rtems/score/coresem.inl: Removed comments since convention
calls for comments to be in inline versin.
* macros/rtems/score/object.inl (Objects_Get_local_object): Fixed
style to use _ prefix on variable names and use parentheses.
* macros/rtems/score/object.inl (_Objects_Namespace_remove): Added.
* Added macro support to POSIX API. This is known to compile.
* macros/rtems/posix/cond.inl, macros/rtems/posix/intr.inl,
macros/rtems/posix/key.inl, macros/rtems/posix/mqueue.inl,
macros/rtems/posix/mutex.inl, macros/rtems/posix/priority.inl,
macros/rtems/posix/pthread.inl, macros/rtems/posix/semaphore.inl,
macros/rtems/posix/timer.inl: New files.
* configure.in: Removed error check for enabling macros.
* rtems/posix/mutex.h: #if 0'ed out prototypes for inlined routines
since you cannot have prototypes for macros.
* macros/rtems/posix/Makefile.am: Added files.
* README: Updated to reflect current status. Misaligned reference
during initialization may be compiler problem.
* console/console-io.c: Added support for printk().
* startup/linkcmds: Reserve 512K for RTEMS Workspace.
* General effort to make things compile with macros not inlines
* inline/rtems/score/coremutex.inl: Added comment indicating
for macros there is another copy of
_CORE_mutex_Seize_interrupt_trylock() in src/coremutexseize.c.
* src/coremutexseize.c: Added body of
_CORE_mutex_Seize_interrupt_trylock() for macro case.
* macros/rtems/score/coremutex.inl: Added prototype for
_CORE_mutex_Seize_interrupt_trylock() since there is a real
body when macros are enabled.
* macros/rtems/score/coresem.inl: Added macro implementation of
_CORE_semaphore_Seize_isr_disable.
* macros/score/Makefile.am: Fixed typos.
* rtems/score/address.inl: Correct macro implementation of
_Addresses_Is_aligned() so it would compile.
* macros/rtems/score/coremsg.inl: Added closing parentheses.
* cpu_asm.S: Changed "_CPU_Ccontext_switch_restore: typo to
correct name of _CPU_Context_switch_restore. Added dummy
version of exc_utlb_code() so applications would link.
* include/rtems/Makefile.am: Added termiostypes.h.
* libc/Makefile.am: Removed termiostypes.h.
* libc/termios.c: Changed include of "termiostypes.h" to
<rtems/termiostypes.h> since that is an RTEMS specific header file.
