The psxtmthread05 test was testing the functionality meant for
psxtmthread06. This patch copies the psxtmthread05 to psxtmthread06
and modifies psxtmthread05 to test the intended functionality.
This test referred to the first version of the simple SMP scheduler
which used the thread execution time for its scheduling decisions. For
the current simple SMP scheduler, the execution time of threads is
irrelevant (like in the corresponding single-processor variant).
ftruncate() and open() with O_TRUNC shall upon successful completion
mark for update the st_ctime and st_mtime fields of the file.
truncate() shall upon successful completion, if the file size is
changed, mark for update the st_ctime and st_mtime fields of the file.
The POSIX standard "The Open Group Base Specifications Issue 7", IEEE
Std 1003.1, 2013 Edition says nothing about the behaviour of truncate()
if the file size remains unchanged.
Future directions of the standard may mandate the behaviour specified in
ftruncate():
http://austingroupbugs.net/view.php?id=489
ftruncate() and open() with O_TRUNC shall upon successful completion
mark for update the st_ctime and st_mtime fields of the file.
truncate() shall upon successful completion, if the file size is
changed, mark for update the st_ctime and st_mtime fields of the file.
The POSIX standard "The Open Group Base Specifications Issue 7", IEEE
Std 1003.1, 2013 Edition says nothing about the behaviour of truncate()
if the file size remains unchanged.
Future directions of the standard may mandate the behaviour specified in
ftruncate():
http://austingroupbugs.net/view.php?id=489
Use unsigned long instead of uint_fast32_t since C11 provides only a
ATOMIC_LONG_LOCK_FREE macro constant. This makes it also possible to
use properly typed integer literals like 123UL. It is now clear which
compatible type should be used for the atomic integer.
Add and use _ISR_Disable_without_giant() and
_ISR_Enable_without_giant() if RTEMS_SMP is defined.
On single processor systems the ISR disable/enable was the big hammer
which ensured system-wide mutual exclusion. On SMP configurations this
no longer works since other processors do not care about disabled
interrupts on this processor and continue to execute freely.
On SMP in addition to ISR disable/enable an SMP lock must be used.
Currently we have only the Giant lock so we can check easily that ISR
disable/enable is used only in the right context.
Add ISR lock to chain control for proper SMP protection. Replace
rtems_chain_extract() with rtems_chain_explicit_extract() and
rtems_chain_insert() with rtems_chain_explicit_insert() on SMP
configurations. Use rtems_chain_explicit_extract() and
rtems_chain_explicit_insert() to provide SMP support.
Add and use _POSIX_signals_Release(). The post-switch handler is not
protected by disabled thread dispatching. Use proper SMP lock for
signal management.
