Low-end configurations may want to have the HTIF support removed.
Enable the option by default. Fix formatting. Fix node validity
checks.
Updates #4779.
Xilinx's upstream ILP32 xil_cache.h header is out of date and broken.
This provides a copy of the LP64 header in place of the ILP32 header
since the LP64 header includes all the correct types to work with either
data model.
The address of the nandpsu peripheral is specific to the ZynqMP SoC and
not relevant to other devices that might have one or more instances of
this peripheral.
This adds Xilinx's driver for the Xilinx NAND controller embedded in the
ZynqMP SoC. Within that device alone, it is possible to access this
peripheral from MicroBlaze, ARMv7, and ARMv8 cores. This has been added
to the hardware ZynqMP BSPs since QEMU does not support emulation of
this peripheral. This driver supports polled operation only. The
imported files are and should be able to remain unmodified. Import
information is kept in bsps/shared/dev/nand/VERSION.
This support code is necessary for many Xilinx-provided bare metal device
drivers supported on ARM, AArch64, and MicroBlaze platforms. Support for
all of these architectures is kept under bsps/include due to multiple
architecture variants being supported which requires complex logic in
the build system. The imported files are and should be able to remain
unmodified. Import information is kept in bsps/shared/xil/VERSION.
With the old build system in RTEMS 5 that was possible by just
overwriting BOARD_Sdram_Config and setting a custom
ATSAM_MEMORY_SDRAM_SIZE during building the BSP. In the new build system
that ATSAM_MEMORY_SDRAM_SIZE is set exclusively by the selected SDRAM
chip.
This patch adds the possibility to specify a "custom-0x100000" or
similar as SDRAM type where the number gives the SDRAM size.
A SPI transfer where the Rx or Tx buffer is set to NULL currently
transfers or overwrites data starting from address 0x00000000 via DMA.
This patch changes the DMA setup so that dummy transfers are done.
Just reading / writing to a single location is simpler than changing the
whole logic of the transfer depending on the passed buffers.
Add ref-clock-num identifiers to the device tree to ensure that
interfaces use the correct clocks even when some are not used due to
unconnected MII busses. This also adjusts the default ZynqMP PHY
attachment to RGMII-ID which was the default before device trees were
introduced.
This enables the tracing of interrupt entry/exit events through an
application configuration option. The interrupt processing can be
viewed with Trace Compass using rtems-record-lttng from the RTEMS Tools.
Update #4769.
This fixes build errors seen when building with console interrupts
enabled. A few places were missing bspopts.h includes, and one of the
UART functions was not defined.
This changes the ZynqMP device tree parsing over to direct libfdt calls
to avoid inclusion of malloc() in the base BSP which currently causes
sp01 to fail due to unexpected use of TLS space.
In the original implementation, level -1 was unused and all levels could
have block-like descriptors (level 2 block descriptors are called page
descriptors). When support for level -1 page tables was added the
constraint on level -1 block descriptors was not honored. This prevents
block descriptors from being mapped at level -1 since the hardware will
not map them properly.
This patch changes the license to BSD-2 for all source files where the
copyright is held by Aeroflex Gaisler, Cobham Gaisler, or Gaisler Research.
Some files also includes copyright right statements from OAR and/or
embedded Brains in addition to Gaisler.
Updates #3053.
This patch changes the license to BSD-2 for all source files where the
copyright is held by Aeroflex Gaisler, Cobham Gaisler, or Gaisler Research.
Some files also includes copyright right statements from OAR and/or
embedded Brains in addition to Gaisler.
Updates #3053.
This patch changes the license to BSD-2 for all source files where the
copyright is held by Aeroflex Gaisler, Cobham Gaisler, or Gaisler Research.
Some files also includes copyright right statements from OAR and/or
embedded Brains in addition to Gaisler.
Updates #3053.
This patch changes the license to BSD-2 for all source files where the
copyright is held by Aeroflex Gaisler, Cobham Gaisler, or Gaisler Research.
Some files also includes copyright right statements from OAR and/or
embedded Brains in addition to Gaisler.
Updates #3053.
In SMP configurations, there may be no software interrupt handler
installed when the software interrupt is processed. Add the new
interrupt handler dispatch variant
bsp_interrupt_handler_dispatch_unlikely() for this special case.
