the-m3chanic
0c6b1f1184
linker scripts: fixed formatting - replaced tab with 2 spaces
2024-08-05 21:29:58 +00:00
the-m3chanic
79d5f22b5a
lm32: modified linker scripts for gdb-inlined script support
2024-08-05 21:29:58 +00:00
the-m3chanic
39a2ad6232
bfin: modified linker scripts for all BSPs for gdb-inlined script support
2024-08-05 21:29:58 +00:00
the-m3chanic
56158c1cb4
m68k: modified BSP specific linker scripts
2024-08-05 21:29:58 +00:00
the-m3chanic
53c2dc6b7a
or1k: modified linkcmds.base to add gdb-inlined script support
2024-08-05 21:29:58 +00:00
the-m3chanic
aea2f38500
mips: modified linker script files for gdb-inlined script support
2024-08-05 21:29:58 +00:00
the-m3chanic
5fa414f37a
moxie: modified linkcmds for gdb-inlined script support
2024-08-05 21:29:58 +00:00
the-m3chanic
57ed8e5f31
x86_64: modified linkcmds for gdb-inlined script support
2024-08-05 21:29:58 +00:00
the-m3chanic
8276f817cf
sh: modified linkcmds for all BSPs for gdb-inlined script support
2024-08-05 21:29:58 +00:00
the-m3chanic
51241988ac
sparc64: modified linkcmds to add new section for GDB pretty-printing
2024-08-05 21:29:58 +00:00
the-m3chanic
065155b421
sparc: modified linkcmds.base to add new section for GDB pretty-printing
2024-08-05 21:29:58 +00:00
the-m3chanic
a9b39c800c
powerpc: modified linkcmds.base to add new section for GDB pretty-printing
2024-08-05 21:29:58 +00:00
the-m3chanic
2ba6a3bbda
m68k: modified linkcmds.base to add new section for GDB pretty-printing
2024-08-05 21:29:58 +00:00
the-m3chanic
9f559735c1
arm: modified linkcmds.base to add new section for GDB pretty-printing
2024-08-05 21:29:58 +00:00
the-m3chanic
489ef84549
aarch64: modified linkcmds.base to add new section for GDB pretty-printing
2024-08-05 21:29:58 +00:00
the-m3chanic
a54f06b678
arm: modified linkcmds.base to add new section for gdb-inlined script
2024-08-05 21:29:58 +00:00
Amar Takhar
9b4ac0aa64
bsps: Fold external documentation into README.md
2024-08-02 21:21:42 +00:00
Amar Takhar
52a9fdec5c
Convert various files to README.md MarkDown
2024-08-02 21:13:35 +00:00
Amar Takhar
f16de5fae9
rtc: Convert STATUS and README.* to MarkDown
2024-08-02 21:07:27 +00:00
Amar Takhar
a7f2cb4562
Convert bsps/*/README to MarkDown
...
Some of this content is really old we will have to go through it.
2024-08-02 20:21:38 +00:00
Amar Takhar
4c2e5ad988
bsps: Convert README to MarkDown
2024-07-29 13:07:51 -04:00
Amar Takhar
0bd9737e58
Move old devel links to GitLab
2024-07-26 21:37:42 +00:00
Amar Takhar
de8452e32c
Update Doxygen to point to GitLab.
...
These are git.rtems.org links.
Point to LICENSE.md directly it has a TOC now the licenses can be found without
anchors and less to maintain.
2024-07-26 14:25:58 -04:00
Matheus Pecoraro
e46135290a
x86_64: Enable and add support for FP tasks
2024-07-01 17:48:25 +00:00
Sebastian Huber
e5b6fa026a
bsp/tms570: Fix SCI baud calculation
...
The bug was introduced by cc6f1d86cc .
Update #4982 .
2024-06-25 13:36:47 +00:00
Matheus Pecoraro
263cbb9408
amd64: Remove unneeded paging flags
2024-06-25 13:35:13 +00:00
Kinsey Moore
39da0b7fd4
bsps/xqspipsu: Add timeouts to NOR transfers
...
This switches the XQspiPsu NOR driver layer to use the RTEMS event
system so that waits for interrupt-based data transfers can time out
instead of waiting indefinitely. It is sometimes possible for either the
controller or the NOR chip to fail to issue a transfer completion event
and recovery is preferable to a hang.
2024-06-25 06:47:48 +00:00
Sebastian Huber
c4c3e68790
bsps/arm: Use fatal error for data cache disable
...
On the Cortex-A cores, at least the L1 data cache is required to provide
support for atomic operations.
Close #5050 .
2024-06-25 03:58:34 +00:00
Sebastian Huber
3a281aca37
bsps/arm: Fix L2C-310 instruction enabled/disable
...
Set/clear SCTLR[I] on all online processors. Do not enable/disable the
L2C-310 cache in the instruction cache enable/disable since it is a
unified cache.
2024-06-25 03:58:34 +00:00
Sebastian Huber
ef9b49dc24
bsps/arm: Fix Doxygen group placement
2024-06-25 03:58:34 +00:00
Kinsey Moore
b48166b9b6
bsps/aarch64/zynqmp: Add memory error reporting
...
This adds error reporting for ZynqMP including L1 and L2 cache, on-chip
memory (OCM) error correcting code (ECC), and DDR ECC. OCM ECC supports
fault injection from within RTEMS. DDR ECC technically supports fault
injection as well, but requires that the program injecting faults
operate exclusively outside of DDR. The AArch64 port is not currently
capable of operating exclusively in OCM due to size constraints and
would need to be booted via JTAG or via a non-relocating u-boot to
accomplish this.
2024-06-21 05:57:21 +00:00
Utkarsh Verma
dff15a820f
aarch64/raspberrypi: Add gpio driver
...
Close #5029
Co-authored-by: Ning Yang <yangn0@qq.com >
2024-06-21 03:29:10 +00:00
Matheus Pecoraro
e233b5c16a
amd64efi: Add amd64efi doxygen group
2024-06-20 15:38:01 +00:00
Matheus Pecoraro
5d90fc945b
amd64: Add amd64 doxygen group
2024-06-20 15:38:01 +00:00
Matheus Pecoraro
3ca279e5b1
amd64: Use proper interrupt disable directive
...
Use rtems_interrupt_local_disable and enable in clock.c to avoid
enabling interrupts during system initialization
2024-06-20 15:25:23 +00:00
Matheus Pecoraro
2fe9209971
amd64: Add rtemsrwset section to linker script
2024-06-19 04:38:51 -03:00
Chris Johns
0bdeef72fe
bsp/powerpc: Remove e500 machine state for asm functions
...
The e500 machine state was added when gcc 10 support appeared to deal with
the assembler's -many option being removed.
Close #5043
2024-06-18 04:27:46 +00:00
Matheus Pecoraro
20a663ccef
amd64: Change console device_file to /dev/ttyS0
...
Change the device_file path from /dev/console to /dev/ttyS0 since it
will already be linked to /dev/console on console_initialize
2024-06-14 17:08:14 +00:00
Ning Yang
2d5a85f7d2
dev/pl011: Fix incorrect macro definition
...
Close #5036
2024-06-13 19:54:19 +00:00
Matheus Pecoraro
ad24b764d6
amd64: Add bsp_reset
...
Add a temporary implementation of bsp_reset using the keyboard
controller until the ACPI method can be implemented
2024-06-13 12:35:57 +00:00
Sebastian Huber
1d997f3338
bsps: Maybe fix Xilinx QSPI
...
Update #4870 .
2024-06-12 00:17:59 +00:00
Sam Price
20939b213a
microblaze: Move interrupt context save to BSP
...
The interrupt context save is now done in the BSP. This avoids an issue
where a register is modified by the interrupt handler before it is
saved. Specifically, the MSR register was modified by the `addi`
instruction in the interrupt handler before the MSR was saved. This
caused the MSR to be saved with the wrong value.
Closes #4962
2024-06-11 19:24:39 +00:00
Sebastian Huber
80a22dc024
aarch64/xilinx-zynqmp: Replace file header
...
Use a template description.
2024-06-10 18:01:08 +00:00
Sebastian Huber
b826e20d8f
aarch64/xilinx-zynqmp: Add BSP Doxygen group
2024-06-10 18:01:08 +00:00
Sebastian Huber
b9148332d9
aarch64/xilinx-zynqmp: Include standard header
2024-06-10 18:01:08 +00:00
Sebastian Huber
41b597e81e
aarch64/xilinx-zynqmp: Use forward declaration
...
Remove the weak attribute from the declaration. The weakness is a property of
the definition.
2024-06-10 18:01:08 +00:00
Sebastian Huber
ce3de68545
bsps/aarch64: Always set the start vector table
2024-06-10 18:01:08 +00:00
Sebastian Huber
36e596a057
bsps/aarch64: Use interrupt entry for IPI
2024-06-10 18:01:08 +00:00
Sebastian Huber
1421b9f7c0
bsps/aarch64: Use BSP fatal error
2024-06-10 18:01:08 +00:00
Aaron Nyholm
e950c4d76a
bsps: Add flash wrapper for Xilinx GQSPI
...
Closes #4870
2024-06-10 17:58:00 +00:00