The internal JFFS2 locking does not guarantee that delayed writes will
not step on other reads and writes to the device. This adds locking to
prevent that in the JFFS2 NAND interworking layer.
The changes here ensure correct cache maintenance around DMA operations.
One cache flush was missing and two cache invalidations occurred before
the corresponding read that would make them necessary.
This moves delayed work to a temporary chain to prevent a locking
inversion between the delayed work lock and the alloc_sem lock. Delayed
work is now processed after the delayed work lock is released. Locking
order is any JFFS2 locks before the delayed work lock.
This adds `-u__extendsfdf2` to the `ldflags` for the dl07, dl08, and
dl09 tests to force the inclusion of `__extendsfdf2` in the base image.
This function is part of the GCC software floating point library and is
used in the tests to convert floats to doubles when calling `printf`.
This allows for conditionally setting 'ldflags' in scripts that use
`link_cc` and `link_cxx`. The immediate use case is allowing a linker
flag to be used only for MicroBlaze builds of certain tests.
- Add the section alignment to the size as the allocator may not
provide correctly aligned memory
- Only include symbols in the section when locating symbols. The
powerpc was incorrectly adding SDATA BSS symbols to the BSS offset
overrunning the section
Closes#4950
The MAIR index currently assigned (1) for uncached memory segments is
not configured properly for this purpose. Instead, this switches
uncached memory segment flags to MAIR index 2 which is properly
configured for uncached inner and outer shareable domains.
This change requires an rtems-tools update for symbol generation.
Working architectures:
- aarch64
- arm
- powerpc
- sparc
No newlib TLS support but checked:
- i386
- m69k
Updates #4920
The current ARM support in libdebugger does not cover Cortex-M series
cores since it requires support for CP14 system register accessor
instructions. Cortex-M series cores support debug monitor mode, but its
configuration is accessed by memory mapped registers instead of using
CP14. This omits building libdebugger from BSPs that use a cortex-m ABI
flag.
Updates #4924.
The Regulator is an application support class which is used to
deal with the scenario where there is a bursty input source
which needs to be metered out to a destination sink. The maximum
size of bursts needs to be known and the delivery method must
be configured to deliver messages at a rate that allows the
traffic to not overflow.
Make sure we have enough POSIX key value pairs available. This fixes a test
failure on some targets.
Make objects and functions static. Initialize variable to get rid of warnings.
