The VRSAVE feature of the Altivec unit can be used to reduce the amount of
Altivec registers which need to be saved/restored during interrupt processing
and context switches.
In order to use the VRSAVE optimization a corresponding multilib (-mvrsave) is
required, see GCC configuration. The -mvrsave option must be added to the
ABI_FLAGS of the BSP.
Currently only the -mcpu=e6500 based QorIQ BSP support this optimization.
Update #4712.
Sort the .noinit* input sections by name first, then by alignment if two
sections have the same name. This allows the placement of begin/end symbols to
initialize some areas with a special value.
Update #4678.
Do not return a status code in bsp_interrupt_facility_initialize() since this
leads to unreachable code in bsp_interrupt_initialize(). Use RTEMS_DEBUG
assertions in bsp_interrupt_facility_initialize() if necessary.
Add rtems_interrupt_raise_on() and rtems_interrupt_clear().
Add a default implementation which just returns RTEMS_UNSATISFIED for
valid parameters.
Update #3269.
The __builtin_unreachable() cannot be used with current GCC versions to
tell the compiler that a function does not return to the caller, see:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99151
Add a no return variant of _CPU_Context_switch() to avoid generation of
dead code in _Thread_Start_multitasking() if RTEMS was built with SMP
support enabled.
The "powerpc/shared/console" code has the start-up console value fixed
at 9600 baud. This changes the hard-wired constant "9600" in the code
to the configuration setting "BSP_CONSOLE_BAUD" and adds configuration
support in both the "waf" and the legacy configuration systems.
Note that the VME BSPs beatnik, mvme3100, and mve5100 can be improved
by adding a "mvmexxxx" BSP family. This configuration change, as well
as future configuration changes, could then be made in a "grp.yml" file.
- Add support to the BSP to enable irq-generic management
- Update the powerpc shared irq code to support irq-generic. This
is an opt in option for existing powerpc bsps. This change
should be simpler now
- Fix a number of issues in ISA IRQ controller handling by porting
fixes from the i386 (PC) BSP
Closes#4238Closes#4239
- The call to enable the openpic irq for the ISA bridge fails
because the IRQ used is offset by the ISA bus signals and
the openpic call expects an IRQ relative to its signals.
- Add the MVME 2600/2700 to the list of boards with an ISA bridge.
Closes#4231
If we interrupt a thread dispatch critical section (thread dispatch
disable level != ISR nest level), then we should not do the fast idle
mode since this may delay an ongoing system call forever.
GCC 10 no longer passes -many to the assembler. This enables more
checks in the assembler.
The 0 in the tlbie instruction is the L operand which selects a 4KiB
page size.
The work area initialization was done by the BSP through
bsp_work_area_initialize(). This approach predated the system
initialization through the system initialization linker set. The
workspace and C program heap were unconditionally initialized. The aim
is to support RTEMS application configurations which do not need the
workspace and C program heap. In these configurations, the workspace
and C prgram heap should not get initialized.
Change all bsp_work_area_initialize() to implement _Memory_Get()
instead. Move the dirty memory, sbrk(), per-CPU data, workspace, and
malloc() heap initialization into separate system initialization steps.
This makes it also easier to test the individual initialization steps.
This change adds a dependency to _Heap_Extend() to all BSPs. This
dependency will be removed in a follow up change.
Update #3838.
