forked from Imagelibrary/rtems
bsps: Replace NIRVANA region
Replace the "NIRVANA" region with the more verbose "UNEXPECTED_SECTIONS" region. Move the region definition into the "linkcmds.base" files.
This commit is contained in:
@@ -1,7 +1,6 @@
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MEMORY {
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SDRAM_MMU : ORIGIN = 0x08200000, LENGTH = 16k
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SDRAM : ORIGIN = 0x08204000, LENGTH = 30M - 16k
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NIRVANA : ORIGIN = 0, LENGTH = 0
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}
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REGION_ALIAS ("REGION_START", SDRAM);
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@@ -2,7 +2,6 @@ MEMORY {
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SDRAM_MMU : ORIGIN = 0x20100000, LENGTH = 16k
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SDRAM : ORIGIN = 0x20104000, LENGTH = 15M - 16k
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SRAM : ORIGIN = 0x00200000, LENGTH = 16k
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NIRVANA : ORIGIN = 0, LENGTH = 0
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}
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REGION_ALIAS ("REGION_START", SDRAM);
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@@ -2,7 +2,6 @@ MEMORY {
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SDRAM_MMU : ORIGIN = 0x20100000, LENGTH = 16k
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SDRAM : ORIGIN = 0x20104000, LENGTH = 63M - 16k
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SRAM : ORIGIN = 0x00200000, LENGTH = 16k
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NIRVANA : ORIGIN = 0, LENGTH = 0
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}
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REGION_ALIAS ("REGION_START", SDRAM);
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@@ -1,6 +1,5 @@
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MEMORY {
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SDRAM : ORIGIN = 0x00000000, LENGTH = 16M
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NIRVANA : ORIGIN = 0, LENGTH = 0
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}
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REGION_ALIAS ("REGION_START", SDRAM);
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@@ -1,6 +1,5 @@
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MEMORY {
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RAM : ORIGIN = 0x00000000, LENGTH = 4M
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NIRVANA : ORIGIN = 0, LENGTH = 0
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}
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REGION_ALIAS ("REGION_START", RAM);
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@@ -1,7 +1,6 @@
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MEMORY {
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SDRAM_MMU : ORIGIN = 0x0c000000, LENGTH = 16k
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SDRAM : ORIGIN = 0x0c004000, LENGTH = 7M - 16k
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NIRVANA : ORIGIN = 0, LENGTH = 0
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}
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REGION_ALIAS ("REGION_START", SDRAM);
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@@ -2,7 +2,6 @@ MEMORY {
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SDRAM_MMU : ORIGIN = 0xa0000000, LENGTH = 16k
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SDRAM : ORIGIN = 0xa0004000, LENGTH = 64M - 16k
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SRAM : ORIGIN = 0x00000000, LENGTH = 16k
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NIRVANA : ORIGIN = 0, LENGTH = 0
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}
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REGION_ALIAS ("REGION_START", SDRAM);
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@@ -7,7 +7,6 @@
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MEMORY {
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RAM_INT (AIW) : ORIGIN = 0x20000000, LENGTH = 16M
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ROM_INT (RX) : ORIGIN = 0x00000000, LENGTH = 64M
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NIRVANA : ORIGIN = 0, LENGTH = 0
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}
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REGION_ALIAS ("REGION_START", ROM_INT);
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@@ -4,7 +4,6 @@ MEMORY {
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RAM_INT (AIW) : ORIGIN = 0x10000000, LENGTH = 64k
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RAM_PER (AIW) : ORIGIN = 0x20000000, LENGTH = 32k
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RAM_EXT (AIW) : ORIGIN = 0xa0000000, LENGTH = 32M
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NIRVANA : ORIGIN = 0, LENGTH = 0
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}
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REGION_ALIAS ("REGION_START", RAM_EXT);
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@@ -4,7 +4,6 @@ MEMORY {
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ROM_INT (RX) : ORIGIN = 0x00000000, LENGTH = 512k
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RAM_INT (AIW) : ORIGIN = 0x10000000, LENGTH = 64k
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RAM_EXT (AIW) : ORIGIN = 0xa0000000, LENGTH = 32M
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NIRVANA : ORIGIN = 0, LENGTH = 0
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}
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REGION_ALIAS ("REGION_START", ROM_INT);
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@@ -39,7 +39,6 @@ MEMORY {
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RAM_USB (AIW) : ORIGIN = 0x7fd00000, LENGTH = 8k
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RAM_ETH (AIW) : ORIGIN = 0x7fe00000, LENGTH = 16k
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ROM_INT (RX) : ORIGIN = 0x00000000, LENGTH = 128k
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NIRVANA : ORIGIN = 0, LENGTH = 0
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}
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REGION_ALIAS ("REGION_START", ROM_INT);
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@@ -43,7 +43,6 @@ MEMORY {
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ROM_BOOT (RX) : ORIGIN = 0x00000000, LENGTH = 4k
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ROM_CFG (RX) : ORIGIN = 0x00001000, LENGTH = 4k
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ROM_INT (RX) : ORIGIN = 0x00002000, LENGTH = 120k
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NIRVANA : ORIGIN = 0, LENGTH = 0
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}
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REGION_ALIAS ("REGION_START", ROM_BOOT);
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@@ -36,7 +36,6 @@
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MEMORY {
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RAM_INT (AIW) : ORIGIN = 0x40000000, LENGTH = 64k
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RAM_EXT (AIW) : ORIGIN = 0xa0000000, LENGTH = 32M
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NIRVANA : ORIGIN = 0, LENGTH = 0
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}
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REGION_ALIAS ("REGION_START", RAM_EXT);
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@@ -36,7 +36,6 @@
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MEMORY {
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RAM_INT (AIW) : ORIGIN = 0x40000000, LENGTH = 64k
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RAM_EXT (AIW) : ORIGIN = 0xa0000000, LENGTH = 8M
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NIRVANA : ORIGIN = 0, LENGTH = 0
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}
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REGION_ALIAS ("REGION_START", RAM_EXT);
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@@ -40,7 +40,6 @@ MEMORY {
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RAM_EXT (AIW) : ORIGIN = 0xa0400000, LENGTH = 4M
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ROM_BOOT (RX) : ORIGIN = 0x81000000, LENGTH = 16k
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ROM_EXT (RX) : ORIGIN = 0x81010000, LENGTH = 2M - 64k
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NIRVANA : ORIGIN = 0, LENGTH = 0
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}
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REGION_ALIAS ("REGION_START", ROM_BOOT);
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@@ -40,7 +40,6 @@ MEMORY {
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RAM_INT (AIW) : ORIGIN = 0x40008000, LENGTH = 32k
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RAM_EXT (AIW) : ORIGIN = 0xa0400000, LENGTH = 4M
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ROM_INT (RX) : ORIGIN = 0x00000000, LENGTH = 512k - 8k
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NIRVANA : ORIGIN = 0, LENGTH = 0
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}
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REGION_ALIAS ("REGION_START", ROM_INT);
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@@ -9,7 +9,6 @@ MEMORY {
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RAM_EXT : ORIGIN = 0xa0000000, LENGTH = 32M
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ROM_INT : ORIGIN = 0x00000000, LENGTH = 512k - 8k
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ROM_EXT : ORIGIN = 0x80000000, LENGTH = 4M
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NIRVANA : ORIGIN = 0, LENGTH = 0
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}
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REGION_ALIAS ("REGION_START", RAM_EXT);
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@@ -9,7 +9,6 @@ MEMORY {
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RAM_EXT : ORIGIN = 0xa0000000, LENGTH = 32M
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ROM_INT : ORIGIN = 0x00000000, LENGTH = 512k - 8k
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ROM_EXT : ORIGIN = 0x80000000, LENGTH = 4M
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NIRVANA : ORIGIN = 0, LENGTH = 0
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}
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REGION_ALIAS ("REGION_START", ROM_INT);
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@@ -39,7 +39,6 @@ MEMORY {
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RAM_MMU : ORIGIN = 0x80000000, LENGTH = 16k /* SDRAM on DYCS0 */
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RAM_SCRATCH : ORIGIN = 0x80004000, LENGTH = 4k /* SDRAM on DYCS0 */
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RAM_EXT : ORIGIN = 0x80005000, LENGTH = 32M - 20k /* SDRAM on DYCS0 */
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NIRVANA : ORIGIN = 0, LENGTH = 0
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}
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REGION_ALIAS ("REGION_START", RAM_EXT);
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@@ -39,7 +39,6 @@ MEMORY {
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RAM_VEC : ORIGIN = 0x0803a000, LENGTH = 8k
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RAM_MMU : ORIGIN = 0x0803c000, LENGTH = 16k
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RAM_SCRATCH : ORIGIN = 0x80004000, LENGTH = 4k /* SDRAM on DYCS0 */
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NIRVANA : ORIGIN = 0, LENGTH = 0
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}
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REGION_ALIAS ("REGION_START", RAM_INT);
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@@ -40,7 +40,6 @@ MEMORY {
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RAM_MMU : ORIGIN = 0x80000000, LENGTH = 16k /* SDRAM on DYCS0 */
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RAM_SCRATCH : ORIGIN = 0x80004000, LENGTH = 4k /* SDRAM on DYCS0 */
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RAM_EXT : ORIGIN = 0x81c00000, LENGTH = 4M /* SDRAM on DYCS0 */
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NIRVANA : ORIGIN = 0, LENGTH = 0
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}
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REGION_ALIAS ("REGION_START", RAM_EXT);
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@@ -40,7 +40,6 @@ MEMORY {
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RAM_MMU : ORIGIN = 0x80000000, LENGTH = 16k /* SDRAM on DYCS0 */
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RAM_EXT : ORIGIN = 0x80004000, LENGTH = 64M - 16k /* SDRAM on DYCS0 */
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ROM_EXT : ORIGIN = 0xe0000000, LENGTH = 2M /* NOR flash on CS0 */
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NIRVANA : ORIGIN = 0, LENGTH = 0
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}
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REGION_ALIAS ("REGION_START", RAM_EXT);
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@@ -3,7 +3,6 @@ MEMORY {
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EWRAM : ORIGIN = 0x02000000, LENGTH = 4M - 4k
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DTCM : ORIGIN = 0x0b000000, LENGTH = 16k
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ITCM : ORIGIN = 0x01000000, LENGTH = 32k
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NIRVANA : ORIGIN = 0, LENGTH = 0
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}
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REGION_ALIAS ("REGION_START", EWRAM);
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@@ -1,7 +1,6 @@
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MEMORY {
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SDRAM : ORIGIN = 0x81000000, LENGTH = 512k
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SRAM : ORIGIN = 0x40000000, LENGTH = 16k
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NIRVANA : ORIGIN = 0, LENGTH = 0
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}
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REGION_ALIAS ("REGION_START", SDRAM);
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@@ -56,6 +56,10 @@ bsp_stack_und_size = ALIGN (bsp_stack_und_size, bsp_stack_align);
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bsp_stack_main_size = DEFINED (bsp_stack_main_size) ? bsp_stack_main_size : 0;
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bsp_stack_main_size = ALIGN (bsp_stack_main_size, bsp_stack_align);
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MEMORY {
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UNEXPECTED_SECTIONS : ORIGIN = 0xffffffff, LENGTH = 0
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}
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SECTIONS {
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.start : {
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bsp_section_start_begin = .;
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@@ -424,6 +428,13 @@ SECTIONS {
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.note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }
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/DISCARD/ : { *(.note.GNU-stack) *(.gnu_debuglink) *(.gnu.lto_*) }
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/* Catch all unknown sections */
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.nirvana : { *(*) } > NIRVANA
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/*
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* This is a RTEMS specific section to catch all unexpected input
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* sections. In case you get an error like
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* "section `.unexpected_sections' will not fit in region
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* `UNEXPECTED_SECTIONS'"
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* you have to figure out the offending input section and add it to the
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* appropriate output section definition above.
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*/
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.unexpected_sections : { *(*) } > UNEXPECTED_SECTIONS
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}
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@@ -1,7 +1,6 @@
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MEMORY {
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SDRAM_MMU : ORIGIN = 0x30000000, LENGTH = 16k
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SDRAM : ORIGIN = 0x30004000, LENGTH = 64M - 16k
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NIRVANA : ORIGIN = 0, LENGTH = 0
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}
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REGION_ALIAS ("REGION_START", SDRAM);
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@@ -1,7 +1,6 @@
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MEMORY {
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RAM_INT : ORIGIN = 0x20000000, LENGTH = 128k
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ROM_INT : ORIGIN = 0x00000000, LENGTH = 1M
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NIRVANA : ORIGIN = 0, LENGTH = 0
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}
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REGION_ALIAS ("REGION_START", ROM_INT);
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@@ -26,6 +26,10 @@ RamBase = bsp_ram_start;
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RamSize = bsp_ram_size;
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HeapSize = DEFINED(HeapSize) ? HeapSize : 0x0;
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MEMORY {
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UNEXPECTED_SECTIONS : ORIGIN = 0xffffffff, LENGTH = 0
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}
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SECTIONS {
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/*
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* BSP: MPC5200 registers
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@@ -320,9 +324,12 @@ SECTIONS {
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}
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/*
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* BSP: Catch all unknown sections
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* This is a RTEMS specific section to catch all unexpected input
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* sections. In case you get an error like
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* "section `.unexpected_sections' will not fit in region
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* `UNEXPECTED_SECTIONS'"
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* you have to figure out the offending input section and add it to the
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* appropriate output section definition above.
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*/
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.nirvana : {
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*(*)
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} > NIRVANA
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.unexpected_sections : { *(*) } > UNEXPECTED_SECTIONS
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}
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@@ -10,7 +10,6 @@ MEMORY {
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ROM : ORIGIN = 0xffe00000, LENGTH = 2M
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DPRAM : ORIGIN = 0xff000000, LENGTH = 1k
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REGS : ORIGIN = 0xf0000000, LENGTH = 64k
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NIRVANA : ORIGIN = 0x0, LENGTH = 0
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}
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INCLUDE linkcmds.base
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@@ -10,7 +10,6 @@ MEMORY {
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ROM : ORIGIN = 0xffe00000, LENGTH = 2M
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REGS : ORIGIN = 0xf0000000, LENGTH = 64k
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DPRAM : ORIGIN = 0x0, LENGTH = 0
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NIRVANA : ORIGIN = 0x0, LENGTH = 0
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}
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INCLUDE linkcmds.base
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@@ -10,7 +10,6 @@ MEMORY {
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ROM : ORIGIN = 0xffe00000, LENGTH = 2M
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REGS : ORIGIN = 0xf0000000, LENGTH = 64k
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DPRAM : ORIGIN = 0x0, LENGTH = 0
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NIRVANA : ORIGIN = 0x0, LENGTH = 0
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}
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INCLUDE linkcmds.base
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@@ -10,7 +10,6 @@ MEMORY {
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ROM : ORIGIN = 0xffe00000, LENGTH = 2M
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REGS : ORIGIN = 0xf0000000, LENGTH = 64k
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DPRAM : ORIGIN = 0xff000000, LENGTH = 1k
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NIRVANA : ORIGIN = 0x0, LENGTH = 0
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}
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INCLUDE linkcmds.base
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@@ -10,7 +10,6 @@ MEMORY {
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ROM : ORIGIN = 0xffe00000, LENGTH = 2M
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REGS : ORIGIN = 0xf0000000, LENGTH = 64k
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DPRAM : ORIGIN = 0xff000000, LENGTH = 1k
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NIRVANA : ORIGIN = 0x0, LENGTH = 0
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}
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INCLUDE linkcmds.base
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@@ -12,7 +12,6 @@ MEMORY {
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RAM : ORIGIN = 0x0, LENGTH = 128M
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ROM : ORIGIN = 0xfe000000, LENGTH = 8M
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MPC83XX_REGS : ORIGIN = 0xe0000000, LENGTH = 256k
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NIRVANA : ORIGIN = 0x0, LENGTH = 0
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}
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INCLUDE linkcmds.base
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@@ -22,6 +22,10 @@ RamBase = bsp_ram_start;
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RamSize = bsp_ram_size;
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HeapSize = DEFINED(HeapSize) ? HeapSize : 0x0;
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MEMORY {
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UNEXPECTED_SECTIONS : ORIGIN = 0xffffffff, LENGTH = 0
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}
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SECTIONS {
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/*
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* BSP: MPC83XX registers
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@@ -336,9 +340,12 @@ SECTIONS {
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}
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/*
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* BSP: Catch all unknown sections
|
||||
* This is a RTEMS specific section to catch all unexpected input
|
||||
* sections. In case you get an error like
|
||||
* "section `.unexpected_sections' will not fit in region
|
||||
* `UNEXPECTED_SECTIONS'"
|
||||
* you have to figure out the offending input section and add it to the
|
||||
* appropriate output section definition above.
|
||||
*/
|
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.nirvana : {
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*(*)
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} > NIRVANA
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.unexpected_sections : { *(*) } > UNEXPECTED_SECTIONS
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}
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@@ -8,7 +8,6 @@ MEMORY {
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RAM : ORIGIN = 0x0, LENGTH = 256M
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ROM : ORIGIN = 0xfe000000, LENGTH = 8M
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MPC83XX_REGS : ORIGIN = 0xe0000000, LENGTH = 1M
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NIRVANA : ORIGIN = 0x0, LENGTH = 0
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}
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INCLUDE linkcmds.base
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@@ -8,7 +8,6 @@ MEMORY {
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RAM : ORIGIN = 0x0, LENGTH = 256M
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ROM : ORIGIN = 0xfe000000, LENGTH = 8M
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MPC83XX_REGS : ORIGIN = 0xe0000000, LENGTH = 256k
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NIRVANA : ORIGIN = 0x0, LENGTH = 0
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}
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INCLUDE linkcmds.base
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@@ -8,7 +8,6 @@ MEMORY {
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RAM : ORIGIN = 0x0, LENGTH = 128M
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ROM : ORIGIN = 0xfe000000, LENGTH = 8M
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MPC83XX_REGS : ORIGIN = 0xe0000000, LENGTH = 256k
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NIRVANA : ORIGIN = 0x0, LENGTH = 0
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}
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INCLUDE linkcmds.base
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@@ -8,7 +8,6 @@ MEMORY {
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RAM : ORIGIN = 0x0, LENGTH = 256M
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ROM : ORIGIN = 0xfe000000, LENGTH = 8M
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MPC83XX_REGS : ORIGIN = 0xe0000000, LENGTH = 256k
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NIRVANA : ORIGIN = 0x0, LENGTH = 0
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}
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INCLUDE linkcmds.base
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@@ -3,7 +3,6 @@ MEMORY {
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RAM : ORIGIN = 0x40000000, LENGTH = 80K
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RAM_EXT : ORIGIN = 0x20000000, LENGTH = 512K
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NOCACHE : ORIGIN = 0x0, LENGTH = 0
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NIRVANA : ORIGIN = 0x0, LENGTH = 0
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}
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REGION_ALIAS ("REGION_START", ROM);
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@@ -3,7 +3,6 @@ MEMORY {
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RAM : ORIGIN = 0x40000000, LENGTH = 128K
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RAM_EXT : ORIGIN = 0x20000000, LENGTH = 512K
|
||||
NOCACHE : ORIGIN = 0x0, LENGTH = 0
|
||||
NIRVANA : ORIGIN = 0x0, LENGTH = 0
|
||||
}
|
||||
|
||||
REGION_ALIAS ("REGION_START", ROM);
|
||||
|
||||
@@ -4,7 +4,6 @@ MEMORY {
|
||||
RAM_1 : ORIGIN = 0x50000000, LENGTH = 64K
|
||||
RAM_EXT : ORIGIN = 0x0, LENGTH = 0
|
||||
NOCACHE : ORIGIN = 0x0, LENGTH = 0
|
||||
NIRVANA : ORIGIN = 0x0, LENGTH = 0
|
||||
}
|
||||
|
||||
bsp_ram_1_start = ORIGIN (RAM_1);
|
||||
|
||||
@@ -3,7 +3,6 @@ MEMORY {
|
||||
RAM : ORIGIN = 0x40000000, LENGTH = 256K - 16k
|
||||
RAM_EXT : ORIGIN = 0x20000000, LENGTH = 512K
|
||||
NOCACHE : ORIGIN = 0x4003c000, LENGTH = 16k
|
||||
NIRVANA : ORIGIN = 0x0, LENGTH = 0
|
||||
}
|
||||
|
||||
REGION_ALIAS ("REGION_START", ROM);
|
||||
|
||||
@@ -8,7 +8,6 @@ MEMORY {
|
||||
RAM_EXT : ORIGIN = 0x21000000, LENGTH = 4M
|
||||
DEBUG_RAM : ORIGIN = 0x21400000, LENGTH = 4M
|
||||
NOCACHE : ORIGIN = 0x0, LENGTH = 0
|
||||
NIRVANA : ORIGIN = 0x00000000, LENGTH = 0
|
||||
}
|
||||
|
||||
bsp_debug_ram_start = ORIGIN (DEBUG_RAM);
|
||||
|
||||
@@ -7,7 +7,6 @@
|
||||
MEMORY {
|
||||
LOW : ORIGIN = 0x4000, LENGTH = 16M - 16k
|
||||
HIGH : ORIGIN = 0x1000000, LENGTH = 32M
|
||||
NIRVANA : ORIGIN = 0x0, LENGTH = 0
|
||||
}
|
||||
|
||||
REGION_ALIAS ("REGION_START", LOW);
|
||||
@@ -25,8 +24,8 @@ REGION_ALIAS ("REGION_BSS", HIGH);
|
||||
REGION_ALIAS ("REGION_RWEXTRA", HIGH);
|
||||
REGION_ALIAS ("REGION_WORK", HIGH);
|
||||
REGION_ALIAS ("REGION_STACK", HIGH);
|
||||
REGION_ALIAS ("REGION_NOCACHE", NIRVANA);
|
||||
REGION_ALIAS ("REGION_NOCACHE_LOAD", NIRVANA);
|
||||
REGION_ALIAS ("REGION_NOCACHE", HIGH);
|
||||
REGION_ALIAS ("REGION_NOCACHE_LOAD", HIGH);
|
||||
|
||||
bsp_section_robarrier_align = 0x1000000;
|
||||
bsp_section_rwbarrier_align = 0x1000000;
|
||||
|
||||
@@ -6,7 +6,6 @@
|
||||
|
||||
MEMORY {
|
||||
RAM : ORIGIN = 0x4000000, LENGTH = 64M
|
||||
NIRVANA : ORIGIN = 0x0, LENGTH = 0
|
||||
}
|
||||
|
||||
REGION_ALIAS ("REGION_START", RAM);
|
||||
@@ -24,8 +23,8 @@ REGION_ALIAS ("REGION_BSS", RAM);
|
||||
REGION_ALIAS ("REGION_RWEXTRA", RAM);
|
||||
REGION_ALIAS ("REGION_WORK", RAM);
|
||||
REGION_ALIAS ("REGION_STACK", RAM);
|
||||
REGION_ALIAS ("REGION_NOCACHE", NIRVANA);
|
||||
REGION_ALIAS ("REGION_NOCACHE_LOAD", NIRVANA);
|
||||
REGION_ALIAS ("REGION_NOCACHE", RAM);
|
||||
REGION_ALIAS ("REGION_NOCACHE_LOAD", RAM);
|
||||
|
||||
bsp_section_robarrier_align = 0x1000000;
|
||||
bsp_section_rwbarrier_align = 0x1000000;
|
||||
|
||||
@@ -7,7 +7,6 @@
|
||||
MEMORY {
|
||||
LOW : ORIGIN = 0x4000, LENGTH = 16M - 16k
|
||||
HIGH : ORIGIN = 0x1000000, LENGTH = 32M
|
||||
NIRVANA : ORIGIN = 0x0, LENGTH = 0
|
||||
}
|
||||
|
||||
REGION_ALIAS ("REGION_START", LOW);
|
||||
@@ -25,8 +24,8 @@ REGION_ALIAS ("REGION_BSS", HIGH);
|
||||
REGION_ALIAS ("REGION_RWEXTRA", HIGH);
|
||||
REGION_ALIAS ("REGION_WORK", HIGH);
|
||||
REGION_ALIAS ("REGION_STACK", HIGH);
|
||||
REGION_ALIAS ("REGION_NOCACHE", NIRVANA);
|
||||
REGION_ALIAS ("REGION_NOCACHE_LOAD", NIRVANA);
|
||||
REGION_ALIAS ("REGION_NOCACHE", HIGH);
|
||||
REGION_ALIAS ("REGION_NOCACHE_LOAD", HIGH);
|
||||
|
||||
bsp_section_robarrier_align = 0x1000000;
|
||||
bsp_section_rwbarrier_align = 0x1000000;
|
||||
|
||||
@@ -34,6 +34,10 @@ bsp_section_xbarrier_align = DEFINED (bsp_section_xbarrier_align) ? bsp_section_
|
||||
bsp_section_robarrier_align = DEFINED (bsp_section_robarrier_align) ? bsp_section_robarrier_align : 1;
|
||||
bsp_section_rwbarrier_align = DEFINED (bsp_section_rwbarrier_align) ? bsp_section_rwbarrier_align : 1;
|
||||
|
||||
MEMORY {
|
||||
UNEXPECTED_SECTIONS : ORIGIN = 0xffffffff, LENGTH = 0
|
||||
}
|
||||
|
||||
SECTIONS {
|
||||
.start : {
|
||||
bsp_section_start_begin = .;
|
||||
@@ -379,6 +383,13 @@ SECTIONS {
|
||||
.PPC.EMB.apuinfo 0 : { *(.PPC.EMB.apuinfo) }
|
||||
/DISCARD/ : { *(.note.GNU-stack) *(.gnu_debuglink) *(.gnu.lto_*) }
|
||||
|
||||
/* Catch all unknown sections */
|
||||
.nirvana : { *(*) } > NIRVANA
|
||||
/*
|
||||
* This is a RTEMS specific section to catch all unexpected input
|
||||
* sections. In case you get an error like
|
||||
* "section `.unexpected_sections' will not fit in region
|
||||
* `UNEXPECTED_SECTIONS'"
|
||||
* you have to figure out the offending input section and add it to the
|
||||
* appropriate output section definition above.
|
||||
*/
|
||||
.unexpected_sections : { *(*) } > UNEXPECTED_SECTIONS
|
||||
}
|
||||
|
||||
@@ -1,6 +1,5 @@
|
||||
MEMORY {
|
||||
RAM : ORIGIN = 0x0, LENGTH = 128M
|
||||
NIRVANA : ORIGIN = 0x0, LENGTH = 0
|
||||
}
|
||||
|
||||
REGION_ALIAS ("REGION_START", RAM);
|
||||
@@ -18,7 +17,7 @@ REGION_ALIAS ("REGION_BSS", RAM);
|
||||
REGION_ALIAS ("REGION_RWEXTRA", RAM);
|
||||
REGION_ALIAS ("REGION_WORK", RAM);
|
||||
REGION_ALIAS ("REGION_STACK", RAM);
|
||||
REGION_ALIAS ("REGION_NOCACHE", NIRVANA);
|
||||
REGION_ALIAS ("REGION_NOCACHE_LOAD", NIRVANA);
|
||||
REGION_ALIAS ("REGION_NOCACHE", RAM);
|
||||
REGION_ALIAS ("REGION_NOCACHE_LOAD", RAM);
|
||||
|
||||
INCLUDE linkcmds.base
|
||||
|
||||
@@ -18,6 +18,10 @@ bsp_rom_size = LENGTH (ROM);
|
||||
|
||||
bsp_section_align = 32;
|
||||
|
||||
MEMORY {
|
||||
UNEXPECTED_SECTIONS : ORIGIN = 0xffffffff, LENGTH = 0
|
||||
}
|
||||
|
||||
SECTIONS {
|
||||
|
||||
dpram :
|
||||
@@ -306,11 +310,14 @@ SECTIONS {
|
||||
/DISCARD/ : {
|
||||
*(.note.GNU-stack) *(.gnu_debuglink)
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* BSP: Catch all unknown sections
|
||||
* This is a RTEMS specific section to catch all unexpected input
|
||||
* sections. In case you get an error like
|
||||
* "section `.unexpected_sections' will not fit in region
|
||||
* `UNEXPECTED_SECTIONS'"
|
||||
* you have to figure out the offending input section and add it to the
|
||||
* appropriate output section definition above.
|
||||
*/
|
||||
.nirvana : {
|
||||
*(*)
|
||||
} > NIRVANA
|
||||
.unexpected_sections : { *(*) } > UNEXPECTED_SECTIONS
|
||||
}
|
||||
|
||||
@@ -9,7 +9,6 @@ MEMORY {
|
||||
RAM : ORIGIN = 0x0, LENGTH = 128M
|
||||
immr : org = 0xfa200000, l = 16K
|
||||
ROM : ORIGIN = 0x40000000, LENGTH = 8M
|
||||
NIRVANA : ORIGIN = 0x0, LENGTH = 0
|
||||
}
|
||||
|
||||
INCLUDE linkcmds.base
|
||||
|
||||
Reference in New Issue
Block a user