bsps: Replace NIRVANA region

Replace the "NIRVANA" region with the more verbose "UNEXPECTED_SECTIONS"
region.  Move the region definition into the "linkcmds.base" files.
This commit is contained in:
Sebastian Huber
2012-06-12 15:27:17 +02:00
parent 51c85da2ce
commit fd153c73bd
51 changed files with 68 additions and 71 deletions

View File

@@ -1,7 +1,6 @@
MEMORY {
SDRAM_MMU : ORIGIN = 0x08200000, LENGTH = 16k
SDRAM : ORIGIN = 0x08204000, LENGTH = 30M - 16k
NIRVANA : ORIGIN = 0, LENGTH = 0
}
REGION_ALIAS ("REGION_START", SDRAM);

View File

@@ -2,7 +2,6 @@ MEMORY {
SDRAM_MMU : ORIGIN = 0x20100000, LENGTH = 16k
SDRAM : ORIGIN = 0x20104000, LENGTH = 15M - 16k
SRAM : ORIGIN = 0x00200000, LENGTH = 16k
NIRVANA : ORIGIN = 0, LENGTH = 0
}
REGION_ALIAS ("REGION_START", SDRAM);

View File

@@ -2,7 +2,6 @@ MEMORY {
SDRAM_MMU : ORIGIN = 0x20100000, LENGTH = 16k
SDRAM : ORIGIN = 0x20104000, LENGTH = 63M - 16k
SRAM : ORIGIN = 0x00200000, LENGTH = 16k
NIRVANA : ORIGIN = 0, LENGTH = 0
}
REGION_ALIAS ("REGION_START", SDRAM);

View File

@@ -1,6 +1,5 @@
MEMORY {
SDRAM : ORIGIN = 0x00000000, LENGTH = 16M
NIRVANA : ORIGIN = 0, LENGTH = 0
}
REGION_ALIAS ("REGION_START", SDRAM);

View File

@@ -1,6 +1,5 @@
MEMORY {
RAM : ORIGIN = 0x00000000, LENGTH = 4M
NIRVANA : ORIGIN = 0, LENGTH = 0
}
REGION_ALIAS ("REGION_START", RAM);

View File

@@ -1,7 +1,6 @@
MEMORY {
SDRAM_MMU : ORIGIN = 0x0c000000, LENGTH = 16k
SDRAM : ORIGIN = 0x0c004000, LENGTH = 7M - 16k
NIRVANA : ORIGIN = 0, LENGTH = 0
}
REGION_ALIAS ("REGION_START", SDRAM);

View File

@@ -2,7 +2,6 @@ MEMORY {
SDRAM_MMU : ORIGIN = 0xa0000000, LENGTH = 16k
SDRAM : ORIGIN = 0xa0004000, LENGTH = 64M - 16k
SRAM : ORIGIN = 0x00000000, LENGTH = 16k
NIRVANA : ORIGIN = 0, LENGTH = 0
}
REGION_ALIAS ("REGION_START", SDRAM);

View File

@@ -7,7 +7,6 @@
MEMORY {
RAM_INT (AIW) : ORIGIN = 0x20000000, LENGTH = 16M
ROM_INT (RX) : ORIGIN = 0x00000000, LENGTH = 64M
NIRVANA : ORIGIN = 0, LENGTH = 0
}
REGION_ALIAS ("REGION_START", ROM_INT);

View File

@@ -4,7 +4,6 @@ MEMORY {
RAM_INT (AIW) : ORIGIN = 0x10000000, LENGTH = 64k
RAM_PER (AIW) : ORIGIN = 0x20000000, LENGTH = 32k
RAM_EXT (AIW) : ORIGIN = 0xa0000000, LENGTH = 32M
NIRVANA : ORIGIN = 0, LENGTH = 0
}
REGION_ALIAS ("REGION_START", RAM_EXT);

View File

@@ -4,7 +4,6 @@ MEMORY {
ROM_INT (RX) : ORIGIN = 0x00000000, LENGTH = 512k
RAM_INT (AIW) : ORIGIN = 0x10000000, LENGTH = 64k
RAM_EXT (AIW) : ORIGIN = 0xa0000000, LENGTH = 32M
NIRVANA : ORIGIN = 0, LENGTH = 0
}
REGION_ALIAS ("REGION_START", ROM_INT);

View File

@@ -39,7 +39,6 @@ MEMORY {
RAM_USB (AIW) : ORIGIN = 0x7fd00000, LENGTH = 8k
RAM_ETH (AIW) : ORIGIN = 0x7fe00000, LENGTH = 16k
ROM_INT (RX) : ORIGIN = 0x00000000, LENGTH = 128k
NIRVANA : ORIGIN = 0, LENGTH = 0
}
REGION_ALIAS ("REGION_START", ROM_INT);

View File

@@ -43,7 +43,6 @@ MEMORY {
ROM_BOOT (RX) : ORIGIN = 0x00000000, LENGTH = 4k
ROM_CFG (RX) : ORIGIN = 0x00001000, LENGTH = 4k
ROM_INT (RX) : ORIGIN = 0x00002000, LENGTH = 120k
NIRVANA : ORIGIN = 0, LENGTH = 0
}
REGION_ALIAS ("REGION_START", ROM_BOOT);

View File

@@ -36,7 +36,6 @@
MEMORY {
RAM_INT (AIW) : ORIGIN = 0x40000000, LENGTH = 64k
RAM_EXT (AIW) : ORIGIN = 0xa0000000, LENGTH = 32M
NIRVANA : ORIGIN = 0, LENGTH = 0
}
REGION_ALIAS ("REGION_START", RAM_EXT);

View File

@@ -36,7 +36,6 @@
MEMORY {
RAM_INT (AIW) : ORIGIN = 0x40000000, LENGTH = 64k
RAM_EXT (AIW) : ORIGIN = 0xa0000000, LENGTH = 8M
NIRVANA : ORIGIN = 0, LENGTH = 0
}
REGION_ALIAS ("REGION_START", RAM_EXT);

View File

@@ -40,7 +40,6 @@ MEMORY {
RAM_EXT (AIW) : ORIGIN = 0xa0400000, LENGTH = 4M
ROM_BOOT (RX) : ORIGIN = 0x81000000, LENGTH = 16k
ROM_EXT (RX) : ORIGIN = 0x81010000, LENGTH = 2M - 64k
NIRVANA : ORIGIN = 0, LENGTH = 0
}
REGION_ALIAS ("REGION_START", ROM_BOOT);

View File

@@ -40,7 +40,6 @@ MEMORY {
RAM_INT (AIW) : ORIGIN = 0x40008000, LENGTH = 32k
RAM_EXT (AIW) : ORIGIN = 0xa0400000, LENGTH = 4M
ROM_INT (RX) : ORIGIN = 0x00000000, LENGTH = 512k - 8k
NIRVANA : ORIGIN = 0, LENGTH = 0
}
REGION_ALIAS ("REGION_START", ROM_INT);

View File

@@ -9,7 +9,6 @@ MEMORY {
RAM_EXT : ORIGIN = 0xa0000000, LENGTH = 32M
ROM_INT : ORIGIN = 0x00000000, LENGTH = 512k - 8k
ROM_EXT : ORIGIN = 0x80000000, LENGTH = 4M
NIRVANA : ORIGIN = 0, LENGTH = 0
}
REGION_ALIAS ("REGION_START", RAM_EXT);

View File

@@ -9,7 +9,6 @@ MEMORY {
RAM_EXT : ORIGIN = 0xa0000000, LENGTH = 32M
ROM_INT : ORIGIN = 0x00000000, LENGTH = 512k - 8k
ROM_EXT : ORIGIN = 0x80000000, LENGTH = 4M
NIRVANA : ORIGIN = 0, LENGTH = 0
}
REGION_ALIAS ("REGION_START", ROM_INT);

View File

@@ -39,7 +39,6 @@ MEMORY {
RAM_MMU : ORIGIN = 0x80000000, LENGTH = 16k /* SDRAM on DYCS0 */
RAM_SCRATCH : ORIGIN = 0x80004000, LENGTH = 4k /* SDRAM on DYCS0 */
RAM_EXT : ORIGIN = 0x80005000, LENGTH = 32M - 20k /* SDRAM on DYCS0 */
NIRVANA : ORIGIN = 0, LENGTH = 0
}
REGION_ALIAS ("REGION_START", RAM_EXT);

View File

@@ -39,7 +39,6 @@ MEMORY {
RAM_VEC : ORIGIN = 0x0803a000, LENGTH = 8k
RAM_MMU : ORIGIN = 0x0803c000, LENGTH = 16k
RAM_SCRATCH : ORIGIN = 0x80004000, LENGTH = 4k /* SDRAM on DYCS0 */
NIRVANA : ORIGIN = 0, LENGTH = 0
}
REGION_ALIAS ("REGION_START", RAM_INT);

View File

@@ -40,7 +40,6 @@ MEMORY {
RAM_MMU : ORIGIN = 0x80000000, LENGTH = 16k /* SDRAM on DYCS0 */
RAM_SCRATCH : ORIGIN = 0x80004000, LENGTH = 4k /* SDRAM on DYCS0 */
RAM_EXT : ORIGIN = 0x81c00000, LENGTH = 4M /* SDRAM on DYCS0 */
NIRVANA : ORIGIN = 0, LENGTH = 0
}
REGION_ALIAS ("REGION_START", RAM_EXT);

View File

@@ -40,7 +40,6 @@ MEMORY {
RAM_MMU : ORIGIN = 0x80000000, LENGTH = 16k /* SDRAM on DYCS0 */
RAM_EXT : ORIGIN = 0x80004000, LENGTH = 64M - 16k /* SDRAM on DYCS0 */
ROM_EXT : ORIGIN = 0xe0000000, LENGTH = 2M /* NOR flash on CS0 */
NIRVANA : ORIGIN = 0, LENGTH = 0
}
REGION_ALIAS ("REGION_START", RAM_EXT);

View File

@@ -3,7 +3,6 @@ MEMORY {
EWRAM : ORIGIN = 0x02000000, LENGTH = 4M - 4k
DTCM : ORIGIN = 0x0b000000, LENGTH = 16k
ITCM : ORIGIN = 0x01000000, LENGTH = 32k
NIRVANA : ORIGIN = 0, LENGTH = 0
}
REGION_ALIAS ("REGION_START", EWRAM);

View File

@@ -1,7 +1,6 @@
MEMORY {
SDRAM : ORIGIN = 0x81000000, LENGTH = 512k
SRAM : ORIGIN = 0x40000000, LENGTH = 16k
NIRVANA : ORIGIN = 0, LENGTH = 0
}
REGION_ALIAS ("REGION_START", SDRAM);

View File

@@ -56,6 +56,10 @@ bsp_stack_und_size = ALIGN (bsp_stack_und_size, bsp_stack_align);
bsp_stack_main_size = DEFINED (bsp_stack_main_size) ? bsp_stack_main_size : 0;
bsp_stack_main_size = ALIGN (bsp_stack_main_size, bsp_stack_align);
MEMORY {
UNEXPECTED_SECTIONS : ORIGIN = 0xffffffff, LENGTH = 0
}
SECTIONS {
.start : {
bsp_section_start_begin = .;
@@ -424,6 +428,13 @@ SECTIONS {
.note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }
/DISCARD/ : { *(.note.GNU-stack) *(.gnu_debuglink) *(.gnu.lto_*) }
/* Catch all unknown sections */
.nirvana : { *(*) } > NIRVANA
/*
* This is a RTEMS specific section to catch all unexpected input
* sections. In case you get an error like
* "section `.unexpected_sections' will not fit in region
* `UNEXPECTED_SECTIONS'"
* you have to figure out the offending input section and add it to the
* appropriate output section definition above.
*/
.unexpected_sections : { *(*) } > UNEXPECTED_SECTIONS
}

View File

@@ -1,7 +1,6 @@
MEMORY {
SDRAM_MMU : ORIGIN = 0x30000000, LENGTH = 16k
SDRAM : ORIGIN = 0x30004000, LENGTH = 64M - 16k
NIRVANA : ORIGIN = 0, LENGTH = 0
}
REGION_ALIAS ("REGION_START", SDRAM);

View File

@@ -1,7 +1,6 @@
MEMORY {
RAM_INT : ORIGIN = 0x20000000, LENGTH = 128k
ROM_INT : ORIGIN = 0x00000000, LENGTH = 1M
NIRVANA : ORIGIN = 0, LENGTH = 0
}
REGION_ALIAS ("REGION_START", ROM_INT);

View File

@@ -26,6 +26,10 @@ RamBase = bsp_ram_start;
RamSize = bsp_ram_size;
HeapSize = DEFINED(HeapSize) ? HeapSize : 0x0;
MEMORY {
UNEXPECTED_SECTIONS : ORIGIN = 0xffffffff, LENGTH = 0
}
SECTIONS {
/*
* BSP: MPC5200 registers
@@ -320,9 +324,12 @@ SECTIONS {
}
/*
* BSP: Catch all unknown sections
* This is a RTEMS specific section to catch all unexpected input
* sections. In case you get an error like
* "section `.unexpected_sections' will not fit in region
* `UNEXPECTED_SECTIONS'"
* you have to figure out the offending input section and add it to the
* appropriate output section definition above.
*/
.nirvana : {
*(*)
} > NIRVANA
.unexpected_sections : { *(*) } > UNEXPECTED_SECTIONS
}

View File

@@ -10,7 +10,6 @@ MEMORY {
ROM : ORIGIN = 0xffe00000, LENGTH = 2M
DPRAM : ORIGIN = 0xff000000, LENGTH = 1k
REGS : ORIGIN = 0xf0000000, LENGTH = 64k
NIRVANA : ORIGIN = 0x0, LENGTH = 0
}
INCLUDE linkcmds.base

View File

@@ -10,7 +10,6 @@ MEMORY {
ROM : ORIGIN = 0xffe00000, LENGTH = 2M
REGS : ORIGIN = 0xf0000000, LENGTH = 64k
DPRAM : ORIGIN = 0x0, LENGTH = 0
NIRVANA : ORIGIN = 0x0, LENGTH = 0
}
INCLUDE linkcmds.base

View File

@@ -10,7 +10,6 @@ MEMORY {
ROM : ORIGIN = 0xffe00000, LENGTH = 2M
REGS : ORIGIN = 0xf0000000, LENGTH = 64k
DPRAM : ORIGIN = 0x0, LENGTH = 0
NIRVANA : ORIGIN = 0x0, LENGTH = 0
}
INCLUDE linkcmds.base

View File

@@ -10,7 +10,6 @@ MEMORY {
ROM : ORIGIN = 0xffe00000, LENGTH = 2M
REGS : ORIGIN = 0xf0000000, LENGTH = 64k
DPRAM : ORIGIN = 0xff000000, LENGTH = 1k
NIRVANA : ORIGIN = 0x0, LENGTH = 0
}
INCLUDE linkcmds.base

View File

@@ -10,7 +10,6 @@ MEMORY {
ROM : ORIGIN = 0xffe00000, LENGTH = 2M
REGS : ORIGIN = 0xf0000000, LENGTH = 64k
DPRAM : ORIGIN = 0xff000000, LENGTH = 1k
NIRVANA : ORIGIN = 0x0, LENGTH = 0
}
INCLUDE linkcmds.base

View File

@@ -12,7 +12,6 @@ MEMORY {
RAM : ORIGIN = 0x0, LENGTH = 128M
ROM : ORIGIN = 0xfe000000, LENGTH = 8M
MPC83XX_REGS : ORIGIN = 0xe0000000, LENGTH = 256k
NIRVANA : ORIGIN = 0x0, LENGTH = 0
}
INCLUDE linkcmds.base

View File

@@ -22,6 +22,10 @@ RamBase = bsp_ram_start;
RamSize = bsp_ram_size;
HeapSize = DEFINED(HeapSize) ? HeapSize : 0x0;
MEMORY {
UNEXPECTED_SECTIONS : ORIGIN = 0xffffffff, LENGTH = 0
}
SECTIONS {
/*
* BSP: MPC83XX registers
@@ -336,9 +340,12 @@ SECTIONS {
}
/*
* BSP: Catch all unknown sections
* This is a RTEMS specific section to catch all unexpected input
* sections. In case you get an error like
* "section `.unexpected_sections' will not fit in region
* `UNEXPECTED_SECTIONS'"
* you have to figure out the offending input section and add it to the
* appropriate output section definition above.
*/
.nirvana : {
*(*)
} > NIRVANA
.unexpected_sections : { *(*) } > UNEXPECTED_SECTIONS
}

View File

@@ -8,7 +8,6 @@ MEMORY {
RAM : ORIGIN = 0x0, LENGTH = 256M
ROM : ORIGIN = 0xfe000000, LENGTH = 8M
MPC83XX_REGS : ORIGIN = 0xe0000000, LENGTH = 1M
NIRVANA : ORIGIN = 0x0, LENGTH = 0
}
INCLUDE linkcmds.base

View File

@@ -8,7 +8,6 @@ MEMORY {
RAM : ORIGIN = 0x0, LENGTH = 256M
ROM : ORIGIN = 0xfe000000, LENGTH = 8M
MPC83XX_REGS : ORIGIN = 0xe0000000, LENGTH = 256k
NIRVANA : ORIGIN = 0x0, LENGTH = 0
}
INCLUDE linkcmds.base

View File

@@ -8,7 +8,6 @@ MEMORY {
RAM : ORIGIN = 0x0, LENGTH = 128M
ROM : ORIGIN = 0xfe000000, LENGTH = 8M
MPC83XX_REGS : ORIGIN = 0xe0000000, LENGTH = 256k
NIRVANA : ORIGIN = 0x0, LENGTH = 0
}
INCLUDE linkcmds.base

View File

@@ -8,7 +8,6 @@ MEMORY {
RAM : ORIGIN = 0x0, LENGTH = 256M
ROM : ORIGIN = 0xfe000000, LENGTH = 8M
MPC83XX_REGS : ORIGIN = 0xe0000000, LENGTH = 256k
NIRVANA : ORIGIN = 0x0, LENGTH = 0
}
INCLUDE linkcmds.base

View File

@@ -3,7 +3,6 @@ MEMORY {
RAM : ORIGIN = 0x40000000, LENGTH = 80K
RAM_EXT : ORIGIN = 0x20000000, LENGTH = 512K
NOCACHE : ORIGIN = 0x0, LENGTH = 0
NIRVANA : ORIGIN = 0x0, LENGTH = 0
}
REGION_ALIAS ("REGION_START", ROM);

View File

@@ -3,7 +3,6 @@ MEMORY {
RAM : ORIGIN = 0x40000000, LENGTH = 128K
RAM_EXT : ORIGIN = 0x20000000, LENGTH = 512K
NOCACHE : ORIGIN = 0x0, LENGTH = 0
NIRVANA : ORIGIN = 0x0, LENGTH = 0
}
REGION_ALIAS ("REGION_START", ROM);

View File

@@ -4,7 +4,6 @@ MEMORY {
RAM_1 : ORIGIN = 0x50000000, LENGTH = 64K
RAM_EXT : ORIGIN = 0x0, LENGTH = 0
NOCACHE : ORIGIN = 0x0, LENGTH = 0
NIRVANA : ORIGIN = 0x0, LENGTH = 0
}
bsp_ram_1_start = ORIGIN (RAM_1);

View File

@@ -3,7 +3,6 @@ MEMORY {
RAM : ORIGIN = 0x40000000, LENGTH = 256K - 16k
RAM_EXT : ORIGIN = 0x20000000, LENGTH = 512K
NOCACHE : ORIGIN = 0x4003c000, LENGTH = 16k
NIRVANA : ORIGIN = 0x0, LENGTH = 0
}
REGION_ALIAS ("REGION_START", ROM);

View File

@@ -8,7 +8,6 @@ MEMORY {
RAM_EXT : ORIGIN = 0x21000000, LENGTH = 4M
DEBUG_RAM : ORIGIN = 0x21400000, LENGTH = 4M
NOCACHE : ORIGIN = 0x0, LENGTH = 0
NIRVANA : ORIGIN = 0x00000000, LENGTH = 0
}
bsp_debug_ram_start = ORIGIN (DEBUG_RAM);

View File

@@ -7,7 +7,6 @@
MEMORY {
LOW : ORIGIN = 0x4000, LENGTH = 16M - 16k
HIGH : ORIGIN = 0x1000000, LENGTH = 32M
NIRVANA : ORIGIN = 0x0, LENGTH = 0
}
REGION_ALIAS ("REGION_START", LOW);
@@ -25,8 +24,8 @@ REGION_ALIAS ("REGION_BSS", HIGH);
REGION_ALIAS ("REGION_RWEXTRA", HIGH);
REGION_ALIAS ("REGION_WORK", HIGH);
REGION_ALIAS ("REGION_STACK", HIGH);
REGION_ALIAS ("REGION_NOCACHE", NIRVANA);
REGION_ALIAS ("REGION_NOCACHE_LOAD", NIRVANA);
REGION_ALIAS ("REGION_NOCACHE", HIGH);
REGION_ALIAS ("REGION_NOCACHE_LOAD", HIGH);
bsp_section_robarrier_align = 0x1000000;
bsp_section_rwbarrier_align = 0x1000000;

View File

@@ -6,7 +6,6 @@
MEMORY {
RAM : ORIGIN = 0x4000000, LENGTH = 64M
NIRVANA : ORIGIN = 0x0, LENGTH = 0
}
REGION_ALIAS ("REGION_START", RAM);
@@ -24,8 +23,8 @@ REGION_ALIAS ("REGION_BSS", RAM);
REGION_ALIAS ("REGION_RWEXTRA", RAM);
REGION_ALIAS ("REGION_WORK", RAM);
REGION_ALIAS ("REGION_STACK", RAM);
REGION_ALIAS ("REGION_NOCACHE", NIRVANA);
REGION_ALIAS ("REGION_NOCACHE_LOAD", NIRVANA);
REGION_ALIAS ("REGION_NOCACHE", RAM);
REGION_ALIAS ("REGION_NOCACHE_LOAD", RAM);
bsp_section_robarrier_align = 0x1000000;
bsp_section_rwbarrier_align = 0x1000000;

View File

@@ -7,7 +7,6 @@
MEMORY {
LOW : ORIGIN = 0x4000, LENGTH = 16M - 16k
HIGH : ORIGIN = 0x1000000, LENGTH = 32M
NIRVANA : ORIGIN = 0x0, LENGTH = 0
}
REGION_ALIAS ("REGION_START", LOW);
@@ -25,8 +24,8 @@ REGION_ALIAS ("REGION_BSS", HIGH);
REGION_ALIAS ("REGION_RWEXTRA", HIGH);
REGION_ALIAS ("REGION_WORK", HIGH);
REGION_ALIAS ("REGION_STACK", HIGH);
REGION_ALIAS ("REGION_NOCACHE", NIRVANA);
REGION_ALIAS ("REGION_NOCACHE_LOAD", NIRVANA);
REGION_ALIAS ("REGION_NOCACHE", HIGH);
REGION_ALIAS ("REGION_NOCACHE_LOAD", HIGH);
bsp_section_robarrier_align = 0x1000000;
bsp_section_rwbarrier_align = 0x1000000;

View File

@@ -34,6 +34,10 @@ bsp_section_xbarrier_align = DEFINED (bsp_section_xbarrier_align) ? bsp_section_
bsp_section_robarrier_align = DEFINED (bsp_section_robarrier_align) ? bsp_section_robarrier_align : 1;
bsp_section_rwbarrier_align = DEFINED (bsp_section_rwbarrier_align) ? bsp_section_rwbarrier_align : 1;
MEMORY {
UNEXPECTED_SECTIONS : ORIGIN = 0xffffffff, LENGTH = 0
}
SECTIONS {
.start : {
bsp_section_start_begin = .;
@@ -379,6 +383,13 @@ SECTIONS {
.PPC.EMB.apuinfo 0 : { *(.PPC.EMB.apuinfo) }
/DISCARD/ : { *(.note.GNU-stack) *(.gnu_debuglink) *(.gnu.lto_*) }
/* Catch all unknown sections */
.nirvana : { *(*) } > NIRVANA
/*
* This is a RTEMS specific section to catch all unexpected input
* sections. In case you get an error like
* "section `.unexpected_sections' will not fit in region
* `UNEXPECTED_SECTIONS'"
* you have to figure out the offending input section and add it to the
* appropriate output section definition above.
*/
.unexpected_sections : { *(*) } > UNEXPECTED_SECTIONS
}

View File

@@ -1,6 +1,5 @@
MEMORY {
RAM : ORIGIN = 0x0, LENGTH = 128M
NIRVANA : ORIGIN = 0x0, LENGTH = 0
}
REGION_ALIAS ("REGION_START", RAM);
@@ -18,7 +17,7 @@ REGION_ALIAS ("REGION_BSS", RAM);
REGION_ALIAS ("REGION_RWEXTRA", RAM);
REGION_ALIAS ("REGION_WORK", RAM);
REGION_ALIAS ("REGION_STACK", RAM);
REGION_ALIAS ("REGION_NOCACHE", NIRVANA);
REGION_ALIAS ("REGION_NOCACHE_LOAD", NIRVANA);
REGION_ALIAS ("REGION_NOCACHE", RAM);
REGION_ALIAS ("REGION_NOCACHE_LOAD", RAM);
INCLUDE linkcmds.base

View File

@@ -18,6 +18,10 @@ bsp_rom_size = LENGTH (ROM);
bsp_section_align = 32;
MEMORY {
UNEXPECTED_SECTIONS : ORIGIN = 0xffffffff, LENGTH = 0
}
SECTIONS {
dpram :
@@ -306,11 +310,14 @@ SECTIONS {
/DISCARD/ : {
*(.note.GNU-stack) *(.gnu_debuglink)
}
/*
* BSP: Catch all unknown sections
* This is a RTEMS specific section to catch all unexpected input
* sections. In case you get an error like
* "section `.unexpected_sections' will not fit in region
* `UNEXPECTED_SECTIONS'"
* you have to figure out the offending input section and add it to the
* appropriate output section definition above.
*/
.nirvana : {
*(*)
} > NIRVANA
.unexpected_sections : { *(*) } > UNEXPECTED_SECTIONS
}

View File

@@ -9,7 +9,6 @@ MEMORY {
RAM : ORIGIN = 0x0, LENGTH = 128M
immr : org = 0xfa200000, l = 16K
ROM : ORIGIN = 0x40000000, LENGTH = 8M
NIRVANA : ORIGIN = 0x0, LENGTH = 0
}
INCLUDE linkcmds.base