forked from Imagelibrary/rtems
bsps/i386: Interrupt server support
This commit is contained in:
@@ -147,16 +147,16 @@ next_step:
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outb al, $0xA1
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outb al, $0xA1
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call SYM(pc386_delay)
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call SYM(pc386_delay)
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/*
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* The IMR values must correspond to the initial value of i8259s_cache.
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*/
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movb $0xFF, al /* mask off all interrupts for now */
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movb $0xFF, al /* mask off all interrupts for now */
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outb al, $0xA1
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outb al, $0xA1
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call SYM(pc386_delay)
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call SYM(pc386_delay)
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movb $0xFB, al /* mask all irq's but irq2 which */
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movb $0xFB, al /* mask all irq's but irq2 which */
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outb al, $0x21 /* is cascaded */
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outb al, $0x21 /* is cascaded */
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call SYM(pc386_delay)
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call SYM(pc386_delay)
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#endif
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movw $0xFFFB, SYM(i8259s_cache) /* set up same values in cache */
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#endif
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jmp SYM (_establish_stack) # return to the bsp entry code
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jmp SYM (_establish_stack) # return to the bsp entry code
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/*-------------------------------------------------------------------------+
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/*-------------------------------------------------------------------------+
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@@ -55,6 +55,7 @@ int i;
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* This cache is initialized in ldseg.s
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* This cache is initialized in ldseg.s
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*/
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*/
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rtems_i8259_masks i8259s_cache = 0xFFFB;
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rtems_i8259_masks i8259s_cache = 0xFFFB;
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rtems_i8259_masks i8259s_super_imr = 0xFFFB;
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/*-------------------------------------------------------------------------+
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/*-------------------------------------------------------------------------+
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| Function: BSP_irq_disable_at_i8259s
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| Function: BSP_irq_disable_at_i8259s
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@@ -77,6 +78,7 @@ int BSP_irq_disable_at_i8259s (const rtems_irq_number irqLine)
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mask = 1 << irqLine;
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mask = 1 << irqLine;
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i8259s_cache |= mask;
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i8259s_cache |= mask;
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i8259s_super_imr |= mask;
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if (irqLine < 8)
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if (irqLine < 8)
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{
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{
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@@ -112,6 +114,7 @@ int BSP_irq_enable_at_i8259s (const rtems_irq_number irqLine)
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mask = ~(1 << irqLine);
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mask = ~(1 << irqLine);
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i8259s_cache &= mask;
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i8259s_cache &= mask;
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i8259s_super_imr &= mask;
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if (irqLine < 8)
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if (irqLine < 8)
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{
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{
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@@ -80,7 +80,19 @@ extern "C" {
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*/
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*/
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typedef unsigned short rtems_i8259_masks;
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typedef unsigned short rtems_i8259_masks;
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extern rtems_i8259_masks i8259s_cache;
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/**
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* @brief Contains the current IMR of both i8259s.
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*/
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extern rtems_i8259_masks i8259s_cache;
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/**
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* @brief Contains the super IMR of both i8259s to overrule i8259s_cache during
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* interrupt exit.
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*
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* This enables a bsp_interrupt_vector_disable() in interrupt handlers. This
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* is required for the interrupt server support used by the new network stack.
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*/
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extern rtems_i8259_masks i8259s_super_imr;
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/*-------------------------------------------------------------------------+
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/*-------------------------------------------------------------------------+
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| Function Prototypes.
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| Function Prototypes.
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@@ -214,7 +214,9 @@ nested:
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cmp ecx, 16 /* is this a PIC IRQ? */
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cmp ecx, 16 /* is this a PIC IRQ? */
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jge .dont_restore_i8259
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jge .dont_restore_i8259
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movw SYM (i8259s_super_imr), dx
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movl MSK_OFF(esp), eax
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movl MSK_OFF(esp), eax
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orw dx, ax
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movw ax, SYM (i8259s_cache)
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movw ax, SYM (i8259s_cache)
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outb $PIC_MASTER_IMR_IO_PORT
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outb $PIC_MASTER_IMR_IO_PORT
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movb ah, al
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movb ah, al
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