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compilable release of virtex/gen83xx/gen5200 powerpc adaptations. Merged many different versions of new exception handling code to shared sources.

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This commit is contained in:
Thomas Doerfler
2007-07-10 16:00:28 +00:00
parent 2c0f748a4e
commit f610e83f53
57 changed files with 9401 additions and 324 deletions
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7
ChangeLog
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@@ -1,6 +1,11 @@
2007-07-09 Thomas Doerfler <Thomas.Doerfler@embedded-brains.de>
* aclocal/bsp-alias.m4, aclocal/check-bsps.m4, README.configure:
Add gen83xx and mpc8349eamds BSP
2007-07-02 Thomas Doerfler <Thomas.Doerfler@embedded-brains.de> 2007-07-02 Thomas Doerfler <Thomas.Doerfler@embedded-brains.de>
* :README.configure: Add virtex BSP * README.configure: Add virtex BSP
2007-06-20 Joel Sherrill <joel.sherrill@oarcorp.com> 2007-06-20 Joel Sherrill <joel.sherrill@oarcorp.com>

2
README.configure
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@@ -203,7 +203,7 @@ powerpc : psim score603e mcp750 mvme2100 mvme2307 mpc8260ads ss555
mvme5500 ep1a pm520_cr825 pm520_ze30 gen405 helas403 mvme5500 ep1a pm520_cr825 pm520_ze30 gen405 helas403
mbx821_001 mbx821_002 mbx821_002b mbx860_001b mbx821_001 mbx821_002 mbx821_002b mbx860_001b
mbx860_002 mbx860_005b mtx603e brs5l gen5200 ep5200 mbx860_002 mbx860_005b mtx603e brs5l gen5200 ep5200
virtex virtex gen83xx mpc8349eamds
NOTE: The "motorola_powerpc" BSP is a single BSP which NOTE: The "motorola_powerpc" BSP is a single BSP which
can be conditionally compiled to support most Motorola can be conditionally compiled to support most Motorola

1
aclocal/bsp-alias.m4
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@@ -26,6 +26,7 @@ AC_DEFUN([_RTEMS_BSP_ALIAS],
brs5l*) $2=gen5200 ;; # MPC5200 based board brs5l*) $2=gen5200 ;; # MPC5200 based board
pm520*) $2=gen5200 ;; # MPC5200 based board pm520*) $2=gen5200 ;; # MPC5200 based board
ep5200*) $2=gen5200 ;; # MPC5200 based board ep5200*) $2=gen5200 ;; # MPC5200 based board
mpc8349eamds) $2=gen83xx ;; # MPC8349 based board
simcpu32) $2=sim68000 ;; # BSVC CPU32 variant simcpu32) $2=sim68000 ;; # BSVC CPU32 variant
simsh7032) $2=shsim ;; # SH7032 simulator simsh7032) $2=shsim ;; # SH7032 simulator
simsh7045) $2=shsim ;; # SH7045 simulator simsh7045) $2=shsim ;; # SH7045 simulator

1
aclocal/check-bsps.m4
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@@ -26,6 +26,7 @@ AC_MSG_CHECKING([for available BSPs])
bsps="$bsps mbx860_005b" bsps="$bsps mbx860_005b"
;; ;;
gen5200) bsps="pm520_cr825 pm520_ze30 brs5l";; gen5200) bsps="pm520_cr825 pm520_ze30 brs5l";;
gen83xx) bsps="mpc8349eamds";;
motorola_powerpc) bsps="mvme2307 mcp750 mtx603e mvme2100";; motorola_powerpc) bsps="mvme2307 mcp750 mtx603e mvme2100";;
pc386) bsps="pc386 pc386dx pc486 pc586 pc686 pck6";; pc386) bsps="pc386 pc386dx pc486 pc586 pc686 pck6";;
erc32) bsps="erc32 sis";; erc32) bsps="erc32 sis";;

3
c/src/ChangeLog
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@@ -1,3 +1,6 @@
2007-07-09 Thomas Doerfler (Thomas.Doerfler@embedded-brains.de>:
* libchip/ide/ata.c: fixed warning
2007-06-20 Ray Xu <rayx@gmail.com> 2007-06-20 Ray Xu <rayx@gmail.com>
* optman/Makefile.am, optman/preinstall.am: Add stubs for file system, * optman/Makefile.am, optman/preinstall.am: Add stubs for file system,

7
c/src/lib/libbsp/powerpc/ChangeLog
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@@ -1,3 +1,8 @@
2007-07-09 Thomas Doerfler <Thomas.Doerfler@embedded-brains.de>
* acinclude.m4, gen83xx/:
added support for MPC83xx controllers and MPC8349EAMDS board
2007-07-02 Thomas Doerfler <Thomas.Doerfler@embedded-brains.de> 2007-07-02 Thomas Doerfler <Thomas.Doerfler@embedded-brains.de>
* acinclude.m4, shared/irq/irq_asm.S, shared/irq/irq.c, * acinclude.m4, shared/irq/irq_asm.S, shared/irq/irq.c,
@@ -8,7 +13,7 @@
2007-07-02 Thomas Doerfler <Thomas.Doerfler@embedded-brains.de> 2007-07-02 Thomas Doerfler <Thomas.Doerfler@embedded-brains.de>
* vitex/: * virtex/:
integrated "virtex" BSP to support PPC core implemented in a integrated "virtex" BSP to support PPC core implemented in a
Xilinx virtex FPGA Xilinx virtex FPGA

2
c/src/lib/libbsp/powerpc/acinclude.m4
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@@ -8,6 +8,8 @@ AC_DEFUN([RTEMS_CHECK_BSPDIR],
AC_CONFIG_SUBDIRS([gen405]);; AC_CONFIG_SUBDIRS([gen405]);;
gen5200 ) gen5200 )
AC_CONFIG_SUBDIRS([gen5200]);; AC_CONFIG_SUBDIRS([gen5200]);;
gen83xx )
AC_CONFIG_SUBDIRS([gen83xx]);;
helas403 ) helas403 )
AC_CONFIG_SUBDIRS([helas403]);; AC_CONFIG_SUBDIRS([helas403]);;
mbx8xx ) mbx8xx )

108
c/src/lib/libbsp/powerpc/gen83xx/Makefile.am Normal file
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@@ -0,0 +1,108 @@
##
## $Id$
##
ACLOCAL_AMFLAGS = -I ../../../../aclocal
include $(top_srcdir)/../../../../automake/compile.am
include $(top_srcdir)/../../bsp.am
dist_project_lib_DATA = bsp_specs
include_HEADERS = include/bsp.h
include_HEADERS += include/tm27.h
nodist_include_HEADERS = include/bspopts.h
DISTCLEANFILES = include/bspopts.h
noinst_PROGRAMS =
include_bspdir = $(includedir)/bsp
include_HEADERS += include/coverhd.h
nodist_include_HEADERS += ../../shared/tod.h
EXTRA_DIST = start/start.S
start.$(OBJEXT): start/start.S
$(CPPASCOMPILE) -o $@ -c $<
project_lib_DATA = start.$(OBJEXT)
EXTRA_DIST += ../../powerpc/shared/start/rtems_crti.S
rtems_crti.$(OBJEXT): ../../powerpc/shared/start/rtems_crti.S
$(CPPASCOMPILE) -o $@ -c $<
project_lib_DATA += rtems_crti.$(OBJEXT)
dist_project_lib_DATA += startup/linkcmds.mpc8349eamds
noinst_PROGRAMS += mpc83xx_regs.rel
mpc83xx_regs_rel_SOURCES = startup/mpc83xx_regs.c
mpc83xx_regs_rel_CPPFLAGS = $(AM_CPPFLAGS)
mpc83xx_regs_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
noinst_PROGRAMS += startup.rel
startup_rel_SOURCES = ../../shared/bspclean.c ../../shared/bsplibc.c \
../../shared/bsppost.c startup/bspstart.c ../../shared/bootcard.c \
../../shared/sbrk.c \
../../shared/gnatinstallhandler.c startup/cpuinit.c
startup_rel_CPPFLAGS = $(AM_CPPFLAGS)
startup_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
noinst_PROGRAMS += pclock.rel
pclock_rel_SOURCES = ../../powerpc/shared/clock/p_clock.c
pclock_rel_CPPFLAGS = $(AM_CPPFLAGS)
pclock_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
include_bsp_HEADERS = ./irq/irq.h\
../../powerpc/shared/vectors/vectors.h
noinst_PROGRAMS += vectors.rel
vectors_rel_SOURCES = ../../powerpc/shared/vectors/vectors.h \
../../powerpc/shared/vectors/vectors_init.c \
../../powerpc/shared/vectors/vectors.S
vectors_rel_CPPFLAGS = $(AM_CPPFLAGS)
vectors_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
noinst_PROGRAMS += irq.rel
irq_rel_SOURCES = ./irq/irq.h \
./irq/irq_init.c \
./irq/ipic.c \
../shared/irq/irq_asm.S
irq_rel_CPPFLAGS = $(AM_CPPFLAGS)
irq_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
noinst_PROGRAMS += console.rel
console_rel_SOURCES = console/console.c console/ns16550cfg.c
console_rel_CPPFLAGS = $(AM_CPPFLAGS)
console_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
noinst_PROGRAMS += network.rel
network_rel_SOURCES = network/network.c
network_rel_CPPFLAGS = $(AM_CPPFLAGS)
network_rel_CPPFLAGS += -D__INSIDE_RTEMS_BSD_TCPIP_STACK__ -D__BSD_VISIBLE
network_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
noinst_LIBRARIES = libbsp.a
libbsp_a_SOURCES =
libbsp_a_LIBADD = startup.rel pclock.rel console.rel \
vectors.rel irq.rel mpc83xx_regs.rel
libbsp_a_LIBADD += network.rel
libbsp_a_LIBADD += ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/raw_exception.rel \
../../../libcpu/@RTEMS_CPU@/mpc6xx/mmu.rel \
../../../libcpu/@RTEMS_CPU@/mpc6xx/timer.rel \
../../../libcpu/@RTEMS_CPU@/mpc6xx/clock.rel \
../../../libcpu/@RTEMS_CPU@/mpc6xx/mmu.rel \
../../../libcpu/@RTEMS_CPU@/mpc6xx/timer.rel \
../../../libcpu/@RTEMS_CPU@/mpc83xx/tsec.rel
EXTRA_DIST += README.mpc8349eamds
EXTRA_DIST += times.mpc8349eamds
include $(srcdir)/preinstall.am
include $(top_srcdir)/../../../../automake/local.am

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c/src/lib/libbsp/powerpc/gen83xx/Makefile.in Normal file
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c/src/lib/libbsp/powerpc/gen83xx/aclocal.m4 vendored Normal file
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@@ -0,0 +1,935 @@
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m4_include([../../../../aclocal/bsp-configure.m4])
m4_include([../../../../aclocal/bspopts.m4])
m4_include([../../../../aclocal/canonical-target-name.m4])
m4_include([../../../../aclocal/canonicalize-tools.m4])
m4_include([../../../../aclocal/check-custom-bsp.m4])
m4_include([../../../../aclocal/check-multiprocessing.m4])
m4_include([../../../../aclocal/check-networking.m4])
m4_include([../../../../aclocal/check-tool.m4])
m4_include([../../../../aclocal/enable-multiprocessing.m4])
m4_include([../../../../aclocal/enable-networking.m4])
m4_include([../../../../aclocal/env-rtemsbsp.m4])
m4_include([../../../../aclocal/gcc-isystem.m4])
m4_include([../../../../aclocal/gcc-pipe.m4])
m4_include([../../../../aclocal/gcc-specs.m4])
m4_include([../../../../aclocal/multilib.m4])
m4_include([../../../../aclocal/ppc.m4])
m4_include([../../../../aclocal/prog-cc.m4])
m4_include([../../../../aclocal/prog-ccas.m4])
m4_include([../../../../aclocal/project-root.m4])
m4_include([../../../../aclocal/rtems-ampolish.m4])
m4_include([../../../../aclocal/rtems-top.m4])
m4_include([../../../../aclocal/version.m4])

15
c/src/lib/libbsp/powerpc/gen83xx/bsp_specs Normal file
View File

@@ -0,0 +1,15 @@
%rename endfile old_endfile
%rename startfile old_startfile
%rename link old_link
*startfile:
%{!qrtems: %(old_startfile)} %{!nostdlib: %{qrtems: ecrti%O%s rtems_crti%O%s crtbegin.o%s \
%{!qrtems_debug: start.o%s} \
%{qrtems_debug: start_g.o%s}}}
*endfile:
%{!qrtems: %(old_endfile)} %{qrtems: crtend.o%s ecrtn.o%s}
*link:
%{!qrtems: %(old_link)} %{qrtems: -dc -dp -u __vectors -N -u start -e start}

36
c/src/lib/libbsp/powerpc/gen83xx/configure.ac Normal file
View File

@@ -0,0 +1,36 @@
## Process this file with autoconf to produce a configure script.
##
## $Id$
AC_PREREQ(2.60)
AC_INIT([rtems-c-src-lib-libbsp-powerpc-gen5200],[_RTEMS_VERSION],[http://www.rtems.org/bugzilla])
AC_CONFIG_SRCDIR([bsp_specs])
RTEMS_TOP(../../../../../..)
RTEMS_CANONICAL_TARGET_CPU
AM_INIT_AUTOMAKE([no-define nostdinc foreign 1.10])
RTEMS_BSP_CONFIGURE
RTEMS_PROG_CC_FOR_TARGET([-ansi -fasm])
RTEMS_CANONICALIZE_TOOLS
RTEMS_PROG_CCAS
RTEMS_BSPOPTS_SET([DATA_CACHE_ENABLE],[*],[1])
RTEMS_BSPOPTS_HELP([DATA_CACHE_ENABLE],
[If defined, the data cache will be enabled after address translation
is turned on.])
RTEMS_BSPOPTS_SET([INSTRUCTION_CACHE_ENABLE],[*],[1])
RTEMS_BSPOPTS_HELP([INSTRUCTION_CACHE_ENABLE],
[If defined, the instruction cache will be enabled after address translation
is turned on.])
RTEMS_CHECK_NETWORKING
AM_CONDITIONAL(HAS_NETWORKING,test "$HAS_NETWORKING" = "yes")
# Explicitly list all Makefiles here
AC_CONFIG_FILES([Makefile])
RTEMS_PPC_EXCEPTIONS
AC_OUTPUT

131
c/src/lib/libbsp/powerpc/gen83xx/console/config.c Normal file
View File

@@ -0,0 +1,131 @@
/*===============================================================*\
| Project: RTEMS generic MPC83xx BSP |
+-----------------------------------------------------------------+
| This file has been adapted from the ep1a BSP to MPC83xx by |
| Thomas Doerfler <Thomas.Doerfler@embedded-brains.de> |
| Copyright (c) 2007 |
| Embedded Brains GmbH |
| Obere Lagerstr. 30 |
| D-82178 Puchheim |
| Germany |
| rtems@embedded-brains.de |
| |
| See the other copyright notice below for the original parts. |
+-----------------------------------------------------------------+
| The license and distribution terms for this file may be |
| found in the file LICENSE in this distribution or at |
| |
| http://www.rtems.com/license/LICENSE. |
| |
+-----------------------------------------------------------------+
| this file contains the console driver configuration tables |
\*===============================================================*/
/* derived from: */
/*
* This file contains the TTY driver table for the EP1A
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*
* $Id$
*/
#include <libchip/serial.h>
#include "ns16550cfg.h"
#include <bsp.h>
#include <libcpu/io.h>
#include <mpc83xx/mpc83xx.h>
/*
* Based on BSP configuration information decide whether to do polling IO
* or interrupt driven IO.
*/
#define NS16550_FUNCTIONS &ns16550_fns_polled
/*
* The following table configures the console drivers used in this BSP.
*
* The first entry which, when probed, is available, will be named /dev/console,
* all others being given the name indicated.
*
* Each field is interpreted thus:
*
* sDeviceName This is the name of the device.
* pDeviceFns This is a pointer to the set of driver routines to use.
* pDeviceFlow This is a pointer to the set of flow control routines to
* use. Serial device drivers will typically supply RTSCTS
* and DTRCTS handshake routines for DCE to DCE communication,
* however for DCE to DTE communication, no such routines
* should be necessary as RTS will be driven automatically
* when the transmitter is active.
* ulMargin The high water mark in the input buffer is set to the buffer
* size less ulMargin. Once this level is reached, the driver's
* flow control routine used to stop the remote transmitter will
* be called. This figure should be greater than or equal to
* the number of stages of FIFO between the transmitter and
* receiver.
* ulHysteresis After the high water mark specified by ulMargin has been
* reached, the driver's routine to re-start the remote
* transmitter will be called once the level in the input
* buffer has fallen by ulHysteresis bytes.
* pDeviceParams This contains either device specific data or a pointer to a
* device specific structure containing additional information
* not provided in this table.
* ulCtrlPort1 This is the primary control port number for the device. This
* may be used to specify different instances of the same device
* type.
* ulCtrlPort2 This is the secondary control port number, of use when a given
* device has more than one available channel.
* ulDataPort This is the port number for the data port of the device
* ulIntVector This encodes the interrupt vector of the device.
*
*/
console_tbl Console_Port_Tbl[] = {
/*
* NS16550 Chips provide first ttyS0/1 Ports.
*/
{
"/dev/ttyS0", /* sDeviceName */
SERIAL_NS16550, /* deviceType */
NS16550_FUNCTIONS, /* pDeviceFns */
NULL, /* deviceProbe */
&ns16550_flow_RTSCTS, /* pDeviceFlow */
16, /* ulMargin */
8, /* ulHysteresis */
(void *)9600, /* baud rate */ /* pDeviceParams */
(uint32_t)&(mpc83xx.duart[0]), /* ulCtrlPort1e */
0, /* ulCtrlPort2 */
(uint32_t)&(mpc83xx.duart[0]), /* ulDataPort */
Read_ns16550_register, /* getRegister */
Write_ns16550_register, /* setRegister */
NULL, /* getData */
NULL, /* setData */
BSP_CSB_CLK_FRQ, /* ulClock */
0 /* ulIntVector */
},
{
"/dev/ttyS1", /* sDeviceName */
SERIAL_NS16550, /* deviceType */
NS16550_FUNCTIONS, /* pDeviceFns */
NULL, /* deviceProbe */
&ns16550_flow_RTSCTS, /* pDeviceFlow */
16, /* ulMargin */
8, /* ulHysteresis */
(void *)9600, /* baud rate */ /* pDeviceParams */
(uint32_t)&(mpc83xx.duart[1]), /* ulCtrlPort1-Filled in at runtime */
0, /* ulCtrlPort2 */
(uint32_t)&(mpc83xx.duart[1]), /* ulDataPort-Filled in at runtime*/
Read_ns16550_register, /* getRegister */
Write_ns16550_register, /* setRegister */
NULL, /* getData */
NULL, /* setData */
BSP_CSB_CLK_FRQ, /* ulClock */
0 /* ulIntVector */
}
};

340
c/src/lib/libbsp/powerpc/gen83xx/console/console.c Normal file
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@@ -0,0 +1,340 @@
/*===============================================================*\
| Project: RTEMS generic MPC83xx BSP |
+-----------------------------------------------------------------+
| This file has been adapted from the ep1a BSP to MPC83xx by |
| Thomas Doerfler <Thomas.Doerfler@embedded-brains.de> |
| Copyright (c) 2007 |
| Embedded Brains GmbH |
| Obere Lagerstr. 30 |
| D-82178 Puchheim |
| Germany |
| rtems@embedded-brains.de |
| |
| See the other copyright notice below for the original parts. |
+-----------------------------------------------------------------+
| The license and distribution terms for this file may be |
| found in the file LICENSE in this distribution or at |
| |
| http://www.rtems.com/license/LICENSE. |
| |
+-----------------------------------------------------------------+
| this file contains the console driver |
\*===============================================================*/
/* derived from: */
/*
* This file contains the TTY driver for the ep1a
*
* This driver uses the termios pseudo driver.
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*
* $Id$
*/
#include <bsp.h>
#include <rtems/libio.h>
#include <stdlib.h>
#include <assert.h>
#include <termios.h>
#include "console.h"
#include <rtems/bspIo.h>
/*
* Load configuration table
*/
#include "config.c"
#define NUM_CONSOLE_PORTS (sizeof(Console_Port_Tbl)/sizeof(console_tbl))
console_data Console_Port_Data[NUM_CONSOLE_PORTS];
unsigned long Console_Port_Count;
rtems_device_minor_number Console_Port_Minor;
rtems_boolean Console_Is_Initialized = FALSE;
/* PAGE
*
* console_open
*
* open a port as a termios console.
*
*/
rtems_device_driver console_open(
rtems_device_major_number major,
rtems_device_minor_number minor,
void * arg
)
{
rtems_status_code status;
rtems_libio_open_close_args_t *args = arg;
rtems_termios_callbacks Callbacks;
console_fns *c;
/*
* Verify the port number is valid.
*/
if(minor>Console_Port_Count)
{
return RTEMS_INVALID_NUMBER;
}
/*
* open the port as a termios console driver.
*/
c = Console_Port_Tbl[minor].pDeviceFns;
Callbacks.firstOpen = c->deviceFirstOpen;
Callbacks.lastClose = c->deviceLastClose;
Callbacks.pollRead = c->deviceRead;
Callbacks.write = c->deviceWrite;
Callbacks.setAttributes = c->deviceSetAttributes;
Callbacks.stopRemoteTx =
Console_Port_Tbl[minor].pDeviceFlow->deviceStopRemoteTx;
Callbacks.startRemoteTx =
Console_Port_Tbl[minor].pDeviceFlow->deviceStartRemoteTx;
Callbacks.outputUsesInterrupts = c->deviceOutputUsesInterrupts;
status = rtems_termios_open ( major, minor, arg, &Callbacks);
Console_Port_Data[minor].termios_data = args->iop->data1;
return status;
}
rtems_device_driver console_close(
rtems_device_major_number major,
rtems_device_minor_number minor,
void * arg
)
{
rtems_libio_open_close_args_t *args = arg;
if((args->iop->flags&LIBIO_FLAGS_READ) &&
Console_Port_Tbl[minor].pDeviceFlow &&
Console_Port_Tbl[minor].pDeviceFlow->deviceStopRemoteTx)
{
Console_Port_Tbl[minor].pDeviceFlow->deviceStopRemoteTx(minor);
}
return rtems_termios_close (arg);
}
rtems_device_driver console_read(
rtems_device_major_number major,
rtems_device_minor_number minor,
void * arg
)
{
return rtems_termios_read (arg);
}
rtems_device_driver console_write(
rtems_device_major_number major,
rtems_device_minor_number minor,
void * arg
)
{
return rtems_termios_write (arg);
}
rtems_device_driver console_control(
rtems_device_major_number major,
rtems_device_minor_number minor,
void * arg
)
{
return rtems_termios_ioctl (arg);
}
/* PAGE
*
* console_initialize
*
* Routine called to initialize the console device driver.
*/
rtems_device_driver console_initialize(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
)
{
rtems_status_code status;
/*
* initialize the termio interface.
*/
rtems_termios_initialize();
Console_Port_Count=NUM_CONSOLE_PORTS;
for(minor=0;
minor<Console_Port_Count;
minor++)
{
/*
* First perform the configuration dependant probe, then the
* device dependant probe
*/
if((!Console_Port_Tbl[minor].deviceProbe ||
Console_Port_Tbl[minor].deviceProbe(minor)) &&
Console_Port_Tbl[minor].pDeviceFns->deviceProbe(minor))
{
/*
* Use this device for the console
*/
break;
}
}
if(minor==Console_Port_Count)
{
/*
* Failed to find a working device
*/
rtems_fatal_error_occurred(RTEMS_IO_ERROR);
}
Console_Port_Minor=minor;
/*
* Register Device Names
*/
status = rtems_io_register_name("/dev/console",
major,
Console_Port_Minor );
if (status != RTEMS_SUCCESSFUL)
{
rtems_fatal_error_occurred(status);
}
if ( Console_Port_Tbl[Console_Port_Minor].pDeviceFns->deviceInitialize ) {
Console_Port_Tbl[Console_Port_Minor]
.pDeviceFns->deviceInitialize(Console_Port_Minor);
Console_Is_Initialized = TRUE;
}
for(minor++;minor<Console_Port_Count;minor++)
{
/*
* First perform the configuration dependant probe, then the
* device dependant probe
*/
if((!Console_Port_Tbl[minor].deviceProbe ||
Console_Port_Tbl[minor].deviceProbe(minor)) &&
Console_Port_Tbl[minor].pDeviceFns->deviceProbe(minor))
{
status = rtems_io_register_name(
Console_Port_Tbl[minor].sDeviceName,
major,
minor );
if (status != RTEMS_SUCCESSFUL)
{
rtems_fatal_error_occurred(status);
}
/*
* Initialize the hardware device.
*/
if ( Console_Port_Tbl[minor].pDeviceFns->deviceInitialize )
Console_Port_Tbl[minor].pDeviceFns->deviceInitialize( minor);
}
}
return RTEMS_SUCCESSFUL;
}
/* PAGE
*
* DEBUG_puts
*
* This should be safe in the event of an error. It attempts to ensure
* that no TX empty interrupts occur while it is doing polled IO. Then
* it restores the state of that external interrupt.
*
* Input parameters:
* string - pointer to debug output string
*
* Output parameters: NONE
*
* Return values: NONE
*/
void DEBUG_puts(
char *string
)
{
char *s;
uint32_t Irql;
rtems_interrupt_disable(Irql);
for ( s = string ; *s ; s++ )
{
Console_Port_Tbl[Console_Port_Minor].pDeviceFns->
deviceWritePolled(Console_Port_Minor, *s);
}
rtems_interrupt_enable(Irql);
}
/* PAGE
*
* DEBUG_puth
*
* This should be safe in the event of an error. It attempts to ensure
* that no TX empty interrupts occur while it is doing polled IO. Then
* it restores the state of that external interrupt.
*
* Input parameters:
* ulHexNum - value to display
*
* Output parameters: NONE
*
* Return values: NONE
*/
void
DEBUG_puth(
uint32_t ulHexNum
)
{
unsigned long i,d;
uint32_t Irql;
rtems_interrupt_disable(Irql);
Console_Port_Tbl[Console_Port_Minor].pDeviceFns->
deviceWritePolled(Console_Port_Minor, '0');
Console_Port_Tbl[Console_Port_Minor].pDeviceFns->
deviceWritePolled(Console_Port_Minor, 'x');
for(i=32;i;)
{
i-=4;
d=(ulHexNum>>i)&0xf;
Console_Port_Tbl[Console_Port_Minor].pDeviceFns->
deviceWritePolled(Console_Port_Minor,
(d<=9) ? d+'0' : d+'a'-0xa);
}
rtems_interrupt_enable(Irql);
}
/* const char arg to be compatible with BSP_output_char decl. */
void
debug_putc_onlcr(const char c)
{
uint32_t Irql;
if (Console_Is_Initialized) {
rtems_interrupt_disable(Irql);
Console_Port_Tbl[Console_Port_Minor].pDeviceFns->
deviceWritePolled(Console_Port_Minor,c);
rtems_interrupt_enable(Irql);
}
}
BSP_output_char_function_type BSP_output_char = debug_putc_onlcr;
/* const char arg to be compatible with BSP_output_char decl. */

38
c/src/lib/libbsp/powerpc/gen83xx/console/console.h Normal file
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/*
* This file contains the TTY driver table definition for the PPCn_60x
*
* This driver uses the termios pseudo driver.
*
* COPYRIGHT (c) 1998 by Radstone Technology
*
*
* THIS FILE IS PROVIDED TO YOU, THE USER, "AS IS", WITHOUT WARRANTY OF ANY
* KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK
* AS TO THE QUALITY AND PERFORMANCE OF ALL CODE IN THIS FILE IS WITH YOU.
*
* You are hereby granted permission to use, copy, modify, and distribute
* this file, provided that this notice, plus the above copyright notice
* and disclaimer, appears in all copies. Radstone Technology will provide
* no support for this code.
*
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*
* $Id$
*/
#include <rtems/ringbuf.h>
#include <libchip/serial.h>
#include <libchip/ns16550.h>
extern console_tbl Console_Port_Tbl[];
extern console_data Console_Port_Data[];
extern unsigned long Console_Port_Count;
boolean Console_Port_Tbl_Init_ppc8245(int minor);

67
c/src/lib/libbsp/powerpc/gen83xx/console/ns16550cfg.c Normal file
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/*===============================================================*\
| Project: RTEMS generic MPC83xx BSP |
+-----------------------------------------------------------------+
| This file has been adapted from the ep1a BSP to MPC83xx by |
| Thomas Doerfler <Thomas.Doerfler@embedded-brains.de> |
| Copyright (c) 2007 |
| Embedded Brains GmbH |
| Obere Lagerstr. 30 |
| D-82178 Puchheim |
| Germany |
| rtems@embedded-brains.de |
| |
| See the other copyright notice below for the original parts. |
+-----------------------------------------------------------------+
| The license and distribution terms for this file may be |
| found in the file LICENSE in this distribution or at |
| |
| http://www.rtems.com/license/LICENSE. |
| |
+-----------------------------------------------------------------+
| this file contains the DUART access routines |
\*===============================================================*/
/* derived from: */
/*
* This include file contains all console driver definations for the nc16550
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*
* $Id$
*/
#include <rtems.h>
#include <bsp.h>
#include "console.h"
typedef struct uart_reg
{
volatile unsigned char reg;
} uartReg;
uint8_t Read_ns16550_register(
uint32_t ulCtrlPort,
uint8_t ucRegNum
)
{
struct uart_reg *p = (struct uart_reg *)ulCtrlPort;
uint8_t ucData;
ucData = p[ucRegNum].reg;
asm volatile("sync");
return ucData;
}
void Write_ns16550_register(
uint32_t ulCtrlPort,
uint8_t ucRegNum,
uint8_t ucData
)
{
struct uart_reg *p = (struct uart_reg *)ulCtrlPort;
p[ucRegNum].reg = ucData;
asm volatile("sync");
}

57
c/src/lib/libbsp/powerpc/gen83xx/console/ns16550cfg.h Normal file
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/* nc16550cfg.h
*
* This include file contains all console driver definations for the nc16550
*
* COPYRIGHT (c) 1998 by Radstone Technology
*
*
* THIS FILE IS PROVIDED TO YOU, THE USER, "AS IS", WITHOUT WARRANTY OF ANY
* KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK
* AS TO THE QUALITY AND PERFORMANCE OF ALL CODE IN THIS FILE IS WITH YOU.
*
* You are hereby granted permission to use, copy, modify, and distribute
* this file, provided that this notice, plus the above copyright notice
* and disclaimer, appears in all copies. Radstone Technology will provide
* no support for this code.
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*
* $Id$
*/
#ifndef __NS16550_CONFIG_H
#define __NS16550_CONFIG_H
#ifdef __cplusplus
extern "C" {
#endif
/*
* Board specific register access routines
*/
uint8_t Read_ns16550_register(
uint32_t ulCtrlPort,
uint8_t ucRegNum
);
void Write_ns16550_register(
uint32_t ulCtrlPort,
uint8_t ucRegNum,
uint8_t ucData
);
extern console_fns ns16550_fns_8245;
extern console_fns ns16550_fns_polled_8245;
#ifdef __cplusplus
}
#endif
#endif

220
c/src/lib/libbsp/powerpc/gen83xx/include/bsp.h Normal file
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/*===============================================================*\
| Project: RTEMS generic MPC83xx BSP |
+-----------------------------------------------------------------+
| Copyright (c) 2007 |
| Embedded Brains GmbH |
| Obere Lagerstr. 30 |
| D-82178 Puchheim |
| Germany |
| rtems@embedded-brains.de |
+-----------------------------------------------------------------+
| The license and distribution terms for this file may be |
| found in the file LICENSE in this distribution or at |
| |
| http://www.rtems.com/license/LICENSE. |
| |
+-----------------------------------------------------------------+
| this file contains board specific definitions |
\*===============================================================*/
#ifndef __GEN83xx_BSP_h
#define __GEN83xx_BSP_h
/*
* distinguish board characteristics
*/
/*
* for Freescale MPC8349 EAMDS
*/
#if defined(MPC8349EAMDS)
/*
* two DUART channels supported
*/
#define GEN83xx_DUART_AVAIL_MASK 0x03
/* we need the low level initialization in start.S*/
#define NEED_LOW_LEVEL_INIT
/*
* clocking infos
*/
#define BSP_CLKIN_FRQ 66000000L
#define BSP_SYSPLL_MF 4 /* FIXME: derive from clock register */
/*
* address range definitions
*/
/* ROM definitions (2 MB) */
#define ROM_START 0xFFE00000
#define ROM_SIZE 0x00200000
#define ROM_END (ROM_START+ROM_SIZE-1)
#define BOOT_START ROM_START
#define BOOT_END ROM_END
/* SDRAM definitions (256 MB) */
#define RAM_START 0x00000000
#define RAM_SIZE 0x10000000
#define RAM_END (RAM_START+RAM_SIZE-1)
/* working internal memory map base address */
#define IMMRBAR 0xE0000000
/*
* working values for various registers, used in start/start.S
*/
/*
* Local Access Windows
* FIXME: decode bit settings
*/
#define LBLAWBAR0_VAL 0xFE000000
#define LBLAWAR0_VAL 0x80000016
#define LBLAWBAR1_VAL 0xF8000000
#define LBLAWAR1_VAL 0x8000000E
#define LBLAWBAR2_VAL 0xF0000000
#define LBLAWAR2_VAL 0x80000019
#define DDRLAWBAR0_VAL 0x00000000
#define DDRLAWAR0_VAL 0x8000001B
/*
* Local Bus (Memory) Controller
* FIXME: decode bit settings
*/
#define BR0_VAL 0xFE001001
#define OR0_VAL 0xFF806FF7
#define BR1_VAL 0xF8000801
#define OR1_VAL 0xFFFFE8F0
#define BR2_VAL 0xF0001861
#define OR2_VAL 0xFC006901
/*
* SDRAM registers
* FIXME: decode bit settings
*/
#define MRPTR_VAL 0x20000000
#define LSRT_VAL 0x32000000
#define LSDMR_VAL 0x4062D733
#define LCRR_VAL 0x80000004
/*
* DDR-SDRAM registers
* FIXME: decode bit settings
*/
#define CS2_BNDS_VAL 0x00000007
#define CS3_BNDS_VAL 0x0008000F
#define CS2_CONFIG_VAL 0x80000101
#define CS3_CONFIG_VAL 0x80000101
#define TIMING_CFG_1_VAL 0x36333321
#define TIMING_CFG_2_VAL 0x00000800
#define DDR_SDRAM_CFG_VAL 0xC2000000
#define DDR_SDRAM_MODE_VAL 0x00000022
#define DDR_SDRAM_INTTVL_VAL 0x045B0100
#define DDR_SDRAM_CLK_CNTL_VAL 0x00000000
#else
#error "board type not defined"
#endif
#ifndef ASM
#ifdef __cplusplus
extern "C" {
#endif
#include "bspopts.h"
#include <rtems.h>
#include <rtems/console.h>
#include <rtems/clockdrv.h>
#include <bsp/irq.h>
#include <bsp/vectors.h>
/*
* Network driver configuration
*/
struct rtems_bsdnet_ifconfig;
extern int rtems_mpc83xx_tsec_driver_attach_detach (struct rtems_bsdnet_ifconfig *config, int attaching);
#define RTEMS_BSP_NETWORK_DRIVER_NAME "tsec1"
#define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_mpc83xx_tsec_driver_attach_detach
/* miscellaneous stuff assumed to exist */
extern rtems_configuration_table BSP_Configuration;
/*
* We need to decide how much memory will be non-cacheable. This
* will mainly be memory that will be used in DMA (network and serial
* buffers).
*/
/*
* Stuff for Time Test 27
*/
#define MUST_WAIT_FOR_INTERRUPT 0
/*
* Device Driver Table Entries
*/
/*
* NOTE: Use the standard Console driver entry
*/
#define BSP_UART1_MINOR 0
#define BSP_UART2_MINOR 1
/*
* NOTE: Use the standard Clock driver entry
*/
/*
* indicate, that BSP has no IDE driver
*/
#undef RTEMS_BSP_HAS_IDE_DRIVER
/*
* How many libio files we want
*/
#define BSP_LIBIO_MAX_FDS 20
/* misc macros */
#define BSP_ARRAY_CNT(arr) (sizeof(arr)/sizeof(arr[0]))
/* functions */
void bsp_cleanup(void);
/* console modes (only termios) */
#ifdef PRINTK_MINOR
#undef PRINTK_MINOR
#endif
#define PRINTK_MINOR BSP_UART1_MINOR
#define SINGLE_CHAR_MODE
#define UARTS_USE_TERMIOS_INT 1
/*
* Convert decrement value to tenths of microsecnds (used by
* shared timer driver).
*
* + CPU has a csb_clock bus,
* + There are 4 bus cycles per click
* + We return value in 1/10 microsecond units.
* Modified following equation to integer equation to remove
* floating point math.
* (int) ((float)(_value) / ((XLB_CLOCK/1000000 * 0.1) / 4.0))
*/
#define BSP_CSB_CLK_FRQ (BSP_CLKIN_FRQ * BSP_SYSPLL_MF)
#define BSP_Convert_decrementer( _value ) \
(int) (((_value) * 4000) / (BSP_CSB_CLK_FRQ/10000))
/*
* Network driver configuration
*/
struct rtems_bsdnet_ifconfig;
extern int BSP_tsec_attach(struct rtems_bsdnet_ifconfig *config,int attaching);
#define RTEMS_BSP_NETWORK_DRIVER_NAME "tsec1"
#define RTEMS_BSP_NETWORK_DRIVER_ATTACH BSP_tsec_attach
#define RTEMS_BSP_NETWORK_DRIVER_NAME2 "tsec2"
#ifdef __cplusplus
}
#endif
#endif /* ASM */
#endif /* GEN83xx */

24
c/src/lib/libbsp/powerpc/gen83xx/include/bspopts.h.in Normal file
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/* include/bspopts.h.in. Generated from configure.ac by autoheader. */
/* If defined, the data cache will be enabled after address translation is
turned on. */
#undef DATA_CACHE_ENABLE
/* If defined, the instruction cache will be enabled after address translation
is turned on. */
#undef INSTRUCTION_CACHE_ENABLE
/* Define to the address where bug reports for this package should be sent. */
#undef PACKAGE_BUGREPORT
/* Define to the full name of this package. */
#undef PACKAGE_NAME
/* Define to the full name and version of this package. */
#undef PACKAGE_STRING
/* Define to the one symbol short name of this package. */
#undef PACKAGE_TARNAME
/* Define to the version of this package. */
#undef PACKAGE_VERSION

113
c/src/lib/libbsp/powerpc/gen83xx/include/coverhd.h Normal file
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/* coverhd.h
*
* This include file has defines to represent the overhead associated
* with calling a particular directive from C. These are used in the
* Timing Test Suite to ignore the overhead required to pass arguments
* to directives. On some CPUs and/or target boards, this overhead
* is significant and makes it difficult to distinguish internal
* RTEMS execution time from that used to call the directive.
* This file should be updated after running the C overhead timing
* test. Once this update has been performed, the RTEMS Time Test
* Suite should be rebuilt to account for these overhead times in the
* timing results.
*
* NOTE: If these are all zero, then the times reported include
* all calling overhead including passing of arguments.
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*
* coverhd.h,v 1.2 2003/09/04 18:52:27 joel Exp
*/
#ifndef __COVERHD_h
#define __COVERHD_h
#ifdef __cplusplus
extern "C" {
#endif
#define CALLING_OVERHEAD_INITIALIZE_EXECUTIVE 0
#define CALLING_OVERHEAD_SHUTDOWN_EXECUTIVE 0
#define CALLING_OVERHEAD_TASK_CREATE 0
#define CALLING_OVERHEAD_TASK_IDENT 0
#define CALLING_OVERHEAD_TASK_START 0
#define CALLING_OVERHEAD_TASK_RESTART 0
#define CALLING_OVERHEAD_TASK_DELETE 0
#define CALLING_OVERHEAD_TASK_SUSPEND 0
#define CALLING_OVERHEAD_TASK_RESUME 0
#define CALLING_OVERHEAD_TASK_SET_PRIORITY 0
#define CALLING_OVERHEAD_TASK_MODE 0
#define CALLING_OVERHEAD_TASK_GET_NOTE 0
#define CALLING_OVERHEAD_TASK_SET_NOTE 0
#define CALLING_OVERHEAD_TASK_WAKE_WHEN 2
#define CALLING_OVERHEAD_TASK_WAKE_AFTER 0
#define CALLING_OVERHEAD_INTERRUPT_CATCH 0
#define CALLING_OVERHEAD_CLOCK_GET 2
#define CALLING_OVERHEAD_CLOCK_SET 2
#define CALLING_OVERHEAD_CLOCK_TICK 0
#define CALLING_OVERHEAD_TIMER_CREATE 0
#define CALLING_OVERHEAD_TIMER_IDENT 0
#define CALLING_OVERHEAD_TIMER_DELETE 0
#define CALLING_OVERHEAD_TIMER_FIRE_AFTER 0
#define CALLING_OVERHEAD_TIMER_FIRE_WHEN 2
#define CALLING_OVERHEAD_TIMER_RESET 0
#define CALLING_OVERHEAD_TIMER_CANCEL 0
#define CALLING_OVERHEAD_SEMAPHORE_CREATE 0
#define CALLING_OVERHEAD_SEMAPHORE_IDENT 0
#define CALLING_OVERHEAD_SEMAPHORE_DELETE 0
#define CALLING_OVERHEAD_SEMAPHORE_OBTAIN 0
#define CALLING_OVERHEAD_SEMAPHORE_RELEASE 0
#define CALLING_OVERHEAD_MESSAGE_QUEUE_CREATE 0
#define CALLING_OVERHEAD_MESSAGE_QUEUE_IDENT 0
#define CALLING_OVERHEAD_MESSAGE_QUEUE_DELETE 0
#define CALLING_OVERHEAD_MESSAGE_QUEUE_SEND 0
#define CALLING_OVERHEAD_MESSAGE_QUEUE_URGENT 0
#define CALLING_OVERHEAD_MESSAGE_QUEUE_BROADCAST 0
#define CALLING_OVERHEAD_MESSAGE_QUEUE_RECEIVE 0
#define CALLING_OVERHEAD_MESSAGE_QUEUE_FLUSH 0
#define CALLING_OVERHEAD_EVENT_SEND 0
#define CALLING_OVERHEAD_EVENT_RECEIVE 0
#define CALLING_OVERHEAD_SIGNAL_CATCH 0
#define CALLING_OVERHEAD_SIGNAL_SEND 0
#define CALLING_OVERHEAD_PARTITION_CREATE 0
#define CALLING_OVERHEAD_PARTITION_IDENT 0
#define CALLING_OVERHEAD_PARTITION_DELETE 0
#define CALLING_OVERHEAD_PARTITION_GET_BUFFER 0
#define CALLING_OVERHEAD_PARTITION_RETURN_BUFFER 0
#define CALLING_OVERHEAD_REGION_CREATE 0
#define CALLING_OVERHEAD_REGION_IDENT 0
#define CALLING_OVERHEAD_REGION_DELETE 0
#define CALLING_OVERHEAD_REGION_GET_SEGMENT 0
#define CALLING_OVERHEAD_REGION_RETURN_SEGMENT 0
#define CALLING_OVERHEAD_PORT_CREATE 0
#define CALLING_OVERHEAD_PORT_IDENT 0
#define CALLING_OVERHEAD_PORT_DELETE 0
#define CALLING_OVERHEAD_PORT_EXTERNAL_TO_INTERNAL 0
#define CALLING_OVERHEAD_PORT_INTERNAL_TO_EXTERNAL 0
#define CALLING_OVERHEAD_IO_INITIALIZE 0
#define CALLING_OVERHEAD_IO_OPEN 0
#define CALLING_OVERHEAD_IO_CLOSE 0
#define CALLING_OVERHEAD_IO_READ 0
#define CALLING_OVERHEAD_IO_WRITE 0
#define CALLING_OVERHEAD_IO_CONTROL 0
#define CALLING_OVERHEAD_FATAL_ERROR_OCCURRED 0
#define CALLING_OVERHEAD_RATE_MONOTONIC_CREATE 0
#define CALLING_OVERHEAD_RATE_MONOTONIC_IDENT 0
#define CALLING_OVERHEAD_RATE_MONOTONIC_DELETE 0
#define CALLING_OVERHEAD_RATE_MONOTONIC_CANCEL 0
#define CALLING_OVERHEAD_RATE_MONOTONIC_PERIOD 0
#define CALLING_OVERHEAD_MULTIPROCESSING_ANNOUNCE 0
#ifdef __cplusplus
}
#endif
#endif

63
c/src/lib/libbsp/powerpc/gen83xx/include/tm27.h Normal file
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/*
* tm27.h
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*
* tm27.h,v 1.2 2004/04/23 04:47:38 ralf Exp
*/
#ifndef _RTEMS_TMTEST27
#error "This is an RTEMS internal file you must not include directly."
#endif
#ifndef __tm27_h
#define __tm27_h
#include <bsp/irq.h>
/*
* Stuff for Time Test 27
*/
#define MUST_WAIT_FOR_INTERRUPT 1
void nullFunc() {}
static rtems_irq_connect_data clockIrqData = {BSP_DECREMENTER,
0,
(rtems_irq_enable)nullFunc,
(rtems_irq_disable)nullFunc,
(rtems_irq_is_enabled) nullFunc};
void Install_tm27_vector(void (*_handler)())
{
clockIrqData.hdl = _handler;
if (!BSP_install_rtems_irq_handler (&clockIrqData)) {
printk("Error installing clock interrupt handler!\n");
rtems_fatal_error_occurred(1);
}
}
#define Cause_tm27_intr() \
do { \
uint32_t _clicks = 8; \
asm volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \
} while (0)
#define Clear_tm27_intr() \
do { \
uint32_t _clicks = 0xffffffff; \
asm volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \
} while (0)
#define Lower_tm27_intr() \
do { \
uint32_t _msr = 0; \
_ISR_Set_level( 0 ); \
asm volatile( "mfmsr %0 ;" : "=r" (_msr) : "r" (_msr) ); \
_msr |= 0x8002; \
asm volatile( "mtmsr %0 ;" : "=r" (_msr) : "r" (_msr) ); \
} while (0)
#endif

394
c/src/lib/libbsp/powerpc/gen83xx/irq/ipic.c Normal file
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/*===============================================================*\
| Project: RTEMS generic MPC83xx BSP |
+-----------------------------------------------------------------+
| Copyright (c) 2007 |
| Embedded Brains GmbH |
| Obere Lagerstr. 30 |
| D-82178 Puchheim |
| Germany |
| rtems@embedded-brains.de |
+-----------------------------------------------------------------+
| The license and distribution terms for this file may be |
| found in the file LICENSE in this distribution or at |
| |
| http://www.rtems.com/license/LICENSE. |
| |
+-----------------------------------------------------------------+
| this file integrates the IPIC irq controller |
\*===============================================================*/
#include <mpc83xx/mpc83xx.h>
#include <rtems.h>
#include <rtems/bspIo.h>
#include <bsp.h>
#include <bsp/irq.h>
#include <rtems/powerpc/powerpc.h>
typedef struct {
volatile uint32_t *pend_reg;
volatile uint32_t *mask_reg;
const uint32_t bit_num;
} BSP_isrc_rsc_t;
const BSP_isrc_rsc_t BSP_ipic_isrc_rsc[] = {
/* vector 0 */
{&mpc83xx.ipic.sersr,&mpc83xx.ipic.sermr,31},
{NULL,NULL,0},
{NULL,NULL,0},
{NULL,NULL,0},
{NULL,NULL,0},
{NULL,NULL,0},
{NULL,NULL,0},
{NULL,NULL,0},
/* vector 8 */
{NULL,NULL,0}, /* reserved vector 8 */
/* vector 9: UART1 SIxxR_H, Bit 24 */
{&mpc83xx.ipic.sipnr[0],&mpc83xx.ipic.simsr[0],24},
/* vector 10: UART2 SIxxR_H, Bit 25 */
{&mpc83xx.ipic.sipnr[0],&mpc83xx.ipic.simsr[0],25},
/* vector 11: SEC SIxxR_H, Bit 26 */
{&mpc83xx.ipic.sipnr[0],&mpc83xx.ipic.simsr[0],26},
{NULL,NULL,0}, /* reserved vector 12 */
{NULL,NULL,0}, /* reserved vector 13 */
/* vector 14: I2C1 SIxxR_H, Bit 29 */
{&mpc83xx.ipic.sipnr[0],&mpc83xx.ipic.simsr[0],29},
/* vector 15: I2C2 SIxxR_H, Bit 30 */
{&mpc83xx.ipic.sipnr[0],&mpc83xx.ipic.simsr[0],30},
/* vector 16: SPI SIxxR_H, Bit 31 */
{&mpc83xx.ipic.sipnr[0],&mpc83xx.ipic.simsr[0],31},
/* vector 17: IRQ1 SExxR , Bit 1 */
{&mpc83xx.ipic.sepnr ,&mpc83xx.ipic.semsr , 1},
/* vector 18: IRQ2 SExxR , Bit 2 */
{&mpc83xx.ipic.sepnr ,&mpc83xx.ipic.semsr , 2},
/* vector 19: IRQ3 SExxR , Bit 3 */
{&mpc83xx.ipic.sepnr ,&mpc83xx.ipic.semsr , 3},
/* vector 20: IRQ4 SExxR , Bit 4 */
{&mpc83xx.ipic.sepnr ,&mpc83xx.ipic.semsr , 4},
/* vector 21: IRQ5 SExxR , Bit 5 */
{&mpc83xx.ipic.sepnr ,&mpc83xx.ipic.semsr , 5},
/* vector 22: IRQ6 SExxR , Bit 6 */
{&mpc83xx.ipic.sepnr ,&mpc83xx.ipic.semsr , 6},
/* vector 23: IRQ7 SExxR , Bit 7 */
{&mpc83xx.ipic.sepnr ,&mpc83xx.ipic.semsr , 7},
{NULL,NULL,0}, /* reserved vector 24 */
{NULL,NULL,0}, /* reserved vector 25 */
{NULL,NULL,0}, /* reserved vector 26 */
{NULL,NULL,0}, /* reserved vector 27 */
{NULL,NULL,0}, /* reserved vector 28 */
{NULL,NULL,0}, /* reserved vector 29 */
{NULL,NULL,0}, /* reserved vector 30 */
{NULL,NULL,0}, /* reserved vector 31 */
/* vector 32: TSEC1 Tx SIxxR_H , Bit 0 */
{&mpc83xx.ipic.sipnr[0],&mpc83xx.ipic.simsr[0], 0},
/* vector 33: TSEC1 Rx SIxxR_H , Bit 1 */
{&mpc83xx.ipic.sipnr[0],&mpc83xx.ipic.simsr[0], 1},
/* vector 34: TSEC1 Err SIxxR_H , Bit 2 */
{&mpc83xx.ipic.sipnr[0],&mpc83xx.ipic.simsr[0], 2},
/* vector 35: TSEC2 Tx SIxxR_H , Bit 3 */
{&mpc83xx.ipic.sipnr[0],&mpc83xx.ipic.simsr[0], 3},
/* vector 36: TSEC2 Rx SIxxR_H , Bit 4 */
{&mpc83xx.ipic.sipnr[0],&mpc83xx.ipic.simsr[0], 4},
/* vector 37: TSEC2 Err SIxxR_H , Bit 5 */
{&mpc83xx.ipic.sipnr[0],&mpc83xx.ipic.simsr[0], 5},
/* vector 38: USB DR SIxxR_H , Bit 6 */
{&mpc83xx.ipic.sipnr[0],&mpc83xx.ipic.simsr[0], 6},
/* vector 39: USB MPH SIxxR_H , Bit 7 */
{&mpc83xx.ipic.sipnr[0],&mpc83xx.ipic.simsr[0], 7},
{NULL,NULL,0}, /* reserved vector 40 */
{NULL,NULL,0}, /* reserved vector 41 */
{NULL,NULL,0}, /* reserved vector 42 */
{NULL,NULL,0}, /* reserved vector 43 */
{NULL,NULL,0}, /* reserved vector 44 */
{NULL,NULL,0}, /* reserved vector 45 */
{NULL,NULL,0}, /* reserved vector 46 */
{NULL,NULL,0}, /* reserved vector 47 */
/* vector 48: IRQ0 SExxR , Bit 0 */
{&mpc83xx.ipic.sepnr ,&mpc83xx.ipic.semsr , 0},
{NULL,NULL,0}, /* reserved vector 49 */
{NULL,NULL,0}, /* reserved vector 50 */
{NULL,NULL,0}, /* reserved vector 51 */
{NULL,NULL,0}, /* reserved vector 52 */
{NULL,NULL,0}, /* reserved vector 53 */
{NULL,NULL,0}, /* reserved vector 54 */
{NULL,NULL,0}, /* reserved vector 55 */
{NULL,NULL,0}, /* reserved vector 56 */
{NULL,NULL,0}, /* reserved vector 57 */
{NULL,NULL,0}, /* reserved vector 58 */
{NULL,NULL,0}, /* reserved vector 59 */
{NULL,NULL,0}, /* reserved vector 60 */
{NULL,NULL,0}, /* reserved vector 61 */
{NULL,NULL,0}, /* reserved vector 62 */
{NULL,NULL,0}, /* reserved vector 63 */
/* vector 64: RTC SEC SIxxR_L , Bit 0 */
{&mpc83xx.ipic.sipnr[1],&mpc83xx.ipic.simsr[1], 0},
/* vector 65: PIT SIxxR_L , Bit 1 */
{&mpc83xx.ipic.sipnr[1],&mpc83xx.ipic.simsr[1], 1},
/* vector 66: PCI1 SIxxR_L , Bit 2 */
{&mpc83xx.ipic.sipnr[1],&mpc83xx.ipic.simsr[1], 2},
/* vector 67: PCI2 SIxxR_L , Bit 3 */
{&mpc83xx.ipic.sipnr[1],&mpc83xx.ipic.simsr[1], 3},
/* vector 68: RTC ALR SIxxR_L , Bit 4 */
{&mpc83xx.ipic.sipnr[1],&mpc83xx.ipic.simsr[1], 4},
/* vector 69: MU SIxxR_L , Bit 5 */
{&mpc83xx.ipic.sipnr[1],&mpc83xx.ipic.simsr[1], 5},
/* vector 70: SBA SIxxR_L , Bit 6 */
{&mpc83xx.ipic.sipnr[1],&mpc83xx.ipic.simsr[1], 6},
/* vector 71: DMA SIxxR_L , Bit 7 */
{&mpc83xx.ipic.sipnr[1],&mpc83xx.ipic.simsr[1], 7},
/* vector 72: GTM4 SIxxR_L , Bit 8 */
{&mpc83xx.ipic.sipnr[1],&mpc83xx.ipic.simsr[1], 8},
/* vector 73: GTM8 SIxxR_L , Bit 9 */
{&mpc83xx.ipic.sipnr[1],&mpc83xx.ipic.simsr[1], 9},
/* vector 74: GPIO1 SIxxR_L , Bit 10 */
{&mpc83xx.ipic.sipnr[1],&mpc83xx.ipic.simsr[1],10},
/* vector 75: GPIO2 SIxxR_L , Bit 11 */
{&mpc83xx.ipic.sipnr[1],&mpc83xx.ipic.simsr[1],11},
/* vector 76: DDR SIxxR_L , Bit 12 */
{&mpc83xx.ipic.sipnr[1],&mpc83xx.ipic.simsr[1],12},
/* vector 77: LBC SIxxR_L , Bit 13 */
{&mpc83xx.ipic.sipnr[1],&mpc83xx.ipic.simsr[1],13},
/* vector 78: GTM2 SIxxR_L , Bit 14 */
{&mpc83xx.ipic.sipnr[1],&mpc83xx.ipic.simsr[1],14},
/* vector 79: GTM6 SIxxR_L , Bit 15 */
{&mpc83xx.ipic.sipnr[1],&mpc83xx.ipic.simsr[1],15},
/* vector 80: PMC SIxxR_L , Bit 16 */
{&mpc83xx.ipic.sipnr[1],&mpc83xx.ipic.simsr[1],16},
{NULL,NULL,0}, /* reserved vector 81 */
{NULL,NULL,0}, /* reserved vector 82 */
{NULL,NULL,0}, /* reserved vector 63 */
/* vector 84: GTM3 SIxxR_L , Bit 20 */
{&mpc83xx.ipic.sipnr[1],&mpc83xx.ipic.simsr[1],20},
/* vector 85: GTM7 SIxxR_L , Bit 21 */
{&mpc83xx.ipic.sipnr[1],&mpc83xx.ipic.simsr[1],21},
{NULL,NULL,0}, /* reserved vector 81 */
{NULL,NULL,0}, /* reserved vector 82 */
{NULL,NULL,0}, /* reserved vector 63 */
{NULL,NULL,0}, /* reserved vector 63 */
/* vector 90: GTM1 SIxxR_L , Bit 26 */
{&mpc83xx.ipic.sipnr[1],&mpc83xx.ipic.simsr[1],26},
/* vector 91: GTM5 SIxxR_L , Bit 27 */
{&mpc83xx.ipic.sipnr[1],&mpc83xx.ipic.simsr[1],27}
};
/*
* data structure to handle all mask registers in the IPIC
*/
typedef struct {
uint32_t simsr_mask[2];
uint32_t semsr_mask;
uint32_t sermr_mask;
} BSP_ipic_mask_t;
/*
* this array will be filled with mask values needed
* to temporarily disable all IRQ soures with lower or same
* priority of the current source (whose vector is the array index)
*/
BSP_ipic_mask_t BSP_ipic_prio2mask[BSP_ARRAY_CNT(BSP_ipic_isrc_rsc)];
/*
* functions to enable/disable a source at the ipic
*/
void BSP_irq_enable_at_ipic (rtems_irq_number irqnum)
{
uint32_t vecnum = irqnum - BSP_IPIC_IRQ_LOWEST_OFFSET;
const BSP_isrc_rsc_t *rsc_ptr;
if ((vecnum >= 0)
&& (vecnum < BSP_ARRAY_CNT(BSP_ipic_isrc_rsc))) {
rsc_ptr = &BSP_ipic_isrc_rsc[vecnum];
if (rsc_ptr->mask_reg != NULL) {
*(rsc_ptr->mask_reg) |= 1 << (31-rsc_ptr->bit_num);
}
}
}
void BSP_irq_disable_at_ipic (rtems_irq_number irqnum)
{
uint32_t vecnum = irqnum - BSP_IPIC_IRQ_LOWEST_OFFSET;
const BSP_isrc_rsc_t *rsc_ptr;
if ((vecnum >= 0)
&& (vecnum < BSP_ARRAY_CNT(BSP_ipic_isrc_rsc))) {
rsc_ptr = &BSP_ipic_isrc_rsc[vecnum];
if (rsc_ptr->mask_reg != NULL) {
*(rsc_ptr->mask_reg) &= ~(1 << (31-rsc_ptr->bit_num));
}
}
}
/*
* IRQ Handler: this is called from the primary exception dispatcher
*/
rtems_status_code BSP_irq_handle_at_ipic(uint32_t excNum)
{
rtems_status_code rc = RTEMS_SUCCESSFUL;
rtems_irq_connect_data *tbl_entry;
int32_t vecnum;
uint32_t msr_value;
uint32_t msr_save;
uint32_t msr_enable = 0;
BSP_ipic_mask_t mask_save;
const BSP_ipic_mask_t *mask_ptr;
/*
* get vector
*/
switch(excNum) {
case ASM_EXT_VECTOR:
vecnum = MPC83xx_VCR_TO_VEC(mpc83xx.ipic.sivcr);
msr_enable = PPC_MSR_EE;
break;
case ASM_SYSMGMT_VECTOR:
vecnum = MPC83xx_VCR_TO_VEC(mpc83xx.ipic.smvcr);
msr_enable = PPC_MSR_EE;
break;
#if defined(ASM_CRIT_VECTOR)
case ASM_CRIT_VECTOR:
vecnum = MPC83xx_VCR_TO_VEC(mpc83xx.ipic.scvcr);
break;
#endif
default:
vecnum = -1;
}
/*
* check vector number
*/
if ((vecnum >= 0)
&& (vecnum < BSP_ARRAY_CNT(BSP_ipic_isrc_rsc))) {
/*
* save current mask registers
*/
mask_save.simsr_mask[0] = mpc83xx.ipic.simsr[0];
mask_save.simsr_mask[1] = mpc83xx.ipic.simsr[1];
mask_save.semsr_mask = mpc83xx.ipic.semsr ;
mask_save.sermr_mask = mpc83xx.ipic.sermr ;
/*
* mask all lower prio interrupts
*/
mask_ptr = &BSP_ipic_prio2mask[vecnum];
mpc83xx.ipic.simsr[0] &= mask_ptr->simsr_mask[0];
mpc83xx.ipic.simsr[1] &= mask_ptr->simsr_mask[1];
mpc83xx.ipic.semsr &= mask_ptr->semsr_mask ;
mpc83xx.ipic.sermr &= mask_ptr->sermr_mask ;
/*
* reenable msr_ee
*/
_CPU_MSR_GET(msr_value);
msr_save = msr_value;
msr_value |= msr_enable;
_CPU_MSR_SET(msr_value);
/*
* call handler
*/
tbl_entry = &BSP_rtems_irq_tbl[vecnum+BSP_IPIC_IRQ_LOWEST_OFFSET];
if (tbl_entry->hdl != NULL) {
(tbl_entry->hdl) (tbl_entry->handle);
} else {
printk("IPIC: Spurious interrupt; excNum=0x%x, vector=0x%02x\n\r",
excNum,vecnum);
}
/*
* disable msr_enable
*/
_CPU_MSR_SET(msr_save);
/*
* restore initial masks
*/
mpc83xx.ipic.simsr[0] = mask_save.simsr_mask[0];
mpc83xx.ipic.simsr[1] = mask_save.simsr_mask[1];
mpc83xx.ipic.semsr = mask_save.semsr_mask ;
mpc83xx.ipic.sermr = mask_save.sermr_mask ;
}
return rc;
}
/*
* fill the array BSP_ipic_prio2mask to allow masking of lower prio sources
* to implement nested interrupts
*/
rtems_status_code BSP_ipic_calc_prio2mask(void)
{
rtems_status_code rc = RTEMS_SUCCESSFUL;
/*
* FIXME: fill the array
*/
return rc;
}
/*
* activate the interrupt controller
*/
rtems_status_code BSP_ipic_intc_init(void)
{
uint32_t msr_value;
rtems_status_code rc = RTEMS_SUCCESSFUL;
/*
* mask off all interrupts
*/
mpc83xx.ipic.simsr[0] = 0;
mpc83xx.ipic.simsr[1] = 0;
mpc83xx.ipic.semsr = 0;
mpc83xx.ipic.sermr = 0;
/*
* set desired configuration as defined in bspopts.h
* normally, the default values should be fine
*/
#if defined(BSP_SICFR_VAL) /* defined in bspopts.h ? */
mpc83xx.ipic.sicfr = BSP_SICFR_VAL;
#endif
/*
* set desired priorities as defined in bspopts.h
* normally, the default values should be fine
*/
#if defined(BSP_SIPRR0_VAL) /* defined in bspopts.h ? */
mpc83xx.ipic.siprr[0] = BSP_SIPRR0_VAL;
#endif
#if defined(BSP_SIPRR1_VAL) /* defined in bspopts.h ? */
mpc83xx.ipic.siprr[1] = BSP_SIPRR1_VAL;
#endif
#if defined(BSP_SIPRR2_VAL) /* defined in bspopts.h ? */
mpc83xx.ipic.siprr[2] = BSP_SIPRR2_VAL;
#endif
#if defined(BSP_SIPRR3_VAL) /* defined in bspopts.h ? */
mpc83xx.ipic.siprr[3] = BSP_SIPRR3_VAL;
#endif
#if defined(BSP_SMPRR0_VAL) /* defined in bspopts.h ? */
mpc83xx.ipic.smprr[0] = BSP_SMPRR0_VAL;
#endif
#if defined(BSP_SMPRR1_VAL) /* defined in bspopts.h ? */
mpc83xx.ipic.smprr[1] = BSP_SMPRR1_VAL;
#endif
#if defined(BSP_SECNR_VAL) /* defined in bspopts.h ? */
mpc83xx.ipic.secnr = BSP_SECNR_VAL;
#endif
/*
* calculate priority masks
*/
rc = BSP_ipic_calc_prio2mask();
if (rc == RTEMS_SUCCESSFUL) {
/*
* enable (non-critical) exceptions
*/
_CPU_MSR_GET(msr_value);
msr_value |= PPC_MSR_EE;
_CPU_MSR_SET(msr_value);
/* install exit handler to close ipic when program atexit called */
/* atexit(ipic_intc_exit); */
}
return rc;
}

149
c/src/lib/libbsp/powerpc/gen83xx/irq/irq.h Normal file
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@@ -0,0 +1,149 @@
/*===============================================================*\
| Project: RTEMS generic MPC83xx BSP |
+-----------------------------------------------------------------+
| Copyright (c) 2007 |
| Embedded Brains GmbH |
| Obere Lagerstr. 30 |
| D-82178 Puchheim |
| Germany |
| rtems@embedded-brains.de |
+-----------------------------------------------------------------+
| The license and distribution terms for this file may be |
| found in the file LICENSE in this distribution or at |
| |
| http://www.rtems.com/license/LICENSE. |
| |
+-----------------------------------------------------------------+
| this file declares constants of the interrupt controller |
\*===============================================================*/
#ifndef GEN83xx_IRQ_IRQ_H
#define GEN83xx_IRQ_IRQ_H
#include <rtems.h>
#include <rtems/irq.h>
/*
* the following definitions specify the indices used
* to interface the interrupt handler API
*/
/*
* Base index for the module specific irq handlers
*/
#define BSP_ASM_IRQ_VECTOR_BASE 0x0
#define BSP_IPIC_VECTOR_BASE BSP_ASM_IRQ_VECTOR_BASE
/*
* Peripheral IRQ handlers related definitions
*/
#define BSP_IPIC_PER_IRQ_NUMBER 128
#define BSP_IPIC_IRQ_LOWEST_OFFSET BSP_IPIC_VECTOR_BASE /* 0 */
#define BSP_IPIC_IRQ_MAX_OFFSET (BSP_IPIC_IRQ_LOWEST_OFFSET\
+BSP_IPIC_PER_IRQ_NUMBER-1)
#define BSP_IS_IPIC_IRQ(irqnum) \
(((irqnum) >= BSP_IPIC_IRQ_LOWEST_OFFSET) && \
((irqnum) <= BSP_IPIC_IRQ_MAX_OFFSET))
/*
* Processor IRQ handlers related definitions
*/
#define BSP_PROCESSOR_IRQ_NUMBER 1
#define BSP_PROCESSOR_IRQ_LOWEST_OFFSET (BSP_IPIC_IRQ_MAX_OFFSET+1)
#define BSP_PROCESSOR_IRQ_MAX_OFFSET (BSP_PROCESSOR_IRQ_LOWEST_OFFSET\
+BSP_PROCESSOR_IRQ_NUMBER-1)
#define BSP_IS_PROCESSOR_IRQ(irqnum) \
(((irqnum) >= BSP_PROCESSOR_IRQ_LOWEST_OFFSET) && \
((irqnum) <= BSP_PROCESSOR_IRQ_MAX_OFFSET))
/*
* Summary
*/
#define BSP_IRQ_NUMBER (BSP_PROCESSOR_IRQ_MAX_OFFSET+1)
#define BSP_LOWEST_OFFSET BSP_IPIC_IRQ_LOWEST_OFFSET
#define BSP_MAX_OFFSET BSP_PROCESSOR_IRQ_MAX_OFFSET
#define BSP_IS_VALID_IRQ(irqnum) \
(BSP_IS_PROCESSOR_IRQ(irqnum) \
|| BSP_IS_IPIC_IRQ(irqnum))
#ifndef ASM
#ifdef __cplusplus
extern "C" {
#endif
/*
* index table for the module specific handlers, a few entries are only placeholders
*/
typedef enum {
BSP_IPIC_IRQ_FIRST = BSP_IPIC_IRQ_LOWEST_OFFSET,
BSP_IPIC_IRQ_ERROR = BSP_IPIC_IRQ_LOWEST_OFFSET + 0,
/* reserved irqs 1- 8 */
BSP_IPIC_IRQ_UART1 = BSP_IPIC_IRQ_LOWEST_OFFSET + 9,
BSP_IPIC_IRQ_UART2 = BSP_IPIC_IRQ_LOWEST_OFFSET + 10,
BSP_IPIC_IRQ_SEC = BSP_IPIC_IRQ_LOWEST_OFFSET + 11,
/* reserved irqs 12-13 */
BSP_IPIC_IRQ_I2C1 = BSP_IPIC_IRQ_LOWEST_OFFSET + 14,
BSP_IPIC_IRQ_I2C2 = BSP_IPIC_IRQ_LOWEST_OFFSET + 15,
BSP_IPIC_IRQ_SPI = BSP_IPIC_IRQ_LOWEST_OFFSET + 16,
BSP_IPIC_IRQ_IRQ1 = BSP_IPIC_IRQ_LOWEST_OFFSET + 17,
BSP_IPIC_IRQ_IRQ2 = BSP_IPIC_IRQ_LOWEST_OFFSET + 18,
BSP_IPIC_IRQ_IRQ3 = BSP_IPIC_IRQ_LOWEST_OFFSET + 19,
BSP_IPIC_IRQ_IRQ4 = BSP_IPIC_IRQ_LOWEST_OFFSET + 20,
BSP_IPIC_IRQ_IRQ5 = BSP_IPIC_IRQ_LOWEST_OFFSET + 21,
BSP_IPIC_IRQ_IRQ6 = BSP_IPIC_IRQ_LOWEST_OFFSET + 22,
BSP_IPIC_IRQ_IRQ7 = BSP_IPIC_IRQ_LOWEST_OFFSET + 23,
/* reserved irqs 24-31 */
BSP_IPIC_IRQ_TSEC1_TX = BSP_IPIC_IRQ_LOWEST_OFFSET + 32,
BSP_IPIC_IRQ_TSEC1_RX = BSP_IPIC_IRQ_LOWEST_OFFSET + 33,
BSP_IPIC_IRQ_TSEC1_ERR = BSP_IPIC_IRQ_LOWEST_OFFSET + 34,
BSP_IPIC_IRQ_TSEC2_TX = BSP_IPIC_IRQ_LOWEST_OFFSET + 35,
BSP_IPIC_IRQ_TSEC2_RX = BSP_IPIC_IRQ_LOWEST_OFFSET + 36,
BSP_IPIC_IRQ_TSEC2_ERR = BSP_IPIC_IRQ_LOWEST_OFFSET + 37,
BSP_IPIC_IRQ_USB_DR = BSP_IPIC_IRQ_LOWEST_OFFSET + 38,
BSP_IPIC_IRQ_USB_MPH = BSP_IPIC_IRQ_LOWEST_OFFSET + 39,
/* reserved irqs 40-47 */
BSP_IPIC_IRQ_IRQ0 = BSP_IPIC_IRQ_LOWEST_OFFSET + 48,
/* reserved irqs 49-63 */
BSP_IPIC_IRQ_RTC_SEC = BSP_IPIC_IRQ_LOWEST_OFFSET + 64,
BSP_IPIC_IRQ_PIT = BSP_IPIC_IRQ_LOWEST_OFFSET + 65,
BSP_IPIC_IRQ_PCI1 = BSP_IPIC_IRQ_LOWEST_OFFSET + 66,
BSP_IPIC_IRQ_PCI2 = BSP_IPIC_IRQ_LOWEST_OFFSET + 67,
BSP_IPIC_IRQ_RTC_ALR = BSP_IPIC_IRQ_LOWEST_OFFSET + 68,
BSP_IPIC_IRQ_MU = BSP_IPIC_IRQ_LOWEST_OFFSET + 69,
BSP_IPIC_IRQ_SBA = BSP_IPIC_IRQ_LOWEST_OFFSET + 70,
BSP_IPIC_IRQ_DMA = BSP_IPIC_IRQ_LOWEST_OFFSET + 71,
BSP_IPIC_IRQ_GTM4 = BSP_IPIC_IRQ_LOWEST_OFFSET + 72,
BSP_IPIC_IRQ_GTM8 = BSP_IPIC_IRQ_LOWEST_OFFSET + 73,
BSP_IPIC_IRQ_GPIO1 = BSP_IPIC_IRQ_LOWEST_OFFSET + 74,
BSP_IPIC_IRQ_GPIO2 = BSP_IPIC_IRQ_LOWEST_OFFSET + 75,
BSP_IPIC_IRQ_DDR = BSP_IPIC_IRQ_LOWEST_OFFSET + 76,
BSP_IPIC_IRQ_LBC = BSP_IPIC_IRQ_LOWEST_OFFSET + 77,
BSP_IPIC_IRQ_GTM2 = BSP_IPIC_IRQ_LOWEST_OFFSET + 78,
BSP_IPIC_IRQ_GTM6 = BSP_IPIC_IRQ_LOWEST_OFFSET + 79,
BSP_IPIC_IRQ_PMC = BSP_IPIC_IRQ_LOWEST_OFFSET + 80,
/* reserved irqs 81-83 */
BSP_IPIC_IRQ_GTM3 = BSP_IPIC_IRQ_LOWEST_OFFSET + 84,
BSP_IPIC_IRQ_GTM7 = BSP_IPIC_IRQ_LOWEST_OFFSET + 85,
/* reserved irqs 86-89 */
BSP_IPIC_IRQ_GTM1 = BSP_IPIC_IRQ_LOWEST_OFFSET + 90,
BSP_IPIC_IRQ_GTM5 = BSP_IPIC_IRQ_LOWEST_OFFSET + 91,
/* reserved irqs 92-127 */
BSP_IPIC_IRQ_LAST = BSP_IPIC_IRQ_MAX_OFFSET,
BSP_DECREMENTER = BSP_PROCESSOR_IRQ_LOWEST_OFFSET + 0
} rtems_irq_symbolic_name;
extern rtems_irq_connect_data *BSP_rtems_irq_tbl;
void BSP_rtems_irq_mng_init(unsigned cpuId);
/* ipic.c */
rtems_status_code BSP_irq_handle_at_ipic(uint32_t excNum);
void BSP_irq_enable_at_ipic (rtems_irq_number irqnum);
void BSP_irq_disable_at_ipic (rtems_irq_number irqnum);
#ifdef __cplusplus
}
#endif
#endif /* ASM */
#endif /* GEN83XX_IRQ_IRQ_H */

413
c/src/lib/libbsp/powerpc/gen83xx/irq/irq_init.c Normal file
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@@ -0,0 +1,413 @@
/*===============================================================*\
| Project: RTEMS generic MPC83xx BSP |
+-----------------------------------------------------------------+
| Copyright (c) 2007 |
| Embedded Brains GmbH |
| Obere Lagerstr. 30 |
| D-82178 Puchheim |
| Germany |
| rtems@embedded-brains.de |
+-----------------------------------------------------------------+
| The license and distribution terms for this file may be |
| found in the file LICENSE in this distribution or at |
| |
| http://www.rtems.com/license/LICENSE. |
| |
+-----------------------------------------------------------------+
| this file contains the irq controller init code |
+-----------------------------------------------------------------+
| derived from the virtex BSP |
\*===============================================================*/
#include <libcpu/spr.h>
#include <bsp/irq.h>
#include <bsp.h>
#include <libcpu/raw_exception.h>
#include <rtems/bspIo.h>
#include <rtems/powerpc/powerpc.h>
#include <bsp/vectors.h>
static rtems_irq_connect_data rtemsIrqTbl[BSP_IRQ_NUMBER];
rtems_irq_connect_data *BSP_rtems_irq_tbl;
rtems_irq_global_settings* BSP_rtems_irq_config;
/***********************************************************
* dummy functions for on/off/isOn calls
* these functions just do nothing fulfill the semantic
* requirements to enable/disable a certain interrupt or exception
*/
void BSP_irq_nop_func(const rtems_irq_connect_data *unused)
{
/*
* nothing to do
*/
}
void BSP_irq_nop_hdl(void *hdl)
{
/*
* nothing to do
*/
}
int BSP_irq_true_func(const rtems_irq_connect_data *unused)
{
/*
* nothing to do
*/
return TRUE;
}
/***********************************************************
* interrupt handler and its enable/disable functions
***********************************************************/
/***********************************************************
* functions to enable/disable/query external/critical interrupts
*/
void BSP_irqexc_on_fnc(rtems_irq_connect_data *conn_data)
{
uint32_t msr_value;
/*
* get current MSR value
*/
_CPU_MSR_GET(msr_value);
msr_value |= PPC_MSR_EE;
_CPU_MSR_SET(msr_value);
}
void BSP_irqexc_off_fnc(rtems_irq_connect_data *unused)
{
/*
* nothing to do
*/
}
/***********************************************************
* High level IRQ handler called from shared_raw_irq_code_entry
*/
void C_dispatch_irq_handler (CPU_Interrupt_frame *frame, unsigned int excNum)
{
uint32_t msr_value,new_msr;
/*
* Handle interrupt
*/
switch(excNum) {
case ASM_DEC_VECTOR:
_CPU_MSR_GET(msr_value);
new_msr = msr_value | MSR_EE;
_CPU_MSR_SET(new_msr);
BSP_rtems_irq_tbl[BSP_DECREMENTER].hdl
(BSP_rtems_irq_tbl[BSP_DECREMENTER].handle);
_CPU_MSR_SET(msr_value);
break;
#if 0 /* Critical interrupts not yet supported */
case ASM_CRIT_VECTOR:
#endif
case ASM_SYSMGMT_VECTOR:
case ASM_EXT_VECTOR:
BSP_irq_handle_at_ipic(excNum);
break;
}
}
void _ThreadProcessSignalsFromIrq (BSP_Exception_frame* ctx)
{
/*
* Process pending signals that have not already been
* processed by _Thread_Displatch. This happens quite
* unfrequently : the ISR must have posted an action
* to the current running thread.
*/
if ( _Thread_Do_post_task_switch_extension ||
_Thread_Executing->do_post_task_switch_extension ) {
_Thread_Executing->do_post_task_switch_extension = FALSE;
_API_extensions_Run_postswitch();
}
}
/***********************************************************
* functions to set/get/remove interrupt handlers
***********************************************************/
int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq)
{
unsigned int level;
/*
* check for valid irq name
* if invalid, print error and return 0
*/
if (!BSP_IS_VALID_IRQ(irq->name)) {
printk("Invalid interrupt vector %d\n",irq->name);
return 0;
}
/*
* disable interrupts
*/
_CPU_ISR_Disable(level);
/*
* check, that default handler is installed now
*/
if (rtemsIrqTbl[irq->name].hdl != BSP_rtems_irq_config->defaultEntry.hdl) {
_CPU_ISR_Enable(level);
printk("IRQ vector %d already connected\n",irq->name);
return 0;
}
/*
* store new handler data
*/
rtemsIrqTbl[irq->name] = *irq;
/*
* enable irq at interrupt controller
*/
if (BSP_IS_IPIC_IRQ(irq->name)) {
BSP_irq_enable_at_ipic(irq->name);
}
/*
* call "on" function to enable interrupt at device
*/
irq->on(irq);
/*
* reenable interrupts
*/
_CPU_ISR_Enable(level);
return 1;
}
int BSP_get_current_rtems_irq_handler (rtems_irq_connect_data* irq)
{
unsigned int level;
/*
* check for valid IRQ name
*/
if (!BSP_IS_VALID_IRQ(irq->name)) {
return 0;
}
_CPU_ISR_Disable(level);
/*
* return current IRQ entry
*/
*irq = rtemsIrqTbl[irq->name];
_CPU_ISR_Enable(level);
return 1;
}
int BSP_remove_rtems_irq_handler (const rtems_irq_connect_data* irq)
{
unsigned int level;
/*
* check for valid IRQ name
*/
if (!BSP_IS_VALID_IRQ(irq->name)) {
return 0;
}
_CPU_ISR_Disable(level);
/*
* check, that specified handler is really connected now
*/
if (rtemsIrqTbl[irq->name].hdl != irq->hdl) {
_CPU_ISR_Enable(level);
return 0;
}
/*
* disable interrupt at interrupt controller
*/
if (BSP_IS_IPIC_IRQ(irq->name)) {
BSP_irq_disable_at_ipic(irq->name);
}
/*
* disable interrupt at source
*/
irq->off(irq);
/*
* restore default interrupt handler
*/
rtemsIrqTbl[irq->name] = BSP_rtems_irq_config->defaultEntry;
/*
* reenable interrupts
*/
_CPU_ISR_Enable(level);
return 1;
}
/***********************************************************
* functions to set/get the basic interrupt management setup
***********************************************************/
/*
* (Re) get info on current RTEMS interrupt management.
*/
int BSP_rtems_irq_mngt_get(rtems_irq_global_settings** ret_ptr)
{
*ret_ptr = BSP_rtems_irq_config;
return 0;
}
/*
* set management stuff
*/
int BSP_rtems_irq_mngt_set(rtems_irq_global_settings* config)
{
int i;
unsigned int level;
_CPU_ISR_Disable(level);
/*
* store given configuration
*/
BSP_rtems_irq_config = config;
BSP_rtems_irq_tbl = BSP_rtems_irq_config->irqHdlTbl;
/*
* enable any non-empty IRQ entries at OPBINTC
*/
for (i = BSP_IPIC_IRQ_LOWEST_OFFSET;
i <= BSP_IPIC_IRQ_MAX_OFFSET;
i++) {
if (BSP_rtems_irq_tbl[i].hdl != config->defaultEntry.hdl) {
BSP_irq_enable_at_ipic(i);
BSP_rtems_irq_tbl[i].on((&BSP_rtems_irq_tbl[i]));
}
else {
BSP_rtems_irq_tbl[i].off(&(BSP_rtems_irq_tbl[i]));
BSP_irq_disable_at_ipic(i);
}
}
/*
* store any irq-like processor exceptions
*/
for (i = BSP_PROCESSOR_IRQ_LOWEST_OFFSET;
i < BSP_PROCESSOR_IRQ_MAX_OFFSET;
i++) {
if (BSP_rtems_irq_tbl[i].hdl != config->defaultEntry.hdl) {
if (BSP_rtems_irq_tbl[i].on != NULL) {
BSP_rtems_irq_tbl[i].on
(&(BSP_rtems_irq_tbl[i]));
}
}
else {
if (BSP_rtems_irq_tbl[i].off != NULL) {
BSP_rtems_irq_tbl[i].off
(&(BSP_rtems_irq_tbl[i]));
}
}
}
_CPU_ISR_Enable(level);
return 1;
}
/**********************************************
* list of exception vectors to tap for interrupt handlers
*/
static rtems_raw_except_connect_data BSP_vec_desc[] = {
#if defined(ASM_DEC_VECTOR)
{ASM_DEC_VECTOR,
{ASM_DEC_VECTOR,
decrementer_exception_vector_prolog_code,
(size_t)decrementer_exception_vector_prolog_code_size
},
exception_nop_enable,
exception_nop_enable,
exception_always_enabled
},
#endif
#if defined(ASM_SYSMGMT_VECTOR)
{ASM_SYSMGMT_VECTOR,
{ASM_SYSMGMT_VECTOR,
sysmgmt_exception_vector_prolog_code,
(size_t)sysmgmt_exception_vector_prolog_code_size
},
exception_nop_enable,
exception_nop_enable,
exception_always_enabled
},
#endif
{ASM_EXT_VECTOR,
{ASM_EXT_VECTOR,
external_exception_vector_prolog_code,
(size_t)&external_exception_vector_prolog_code_size
},
exception_nop_enable,
exception_nop_enable,
exception_always_enabled
}
#if 0 /* Critical interrupts not yet supported */
,{ASM_CRIT_VECTOR,
{ASM_CRIT_VECTOR,
critical_exception_vector_prolog_code,
critical_exception_vector_prolog_code_size
}
BSP_irq_nop_func,
BSP_irq_nop_func,
BSP_irq_true_func
}
#endif
};
/*
* dummy for an empty IRQ handler entry
*/
static rtems_irq_connect_data emptyIrq = {
0, /* Irq Name */
BSP_irq_nop_hdl, /* handler function */
NULL, /* handle passed to handler */
BSP_irq_nop_func, /* on function */
BSP_irq_nop_func, /* off function */
BSP_irq_true_func /* isOn function */
};
static rtems_irq_global_settings initialConfig = {
BSP_IRQ_NUMBER, /* irqNb */
{ 0, /* Irq Name */
BSP_irq_nop_hdl, /* handler function */
NULL, /* handle passed to handler */
BSP_irq_nop_func, /* on function */
BSP_irq_nop_func, /* off function */
BSP_irq_true_func /* isOn function */
}, /* emptyIrq */
rtemsIrqTbl, /* irqHdlTbl */
0, /* irqBase */
NULL /* irqPrioTbl */
};
void BSP_rtems_irq_mng_init(unsigned cpuId)
{
int i;
/*
* connect all exception vectors needed
*/
for (i = 0;
i < (sizeof(BSP_vec_desc) /
sizeof(BSP_vec_desc[0]));
i++) {
if (!ppc_set_exception (&BSP_vec_desc[i])) {
BSP_panic("Unable to initialize RTEMS raw exception\n");
}
}
/*
* setup interrupt handlers table
*/
for (i = 0;
i < BSP_IRQ_NUMBER;
i++) {
rtemsIrqTbl[i] = emptyIrq;
rtemsIrqTbl[i].name = i;
}
/*
* initialize interrupt management
*/
if (!BSP_rtems_irq_mngt_set(&initialConfig)) {
BSP_panic("Unable to initialize RTEMS interrupt Management!!! System locked\n");
}
}

103
c/src/lib/libbsp/powerpc/gen83xx/network/network.c Normal file
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@@ -0,0 +1,103 @@
/*===============================================================*\
| Project: RTEMS support for MPC83xx |
+-----------------------------------------------------------------+
| Copyright (c) 2007 |
| Embedded Brains GmbH |
| Obere Lagerstr. 30 |
| D-82178 Puchheim |
| Germany |
| rtems@embedded-brains.de |
+-----------------------------------------------------------------+
| The license and distribution terms for this file may be |
| found in the file LICENSE in this distribution or at |
| |
| http://www.rtems.com/license/LICENSE. |
| |
+-----------------------------------------------------------------+
| this file contains the board specific portion |
| of the network interface driver |
\*===============================================================*/
#include <rtems.h>
#include <rtems/rtems_bsdnet.h>
#include <bsp.h>
#include <mpc83xx/tsec.h>
#include <mpc83xx/mpc83xx.h>
#include <stdio.h>
#define TSEC_BITRATE 1000
#define TSEC_IFMODE_RGMII 0
#define TSEC_IFMODE_GMII 1
#define TSEC_IFMODE TSEC_IFMODE_RGMII
/*=========================================================================*\
| Function: |
\*-------------------------------------------------------------------------*/
int BSP_tsec_attach
(
/*-------------------------------------------------------------------------*\
| Purpose: |
| attach or detach the driver |
+---------------------------------------------------------------------------+
| Input Parameters: |
\*-------------------------------------------------------------------------*/
struct rtems_bsdnet_ifconfig *config, /* interface configuration */
int attaching /* 0 = detach, else attach */
)
/*-------------------------------------------------------------------------*\
| Return Value: |
| 1, if success |
\*=========================================================================*/
{
char hw_addr[6] = {0x00,0x04,0x9F,0x00,0x2f,0xcb};
int unitNumber;
char *unitName;
/*
* Parse driver name
*/
if((unitNumber = rtems_bsdnet_parse_driver_name(config, &unitName)) < 0) {
return 0;
}
if (attaching) {
if (unitNumber == 1) {
/*
* init system I/O configuration registers
* to ensure proper pin functions
*/
mpc83xx.syscon.sicrh = mpc83xx.syscon.sicrh & ~0x1f800000;
/*
* init port registers (GPIO2DIR) for TSEC1
*/
mpc83xx.gpio[1].gpdir = ((mpc83xx.gpio[1].gpdir & ~0x00000FFF)
| 0x0000001f);
}
}
if (unitNumber == 2) {
/*
* init port registers (GPIO2DIR) for TSEC2
*/
mpc83xx.gpio[0].gpdir = ((mpc83xx.gpio[0].gpdir & ~0x000FFFFF)
| 0x00087881);
}
/*
* add MAC address into config->hardware_adderss
* FIXME: get the real address we need
*/
if (config->hardware_address == NULL) {
config->hardware_address = hw_addr;
}
/*
* set interrupt number for given interface
*/
config->irno = ((unitNumber == 1)
? BSP_IPIC_IRQ_TSEC1_TX
: BSP_IPIC_IRQ_TSEC2_TX);
/*
* call attach function of board independent driver
*/
if (0 == rtems_mpc83xx_tsec_driver_attach_detach(config,attaching)) {
return 0;
}
return 1;
}

79
c/src/lib/libbsp/powerpc/gen83xx/preinstall.am Normal file
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@@ -0,0 +1,79 @@
## Automatically generated by ampolish3 - Do not edit
if AMPOLISH3
$(srcdir)/preinstall.am: Makefile.am
$(AMPOLISH3) $(srcdir)/Makefile.am > $(srcdir)/preinstall.am
endif
PREINSTALL_DIRS =
DISTCLEANFILES += $(PREINSTALL_DIRS)
all-local: $(TMPINSTALL_FILES)
TMPINSTALL_FILES =
CLEANFILES = $(TMPINSTALL_FILES)
all-am: $(PREINSTALL_FILES)
PREINSTALL_FILES =
CLEANFILES += $(PREINSTALL_FILES)
$(PROJECT_LIB)/$(dirstamp):
@$(MKDIR_P) $(PROJECT_LIB)
@: > $(PROJECT_LIB)/$(dirstamp)
PREINSTALL_DIRS += $(PROJECT_LIB)/$(dirstamp)
$(PROJECT_INCLUDE)/$(dirstamp):
@$(MKDIR_P) $(PROJECT_INCLUDE)
@: > $(PROJECT_INCLUDE)/$(dirstamp)
PREINSTALL_DIRS += $(PROJECT_INCLUDE)/$(dirstamp)
$(PROJECT_LIB)/bsp_specs: bsp_specs $(PROJECT_LIB)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_LIB)/bsp_specs
PREINSTALL_FILES += $(PROJECT_LIB)/bsp_specs
$(PROJECT_INCLUDE)/bsp.h: include/bsp.h $(PROJECT_INCLUDE)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp.h
$(PROJECT_INCLUDE)/tm27.h: include/tm27.h $(PROJECT_INCLUDE)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/tm27.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/tm27.h
$(PROJECT_INCLUDE)/bspopts.h: include/bspopts.h $(PROJECT_INCLUDE)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bspopts.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bspopts.h
$(PROJECT_INCLUDE)/bsp/$(dirstamp):
@$(MKDIR_P) $(PROJECT_INCLUDE)/bsp
@: > $(PROJECT_INCLUDE)/bsp/$(dirstamp)
PREINSTALL_DIRS += $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(PROJECT_INCLUDE)/coverhd.h: include/coverhd.h $(PROJECT_INCLUDE)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/coverhd.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/coverhd.h
$(PROJECT_INCLUDE)/tod.h: ../../shared/tod.h $(PROJECT_INCLUDE)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/tod.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/tod.h
$(PROJECT_LIB)/start.$(OBJEXT): start.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_LIB)/start.$(OBJEXT)
TMPINSTALL_FILES += $(PROJECT_LIB)/start.$(OBJEXT)
$(PROJECT_LIB)/rtems_crti.$(OBJEXT): rtems_crti.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_LIB)/rtems_crti.$(OBJEXT)
TMPINSTALL_FILES += $(PROJECT_LIB)/rtems_crti.$(OBJEXT)
$(PROJECT_LIB)/linkcmds.mpc8349eamds: startup/linkcmds.mpc8349eamds $(PROJECT_LIB)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.mpc8349eamds
PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.mpc8349eamds
$(PROJECT_INCLUDE)/bsp/irq.h: ./irq/irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h
$(PROJECT_INCLUDE)/bsp/vectors.h: ../../powerpc/shared/vectors/vectors.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vectors.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vectors.h

371
c/src/lib/libbsp/powerpc/gen83xx/start/start.S Normal file
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@@ -0,0 +1,371 @@
/*===============================================================*\
| Project: RTEMS generic MPC83xx BSP |
+-----------------------------------------------------------------+
| Copyright (c) 2007 |
| Embedded Brains GmbH |
| Obere Lagerstr. 30 |
| D-82178 Puchheim |
| Germany |
| rtems@embedded-brains.de |
+-----------------------------------------------------------------+
| The license and distribution terms for this file may be |
| found in the file LICENSE in this distribution or at |
| |
| http://www.rtems.com/license/LICENSE. |
| |
+-----------------------------------------------------------------+
| this file contains the startup assembly code |
\*===============================================================*/
/* $Id$ */
#include <rtems/asm.h>
#include <rtems/powerpc/cache.h>
#include <rtems/powerpc/registers.h>
#include <mpc83xx/mpc83xx.h>
#include <bsp.h>
/* Macro definitions to load a register with a 32-bit address.
Both functions identically. Sometimes one mnemonic is more
appropriate than the other.
reg -> register to load
value -> value to be loaded
LA reg,value ("Load Address")
LWI reg,value ("Load Word Immediate") */
.macro LA reg, value
lis \reg , \value@h
ori \reg , \reg, \value@l
.endm
.macro LWI reg, value
lis \reg , (\value)@h
ori \reg , \reg, (\value)@l
.endm
.macro SET_IMM_REGW base, reg2, offset, value
LA \reg2, \value
stw \reg2,\offset(\base)
.endm
/* Macro definitions to test, set or clear a single
bit or bit pattern in a given 32bit GPR.
reg1 -> register content to be tested
reg2 -> 2nd register only needed for computation
mask -> any bit pattern */
.macro TSTBITS reg1, reg2, reg3, mask /* Match is indicated by EQ=0 (CR) */
LWI \reg3, \mask /* Unmatch is indicated by EQ=1 (CR) */
and \reg1, \reg1, \reg3
and \reg2, \reg2, \reg3
cmplw \reg1, \reg2
sync
.endm
.macro SETBITS reg1, reg2, mask
LWI \reg2, \mask
or \reg1, \reg1, \reg2
sync
.endm
.macro CLRBITS reg1, reg2, mask
LWI \reg2, \mask
andc \reg1, \reg1, \reg2
sync
.endm
.extern _bss_start
.extern _bss_size
.extern _data_start
.extern _data_size
.extern _text_start
.extern _text_size
/*.extern _s_got*/
.extern boot_card
.extern MBAR
.section ".vectors"
PUBLIC_VAR (reset_vec)
reset_vec:
bl start
.section ".entry"
PUBLIC_VAR (start)
start:
/*
* FIXME: basic CPU setup:
* init MSR
*/
mfmsr r30
SETBITS r30, r29, MSR_ME|MSR_RI
CLRBITS r30, r29, MSR_IP|MSR_EE
mtmsr r30 /* Set RI/ME, Clr EE in MSR */
/*
* check, wether we are starting from ROM
* detect this using the absolute code address:
* when the upper 4 bits are 0xF, then we are in ROM
*/
bl 1f
1: mflr r28
LWI r29,0xF0000000
TSTBITS r28,r29,r30,0xF0000000
bne start_rom_skip
/*
* ROM startup: remap IMMR to 0xE0000000
* use special sequence from MPC8349EA RM Rev 1, 5.2.4.1.1 "Updating IMMRBAR"
*/
LWI r30,IMMRBAR_DEFAULT
LWI r31,IMMRBAR
lwz r29,0(r30)
stw r31,0(r30)
lwz r29,0(r28) /* read from ROM... */
isync
lwz r29,0(r31) /* read from IMMRBAR... */
isync
/*
* NOTE: now r31 points to onchip registers
/*
* ROM startup: init local access windows
*/
#ifdef LBLAWBAR0_VAL
SET_IMM_REGW r31,r30,LBLAWBAR0_OFF,LBLAWBAR0_VAL
#endif
#ifdef LBLAWAR0_VAL
SET_IMM_REGW r31,r30,LBLAWAR0_OFF,LBLAWAR0_VAL
#endif
#ifdef LBLAWBAR1_VAL
SET_IMM_REGW r31,r30,LBLAWBAR1_OFF,LBLAWBAR1_VAL
#endif
#ifdef LBLAWAR1_VAL
SET_IMM_REGW r31,r30,LBLAWAR1_OFF,LBLAWAR1_VAL
#endif
#ifdef LBLAWBAR2_VAL
SET_IMM_REGW r31,r30,LBLAWBAR2_OFF,LBLAWBAR2_VAL
#endif
#ifdef LBLAWAR2_VAL
SET_IMM_REGW r31,r30,LBLAWAR2_OFF,LBLAWAR2_VAL
#endif
#ifdef LBLAWBAR3_VAL
SET_IMM_REGW r31,r30,LBLAWBAR3_OFF,LBLAWBAR3_VAL
#endif
#ifdef LBLAWAR3_VAL
SET_IMM_REGW r31,r30,LBLAWAR3_OFF,LBLAWAR3_VAL
#endif
/*
* ROM startup: init bus system
*/
#ifdef BR0_VAL
SET_IMM_REGW r31,r30,BR0_OFF,BR0_VAL
#endif
#ifdef OR0_VAL
SET_IMM_REGW r31,r30,OR0_OFF,OR0_VAL
#endif
#ifdef BR1_VAL
SET_IMM_REGW r31,r30,BR1_OFF,BR1_VAL
#endif
#ifdef OR1_VAL
SET_IMM_REGW r31,r30,OR1_OFF,OR1_VAL
#endif
#ifdef BR2_VAL
SET_IMM_REGW r31,r30,BR2_OFF,BR2_VAL
#endif
#ifdef OR2_VAL
SET_IMM_REGW r31,r30,OR2_OFF,OR2_VAL
#endif
#ifdef BR3_VAL
SET_IMM_REGW r31,r30,BR3_OFF,BR3_VAL
#endif
#ifdef OR3_VAL
SET_IMM_REGW r31,r30,OR3_OFF,OR3_VAL
#endif
/*
* ROM startup: init SDRAM access window
*/
#ifdef DDRLAWBAR0_VAL
SET_IMM_REGW r31,r30,DDRLAWBAR0_OFF,DDRLAWBAR0_VAL
#endif
#ifdef DDRLAWAR0_VAL
SET_IMM_REGW r31,r30,DDRLAWAR0_OFF,DDRLAWAR0_VAL
#endif
#ifdef DDRLAWBAR1_VAL
SET_IMM_REGW r31,r30,DDRLAWBAR1_OFF,DDRLAWBAR1_VAL
#endif
#ifdef DDRLAWAR1_VAL
SET_IMM_REGW r31,r30,DDRLAWAR1_OFF,DDRLAWAR1_VAL
#endif
/*
* ROM startup: init SDRAM
*/
#ifdef CS0_BNDS_VAL
SET_IMM_REGW r31,r30,CS0_BNDS_OFF,CS0_BNDS_VAL
#endif
#ifdef CS1_BNDS_VAL
SET_IMM_REGW r31,r30,CS1_BNDS_OFF,CS1_BNDS_VAL
#endif
#ifdef CS2_BNDS_VAL
SET_IMM_REGW r31,r30,CS2_BNDS_OFF,CS2_BNDS_VAL
#endif
#ifdef CS3_BNDS_VAL
SET_IMM_REGW r31,r30,CS3_BNDS_OFF,CS3_BNDS_VAL
#endif
#ifdef CS0_CONFIG_VAL
SET_IMM_REGW r31,r30,CS0_CONFIG_OFF,CS0_CONFIG_VAL
#endif
#ifdef CS1_CONFIG_VAL
SET_IMM_REGW r31,r30,CS1_CONFIG_OFF,CS1_CONFIG_VAL
#endif
#ifdef CS2_CONFIG_VAL
SET_IMM_REGW r31,r30,CS2_CONFIG_OFF,CS2_CONFIG_VAL
#endif
#ifdef CS3_CONFIG_VAL
SET_IMM_REGW r31,r30,CS3_CONFIG_OFF,CS3_CONFIG_VAL
#endif
#ifdef TIMING_CFG_3_VAL
SET_IMM_REGW r31,r30,TIMING_CFG_3_OFF,TIMING_CFG_3_VAL
#endif
#ifdef TIMING_CFG_0_VAL
SET_IMM_REGW r31,r30,TIMING_CFG_0_OFF,TIMING_CFG_0_VAL
#endif
#ifdef TIMING_CFG_1_VAL
SET_IMM_REGW r31,r30,TIMING_CFG_1_OFF,TIMING_CFG_1_VAL
#endif
#ifdef TIMING_CFG_2_VAL
SET_IMM_REGW r31,r30,TIMING_CFG_2_OFF,TIMING_CFG_2_VAL
#endif
#ifdef DDR_SDRAM_CFG_VAL
SET_IMM_REGW r31,r30,DDR_SDRAM_CFG_OFF,DDR_SDRAM_CFG_VAL
#endif
#ifdef DDR_SDRAM_CFG_2_VAL
SET_IMM_REGW r31,r30,DDR_SDRAM_CFG_2_OFF,DDR_SDRAM_CFG_2_VAL
#endif
#ifdef DDR_SDRAM_MODE_VAL
SET_IMM_REGW r31,r30,DDR_SDRAM_MODE_OFF,DDR_SDRAM_MODE_VAL
#endif
#ifdef DDR_SDRAM_MODE_2_VAL
SET_IMM_REGW r31,r30,DDR_SDRAM_MODE_2_OFF,DDR_SDRAM_MODE_2_VAL
#endif
#ifdef DDR_SDRAM_MD_CNTL_VAL
SET_IMM_REGW r31,r30,DDR_SDRAM_MD_CNTL_OFF,DDR_SDRAM_MD_CNTL_VAL
#endif
#ifdef DDR_SDRAM_MD_ITVL_VAL
SET_IMM_REGW r31,r30,DDR_SDRAM_MD_ITVL_OFF,DDR_SDRAM_MD_ITVL_VAL
#endif
#ifdef DDR_SDRAM_CLK_CNTL_VAL
SET_IMM_REGW r31,r30,DDR_SDRAM_CLK_CNTL_OFF,DDR_SDRAM_CLK_CNTL_VAL
#endif
#ifdef DDR_SDRAM_INIT_ADDR_VAL
SET_IMM_REGW r31,r30,DDR_SDRAM_INIT_ADDR_OFF,DDR_SDRAM_INIT_ADDR_VAL
#endif
/*
* FIXME: ROM startup: perform mode set commands etc for SDRAM
*/
/*
* ROM startup: copy code to SDRAM
*/
LA r30, _text_start /* get start address of text section in RAM */
add r30, r20, r30 /* get start address of text section in ROM (add reloc offset) */
LA r29, _text_start /* get start address of text section in RAM */
LA r28, _text_size /* get size of RAM image */
bl copy_image /* copy text section from ROM to RAM location */
/*
* FIXME: ROM startup: copy data to SDRAM
*/
LA r30, _data_start /* get start address of data section in RAM */
add r30, r20, r30 /* get start address of data section in ROM (add reloc offset) */
LA r29, _data_start /* get start address of data section in RAM */
LA r28, _data_size /* get size of RAM image */
bl copy_image /* copy initialized data section from ROM to RAM location */
start_rom_skip:
/*
* ROM startup: clear bss in SDRAM
*/
LWI r30, _bss_start /* get start address of bss section */
LWI r29, _bss_size /* get size of bss section */
bl clr_mem /* Clear the bss section */
/*
* ROM startup: jump to code copy in SDRAM
*/
LA r29, start_code_in_ram /* get compile time address of label */
mtlr r29
blr /* now further execution RAM */
start_code_in_ram:
/*
* call boot_card
*/
/* set stack pointer (common for RAM/ROM startup) */
LA r1, _text_start
addi r1, r1, -0x10 /* Set up stack pointer = beginning of text section - 0x10 */
/* clear arguments and do further init. in C (common for RAM/ROM startup) */
xor r3, r3, r3
xor r4, r4, r4 /* Clear argc and argv */
bl SYM (boot_card) /* Call the first C routine */
twiddle:
/* We don't expect to return from boot_card but if we do */
/* wait here for watchdog to kick us into hard reset */
b twiddle
copy_image:
mr r27, r28
srwi r28, r28, 2
mtctr r28
slwi r28, r28, 2
sub r27, r27, r28 /* maybe some residual bytes */
copy_image_word:
lswi r28, r30, 0x04
stswi r28, r29, 0x04 /* do word copy ROM -> RAM */
addi r30, r30, 0x04 /* increment source pointer */
addi r29, r29, 0x04 /* increment destination pointer */
bdnz copy_image_word /* decrement ctr and branch if not 0 */
cmpwi r27, 0x00 /* copy image finished ? */
beq copy_image_end;
mtctr r27 /* reload counter for residual bytes */
copy_image_byte:
lswi r28, r30, 0x01
stswi r28, r29, 0x01 /* do byte copy ROM -> RAM */
addi r30, r30, 0x01 /* increment source pointer */
addi r29, r29, 0x01 /* increment destination pointer */
bdnz copy_image_byte /* decrement ctr and branch if not 0 */
copy_image_end:
blr
clr_mem:
mr r28, r29
srwi r29, r29, 2
mtctr r29 /* set ctr reg */
slwi r29, r29, 2
sub r28, r28, r29 /* maybe some residual bytes */
xor r29, r29, r29
clr_mem_word:
stswi r29, r30, 0x04 /* store r29 (word) to r30 memory location */
addi r30, r30, 0x04 /* increment r30 */
bdnz clr_mem_word /* dec counter and loop */
cmpwi r28, 0x00 /* clear mem. finished ? */
beq clr_mem_end;
mtctr r28 /* reload counter for residual bytes */
clr_mem_byte:
stswi r29, r30, 0x01 /* store r29 (byte) to r30 memory location */
addi r30, r30, 0x01 /* update r30 */
bdnz clr_mem_byte /* dec counter and loop */
clr_mem_end:
blr /* return */

267
c/src/lib/libbsp/powerpc/gen83xx/startup/bspstart.c Normal file
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/*===============================================================*\
| Project: RTEMS generic MPC83xx BSP |
+-----------------------------------------------------------------+
| Copyright (c) 2007 |
| Embedded Brains GmbH |
| Obere Lagerstr. 30 |
| D-82178 Puchheim |
| Germany |
| rtems@embedded-brains.de |
+-----------------------------------------------------------------+
| The license and distribution terms for this file may be |
| found in the file LICENSE in this distribution or at |
| |
| http://www.rtems.com/license/LICENSE. |
| |
+-----------------------------------------------------------------+
| this file contains the BSP startup code |
\*===============================================================*/
#include <bsp.h>
#include <rtems/libio.h>
#include <rtems/libcsupport.h>
#include <rtems/powerpc/powerpc.h>
#include <rtems/score/thread.h>
#include <rtems/bspIo.h>
#include <libcpu/cpuIdent.h>
#include <libcpu/spr.h>
#include <bsp/irq.h>
#include <string.h>
SPR_RW(SPRG0)
SPR_RW(SPRG1)
/*
* The original table from the application (in ROM) and our copy of it with
* some changes. Configuration is defined in <confdefs.h>. Make sure that
* our configuration tables are uninitialized so that they get allocated in
* the .bss section (RAM).
*/
extern rtems_configuration_table Configuration;
extern unsigned long intrStackPtr;
rtems_configuration_table BSP_Configuration;
static char *BSP_heap_start, *BSP_heap_end;
rtems_cpu_table Cpu_table;
char *rtems_progname;
/*
* constants for c_clock driver:
* system bus frequency (for timebase etc)
* and
* Time base divisior: scaling value:
* BSP_time_base_divisor = TB ticks per millisecond/BSP_bus_frequency
*/
unsigned int BSP_bus_frequency = BSP_CSB_CLK_FRQ;
unsigned int BSP_time_base_divisor = 4000; /* 4 bus clicks per TB click */
/*
* Use the shared implementations of the following routines.
* Look in rtems/c/src/lib/libbsp/shared/bsppost.c and
* rtems/c/src/lib/libbsp/shared/bsplibc.c.
*/
void bsp_postdriver_hook(void);
void bsp_libc_init( void *, uint32_t, int );
extern void initialize_exceptions(void);
extern void cpu_init(void);
void BSP_panic(char *s)
{
printk("%s PANIC %s\n",_RTEMS_version, s);
/*
* FIXME: hang/restart system
*/
__asm__ __volatile ("sc");
}
void _BSP_Fatal_error(unsigned int v)
{
printk("%s PANIC ERROR %x\n",_RTEMS_version, v);
/*
* FIXME: hang/restart system
*/
__asm__ __volatile ("sc");
}
/*
* Function: bsp_pretasking_hook
* Created: 95/03/10
*
* Description:
* BSP pretasking hook. Called just before drivers are initialized.
* Used to setup libc and install any BSP extensions.
*
* NOTES:
* Must not use libc (to do io) from here, since drivers are
* not yet initialized.
*
*/
void
bsp_pretasking_hook(void)
{
/*
* initialize libc including the heap
*/
bsp_libc_init( BSP_heap_start,
BSP_heap_end - BSP_heap_start,
0);
#ifdef STACK_CHECKER_ON
/*
* Initialize the stack bounds checker
* We can either turn it on here or from the app.
*/
Stack_check_Initialize();
#endif
#ifdef RTEMS_DEBUG
rtems_debug_enable( RTEMS_DEBUG_ALL_MASK );
#endif
}
void bsp_predriver_hook(void)
{
}
void bsp_calc_mem_layout()
{
/*
* these labels (!) are defined in the linker command file
* or when the linker is invoked
* NOTE: the information(size) is the address of the object,
* not the object otself
*/
extern unsigned char TopRamReserved;
extern unsigned char _WorkspaceBase;
/*
* compute the memory layout:
* - first unused address is Workspace start
* - Heap starts at end of workspace
* - Heap ends at end of memory - reserved memory area
*/
BSP_Configuration.work_space_start = &_WorkspaceBase;
BSP_heap_start = ((char *)BSP_Configuration.work_space_start +
BSP_Configuration.work_space_size);
#if defined(HAS_UBOOT)
BSP_heap_end = (uboot_bdinfo_ptr->bi_memstart
+ uboot_bdinfo_ptr->bi_memsize
- (uint32_t)&TopRamReserved);
#else
BSP_heap_end = (void *)(RAM_END - (uint32_t)&TopRamReserved);
#endif
}
void bsp_start(void)
{
ppc_cpu_id_t myCpu;
ppc_cpu_revision_t myCpuRevision;
register unsigned char* intrStack;
/*
* Get CPU identification dynamically. Note that the get_ppc_cpu_type() function
* store the result in global variables so that it can be used latter...
*/
myCpu = get_ppc_cpu_type();
myCpuRevision = get_ppc_cpu_revision();
/*
* determine heap and workspace placement
*/
bsp_calc_mem_layout();
cpu_init();
/*
* Initialize some SPRG registers related to irq handling
*/
intrStack = (((unsigned char*)&intrStackPtr) - PPC_MINIMUM_STACK_FRAME_SIZE);
_write_SPRG1((unsigned int)intrStack);
/* Signal them that this BSP has fixed PR288 - eventually, this should go away */
_write_SPRG0(PPC_BSP_HAS_FIXED_PR288);
/*
* initialize the CPU table for this BSP
*/
Cpu_table.pretasking_hook = bsp_pretasking_hook; /* init libc, etc. */
Cpu_table.predriver_hook = bsp_predriver_hook; /* init PCI / RTC ... */
Cpu_table.postdriver_hook = bsp_postdriver_hook;
Cpu_table.clicks_per_usec = (BSP_CSB_CLK_FRQ/1000000);
Cpu_table.exceptions_in_RAM = TRUE;
if( Cpu_table.interrupt_stack_size < 4*1024 )
Cpu_table.interrupt_stack_size = 4 * 1024;
/*
* Install our own set of exception vectors
*/
initialize_exceptions();
/*
* Enable instruction and data caches. Do not force writethrough mode.
*/
#if INSTRUCTION_CACHE_ENABLE
rtems_cache_enable_instruction();
#endif
#if DATA_CACHE_ENABLE
rtems_cache_enable_data();
#endif
/*
* Allocate the memory for the RTEMS Work Space. This can come from
* a variety of places: hard coded address, malloc'ed from outside
* RTEMS world (e.g. simulator or primitive memory manager), or (as
* typically done by stock BSPs) by subtracting the required amount
* of work space from the last physical address on the CPU board.
*/
/*
* Initalize RTEMS IRQ system
*/
BSP_rtems_irq_mng_init(0);
#ifdef SHOW_MORE_INIT_SETTINGS
printk("Exit from bspstart\n");
#endif
}
/*
*
* _Thread_Idle_body
*
* Replaces the one in c/src/exec/score/src/threadidlebody.c
* The MSR[POW] bit is set to put the CPU into the low power mode
* defined in HID0. HID0 is set during starup in start.S.
*
*/
Thread _Thread_Idle_body(uint32_t ignored )
{
for(;;)
{
asm volatile("mfmsr 3; oris 3,3,4; sync; mtmsr 3; isync; ori 3,3,0; ori 3,3,0");
}
return 0;
}

216
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/*===============================================================*\
| Project: RTEMS generic MPC83xx BSP |
+-----------------------------------------------------------------+
| Partially based on the code references which are named below. |
| Adaptions, modifications, enhancements and any recent parts of |
| the code are: |
| Copyright (c) 2005 |
| Embedded Brains GmbH |
| Obere Lagerstr. 30 |
| D-82178 Puchheim |
| Germany |
| rtems@embedded-brains.de |
+-----------------------------------------------------------------+
| The license and distribution terms for this file may be |
| found in the file LICENSE in this distribution or at |
| |
| http://www.rtems.com/license/LICENSE. |
| |
+-----------------------------------------------------------------+
| this file contains the code to initialize the cpu |
\*===============================================================*/
/***********************************************************************/
/* */
/* Module: cpuinit.c */
/* Date: 07/17/2003 */
/* Purpose: RTEMS MPC5x00 C level startup code */
/* */
/*---------------------------------------------------------------------*/
/* */
/* Description: This file contains additional functions for */
/* initializing the MPC5x00 CPU */
/* */
/*---------------------------------------------------------------------*/
/* */
/* Code */
/* References: MPC8260ads additional CPU initialization */
/* Module: cpuinit.c */
/* Project: RTEMS 4.6.0pre1 / MCF8260ads BSP */
/* Version 1.1 */
/* Date: 10/22/2002 */
/* */
/* Author(s) / Copyright(s): */
/* */
/* Written by Jay Monkman (jmonkman@frasca.com) */
/* */
/*---------------------------------------------------------------------*/
/* */
/* Partially based on the code references which are named above. */
/* Adaptions, modifications, enhancements and any recent parts of */
/* the code are under the right of */
/* */
/* IPR Engineering, Dachauer Straße 38, D-80335 München */
/* Copyright(C) 2003 */
/* */
/*---------------------------------------------------------------------*/
/* */
/* IPR Engineering makes no representation or warranties with */
/* respect to the performance of this computer program, and */
/* specifically disclaims any responsibility for any damages, */
/* special or consequential, connected with the use of this program. */
/* */
/*---------------------------------------------------------------------*/
/* */
/* Version history: 1.0 */
/* */
/***********************************************************************/
#include <bsp.h>
#include <rtems/powerpc/registers.h>
#include <mpc83xx/mpc83xx.h>
#include <libcpu/mmu.h>
#include <libcpu/spr.h>
#include <string.h>
#define USE_IMMU
/* Macros for HID0 access */
#define SET_HID0(r) __asm__ volatile ("mtspr 0x3F0,%0\n" ::"r"(r))
#define GET_HID0(r) __asm__ volatile ("mfspr %0,0x3F0\n" :"=r"(r))
#define DBAT_MTSPR(val,name) __MTSPR(val,name);
#define SET_DBAT(n,uv,lv) {DBAT_MTSPR(lv,DBAT##n##L);DBAT_MTSPR(uv,DBAT##n##U);}
#if defined(USE_IMMU )
#define IBAT_MTSPR(val,name) __MTSPR(val,name);
#define SET_IBAT(n,uv,lv) {IBAT_MTSPR(lv,IBAT##n##L);IBAT_MTSPR(uv,IBAT##n##U);}
#endif
void calc_dbat_regvals(BAT *bat_ptr,
uint32_t base_addr,
uint32_t size,
boolean flg_w,
boolean flg_i,
boolean flg_m,
boolean flg_g,
boolean flg_bpp)
{
uint32_t block_mask;
uint32_t end_addr;
/*
* determine block mask, that overlaps the whole block
*/
end_addr = base_addr+size-1;
block_mask = ~0;
while ((end_addr & block_mask) != (base_addr & block_mask)) {
block_mask <<= 1;
}
bat_ptr->batu.bepi = base_addr >> (32-15);
bat_ptr->batu.bl = ~(block_mask >> (28-11));
bat_ptr->batu.vs = 1;
bat_ptr->batu.vp = 1;
bat_ptr->batl.brpn = base_addr >> (32-15);
bat_ptr->batl.w = flg_w;
bat_ptr->batl.i = flg_i;
bat_ptr->batl.m = flg_m;
bat_ptr->batl.g = flg_g;
bat_ptr->batl.pp = flg_bpp;
}
void clear_mmu_regs(void)
{
uint32_t i;
/*
* clear segment registers
*/
for (i = 0;i < 16;i++) {
asm volatile(" mtsrin %0, %1\n"::"r" (i * 0x1000),"r"(i<<(31-3)));
}
/*
* clear TLBs
*/
for (i = 0;i < 32;i++) {
asm volatile(" tlbie %0\n"::"r" (i << (31-19)));
}
}
void cpu_init(void)
{
register unsigned long reg;
BAT dbat,ibat;
/*
* clear MMU/Segment registers
*/
clear_mmu_regs();
/*
* clear caches
*/
GET_HID0(reg);
reg |= (HID0_ICFI | HID0_DCI);
SET_HID0(reg);
reg &= ~(HID0_ICFI | HID0_DCI);
SET_HID0(reg);
/*
* set up IBAT registers in MMU
*/
memset(&ibat,0,sizeof(ibat));
SET_IBAT(2,ibat.batu,ibat.batl);
SET_IBAT(3,ibat.batu,ibat.batl);
SET_IBAT(4,ibat.batu,ibat.batl);
SET_IBAT(5,ibat.batu,ibat.batl);
SET_IBAT(6,ibat.batu,ibat.batl);
SET_IBAT(7,ibat.batu,ibat.batl);
calc_dbat_regvals(&ibat,RAM_START,RAM_SIZE,0,0,0,0,BPP_RX);
SET_IBAT(0,ibat.batu,ibat.batl);
calc_dbat_regvals(&ibat,ROM_START,ROM_SIZE,0,0,0,0,BPP_RX);
SET_IBAT(1,ibat.batu,ibat.batl);
/*
* set up DBAT registers in MMU
*/
memset(&dbat,0,sizeof(dbat));
SET_DBAT(3,dbat.batu,dbat.batl);
SET_DBAT(4,dbat.batu,dbat.batl);
SET_DBAT(5,dbat.batu,dbat.batl);
SET_DBAT(6,dbat.batu,dbat.batl);
SET_DBAT(7,dbat.batu,dbat.batl);
calc_dbat_regvals(&dbat,RAM_START,RAM_SIZE,1,0,1,0,BPP_RW);
SET_DBAT(0,dbat.batu,dbat.batl);
calc_dbat_regvals(&dbat,ROM_START,ROM_SIZE,1,0,1,0,BPP_RX);
SET_DBAT(1,dbat.batu,dbat.batl);
calc_dbat_regvals(&dbat,IMMRBAR,1024*1024,1,1,1,1,BPP_RW);
SET_DBAT(2,dbat.batu,dbat.batl);
/*
* enable data/instruction MMU in MSR
*/
_write_MSR(_read_MSR() | MSR_DR/* | MSR_IR*/);
/*
* enable FPU in MSR
*/
_write_MSR(_read_MSR() | MSR_FP);
/*
* in HID0:
* - enable dynamic power management
* - enable machine check interrupts
*/
GET_HID0(reg);
reg |= (HID0_EMCP | HID0_DPM) ;
SET_HID0(reg);
/*
* enable timebase clock
*/
mpc83xx.syscon.spcr |= M83xx_SYSCON_SPCR_TBEN;
}

324
c/src/lib/libbsp/powerpc/gen83xx/startup/linkcmds.mpc8349eamds Normal file
View File

@@ -0,0 +1,324 @@
/*
* This file contains directives for the GNU linker which are specific
* to a gen8349eamds board
*
* linkcmds,v 1.3 2003/01/20 19:53:27 joel Exp
*/
OUTPUT_FORMAT("elf32-powerpc", "elf32-powerpc",
"elf32-powerpc")
OUTPUT_ARCH(powerpc)
ENTRY(start)
/*
* Declare some sizes.
* XXX: The assignment of ". += XyzSize;" fails in older gld's if the
* number used there is not constant. If this happens to you, edit
* the lines marked XXX below to use a constant value.
*/
HeapSize = DEFINED(HeapSize) ? HeapSize : 0x6800000; /* 104M Heap */
StackSize = DEFINED(StackSize) ? StackSize : 0x80000; /* 512 kB */
WorkSpaceSize = DEFINED(WorkSpaceSize) ? WorkSpaceSize : 0x80000; /* 512k */
RamDiskSize = DEFINED(RamDiskSize) ? RamDiskSize : 0x80000; /* 512 ram disk */
/*
* optionally reserve additional space
*/
TopRamReserved = DEFINED(TopRamReserved) ? TopRamReserved : 0;
MEMORY
{
ram : org = 0x0, l = 256M
mpc83xx_regs : org = 0xE0000000, l = 256k
}
SECTIONS
{
mpc83xx_regs (NOLOAD) :
{
IMMRBAR = .;
*mpc83xx_regs*(*)
} > mpc83xx_regs
.vectors 0x100 :
{
*(.vectors)
}
> ram
/*
* The stack will live in this area - between the vectors and
* the text section.
*/
.text 0x10000:
{
_textbase = .;
text.start = .;
/* Entry point is the .entry section */
*(.entry)
*(.entry2)
/* Actual Code */
*(.text*)
*(.rodata*)
*(.rodata1)
/*
* Special FreeBSD sysctl sections.
*/
. = ALIGN (16);
__start_set_sysctl_set = .;
*(set_sysctl_*);
__stop_set_sysctl_set = ABSOLUTE(.);
*(set_domain_*);
*(set_pseudo_*);
/* C++ constructors/destructors */
*(.gnu.linkonce.t*)
/* Initialization and finalization code.
*
* Various files can provide initialization and finalization functions.
* The bodies of these functions are in .init and .fini sections. We
* accumulate the bodies here, and prepend function prologues from
* ecrti.o and function epilogues from ecrtn.o. ecrti.o must be linked
* first; ecrtn.o must be linked last. Because these are wildcards, it
* doesn't matter if the user does not actually link against ecrti.o and
* ecrtn.o; the linker won't look for a file to match a wildcard. The
* wildcard also means that it doesn't matter which directory ecrti.o
* and ecrtn.o are in.
*/
PROVIDE (_init = .);
*ecrti.o(.init)
*(.init)
*ecrtn.o(.init)
PROVIDE (_fini = .);
*ecrti.o(.fini)
*(.fini)
*ecrtn.o(.init)
/*
* C++ constructors and destructors for static objects.
* PowerPC EABI does not use crtstuff yet, so we build "old-style"
* constructor and destructor lists that begin with the list lenght
* end terminate with a NULL entry.
*/
PROVIDE (__CTOR_LIST__ = .);
*crtbegin.o(.ctors)
*(.ctors)
*crtend.o(.ctors)
LONG(0)
PROVIDE (__CTOR_END__ = .);
PROVIDE (__DTOR_LIST__ = .);
*crtbegin.o(.dtors)
*(.dtors)
*crtend.o(.dtors)
LONG(0)
PROVIDE (__DTOR_END__ = .);
/* Exception frame info */
*(.eh_frame)
/* Miscellaneous read-only data */
_rodata_start = . ;
*(.gnu.linkonce.r*)
*(.lit)
*(.shdata)
*(.rodata)
*(.rodata1)
*(.descriptors)
*(rom_ver)
_erodata = .;
PROVIDE (__EXCEPT_START__ = .);
*(.gcc_except_table)
PROVIDE (__EXCEPT_END__ = .);
__GOT_START__ = .;
s.got = .;
*(.got.plt)
*(.got)
*(.got1)
PROVIDE (__GOT2_START__ = .);
PROVIDE (_GOT2_START_ = .);
*(.got2)
PROVIDE (__GOT2_END__ = .);
PROVIDE (_GOT2_END_ = .);
PROVIDE (__FIXUP_START__ = .);
PROVIDE (_FIXUP_START_ = .);
*(.fixup)
PROVIDE (_FIXUP_END_ = .);
PROVIDE (__FIXUP_END__ = .);
/* Various possible names for the end of the .text section */
etext = ALIGN(0x10);
_etext = .;
_endtext = .;
text.end = .;
PROVIDE (etext = .);
PROVIDE (__etext = .);
} > ram
.jcr : { KEEP (*(.jcr)) } > ram
.rel.dyn : {
*(.rel.init)
*(.rel.text .rel.text.* .rel.gnu.linkonce.t.*)
*(.rel.fini)
*(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*)
*(.rel.data.rel.ro* .rel.gnu.linkonce.d.rel.ro.*)
*(.rel.data .rel.data.* .rel.gnu.linkonce.d.*)
*(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*)
*(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*)
*(.rel.ctors)
*(.rel.dtors)
*(.rel.got)
*(.rel.sdata .rel.sdata.* .rel.gnu.linkonce.s.*)
*(.rel.sbss .rel.sbss.* .rel.gnu.linkonce.sb.*)
*(.rel.sdata2 .rel.sdata2.* .rel.gnu.linkonce.s2.*)
*(.rel.sbss2 .rel.sbss2.* .rel.gnu.linkonce.sb2.*)
*(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*)
} >ram
.rela.dyn : {
*(.rela.init)
*(.rela.text .rela.text.* .rela.gnu.linkonce.t.*)
*(.rela.fini)
*(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*)
*(.rela.data .rela.data.* .rela.gnu.linkonce.d.*)
*(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*)
*(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*)
*(.rela.ctors)
*(.rela.dtors)
*(.rela.got)
*(.rela.got1)
*(.rela.got2)
*(.rela.sdata .rela.sdata.* .rela.gnu.linkonce.s.*)
*(.rela.sbss .rela.sbss.* .rela.gnu.linkonce.sb.*)
*(.rela.sdata2 .rela.sdata2.* .rela.gnu.linkonce.s2.*)
*(.rela.sbss2 .rela.sbss2.* .rela.gnu.linkonce.sb2.*)
*(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*)
} >ram
PROVIDE (__SDATA2_START__ = .);
.sdata2 : { *(.sdata2) *(.gnu.linkonce.s2.*) } >ram
.sbss2 : { *(.sbss2) *(.gnu.linkonce.sb2.*) } >ram
PROVIDE (__SBSS2_END__ = .);
.sbss2 : { *(.sbss2) } >ram
PROVIDE (__SBSS2_END__ = .);
/* R/W Data */
.data ( . ) :
{
. = ALIGN (4);
data.start = .;
*(.data)
*(.data1)
*(.data.* .gnu.linkonce.d.*)
PROVIDE (__SDATA_START__ = .);
*(.sdata*)
*(.gnu.linkonce.s.*)
data.end = .;
} > ram
__SBSS_START__ = .;
.bss :
{
bss.start = .;
*(.bss .bss* .gnu.linkonce.b*)
*(.sbss*) *(COMMON)
. = ALIGN(4);
bss.end = .;
} > ram
__SBSS_END__ = .;
PROVIDE(_bss_start = ADDR(.bss));
PROVIDE(_bss_size = SIZEOF(.bss));
PROVIDE(_data_start = ADDR(.data));
PROVIDE(_data_size = SIZEOF(.data));
PROVIDE(_text_start = ADDR(.text));
PROVIDE(_text_size = SIZEOF(.text));
PROVIDE(_end = data.end);
.gzipmalloc : {
. = ALIGN (16);
_startmalloc = .;
} >ram
/*
* Interrupt stack setup
*/
IntrStack_start = ALIGN(0x10);
. += 0x4000;
intrStack = .;
PROVIDE(intrStackPtr = intrStack);
_WorkspaceBase = .;
__WorkspaceBase = .;
. += WorkSpaceSize;
_RamDiskBase = .;
__RamDiskBase = .;
. += RamDiskSize;
_RamDiskEnd = .;
__RamDiskEnd = .;
PROVIDE( _RamDiskSize = _RamDiskEnd - _RamDiskBase );
_HeapStart = .;
__HeapStart = .;
. += HeapSize;
_HeapEnd = .;
__HeapEnd = .;
clear_end = .;
/* Sections for compressed .text and .data */
/* after the .datarom section is an int specifying */
/* the length of the following compressed image */
/* Executes once then could get overwritten */
.textrom 0x100000 :
{
*(.textrom)
_endloader = .;
} > ram
.datarom :
{
_dr_start = .;
*(.datarom)
_dr_end = .;
} > ram
dr_len = _dr_end - _dr_start;
.line 0 : { *(.line) }
.debug 0 : { *(.debug) }
.debug_sfnames 0 : { *(.debug_sfnames) }
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
.debug_aregion 0 : { *(.debug_aregion) }
.debug_macinfo 0 : { *(.debug_macinfo) }
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
}

28
c/src/lib/libbsp/powerpc/gen83xx/startup/mpc83xx_regs.c Normal file
View File

@@ -0,0 +1,28 @@
/*===============================================================*\
| Project: RTEMS generic MPC83xx BSP |
+-----------------------------------------------------------------+
| Partially based on the code references which are named below. |
| Adaptions, modifications, enhancements and any recent parts of |
| the code are: |
| Copyright (c) 2005 |
| Embedded Brains GmbH |
| Obere Lagerstr. 30 |
| D-82178 Puchheim |
| Germany |
| rtems@embedded-brains.de |
+-----------------------------------------------------------------+
| The license and distribution terms for this file may be |
| found in the file LICENSE in this distribution or at |
| |
| http://www.rtems.com/license/LICENSE. |
| |
+-----------------------------------------------------------------+
| this file places the mpc83xx registers into a special section |
\*===============================================================*/
#include <mpc83xx/mpc83xx.h>
/*
* this uninitialized variable will be overlayed to the hardware
* registers in the linker command file
*/
m83xxRegisters_t mpc83xx;

18
c/src/lib/libbsp/powerpc/shared/irq/irq_asm.S
View File

@@ -47,6 +47,24 @@ SYM (decrementer_exception_vector_prolog_code):
decrementer_exception_vector_prolog_code_size = . - decrementer_exception_vector_prolog_code decrementer_exception_vector_prolog_code_size = . - decrementer_exception_vector_prolog_code
#endif #endif
#if defined(ASM_SYSMGMT_VECTOR)
PUBLIC_VAR(sysmgmt_exception_vector_prolog_code)
SYM (sysmgmt_exception_vector_prolog_code):
/*
* let room for exception frame
*/
stwu r1, - (EXCEPTION_FRAME_END)(r1)
stw r4, GPR4_OFFSET(r1)
li r4, ASM_SYSMGMT_VECTOR
ba shared_raw_irq_code_entry
PUBLIC_VAR (sysmgmt_exception_vector_prolog_code_size)
sysmgmt_exception_vector_prolog_code_size = . - sysmgmt_exception_vector_prolog_code
#endif
#if defined(ASM_PIT_VECTOR) #if defined(ASM_PIT_VECTOR)
PUBLIC_VAR(pit_exception_vector_prolog_code) PUBLIC_VAR(pit_exception_vector_prolog_code)

10
c/src/lib/libbsp/powerpc/shared/vectors/vectors.h
View File

@@ -87,12 +87,22 @@ extern unsigned int tgpr_clr_exception_vector_code_prolog_size[];
*/ */
extern void external_exception_vector_prolog_code(); extern void external_exception_vector_prolog_code();
extern unsigned int external_exception_vector_prolog_code_size[]; extern unsigned int external_exception_vector_prolog_code_size[];
#if defined(ASM_DEC_VECTOR)
extern void decrementer_exception_vector_prolog_code(); extern void decrementer_exception_vector_prolog_code();
extern unsigned int decrementer_exception_vector_prolog_code_size[]; extern unsigned int decrementer_exception_vector_prolog_code_size[];
#endif
#if defined(ASM_SYSMGMT_VECTOR)
extern void sysmgmt_exception_vector_prolog_code();
extern unsigned int sysmgmt_exception_vector_prolog_code_size[];
#endif
#if defined(ASM_PIT_VECTOR)
extern void pit_exception_vector_prolog_code(); extern void pit_exception_vector_prolog_code();
extern unsigned int pit_exception_vector_prolog_code_size[]; extern unsigned int pit_exception_vector_prolog_code_size[];
#endif
#if defined(ASM_FIT_VECTOR)
extern void fit_exception_vector_prolog_code(); extern void fit_exception_vector_prolog_code();
extern unsigned int fit_exception_vector_prolog_code_size[]; extern unsigned int fit_exception_vector_prolog_code_size[];
#endif
/* codemove is like memmove, but it also gets the cache line size /* codemove is like memmove, but it also gets the cache line size
* as 4th parameter to synchronize them. If this last parameter is * as 4th parameter to synchronize them. If this last parameter is

5
c/src/lib/libbsp/powerpc/shared/vectors/vectors_init.c
View File

@@ -173,6 +173,11 @@ void initialize_exceptions()
switch ( get_ppc_cpu_type() ) { switch ( get_ppc_cpu_type() ) {
case PPC_603e: case PPC_603e:
case PPC_603ev:
case PPC_603le:
case PPC_e300c1:
case PPC_e300c2:
case PPC_e300c3:
case PPC_8240: case PPC_8240:
has_shadowed_gprs = 1; has_shadowed_gprs = 1;
default: break; default: break;

18
c/src/lib/libbsp/powerpc/virtex/.cvsignore
View File

@@ -1,14 +1,8 @@
aclocal.m4
autom4te*.cache
config.cache
config.guess
config.log
config.status
config.sub
configure
depcomp
install-sh
Makefile Makefile
Makefile.in Makefile.in
missing aclocal.m4
mkinstalldirs autom4te.cache
config.cache
config.log
config.status
configure

4
c/src/lib/libbsp/powerpc/virtex/ChangeLog
View File

@@ -1,3 +1,7 @@
2007-07-10 Thomas Doerfler <Thomas.Doerfler@embedded-brains.de>
* startup/linkcmds.dl:
removed
2007-07-05 Thomas Doerfler <Thomas.Doerfler@embedded-brains.de> 2007-07-05 Thomas Doerfler <Thomas.Doerfler@embedded-brains.de>
* include/bsp.h: * include/bsp.h:

22
c/src/lib/libbsp/powerpc/virtex/Makefile.am
View File

@@ -11,6 +11,8 @@ dist_project_lib_DATA = bsp_specs
include_HEADERS = include/bsp.h include_HEADERS = include/bsp.h
include_HEADERS += include/tm27.h include_HEADERS += include/tm27.h
include_HEADERS += include/xparameters_dflt.h
include_HEADERS += network/xiltemac.h
nodist_include_HEADERS = include/bspopts.h nodist_include_HEADERS = include/bspopts.h
DISTCLEANFILES = include/bspopts.h DISTCLEANFILES = include/bspopts.h
@@ -21,7 +23,13 @@ include_bspdir = $(includedir)/bsp
include_HEADERS += include/coverhd.h include_HEADERS += include/coverhd.h
dist_project_lib_DATA += startup/linkcmds startup/linkcmds.dl EXTRA_DIST = ../../powerpc/shared/start/rtems_crti.S
rtems_crti.$(OBJEXT): ../../powerpc/shared/start/rtems_crti.S
$(CPPASCOMPILE) -o $@ -c $<
project_lib_DATA = rtems_crti.$(OBJEXT)
dist_project_lib_DATA += startup/linkcmds
noinst_PROGRAMS += startup.rel noinst_PROGRAMS += startup.rel
startup_rel_SOURCES = startup/bspclean.c ../../shared/bsplibc.c \ startup_rel_SOURCES = startup/bspclean.c ../../shared/bsplibc.c \
@@ -68,16 +76,6 @@ noinst_PROGRAMS += network.rel
network_rel_SOURCES = network/xiltemac.c network_rel_SOURCES = network/xiltemac.c
network_rel_CPPFLAGS = $(AM_CPPFLAGS) network_rel_CPPFLAGS = $(AM_CPPFLAGS)
network_rel_LDFLAGS = $(RTEMS_RELLDFLAGS) network_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
##RSG Start
## include_HEADERS += include/xiltemac.h
#noinst_PROGRAMS += xiltemac.rel
#xiltemac_rel_SOURCES = network/xiltemac.c
#xiltemac_rel_CPPFLAGS = -D__INSIDE_RTEMS_BSD_TCPIP_STACK__ $(AM_CPPFLAGS) -O0 -g
#xiltemac_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
##RSG End
endif endif
noinst_LIBRARIES = libbsp.a noinst_LIBRARIES = libbsp.a
@@ -93,7 +91,7 @@ libbsp_a_LIBADD += ../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
../../../libcpu/@RTEMS_CPU@/ppc403/timer.rel \ ../../../libcpu/@RTEMS_CPU@/ppc403/timer.rel \
../../../libcpu/@RTEMS_CPU@/ppc403/tty_drv.rel ../../../libcpu/@RTEMS_CPU@/ppc403/tty_drv.rel
EXTRA_DIST = times EXTRA_DIST += times
include $(srcdir)/preinstall.am include $(srcdir)/preinstall.am
include $(top_srcdir)/../../../../automake/local.am include $(top_srcdir)/../../../../automake/local.am

6
c/src/lib/libbsp/powerpc/virtex/bsp_specs
View File

@@ -3,12 +3,10 @@
%rename link old_link %rename link old_link
*startfile: *startfile:
%{!qrtems: %(old_startfile)} %{!nostdlib: %{qrtems: \ %{!qrtems: %(old_startfile)} %{!nostdlib: %{qrtems: ecrti%O%s rtems_crti%O%s crtbegin.o%s}}
%{!qrtems_debug: } \
%{qrtems_debug: }ecrti%O%s}}
*endfile: *endfile:
%{!qrtems: %(old_endfile)} %{qrtems: ecrtn%O%s} %{!qrtems: %(old_endfile)} %{qrtems: crtend.o%s ecrtn.o%s}
*link: *link:
%{!qrtems: %(old_link)} %{qrtems: -dc -dp -u __vectors -u download_entry -N } %{!qrtems: %(old_link)} %{qrtems: -dc -dp -u __vectors -u download_entry -N }

78
c/src/lib/libbsp/powerpc/virtex/preinstall.am
View File

@@ -8,18 +8,23 @@ endif
PREINSTALL_DIRS = PREINSTALL_DIRS =
DISTCLEANFILES += $(PREINSTALL_DIRS) DISTCLEANFILES += $(PREINSTALL_DIRS)
all-local: $(TMPINSTALL_FILES)
TMPINSTALL_FILES =
CLEANFILES = $(TMPINSTALL_FILES)
all-am: $(PREINSTALL_FILES) all-am: $(PREINSTALL_FILES)
PREINSTALL_FILES = PREINSTALL_FILES =
CLEANFILES = $(PREINSTALL_FILES) CLEANFILES += $(PREINSTALL_FILES)
$(PROJECT_LIB)/$(dirstamp): $(PROJECT_LIB)/$(dirstamp):
@$(mkdir_p) $(PROJECT_LIB) @$(MKDIR_P) $(PROJECT_LIB)
@: > $(PROJECT_LIB)/$(dirstamp) @: > $(PROJECT_LIB)/$(dirstamp)
PREINSTALL_DIRS += $(PROJECT_LIB)/$(dirstamp) PREINSTALL_DIRS += $(PROJECT_LIB)/$(dirstamp)
$(PROJECT_INCLUDE)/$(dirstamp): $(PROJECT_INCLUDE)/$(dirstamp):
@$(mkdir_p) $(PROJECT_INCLUDE) @$(MKDIR_P) $(PROJECT_INCLUDE)
@: > $(PROJECT_INCLUDE)/$(dirstamp) @: > $(PROJECT_INCLUDE)/$(dirstamp)
PREINSTALL_DIRS += $(PROJECT_INCLUDE)/$(dirstamp) PREINSTALL_DIRS += $(PROJECT_INCLUDE)/$(dirstamp)
@@ -31,6 +36,39 @@ $(PROJECT_INCLUDE)/bsp.h: include/bsp.h $(PROJECT_INCLUDE)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp.h $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp.h PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp.h
$(PROJECT_INCLUDE)/tm27.h: include/tm27.h $(PROJECT_INCLUDE)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/tm27.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/tm27.h
$(PROJECT_INCLUDE)/xparameters_dflt.h: include/xparameters_dflt.h $(PROJECT_INCLUDE)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/xparameters_dflt.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/xparameters_dflt.h
$(PROJECT_INCLUDE)/xiltemac.h: network/xiltemac.h $(PROJECT_INCLUDE)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/xiltemac.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/xiltemac.h
$(PROJECT_INCLUDE)/bspopts.h: include/bspopts.h $(PROJECT_INCLUDE)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bspopts.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bspopts.h
$(PROJECT_INCLUDE)/bsp/$(dirstamp):
@$(MKDIR_P) $(PROJECT_INCLUDE)/bsp
@: > $(PROJECT_INCLUDE)/bsp/$(dirstamp)
PREINSTALL_DIRS += $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(PROJECT_INCLUDE)/coverhd.h: include/coverhd.h $(PROJECT_INCLUDE)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/coverhd.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/coverhd.h
$(PROJECT_LIB)/rtems_crti.$(OBJEXT): rtems_crti.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_LIB)/rtems_crti.$(OBJEXT)
TMPINSTALL_FILES += $(PROJECT_LIB)/rtems_crti.$(OBJEXT)
$(PROJECT_LIB)/linkcmds: startup/linkcmds $(PROJECT_LIB)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds
PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds
$(PROJECT_INCLUDE)/bsp/opbintctrl.h: include/opbintctrl.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) $(PROJECT_INCLUDE)/bsp/opbintctrl.h: include/opbintctrl.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/opbintctrl.h $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/opbintctrl.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/opbintctrl.h PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/opbintctrl.h
@@ -43,37 +81,3 @@ $(PROJECT_INCLUDE)/bsp/vectors.h: ../../powerpc/shared/vectors/vectors.h $(PROJE
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vectors.h $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vectors.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vectors.h PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vectors.h
$(PROJECT_INCLUDE)/xiltemac.h: network/xiltemac.h $(PROJECT_INCLUDE)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/xiltemac.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/xiltemac.h
$(PROJECT_INCLUDE)/xparameters_dflt.h: include/xparameters_dflt.h $(PROJECT_INCLUDE)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/xparameters_dflt.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/xparameters_dflt.h
$(PROJECT_INCLUDE)/tm27.h: include/tm27.h $(PROJECT_INCLUDE)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/tm27.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/tm27.h
$(PROJECT_INCLUDE)/bspopts.h: include/bspopts.h $(PROJECT_INCLUDE)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bspopts.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bspopts.h
$(PROJECT_INCLUDE)/coverhd.h: include/coverhd.h $(PROJECT_INCLUDE)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/coverhd.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/coverhd.h
$(PROJECT_INCLUDE)/bsp/$(dirstamp):
@$(MKDIR_P) $(PROJECT_INCLUDE)/bsp
@: > $(PROJECT_INCLUDE)/bsp/$(dirstamp)
PREINSTALL_DIRS += $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(PROJECT_LIB)/linkcmds: startup/linkcmds $(PROJECT_LIB)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds
PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds
$(PROJECT_LIB)/linkcmds.dl: startup/linkcmds.dl $(PROJECT_LIB)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.dl
PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.dl

232
c/src/lib/libbsp/powerpc/virtex/startup/linkcmds
View File

@@ -1,4 +1,4 @@
/* Greg modifications /*
* This file contains directives for the GNU linker which are specific * This file contains directives for the GNU linker which are specific
* to the virtex * to the virtex
* This file is intended to be used together with dlentry.s * This file is intended to be used together with dlentry.s
@@ -46,99 +46,228 @@ SECTIONS
*(set_domain_*); *(set_domain_*);
*(set_pseudo_*); *(set_pseudo_*);
*(.eh_frame) /* C++ constructors/destructors */
*(.gnu.linkonce.r*)
*(.descriptors)
*(rom_ver)
etext = ALIGN(0x10);
_etext = .;
*(.gnu.linkonce.t*) *(.gnu.linkonce.t*)
__CTOR_LIST__ = .; /* Initialization and finalization code.
LONG((__CTOR_END__ - __CTOR_LIST__) / 4 - 2) *
* Various files can provide initialization and finalization functions.
* The bodies of these functions are in .init and .fini sections. We
* accumulate the bodies here, and prepend function prologues from
* ecrti.o and function epilogues from ecrtn.o. ecrti.o must be linked
* first; ecrtn.o must be linked last. Because these are wildcards, it
* doesn't matter if the user does not actually link against ecrti.o and
* ecrtn.o; the linker won't look for a file to match a wildcard. The
* wildcard also means that it doesn't matter which directory ecrti.o
* and ecrtn.o are in.
*/
PROVIDE (_init = .);
*ecrti.o(.init)
*(.init)
*ecrtn.o(.init)
PROVIDE (_fini = .);
*ecrti.o(.fini)
*(.fini)
*ecrtn.o(.init)
/*
* C++ constructors and destructors for static objects.
* PowerPC EABI does not use crtstuff yet, so we build "old-style"
* constructor and destructor lists that begin with the list lenght
* end terminate with a NULL entry.
*/
PROVIDE (__CTOR_LIST__ = .);
*crtbegin.o(.ctors)
*(.ctors) *(.ctors)
*crtend.o(.ctors)
LONG(0) LONG(0)
__CTOR_END__ = .; PROVIDE (__CTOR_END__ = .);
__DTOR_LIST__ = .; PROVIDE (__DTOR_LIST__ = .);
LONG((__DTOR_END__ - __DTOR_LIST__) / 4 - 2) *crtbegin.o(.dtors)
*(.dtors) *(.dtors)
*crtend.o(.dtors)
LONG(0) LONG(0)
__DTOR_END__ = .; PROVIDE (__DTOR_END__ = .);
/* Exception frame info */
*(.eh_frame)
/* Miscellaneous read-only data */
_rodata_start = . ;
*(.gnu.linkonce.r*)
*(.lit) *(.lit)
*(.shdata) *(.shdata)
_init = .; __init = .; *(.init) *(.rodata)
_fini = .; __fini = .; *(.fini) *(.rodata1)
_endtext = ALIGN(0x10); *(.descriptors)
text.end = .; *(rom_ver)
} > RAM _erodata = .;
text.size = text.end - text.start;
/* R/W Data */
.data :
{
*(.data)
*(.data1)
*(.data.* .gnu.linkonce.d*)
PROVIDE (__SDATA_START__ = .);
*(.sdata*)
*(.gnu.linkonce.s.*)
} > RAM
PROVIDE (__EXCEPT_START__ = .); PROVIDE (__EXCEPT_START__ = .);
.gcc_except_table :
{
*(.gcc_except_table) *(.gcc_except_table)
} >RAM
PROVIDE (__EXCEPT_END__ = .); PROVIDE (__EXCEPT_END__ = .);
__GOT_START__ = .; __GOT_START__ = .;
.got :
{
s.got = .; s.got = .;
*(.got.plt) *(.got) *(.got.plt)
} > RAM *(.got)
__GOT_END__ = .;
.got1 :
{
*(.got1) *(.got1)
} >RAM
PROVIDE (__GOT2_START__ = .); PROVIDE (__GOT2_START__ = .);
PROVIDE (_GOT2_START_ = .); PROVIDE (_GOT2_START_ = .);
.got2 :
{
*(.got2) *(.got2)
} >RAM
PROVIDE (__GOT2_END__ = .); PROVIDE (__GOT2_END__ = .);
PROVIDE (_GOT2_END_ = .); PROVIDE (_GOT2_END_ = .);
PROVIDE (__FIXUP_START__ = .); PROVIDE (__FIXUP_START__ = .);
PROVIDE (_FIXUP_START_ = .); PROVIDE (_FIXUP_START_ = .);
.fixup : { *(.fixup) } >RAM *(.fixup)
PROVIDE (_FIXUP_END_ = .); PROVIDE (_FIXUP_END_ = .);
PROVIDE (__FIXUP_END__ = .); PROVIDE (__FIXUP_END__ = .);
/* Various possible names for the end of the .text section */
etext = ALIGN(0x10);
_etext = .;
*(.lit)
*(.shdata)
_endtext = ALIGN(0x10);
text.end = .;
text.size = text.end - text.start;
} >RAM
text.size = text.end - text.start;
.jcr : { KEEP (*(.jcr)) } >RAM
.rel.dyn : {
*(.rel.init)
*(.rel.text .rel.text.* .rel.gnu.linkonce.t.*)
*(.rel.fini)
*(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*)
*(.rel.data.rel.ro* .rel.gnu.linkonce.d.rel.ro.*)
*(.rel.data .rel.data.* .rel.gnu.linkonce.d.*)
*(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*)
*(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*)
*(.rel.ctors)
*(.rel.dtors)
*(.rel.got)
*(.rel.sdata .rel.sdata.* .rel.gnu.linkonce.s.*)
*(.rel.sbss .rel.sbss.* .rel.gnu.linkonce.sb.*)
*(.rel.sdata2 .rel.sdata2.* .rel.gnu.linkonce.s2.*)
*(.rel.sbss2 .rel.sbss2.* .rel.gnu.linkonce.sb2.*)
*(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*)
} >RAM
.rela.dyn : {
*(.rela.init)
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*(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*)
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*(.rela.sdata .rela.sdata.* .rela.gnu.linkonce.s.*)
*(.rela.sbss .rela.sbss.* .rela.gnu.linkonce.sb.*)
*(.rela.sdata2 .rela.sdata2.* .rela.gnu.linkonce.s2.*)
*(.rela.sbss2 .rela.sbss2.* .rela.gnu.linkonce.sb2.*)
*(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*)
} >RAM
PROVIDE (__SDATA2_START__ = .); PROVIDE (__SDATA2_START__ = .);
.sdata2 : { *(.sdata2) *(.gnu.linkonce.s2.*) } >RAM .sdata2 : { *(.sdata2) *(.gnu.linkonce.s2.*) } >RAM
.sbss2 : { *(.sbss2) *(.gnu.linkonce.sb2.*) } >RAM .sbss2 : { *(.sbss2) *(.gnu.linkonce.sb2.*) } >RAM
PROVIDE (__SBSS2_END__ = .); PROVIDE (__SBSS2_END__ = .);
.sbss2 : { *(.sbss2) } >RAM
PROVIDE (__SBSS2_END__ = .);
/* R/W Data */
.data ( . ) :
{
. = ALIGN (4);
data.start = .;
*(.data)
*(.data1)
*(.data.* .gnu.linkonce.d.*)
PROVIDE (__SDATA_START__ = .);
*(.sdata*)
*(.gnu.linkonce.s.*)
data.end = .;
data.size = data.end - data.start;
} >RAM
__SBSS_START__ = .; __SBSS_START__ = .;
.bss : .bss :
{ {
bss.start = .; bss.start = .;
*(.bss .bss* .gnu.linkonce.b*) *(.bss .bss* .gnu.linkonce.b*)
*(.sbss*) *(COMMON) *(.sbss*) *(COMMON)
bss.end = ALIGN(4); . = ALIGN(4);
bss.end = .;
} >RAM
__SBSS_END__ = .;
__SBSS_START__ = .;
.bss :
{
bss.start = .;
*(.bss .bss* .gnu.linkonce.b*)
*(.sbss*) *(COMMON)
. = ALIGN(4);
bss.end = .;
bss.size = bss.end - bss.start; bss.size = bss.end - bss.start;
} >RAM } >RAM
__SBSS_END__ = .; __SBSS_END__ = .;
PROVIDE(_bss_start = ADDR(.bss));
PROVIDE(_bss_size = SIZEOF(.bss));
PROVIDE(bss.size = SIZEOF(.bss));
PROVIDE(_data_start = ADDR(.data));
PROVIDE(_data_size = SIZEOF(.data));
PROVIDE(_text_start = ADDR(.text));
PROVIDE(_text_size = SIZEOF(.text));
PROVIDE(_end = data.end);
.gzipmalloc : {
. = ALIGN (16);
_startmalloc = .;
} >RAM
/*
* Interrupt stack setup
*/
IntrStack_start = ALIGN(0x10);
. += 0x4000;
intrStack = .;
PROVIDE(intrStackPtr = intrStack);
/* Sections for compressed .text and .data */
/* after the .datarom section is an int specifying */
/* the length of the following compressed image */
/* Executes once then could get overwritten */
.textrom 0x100000 :
{
*(.textrom)
_endloader = .;
} >RAM
.datarom :
{
_dr_start = .;
*(.datarom)
_dr_end = .;
} >RAM
dr_len = _dr_end - _dr_start;
/* align bottom of 32k init stack at a 32k boundary */ /* align bottom of 32k init stack at a 32k boundary */
. = . + 0x4000; . = . + 0x4000;
. = ALIGN( 0x8000 ); . = ALIGN( 0x8000 );
@@ -165,5 +294,4 @@ SECTIONS
.debug_macinfo 0 : { *(.debug_macinfo) } .debug_macinfo 0 : { *(.debug_macinfo) }
.stab 0 : { *(.stab) } .stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) } .stabstr 0 : { *(.stabstr) }
} }

154
c/src/lib/libbsp/powerpc/virtex/startup/linkcmds.dl
View File

@@ -1,154 +0,0 @@
/*
* This file contains directives for the GNU linker which are specific
* to the helas403
* This file is intended to be used together with dlentry.s
* it will generate downloadable code
*
* $Id$
*/
OUTPUT_FORMAT("elf32-powerpc", "elf32-powerpc",
"elf32-powerpc")
OUTPUT_ARCH(powerpc)
ENTRY(download_entry)
MEMORY
{
RAM : ORIGIN = 0, LENGTH = 8M
FLASH : ORIGIN = 0xFFF00000, LENGTH = 512K
}
SECTIONS
{
.vectors : 0x00010100
{
*(.vectors)
} > RAM
.text :
{
text.start = . ;
*(.entry)
*(.entry2)
*(.text*)
*(.rodata)
*(.rodata1)
/*
* Special FreeBSD sysctl sections.
*/
. = ALIGN (16);
__start_set_sysctl_set = .;
*(set_sysctl_*);
__stop_set_sysctl_set = ABSOLUTE(.);
*(set_domain_*);
*(set_pseudo_*);
*.(eh_frame)
*(.descriptors)
*(rom_ver)
etext = ALIGN(0x10);
_etext = .;
__CTOR_LIST__ = .;
LONG((__CTOR_END__ - __CTOR_LIST__) / 4 - 2)
*(.ctors)
LONG(0)
__CTOR_END__ = .;
__DTOR_LIST__ = .;
LONG((__DTOR_END__ - __DTOR_LIST__) / 4 - 2)
*(.dtors)
LONG(0)
__DTOR_END__ = .;
*(.lit)
*(.shdata)
*(.init)
*(.fini)
_endtext = ALIGN(0x10);
text.end = .;
} > RAM
text.size = text.end - text.start;
/* R/W Data */
.data :
{
*(.data)
*(.data1)
PROVIDE (__SDATA_START__ = .);
*(.sdata*)
} > RAM
PROVIDE (__EXCEPT_START__ = .);
.gcc_except_table :
{
*(.gcc_except_table)
} >RAM
PROVIDE (__EXCEPT_END__ = .);
__GOT_START__ = .;
.got :
{
s.got = .;
*(.got.plt) *(.got)
} > RAM
__GOT_END__ = .;
.got1 :
{
*(.got1)
} >RAM
PROVIDE (__GOT2_START__ = .);
PROVIDE (_GOT2_START_ = .);
.got2 :
{
*(.got2)
} >RAM
PROVIDE (__GOT2_END__ = .);
PROVIDE (_GOT2_END_ = .);
PROVIDE (__FIXUP_START__ = .);
PROVIDE (_FIXUP_START_ = .);
.fixup : { *(.fixup) } >RAM
PROVIDE (_FIXUP_END_ = .);
PROVIDE (__FIXUP_END__ = .);
PROVIDE (__SDATA2_START__ = .);
.sdata2 : { *(.sdata2) } >RAM
.sbss2 : { *(.sbss2) } >RAM
PROVIDE (__SBSS2_END__ = .);
.sbss2 : { *(.sbss2) } >RAM
PROVIDE (__SBSS2_END__ = .);
__SBSS_START__ = .;
.bss :
{
bss.start = .;
*(.bss .bss* .gnu.linkonce.b*)
*(.sbss*) *(COMMON)
bss.end = ALIGN(4);
} > RAM
__SBSS_END__ = .;
bss.size = bss.end - bss.start;
PROVIDE(_end = bss.end);
.line 0 : { *(.line) }
.debug 0 : { *(.debug) }
.debug_sfnames 0 : { *(.debug_sfnames) }
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
.debug_aregion 0 : { *(.debug_aregion) }
.debug_macinfo 0 : { *(.debug_macinfo) }
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
}

6
c/src/lib/libcpu/powerpc/ChangeLog
View File

@@ -1,3 +1,9 @@
2007-07-09 Thomas Doerfler <Thomas.Doerfler@embedded-brains.de>
* configure.ac, Makefile.am, mpc83xx/include/mpc83xx.h,
* mpc83xx/network/tsec.c, mpc83xx/network/tsec.h :
added support for MPC83xx controllers
2007-07-05 Thomas Doerfler <Thomas.Doerfler@embedded-brains.de> 2007-07-05 Thomas Doerfler <Thomas.Doerfler@embedded-brains.de>
* configure.ac, Makefile.am: * configure.ac, Makefile.am:

12
c/src/lib/libcpu/powerpc/Makefile.am
View File

@@ -324,5 +324,17 @@ mpc8260_timer_rel_CPPFLAGS = $(AM_CPPFLAGS)
mpc8260_timer_rel_LDFLAGS = $(RTEMS_RELLDFLAGS) mpc8260_timer_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
endif endif
if mpc83xx
include_mpc83xxdir = $(includedir)/mpc83xx
include_mpc83xx_HEADERS = mpc83xx/include/mpc83xx.h
include_mpc83xx_HEADERS += mpc83xx/network/tsec.h
## mpc83xx/network
noinst_PROGRAMS += mpc83xx/tsec.rel
mpc83xx_tsec_rel_SOURCES = mpc83xx/network/tsec.c
mpc83xx_tsec_rel_CPPFLAGS = $(AM_CPPFLAGS)
mpc83xx_tsec_rel_CPPFLAGS += -D__INSIDE_RTEMS_BSD_TCPIP_STACK__ -D__BSD_VISIBLE
mpc83xx_tsec_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
endif
include $(srcdir)/preinstall.am include $(srcdir)/preinstall.am
include $(top_srcdir)/../../../automake/local.am include $(top_srcdir)/../../../automake/local.am

7
c/src/lib/libcpu/powerpc/configure.ac
View File

@@ -45,12 +45,13 @@ AM_CONDITIONAL(shared, \
|| test "$RTEMS_CPU_MODEL" = "ppc405" \ || test "$RTEMS_CPU_MODEL" = "ppc405" \
|| test "$RTEMS_CPU_MODEL" = "mpc604" \ || test "$RTEMS_CPU_MODEL" = "mpc604" \
|| test "$RTEMS_CPU_MODEL" = "mpc6xx" \ || test "$RTEMS_CPU_MODEL" = "mpc6xx" \
|| test "$RTEMS_CPU_MODEL" = "mpc8xx" \
|| test "$RTEMS_CPU_MODEL" = "mpc821" \ || test "$RTEMS_CPU_MODEL" = "mpc821" \
|| test "$RTEMS_CPU_MODEL" = "mpc860" \ || test "$RTEMS_CPU_MODEL" = "mpc860" \
|| test "$RTEMS_CPU_MODEL" = "mpc8240" \ || test "$RTEMS_CPU_MODEL" = "mpc8240" \
|| test "$RTEMS_CPU_MODEL" = "mpc8245" \ || test "$RTEMS_CPU_MODEL" = "mpc8245" \
|| test "$RTEMS_CPU_MODEL" = "mpc8260" \ || test "$RTEMS_CPU_MODEL" = "mpc8260" \
|| test "$RTEMS_CPU_MODEL" = "mpc8xx" ) || test "$RTEMS_CPU_MODEL" = "mpc83xx" )
## test on CPU type ## test on CPU type
AM_CONDITIONAL(mpc505, test "$RTEMS_CPU_MODEL" = "mpc505") AM_CONDITIONAL(mpc505, test "$RTEMS_CPU_MODEL" = "mpc505")
@@ -63,11 +64,13 @@ AM_CONDITIONAL(mpc6xx, test "$RTEMS_CPU_MODEL" = "mpc6xx" \
|| test "$RTEMS_CPU_MODEL" = "mpc7457" \ || test "$RTEMS_CPU_MODEL" = "mpc7457" \
|| test "$RTEMS_CPU_MODEL" = "mpc750" \ || test "$RTEMS_CPU_MODEL" = "mpc750" \
|| test "$RTEMS_CPU_MODEL" = "mpc8240" \ || test "$RTEMS_CPU_MODEL" = "mpc8240" \
|| test "$RTEMS_CPU_MODEL" = "mpc8245" ) || test "$RTEMS_CPU_MODEL" = "mpc8245" \
|| test "$RTEMS_CPU_MODEL" = "mpc83xx" )
AM_CONDITIONAL(mpc8xx, test "$RTEMS_CPU_MODEL" = "mpc8xx" \ AM_CONDITIONAL(mpc8xx, test "$RTEMS_CPU_MODEL" = "mpc8xx" \
|| test "$RTEMS_CPU_MODEL" = "mpc821" \ || test "$RTEMS_CPU_MODEL" = "mpc821" \
|| test "$RTEMS_CPU_MODEL" = "mpc860" ) || test "$RTEMS_CPU_MODEL" = "mpc860" )
AM_CONDITIONAL(mpc8260, test "$RTEMS_CPU_MODEL" = "mpc8260") AM_CONDITIONAL(mpc8260, test "$RTEMS_CPU_MODEL" = "mpc8260")
AM_CONDITIONAL(mpc83xx, test "$RTEMS_CPU_MODEL" = "mpc83xx")
# the ppc405 shares files with the ppc403 # the ppc405 shares files with the ppc403
AM_CONDITIONAL(ppc403,[test "$RTEMS_CPU_MODEL" = "ppc403" \ AM_CONDITIONAL(ppc403,[test "$RTEMS_CPU_MODEL" = "ppc403" \

1128
c/src/lib/libcpu/powerpc/mpc83xx/include/mpc83xx.h Normal file
View File

File diff suppressed because it is too large Load Diff

1930
c/src/lib/libcpu/powerpc/mpc83xx/network/tsec.c Normal file
View File

File diff suppressed because it is too large Load Diff

82
c/src/lib/libcpu/powerpc/mpc83xx/network/tsec.h Normal file
View File

@@ -0,0 +1,82 @@
/*===============================================================*\
| Project: RTEMS support for MPC83xx |
+-----------------------------------------------------------------+
| Copyright (c) 2007 |
| Embedded Brains GmbH |
| Obere Lagerstr. 30 |
| D-82178 Puchheim |
| Germany |
| rtems@embedded-brains.de |
+-----------------------------------------------------------------+
| The license and distribution terms for this file may be |
| found in the file LICENSE in this distribution or at |
| |
| http://www.rtems.com/license/LICENSE. |
| |
+-----------------------------------------------------------------+
| this file declares the MPC83xx TSEC networking driver |
\*===============================================================*/
#include <rtems/rtems_bsdnet.h>
/*=========================================================================*\
| Function: |
\*-------------------------------------------------------------------------*/
int mpc83xx_tsec_mdio_read
(
/*-------------------------------------------------------------------------*\
| Purpose: |
| read register of a phy |
+---------------------------------------------------------------------------+
| Input Parameters: |
\*-------------------------------------------------------------------------*/
int phy, /* PHY number to access or -1 */
void *uarg, /* unit argument */
unsigned reg, /* register address */
uint32_t *pval /* ptr to read buffer */
);
/*-------------------------------------------------------------------------*\
| Return Value: |
| 0, if ok, -1 if failed |
\*=========================================================================*/
/*=========================================================================*\
| Function: |
\*-------------------------------------------------------------------------*/
int mpc83xx_tsec_mdio_write
(
/*-------------------------------------------------------------------------*\
| Purpose: |
| write register of a phy |
+---------------------------------------------------------------------------+
| Input Parameters: |
\*-------------------------------------------------------------------------*/
int phy, /* PHY number to access or -1 */
void *uarg, /* unit argument */
unsigned reg, /* register address */
uint32_t val /* write value */
);
/*-------------------------------------------------------------------------*\
| Return Value: |
| 0, if ok, -1 if failed |
\*=========================================================================*/
/*=========================================================================*\
| Function: |
\*-------------------------------------------------------------------------*/
int rtems_mpc83xx_tsec_driver_attach_detach
(
/*-------------------------------------------------------------------------*\
| Purpose: |
| attach or detach the driver |
+---------------------------------------------------------------------------+
| Input Parameters: |
\*-------------------------------------------------------------------------*/
struct rtems_bsdnet_ifconfig *config, /* interface configuration */
int attaching /* 0 = detach, else attach */
);
/*-------------------------------------------------------------------------*\
| Return Value: |
| 1, if success |
\*=========================================================================*/

14
c/src/lib/libcpu/powerpc/preinstall.am
View File

@@ -192,3 +192,17 @@ $(PROJECT_INCLUDE)/mpc8260/mmu.h: mpc8260/include/mmu.h $(PROJECT_INCLUDE)/mpc82
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/mpc8260/mmu.h $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/mpc8260/mmu.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/mpc8260/mmu.h PREINSTALL_FILES += $(PROJECT_INCLUDE)/mpc8260/mmu.h
endif endif
if mpc83xx
$(PROJECT_INCLUDE)/mpc83xx/$(dirstamp):
@$(MKDIR_P) $(PROJECT_INCLUDE)/mpc83xx
@: > $(PROJECT_INCLUDE)/mpc83xx/$(dirstamp)
PREINSTALL_DIRS += $(PROJECT_INCLUDE)/mpc83xx/$(dirstamp)
$(PROJECT_INCLUDE)/mpc83xx/mpc83xx.h: mpc83xx/include/mpc83xx.h $(PROJECT_INCLUDE)/mpc83xx/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/mpc83xx/mpc83xx.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/mpc83xx/mpc83xx.h
$(PROJECT_INCLUDE)/mpc83xx/tsec.h: mpc83xx/network/tsec.h $(PROJECT_INCLUDE)/mpc83xx/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/mpc83xx/tsec.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/mpc83xx/tsec.h
endif

3
c/src/lib/libcpu/powerpc/shared/include/cpuIdent.h
View File

@@ -40,6 +40,9 @@ typedef enum
PPC_8240 = PPC_8260, PPC_8240 = PPC_8260,
PPC_8245 = 0x8081, PPC_8245 = 0x8081,
PPC_603le = 0x8082, /* 603le core, in MGT5100 and MPC5200 */ PPC_603le = 0x8082, /* 603le core, in MGT5100 and MPC5200 */
PPC_e300c1 = 0x8083, /* e300c1 core, in MPC83xx*/
PPC_e300c2 = 0x8084, /* e300c2 core */
PPC_e300c3 = 0x8085, /* e300c3 core */
PPC_PSIM = 0xfffe, /* GDB PowerPC simulator -- fake version */ PPC_PSIM = 0xfffe, /* GDB PowerPC simulator -- fake version */
PPC_UNKNOWN = 0xffff PPC_UNKNOWN = 0xffff
} ppc_cpu_id_t; } ppc_cpu_id_t;

95
c/src/lib/libcpu/powerpc/shared/src/cache.c
View File

@@ -8,7 +8,7 @@
#include <rtems.h> #include <rtems.h>
#include "cache_.h" #include "cache_.h"
#include <rtems/powerpc/registers.h>
/* /*
* CACHE MANAGER: The following functions are CPU-specific. * CACHE MANAGER: The following functions are CPU-specific.
@@ -19,7 +19,7 @@
* FIXME: Some functions simply have not been implemented. * FIXME: Some functions simply have not been implemented.
*/ */
#if defined(ppc603) || defined(mpc8260) /* And possibly others */ #if defined(ppc603) || defined(ppc603e) || defined(mpc8260) /* And possibly others */
/* Helpful macros */ /* Helpful macros */
#define PPC_Get_HID0( _value ) \ #define PPC_Get_HID0( _value ) \
@@ -49,7 +49,7 @@ void _CPU_cache_enable_data (
{ {
uint32_t value; uint32_t value;
PPC_Get_HID0( value ); PPC_Get_HID0( value );
value |= 0x00004000; /* set DCE bit */ value |= HID0_DCE; /* set DCE bit */
PPC_Set_HID0( value ); PPC_Set_HID0( value );
} }
@@ -58,10 +58,61 @@ void _CPU_cache_disable_data (
{ {
uint32_t value; uint32_t value;
PPC_Get_HID0( value ); PPC_Get_HID0( value );
value &= 0xFFFFBFFF; /* clear DCE bit */ value &= ~HID0_DCE; /* clear DCE bit */
PPC_Set_HID0( value ); PPC_Set_HID0( value );
} }
void _CPU_cache_invalidate_1_data_line(
const void * _address )
{
register const void *__address = _address;
asm volatile ( "dcbi 0,%0" :: "r"(__address) : "memory" );
}
void _CPU_cache_invalidate_entire_data (
void )
{
uint32_t value;
PPC_Get_HID0( value );
value |= HID0_DCI; /* set data flash invalidate bit */
PPC_Set_HID0( value );
value &= ~HID0_DCI; /* clear data flash invalidate bit */
PPC_Set_HID0( value );
}
void _CPU_cache_freeze_data (
void )
{
uint32_t value;
PPC_Get_HID0( value );
value |= HID0_DLOCK; /* set data cache lock bit */
PPC_Set_HID0( value );
}
void _CPU_cache_unfreeze_data (
void )
{
uint32_t value;
PPC_Get_HID0( value );
value &= ~HID0_DLOCK; /* set data cache lock bit */
PPC_Set_HID0( value );
}
void _CPU_cache_flush_1_data_line(
const void * _address )
{
register const void *__address = _address;
asm volatile ( "dcbf 0,%0" :: "r" (__address) : "memory" );
}
void _CPU_cache_flush_entire_data (
void )
{
/*
* FIXME: how can we do this?
*/
}
void _CPU_cache_enable_instruction ( void _CPU_cache_enable_instruction (
void ) void )
{ {
@@ -80,6 +131,42 @@ void _CPU_cache_disable_instruction (
PPC_Set_HID0( value ); PPC_Set_HID0( value );
} }
void _CPU_cache_invalidate_1_instruction_line(
const void * _address )
{
register const void *__address = _address;
asm volatile ( "icbi 0,%0" :: "r" (__address) : "memory");
}
void _CPU_cache_invalidate_entire_instruction (
void )
{
uint32_t value;
PPC_Get_HID0( value );
value |= HID0_ICFI; /* set data flash invalidate bit */
PPC_Set_HID0( value );
value &= ~HID0_ICFI; /* clear data flash invalidate bit */
PPC_Set_HID0( value );
}
void _CPU_cache_freeze_instruction (
void )
{
uint32_t value;
PPC_Get_HID0( value );
value |= HID0_ILOCK; /* set instruction cache lock bit */
PPC_Set_HID0( value );
}
void _CPU_cache_unfreeze_instruction (
void )
{
uint32_t value;
PPC_Get_HID0( value );
value &= ~HID0_ILOCK; /* set instruction cache lock bit */
PPC_Set_HID0( value );
}
#elif ( defined(mpx8xx) || defined(mpc860) || defined(mpc821) ) #elif ( defined(mpx8xx) || defined(mpc860) || defined(mpc821) )
#define mtspr(_spr,_reg) \ #define mtspr(_spr,_reg) \

14
c/src/lib/libcpu/powerpc/shared/src/cache_.h
View File

@@ -4,6 +4,11 @@
#ifndef __POWERPC_CACHE_h #ifndef __POWERPC_CACHE_h
#define __POWERPC_CACHE_h #define __POWERPC_CACHE_h
/*
* get definitions from the score/powerpc header
* about individual cache alignments
*/
#include <rtems/score/powerpc.h>
/* /*
* CACHE MANAGER: The following functions are CPU-specific. * CACHE MANAGER: The following functions are CPU-specific.
@@ -14,17 +19,16 @@
* FIXME: Some functions simply have not been implemented. * FIXME: Some functions simply have not been implemented.
*/ */
#if defined(ppc603) /* And possibly others */ #if defined(ppc603) || defined(ppc603e) || defined(mpc8260)
#define CPU_DATA_CACHE_ALIGNMENT PPC_CACHE_ALIGNMENT /* And possibly others */
#define CPU_INSTRUCTION_CACHE_ALIGNMENT PPC_CACHE_ALIGNMENT
#elif ( defined(mpc860) || defined(mpc821) ) #if defined(PPC_CACHE_ALIGNMENT)
#define CPU_DATA_CACHE_ALIGNMENT PPC_CACHE_ALIGNMENT #define CPU_DATA_CACHE_ALIGNMENT PPC_CACHE_ALIGNMENT
#define CPU_INSTRUCTION_CACHE_ALIGNMENT PPC_CACHE_ALIGNMENT #define CPU_INSTRUCTION_CACHE_ALIGNMENT PPC_CACHE_ALIGNMENT
#endif #endif
#endif
#include <libcpu/cache.h> #include <libcpu/cache.h>
#endif #endif

2
c/src/libchip/ide/ata.c
View File

@@ -1168,7 +1168,7 @@ ata_initialize(rtems_device_major_number major,
ata_irq_data.name = ata_irq_data.name =
IDE_Controller_Table[ctrl_minor].int_vec; IDE_Controller_Table[ctrl_minor].int_vec;
ata_irq_data.hdl = ata_interrupt_handler; ata_irq_data.hdl = ata_interrupt_handler;
ata_irq_data.handle = ctrl_minor; ata_irq_data.handle = (rtems_irq_hdl_param) ctrl_minor;
status = ((0 == BSP_install_rtems_irq_handler(&ata_irq_data)) status = ((0 == BSP_install_rtems_irq_handler(&ata_irq_data))
? RTEMS_INVALID_NUMBER ? RTEMS_INVALID_NUMBER

2
c/src/libchip/serial/ns16550.c
View File

@@ -205,7 +205,7 @@ NS16550_STATIC void ns16550_write_polled(
/* /*
* wait for transmitter holding register to be empty * wait for transmitter holding register to be empty
*/ */
iTimeout=1000; iTimeout=10000;
ucLineStatus = (*getReg)(pNS16550, NS16550_LINE_STATUS); ucLineStatus = (*getReg)(pNS16550, NS16550_LINE_STATUS);
while ((ucLineStatus & SP_LSR_THOLD) == 0) { while ((ucLineStatus & SP_LSR_THOLD) == 0) {
/* /*

2
cpukit/score/cpu/powerpc/rtems/score/powerpc.h
View File

@@ -144,6 +144,7 @@ extern "C" {
#define CPU_MODEL_NAME "PowerPC 603" #define CPU_MODEL_NAME "PowerPC 603"
#define PPC_ALIGNMENT 8 #define PPC_ALIGNMENT 8
#define PPC_CACHE_ALIGNMENT 16
#elif defined(ppc603e) #elif defined(ppc603e)
@@ -155,6 +156,7 @@ extern "C" {
*/ */
#define PPC_ALIGNMENT 8 #define PPC_ALIGNMENT 8
#define PPC_CACHE_ALIGNMENT 16
#elif defined(mpc604) #elif defined(mpc604)
/* /*

5
make/ChangeLog
View File

@@ -1,3 +1,8 @@
2007-07-09 Thomas Doerfler <Thomas.Doerfler@embedded-brains.de>
* custom/gen83xx.cfg, custom/mpc8349eamds: added file to support
MPC83xx controller based boards
2007-07-02 Thomas Doerfler <Thomas.Doerfler@embedded-brains.de> 2007-07-02 Thomas Doerfler <Thomas.Doerfler@embedded-brains.de>
* custom/vitex.cfg: added file to support PPC core in a xilinx * custom/vitex.cfg: added file to support PPC core in a xilinx

39
make/custom/gen83xx.cfg Normal file
View File

@@ -0,0 +1,39 @@
#
# Shared base config file for GEN83xx BSPs
#
# $Id$
#
include $(RTEMS_ROOT)/make/custom/default.cfg
#
# FIXME: we might want to use the e300 CPU model explicitely,
# using RTEMS_CPU_MODEL=e300 and -me300
# but I doubt the compiler actually generates different code
#
RTEMS_CPU=powerpc
RTEMS_CPU_MODEL=mpc83xx
# This is the actual bsp directory used during the build process.
RTEMS_BSP_FAMILY=gen83xx
# This contains the compiler options necessary to select the CPU model
# and (hopefully) optimize for it.
#
CPU_CFLAGS = -mcpu=603e -mstrict-align -fno-strict-aliasing\
-D$(RTEMS_BOARD_MODEL) -D$(RTEMS_83XX_DERIVATE)
# optimize flag: typically -O2
CFLAGS_OPTIMIZE_V = -O4 -g -fno-keep-inline-functions
# The following are definitions of make-exe which will work using ld as
# is currently required.
define make-exe
$(LINK.c) $(AM_CFLAGS) $(AM_LDFLAGS) \
-qnolinkcmds -T $(RTEMS_LINKCMDS) -o $(basename $@).exe \
$(LINK_OBJS) $(LINK_LIBS)
$(NM) -g -n $(basename $@).exe > $(basename $@).num
$(SIZE) $(basename $@).exe
endef
# Miscellaneous additions go here

16
make/custom/mpc8349eamds.cfg Normal file
View File

@@ -0,0 +1,16 @@
#
# Config file for customer specific MPC5200 board
#
# $Id$
#
#
# All GEN83xx configurations share the same base file, only a few
# parameters differ.
#
RTEMS_BOARD_MODEL=MPC8349EAMDS
RTEMS_83XX_DERIVATE=MPC8349
RTEMS_LINKCMDS=linkcmds.mpc8349eamds
include $(RTEMS_ROOT)/make/custom/gen83xx.cfg