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various PowerPC code maintenance

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This commit is contained in:
Thomas Doerfler
2009-11-03 18:45:04 +00:00
parent 16393b2fa8
commit e08dbc5ea9
25 changed files with 140 additions and 295 deletions
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26
c/src/lib/libcpu/powerpc/ChangeLog
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@@ -1,4 +1,28 @@
2009-10-23 Thomas Doerfler <Thomas.Doerfler@imd-systems.de>
2009-11-03 Thomas Doerfler <Thomas.Doerfler@imd-systems.de>
* shared/include/powerpc-utility.h, shared/include/byteorder.h,
shared/include/cpuIdent.h:
add c++ declaration brackets
* Makefile.am, mpc8260/clock: removed mpc8260 specific clock
driver
* e500/mmu/e500_mmu.h, e500/mmu/mmu.c,: removed "non-prototype"
warning
* mpc8260/timer/timer.c: moved extern declarations outside
function body
* mpc8xx/mmu/mmu.c: enable data cache when MMU is off to avoid
cache confusion during exception entry
2009-11-02 Thomas Doerfler <Thomas.Doerfler@imd-systems.de>
* mpc8xx/mmu/mmu.c:
enable data chache, when MMU is disabled
2009-10-30 Thomas Doerfler <Thomas.Doerfler@imd-systems.de>
* mpc6xx/clock/c_clock.c:
moved timebase/decrementer access from cpukit to libcpu
2009-10-29 Thomas Doerfler <Thomas.Doerfler@imd-systems.de>
* shared/include/powerpc-utility.h, mpc6xx/timer/timer.c:
moved timebase/decrementer access from cpukit to libcpu

6
c/src/lib/libcpu/powerpc/Makefile.am
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@@ -324,12 +324,6 @@ mpc8260_console_generic_rel_SOURCES = mpc8260/console-generic/console-generic.c
mpc8260_console_generic_rel_CPPFLAGS = $(AM_CPPFLAGS)
mpc8260_console_generic_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
# mpc8260/clock
noinst_PROGRAMS += mpc8260/clock.rel
mpc8260_clock_rel_SOURCES = mpc8260/clock/clock.c
mpc8260_clock_rel_CPPFLAGS = $(AM_CPPFLAGS)
mpc8260_clock_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
# mpc8260/cpm
include_mpc8260_HEADERS += mpc8260/include/cpm.h

2
c/src/lib/libcpu/powerpc/e500/mmu/e500_mmu.h
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@@ -129,7 +129,7 @@ rtems_e500_prtlb(rtems_e500_tlb_idx key, int quiet, FILE *f);
* (other than disabling them).
*/
int
rtems_e500_initlb();
rtems_e500_initlb(void);
/*
* Write TLB1 entry (can also be used to disable an entry).

2
c/src/lib/libcpu/powerpc/e500/mmu/mmu.c
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@@ -180,7 +180,7 @@
/* Factory to generate inline macros for accessing the MAS registers */
#define __RDWRMAS(mas,rmas) \
static inline uint32_t _read_MAS##mas() \
static inline uint32_t _read_MAS##mas(void) \
{ uint32_t x; asm volatile("mfspr %0, %1": "=r"(x):"i"(rmas)); return x; } \
static inline void _write_MAS##mas(uint32_t x) \
{ asm volatile("mtspr %1, %0":: "r"(x),"i"(rmas)); }

181
c/src/lib/libcpu/powerpc/mpc8260/clock/clock.c
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@@ -1,181 +0,0 @@
/* clock.c
*
* This routine initializes the PIT on the MPC8xx.
* The tick frequency is specified by the bsp.
*
* Author: Jay Monkman (jmonkman@frasca.com)
* Copyright (C) 1998 by Frasca International, Inc.
*
* Derived from c/src/lib/libcpu/ppc/ppc403/clock/clock.c:
*
* Author: Andrew Bray <andy@i-cubed.co.uk>
*
* COPYRIGHT (c) 1995 by i-cubed ltd.
*
* To anyone who acknowledges that this file is provided "AS IS"
* without any express or implied warranty:
* permission to use, copy, modify, and distribute this file
* for any purpose is hereby granted without fee, provided that
* the above copyright notice and this notice appears in all
* copies, and that the name of i-cubed limited not be used in
* advertising or publicity pertaining to distribution of the
* software without specific, written prior permission.
* i-cubed limited makes no representations about the suitability
* of this software for any purpose.
*
* Derived from c/src/lib/libcpu/hppa1_1/clock/clock.c:
*
* COPYRIGHT (c) 1989-2007.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*
* $Id$
*/
#include <rtems.h>
#include <rtems/clockdrv.h>
#include <rtems/libio.h>
#include <stdlib.h> /* for atexit() */
#include <mpc8260.h>
#include <bsp/irq.h>
volatile uint32_t Clock_driver_ticks;
extern int BSP_get_clock_irq_level(void);
extern int BSP_connect_clock_handler(rtems_isr_entry);
extern int BSP_disconnect_clock_handler(void);
void Clock_exit( void );
uint32_t decrementer_value;
volatile int ClockInitialised = 0;
/*
* These are set by clock driver during its init
*/
rtems_device_major_number rtems_clock_major = ~0;
rtems_device_minor_number rtems_clock_minor;
/*
* ISR Handler
*/
rtems_isr Clock_isr(rtems_vector_number vector)
{
int clicks;
if( ClockInitialised ) {
PPC_Get_decrementer( clicks );
do {
clicks += decrementer_value;
PPC_Set_decrementer( clicks );
Clock_driver_ticks++;
rtems_clock_tick();
} while( clicks < 100 );
}
#if 0
m8260.piscr |= M8260_PISCR_PS;
Clock_driver_ticks++;
rtems_clock_tick();
#endif
}
void clockOn(void* unused)
{
extern uint32_t bsp_clicks_per_usec;
decrementer_value = rtems_configuration_get_microseconds_per_tick() *
bsp_clicks_per_usec - 1;
PPC_Set_decrementer( decrementer_value );
Clock_driver_ticks = 0;
ClockInitialised = 1;
}
/*
* Called via atexit()
* Remove the clock interrupt handler by setting handler to NULL
*/
void
clockOff(void* unused)
{
#if 0
/* disable PIT and PIT interrupts */
m8260.piscr &= ~(M8260_PISCR_PTE | M8260_PISCR_PIE);
#endif
ClockInitialised = 0;
}
int clockIsOn(void* unused)
{
return ClockInitialised;
#if 0
if (m8260.piscr & M8260_PISCR_PIE) return 1;
return 0;
#endif
}
/*
* Called via atexit()
* Remove the clock interrupt handler by setting handler to NULL
*/
void
Clock_exit(void)
{
(void) BSP_disconnect_clock_handler ();
}
void Install_clock(rtems_isr_entry clock_isr)
{
extern uint32_t bsp_clicks_per_usec;
Clock_driver_ticks = 0;
decrementer_value = rtems_configuration_get_microseconds_per_tick() *
bsp_clicks_per_usec - 1;
PPC_Set_decrementer( decrementer_value );
BSP_connect_clock_handler (clock_isr);
ClockInitialised = 1;
atexit(Clock_exit);
}
void
ReInstall_clock(rtems_isr_entry new_clock_isr)
{
BSP_connect_clock_handler (new_clock_isr);
}
rtems_device_driver Clock_initialize(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *pargp
)
{
Install_clock( Clock_isr );
/*
* make major/minor avail to others such as shared memory driver
*/
rtems_clock_major = major;
rtems_clock_minor = minor;
return RTEMS_SUCCESSFUL;
}

4
c/src/lib/libcpu/powerpc/mpc8260/timer/timer.c
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@@ -78,12 +78,12 @@ void benchmark_timer_initialize(void)
Timer_starting = get_itimer();
}
extern uint32_t bsp_timer_least_valid;
extern uint32_t bsp_timer_average_overhead;
int benchmark_timer_read(void)
{
uint32_t clicks;
uint32_t total;
extern uint32_t bsp_timer_least_valid;
extern uint32_t bsp_timer_average_overhead;
clicks = get_itimer();

9
c/src/lib/libcpu/powerpc/mpc8xx/mmu/mmu.c
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@@ -50,8 +50,11 @@ void mmu_init( void )
* Initialize IMMU & DMMU Control Registers (MI_CTR & MD_CTR)
* GPM [0] 0b0 = PowerPC mode
* PPM [1] 0b0 = Page resolution of protection
* CIDEF [2] 0b0/0b1 = Default cache-inhibit attribute =
* NO for IMMU, YES for DMMU!
* CIDEF [2] 0b0/0b0 = Default cache-inhibit attribute =
* NO for IMMU, NO for DMMU
* NOTE: it is vital that data caching is ON, when
* DMMU is off, otherwise valid/dirty values in
* cache would be ignored during exception entry
* reserved/WTDEF [3] 0b0 = Default write-through attribute = not
* RSV4x [4] 0b0 = 4 entries not reserved
* reserved/TWAM [5] 0b0/0b1 = 4-Kbyte page hardware assist
@@ -67,7 +70,7 @@ void mmu_init( void )
*/
reg1 = M8xx_MI_CTR_ITLB_INDX(31);
_mtspr( M8xx_MI_CTR, reg1 );
reg1 = M8xx_MD_CTR_CIDEF | M8xx_MD_CTR_TWAM | M8xx_MD_CTR_DTLB_INDX(31);
reg1 = M8xx_MD_CTR_TWAM | M8xx_MD_CTR_DTLB_INDX(31);
_mtspr( M8xx_MD_CTR, reg1 );
_isync;

8
c/src/lib/libcpu/powerpc/shared/include/byteorder.h
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@@ -19,6 +19,10 @@
#ifndef _LIBCPU_BYTEORDER_H
#define _LIBCPU_BYTEORDER_H
#ifdef __cplusplus
extern "C" {
#endif
#ifdef __GNUC__
extern __inline__ unsigned ld_le16(volatile uint16_t *addr)
@@ -49,4 +53,8 @@ extern __inline__ void st_le32(volatile uint32_t *addr, unsigned val)
#endif /* __GNUC__ */
#ifdef __cplusplus
}
#endif
#endif /* _LIBCPU_BYTEORDER_H */

8
c/src/lib/libcpu/powerpc/shared/include/cpuIdent.h
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@@ -18,6 +18,10 @@
#include <stdbool.h>
#ifdef __cplusplus
extern "C" {
#endif
#ifndef ASM
typedef enum
{
@@ -130,4 +134,8 @@ static inline bool ppc_cpu_is(ppc_cpu_id_t cpu)
#endif /* ASM */
#ifdef __cplusplus
}
#endif
#endif

29
c/src/lib/libcpu/powerpc/shared/include/powerpc-utility.h
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@@ -26,10 +26,10 @@
* @defgroup powerpc_shared Shared PowerPC Code
*/
#ifndef LIBCPU_POWERPC_UTILITY_H
#define LIBCPU_POWERPC_UTILITY_H
#ifndef __LIBCPU_POWERPC_UTILITY_H
#define __LIBCPU_POWERPC_UTILITY_H
#ifndef ASM
#if !defined(ASM)
#include <rtems.h>
#endif
@@ -37,7 +37,11 @@
#include <rtems/powerpc/registers.h>
#include <rtems/powerpc/powerpc.h>
#ifndef ASM
#ifdef __cplusplus
extern "C" {
#endif
#if !defined(ASM)
#include <rtems/bspIo.h>
#include <rtems/system.h>
@@ -242,7 +246,6 @@ static inline void ppc_external_exceptions_disable(uint32_t msr)
RTEMS_COMPILER_MEMORY_BARRIER();
}
#ifndef ASM
/*
* Simple spin delay in microsecond units for device drivers.
* This is very dependent on the clock speed of the target.
@@ -291,9 +294,6 @@ extern uint32_t bsp_clicks_per_usec;
while (now - start < (_cycles)); \
} while (0)
#endif /* ASM */
#ifndef ASM
/*
* Routines to access the decrementer register
*/
@@ -306,9 +306,6 @@ extern uint32_t bsp_clicks_per_usec;
#define PPC_Get_decrementer( _clicks ) \
asm volatile( "mfdec %0" : "=r" (_clicks) )
#endif /* ASM */
#ifndef ASM
/*
* Routines to access the time base register
*/
@@ -350,7 +347,6 @@ static inline void PPC_Set_timebase_register (uint64_t tbr)
asm volatile( "mtspr 285, %0" : : "r" (tbr_high));
}
#endif /* ASM */
static inline uint32_t ppc_decrementer_register(void)
{
@@ -581,8 +577,9 @@ static inline void ppc_set_time_base_64(uint64_t val)
void ppc_code_copy(void *dest, const void *src, size_t n);
#else /* ASM */
#endif /* ifndef ASM */
#if defined(ASM)
#include <rtems/asm.h>
.macro LA reg, addr
@@ -656,4 +653,8 @@ void ppc_code_copy(void *dest, const void *src, size_t n);
#endif /* ASM */
#endif /* LIBCPU_POWERPC_UTILITY_H */
#ifdef __cplusplus
}
#endif
#endif /* __LIBCPU_POWERPC_UTILITY_H */