forked from Imagelibrary/rtems
Joel Sherrill
@@ -28,10 +28,6 @@
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#include <rtems/timecounter.h>
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#include <rtems/score/sparcimpl.h>
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#if SIMSPARC_FAST_IDLE==1
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#define CLOCK_DRIVER_USE_FAST_IDLE 1
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#endif
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/*
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* The Real Time Clock Counter Timer uses this trap type.
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*/
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@@ -30,19 +30,6 @@ of test message) and then exit. In this case, the program returns control
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to the simulator command line before the program has even queued the output
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to the uart. Thus sis has no chance of getting the data out.])
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RTEMS_BSPOPTS_SET([SIMSPARC_FAST_IDLE],[*],[])
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RTEMS_BSPOPTS_HELP([SIMSPARC_FAST_IDLE],
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[If defined, speed up the clock ticks while the idle task is running so
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time spent in the idle task is minimized. This significantly reduces
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the wall time required to execute the RTEMS test suites.])
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RTEMS_BSPOPTS_SET([ENABLE_SIS_QUIRKS],[sis],[1])
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RTEMS_BSPOPTS_SET([ENABLE_SIS_QUIRKS],[*],[0])
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RTEMS_BSPOPTS_HELP([ENABLE_SIS_QUIRKS],
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[If defined, then the SIS simulator specific code in the
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BSP will be enabled. In particular, SIS requires special
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initialization not used on real ERC32 hardware.])
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RTEMS_BSPOPTS_SET([BSP_POWER_DOWN_AT_FATAL_HALT],[*],[])
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RTEMS_BSPOPTS_HELP([BSP_POWER_DOWN_AT_FATAL_HALT],
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[If defined, CPU is spinning on fatal exit. Otherwise generate system
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@@ -1,5 +0,0 @@
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#
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# Configuration file for the SPARC/ERC32 Simulator SIS
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#
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include $(RTEMS_ROOT)/make/custom/erc32.cfg
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@@ -52,15 +52,9 @@ void benchmark_timer_initialize(void)
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}
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#if ENABLE_SIS_QUIRKS
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#define AVG_OVERHEAD 8 /* It typically takes 3.0 microseconds */
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/* to start/stop the timer. */
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#define LEAST_VALID 9 /* Don't trust a value lower than this */
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#else
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#define AVG_OVERHEAD 12 /* It typically takes 3.0 microseconds */
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/* to start/stop the timer. */
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#define LEAST_VALID 13 /* Don't trust a value lower than this */
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#endif
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benchmark_timer_t benchmark_timer_read(void)
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{
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@@ -27,10 +27,6 @@
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#include <rtems/timecounter.h>
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#include <rtems/score/sparcimpl.h>
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#if SIMSPARC_FAST_IDLE==1
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#define CLOCK_DRIVER_USE_FAST_IDLE 1
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#endif
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static rtems_timecounter_simple leon2_tc;
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static uint32_t leon2_tc_get( rtems_timecounter_simple *tc )
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@@ -30,12 +30,6 @@ of test message) and then exit. In this case, the program returns control
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to the simulator command line before the program has even queued the output
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to the uart. Thus sis has no chance of getting the data out.])
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RTEMS_BSPOPTS_SET([SIMSPARC_FAST_IDLE],[*],[])
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RTEMS_BSPOPTS_HELP([SIMSPARC_FAST_IDLE],
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[If defined, speed up the clock ticks while the idle task is running so
|
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time spent in the idle task is minimized. This significantly reduces
|
||||
the wall time required to execute the RTEMS test suites.])
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RTEMS_BSPOPTS_SET([BSP_POWER_DOWN_AT_FATAL_HALT],[*],[])
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RTEMS_BSPOPTS_HELP([BSP_POWER_DOWN_AT_FATAL_HALT],
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[If defined, CPU is spinning on fatal exit. Otherwise generate system
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@@ -36,10 +36,6 @@
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*/
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#ifndef RTEMS_DRVMGR_STARTUP
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#if SIMSPARC_FAST_IDLE==1
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#define CLOCK_DRIVER_USE_FAST_IDLE 1
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#endif
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/* LEON3 Timer system interrupt number */
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static int clkirq;
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@@ -27,12 +27,6 @@ RTEMS_BSPOPTS_HELP([CONSOLE_USE_INTERRUPTS],
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Under the simulator (especially when FAST_UART is defined), polled seems
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to operate better.])
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RTEMS_BSPOPTS_SET([SIMSPARC_FAST_IDLE],[*],[])
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RTEMS_BSPOPTS_HELP([SIMSPARC_FAST_IDLE],
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[If defined, speed up the clock ticks while the idle task is running so
|
||||
time spent in the idle task is minimized. This significantly reduces
|
||||
the wall time required to execute the RTEMS test suites.])
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RTEMS_BSPOPTS_SET([BSP_LEON3_SMP],[*],[1])
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RTEMS_BSPOPTS_HELP([BSP_LEON3_SMP],
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[Always defined when on a LEON3 to enable the LEON3 support for
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@@ -305,62 +305,6 @@ cpu0:
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mov %sp, %fp ! Set frame pointer
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nop
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#if ENABLE_SIS_QUIRKS==1
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#include <erc32.h>
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/* Check if MEC is initialised. If not, this means that we are
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running on the simulator. Initiate some of the parameters
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that are done by the boot-prom otherwise.
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*/
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set SYM(ERC32_MEC), %g3 ! g3 = base address of peripherals
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ld [%g3], %g2
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set 0xfe080000, %g1
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andcc %g1, %g2, %g0
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bne 2f
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/* Set the correct memory size in MEC memory config register */
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set SYM(PROM_SIZE), %l0
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set 0, %l1
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srl %l0, 18, %l0
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1:
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tst %l0
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srl %l0, 1, %l0
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bne,a 1b
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inc %l1
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sll %l1, 8, %l1
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set SYM(RAM_SIZE), %l0
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srl %l0, 19, %l0
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1:
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tst %l0
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srl %l0, 1, %l0
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bne,a 1b
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inc %l1
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sll %l1, 10, %l1
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! set the Memory Configuration
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st %l1, [ %g3 + ERC32_MEC_MEMORY_CONFIGURATION_OFFSET ]
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!DISABLE THE HARDWARE WATCHDOG
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st %g0, [ %g3 + ERC32_MEC_WATCHDOG_TRAP_DOOR_SET_OFFSET ]
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!Reduce the number of wait states to 0 for all memory areas.
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st %g0, [ %g3 + ERC32_MEC_WAIT_STATE_CONFIGURATION_OFFSET ]
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set SYM(RAM_START), %l1 ! Cannot use RAM_END due to bug in linker
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set SYM(RAM_SIZE), %l2
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add %l1, %l2, %sp
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st %sp, [%g5]
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set SYM(CLOCK_SPEED), %g5 ! Use 14 MHz in simulator
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set 14, %g1
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st %g1, [%g5]
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2:
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#endif
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/*
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* Copy the initialized data to RAM
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*
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