powerpc/score603e: Fix warnings

This commit is contained in:
Joel Sherrill
2014-10-15 14:21:20 -05:00
parent 0626dba48a
commit d4ab6611f3
7 changed files with 11197 additions and 110 deletions

View File

@@ -1,6 +1,5 @@
/* /*
* * COPYRIGHT (c) 1989-2014.
* COPYRIGHT (c) 1989-2009.
* On-Line Applications Research Corporation (OAR). * On-Line Applications Research Corporation (OAR).
* *
* The license and distribution terms for this file may be * The license and distribution terms for this file may be
@@ -25,10 +24,10 @@
* an UNIVERSE register, without sufficient delay, the second access will * an UNIVERSE register, without sufficient delay, the second access will
* not work correctly. * not work correctly.
*/ */
void PCI_bus_delay (void) static void PCI_bus_delay (void)
{ {
__asm__ (" nop"); __asm__ volatile ("nop");
__asm__ (" nop"); __asm__ volatile ("nop");
} }
/* /*
@@ -43,7 +42,7 @@ void PCI_bus_write(
*_addr = _data; *_addr = _data;
} }
uint32_t PCI_bus_read( uint32_t PCI_bus_read(
volatile uint32_t * _addr /* IN */ volatile uint32_t * _addr /* IN */
) )
{ {
@@ -57,8 +56,7 @@ uint32_t PCI_bus_read(
* PCI Configuration Cycle Read/Write Access which is used to access all of * PCI Configuration Cycle Read/Write Access which is used to access all of
* devices registers on the PCI bus. i.e.: Universe, Ethernet & PMC. * devices registers on the PCI bus. i.e.: Universe, Ethernet & PMC.
*/ */
uint32_t Read_pci_device_register(
uint32_t Read_pci_device_register(
uint32_t address uint32_t address
) )
{ {

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@@ -60,6 +60,7 @@ unsigned int SCORE603e_FLASH_verify_enable( void )
return RTEMS_SUCCESSFUL; return RTEMS_SUCCESSFUL;
} }
#if 0
unsigned int SCORE603e_FLASH_pci_reset_reg( unsigned int SCORE603e_FLASH_pci_reset_reg(
uint8_t reg, uint8_t reg,
uint32_t cmask, uint32_t cmask,
@@ -79,6 +80,7 @@ unsigned int SCORE603e_FLASH_pci_reset_reg(
} }
return RTEMS_SUCCESSFUL; return RTEMS_SUCCESSFUL;
} }
#endif
/* /*
* SCORE603e_FLASH_Enable_writes * SCORE603e_FLASH_Enable_writes

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@@ -16,22 +16,6 @@
#include <bsp.h> #include <bsp.h>
#include "PCI.h" #include "PCI.h"
/********************************************************************
********************************************************************
********* *********
********* Prototypes *********
********* *********
********************************************************************
********************************************************************/
/********************************************************************
********************************************************************
********* *********
********* *********
********* *********
********************************************************************
********************************************************************/
typedef struct { typedef struct {
uint32_t PCI_ID; /* 0x80030000 */ uint32_t PCI_ID; /* 0x80030000 */
uint32_t PCI_CSR; /* 0x80030004 */ uint32_t PCI_CSR; /* 0x80030004 */
@@ -153,7 +137,6 @@ volatile Universe_Memory *UNIVERSE =
* by the boot code. This routine should be called by user code only if * by the boot code. This routine should be called by user code only if
* a complete SCORE603e VME initialization is required. * a complete SCORE603e VME initialization is required.
*/ */
void initialize_universe(void) void initialize_universe(void)
{ {
uint32_t jumper_selection; uint32_t jumper_selection;
@@ -227,7 +210,7 @@ void set_vme_base_address (
/* /*
* Gets the VME base address * Gets the VME base address
*/ */
uint32_t get_vme_base_address (void) static uint32_t get_vme_base_address (void)
{ {
volatile uint32_t temp; volatile uint32_t temp;
@@ -236,7 +219,7 @@ uint32_t get_vme_base_address (void)
return (temp); return (temp);
} }
uint32_t get_vme_slave_size(void) uint32_t get_vme_slave_size(void)
{ {
volatile uint32_t temp; volatile uint32_t temp;
temp = PCI_bus_read( &UNIVERSE->VSI0_BD); temp = PCI_bus_read( &UNIVERSE->VSI0_BD);
@@ -249,7 +232,7 @@ uint32_t get_vme_slave_size(void)
* Set the size of the VME slave image * Set the size of the VME slave image
* Note: The maximum size is up to 24 M bytes. (00000000 - 017FFFFF) * Note: The maximum size is up to 24 M bytes. (00000000 - 017FFFFF)
*/ */
void set_vme_slave_size (uint32_t size) void set_vme_slave_size (uint32_t size)
{ {
volatile uint32_t temp; volatile uint32_t temp;

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@@ -4,8 +4,10 @@
* This driver uses the termios pseudo driver. * This driver uses the termios pseudo driver.
* *
* Currently only polled mode is supported. * Currently only polled mode is supported.
* */
* COPYRIGHT (c) 1989-2009.
/*
* COPYRIGHT (c) 1989-2014.
* On-Line Applications Research Corporation (OAR). * On-Line Applications Research Corporation (OAR).
* *
* The license and distribution terms for this file may be * The license and distribution terms for this file may be
@@ -36,14 +38,12 @@ int USE_FOR_CONSOLE = USE_FOR_CONSOLE_DEF;
* Console Device Driver Entry Points * Console Device Driver Entry Points
*/ */
/* PAGE /*
*
* console_inbyte_nonblocking * console_inbyte_nonblocking
* *
* Console Termios polling input entry point. * Console Termios polling input entry point.
*/ */
static int console_inbyte_nonblocking(
int console_inbyte_nonblocking(
int minor int minor
) )
{ {
@@ -164,8 +164,7 @@ void console_outbyte_interrupts(
#endif #endif
/* PAGE /*
*
* console_initialize * console_initialize
* *
* Routine called to initialize the console device driver. * Routine called to initialize the console device driver.
@@ -178,7 +177,7 @@ rtems_device_driver console_initialize(
{ {
rtems_status_code status; rtems_status_code status;
rtems_device_minor_number console; rtems_device_minor_number console;
int port, chip, p0,p1; int port, p0,p1;
/* /*
* initialize the termio interface. * initialize the termio interface.
@@ -234,7 +233,6 @@ rtems_device_driver console_initialize(
*/ */
for (port=1; port<NUM_Z85C30_PORTS; port++) { for (port=1; port<NUM_Z85C30_PORTS; port++) {
chip = port >> 1;
initialize_85c30_port( &Ports_85C30[port] ); initialize_85c30_port( &Ports_85C30[port] );
} }
@@ -245,14 +243,13 @@ rtems_device_driver console_initialize(
return RTEMS_SUCCESSFUL; return RTEMS_SUCCESSFUL;
} }
/* PAGE /*
*
* console_write_support * console_write_support
* *
* Console Termios output entry point. * Console Termios output entry point.
* *
*/ */
ssize_t console_write_support( static ssize_t console_write_support(
int minor, int minor,
const char *buf, const char *buf,
size_t len) size_t len)
@@ -289,12 +286,10 @@ ssize_t console_write_support(
return nwrite; return nwrite;
} }
/* PAGE /*
*
* console_open * console_open
* *
* open a port as a termios console. * open a port as a termios console.
*
*/ */
rtems_device_driver console_open( rtems_device_driver console_open(
rtems_device_major_number major, rtems_device_major_number major,
@@ -354,19 +349,10 @@ rtems_device_driver console_open(
} }
#if (CONSOLE_USE_INTERRUPTS) #if (CONSOLE_USE_INTERRUPTS)
/* /*
* console_outbyte_interrupts * console_outbyte_interrupts
* *
* This routine transmits a character out. * This routine transmits a character out.
*
* Input parameters:
* port - port to transmit character to
* ch - character to be transmitted
*
* Output parameters: NONE
*
* Return values: NONE
*/ */
void console_outbyte_interrupts( void console_outbyte_interrupts(
const Port_85C30_info *Port, const Port_85C30_info *Port,
@@ -396,12 +382,10 @@ void console_outbyte_interrupts(
Ring_buffer_Add_character( &protocol->TX_Buffer, ch ); Ring_buffer_Add_character( &protocol->TX_Buffer, ch );
} }
#endif #endif
/* const char arg to be compatible with BSP_output_char decl. */ /* const char arg to be compatible with BSP_output_char decl. */
void static void debug_putc_onlcr(const char c)
debug_putc_onlcr(const char c)
{ {
int console; int console;
volatile uint8_t *csr; volatile uint8_t *csr;

File diff suppressed because it is too large Load Diff

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@@ -1,8 +1,9 @@
/* bsp.h /*
*
* This include file contains all board IO definitions. * This include file contains all board IO definitions.
* */
* COPYRIGHT (c) 1989-2009.
/*
* COPYRIGHT (c) 1989-2014.
* On-Line Applications Research Corporation (OAR). * On-Line Applications Research Corporation (OAR).
* *
* The license and distribution terms for this file may be * The license and distribution terms for this file may be
@@ -123,68 +124,55 @@ rtems_isr_entry set_EE_vector(
rtems_isr_entry handler, /* isr routine */ rtems_isr_entry handler, /* isr routine */
rtems_vector_number vector /* vector number */ rtems_vector_number vector /* vector number */
); );
void initialize_external_exception_vector (); void initialize_external_exception_vector(void);
/* /*
* Hwr_init.c * Hwr_init.c
*/ */
void init_PCI(); void init_PCI(void);
void instruction_cache_enable (); void init_RTC(void);
void data_cache_enable (); void instruction_cache_enable(void);
void data_cache_enable(void);
void initialize_PCI_bridge (); void initialize_PCI_bridge(void);
uint16_t read_and_clear_irq (); uint16_t read_and_clear_irq(void);
void set_irq_mask( void set_irq_mask(uint16_t value);
uint16_t value uint16_t get_irq_mask(void);
);
uint16_t get_irq_mask();
/* /*
* universe.c * universe.c
*/ */
void initialize_universe(); void initialize_universe(void);
void set_irq_mask(uint16_t value);
void set_irq_mask( uint16_t get_irq_mask(void);
uint16_t value void unmask_irq(uint16_t irq_idx);
); void mask_irq(uint16_t irq_idx);
void init_irq_data_register(void);
uint16_t get_irq_mask(); uint16_t read_and_clear_PMC_irq(uint16_t irq);
bool Is_PMC_IRQ( uint32_t pmc_irq, uint16_t status_word);
void unmask_irq( uint16_t read_and_clear_irq(void);
uint16_t irq_idx void set_vme_base_address(uint32_t base_address);
); uint32_t get_vme_slave_size(void);
void set_vme_slave_size (uint32_t size);
void mask_irq(
uint16_t irq_idx
);
void init_irq_data_register();
uint16_t read_and_clear_PMC_irq(
uint16_t irq
);
bool Is_PMC_IRQ(
uint32_t pmc_irq,
uint16_t status_word
);
uint16_t read_and_clear_irq();
/* /*
* FPGA.c * FPGA.c
*/ */
void initialize_PCI_bridge (); void initialize_PCI_bridge(void);
void init_irq_data_register(void);
uint32_t Read_pci_device_register(uint32_t address);
void Write_pci_device_register(uint32_t address, uint32_t data);
/* flash.c */ /* flash.c */
unsigned int SCORE603e_FLASH_Disable(uint32_t unused);
unsigned int SCORE603e_FLASH_verify_enable(void);
unsigned int SCORE603e_FLASH_Enable_writes(uint32_t area);
unsigned int SCORE603e_FLASH_Disable( /*
uint32_t unused * PCI.c
); */
unsigned int SCORE603e_FLASH_verify_enable(); uint32_t PCI_bus_read(volatile uint32_t *_addr);
unsigned int SCORE603e_FLASH_Enable_writes( void PCI_bus_write(volatile uint32_t *_addr, uint32_t _data);
uint32_t area /* Unused */
);
#define BSP_FLASH_ENABLE_WRITES( _area) SCORE603e_FLASH_Enable_writes( _area ) #define BSP_FLASH_ENABLE_WRITES( _area) SCORE603e_FLASH_Enable_writes( _area )
#define BSP_FLASH_DISABLE_WRITES(_area) SCORE603e_FLASH_Disable( _area ) #define BSP_FLASH_DISABLE_WRITES(_area) SCORE603e_FLASH_Disable( _area )

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@@ -1,6 +1,9 @@
/* FPGA.c -- Bridge for second and subsequent generations /*
* * FPGA.c -- Bridge for second and subsequent generations
* COPYRIGHT (c) 1989-2009. */
/*
* COPYRIGHT (c) 1989-2014.
* On-Line Applications Research Corporation (OAR). * On-Line Applications Research Corporation (OAR).
* *
* The license and distribution terms for this file may be * The license and distribution terms for this file may be
@@ -120,7 +123,7 @@ void init_irq_data_register(void)
} }
} }
uint16_t read_and_clear_PMC_irq( uint16_t read_and_clear_PMC_irq(
uint16_t irq uint16_t irq
) )
{ {