forked from Imagelibrary/rtems
powerpc/score603e: Fix warnings
This commit is contained in:
@@ -1,6 +1,5 @@
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/*
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/*
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*
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* COPYRIGHT (c) 1989-2014.
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* COPYRIGHT (c) 1989-2009.
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* On-Line Applications Research Corporation (OAR).
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* On-Line Applications Research Corporation (OAR).
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*
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*
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* The license and distribution terms for this file may be
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* The license and distribution terms for this file may be
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@@ -25,10 +24,10 @@
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* an UNIVERSE register, without sufficient delay, the second access will
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* an UNIVERSE register, without sufficient delay, the second access will
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* not work correctly.
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* not work correctly.
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*/
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*/
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void PCI_bus_delay (void)
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static void PCI_bus_delay (void)
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{
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{
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__asm__ (" nop");
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__asm__ volatile ("nop");
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__asm__ (" nop");
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__asm__ volatile ("nop");
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}
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}
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/*
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/*
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@@ -43,7 +42,7 @@ void PCI_bus_write(
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*_addr = _data;
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*_addr = _data;
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}
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}
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uint32_t PCI_bus_read(
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uint32_t PCI_bus_read(
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volatile uint32_t * _addr /* IN */
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volatile uint32_t * _addr /* IN */
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)
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)
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{
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{
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@@ -57,8 +56,7 @@ uint32_t PCI_bus_read(
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* PCI Configuration Cycle Read/Write Access which is used to access all of
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* PCI Configuration Cycle Read/Write Access which is used to access all of
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* devices registers on the PCI bus. i.e.: Universe, Ethernet & PMC.
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* devices registers on the PCI bus. i.e.: Universe, Ethernet & PMC.
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*/
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*/
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uint32_t Read_pci_device_register(
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uint32_t Read_pci_device_register(
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uint32_t address
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uint32_t address
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)
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)
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{
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{
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@@ -60,6 +60,7 @@ unsigned int SCORE603e_FLASH_verify_enable( void )
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return RTEMS_SUCCESSFUL;
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return RTEMS_SUCCESSFUL;
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}
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}
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#if 0
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unsigned int SCORE603e_FLASH_pci_reset_reg(
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unsigned int SCORE603e_FLASH_pci_reset_reg(
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uint8_t reg,
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uint8_t reg,
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uint32_t cmask,
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uint32_t cmask,
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@@ -79,6 +80,7 @@ unsigned int SCORE603e_FLASH_pci_reset_reg(
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}
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}
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return RTEMS_SUCCESSFUL;
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return RTEMS_SUCCESSFUL;
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}
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}
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#endif
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/*
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/*
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* SCORE603e_FLASH_Enable_writes
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* SCORE603e_FLASH_Enable_writes
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@@ -16,22 +16,6 @@
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#include <bsp.h>
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#include <bsp.h>
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#include "PCI.h"
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#include "PCI.h"
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/********************************************************************
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********************************************************************
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********* *********
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********* Prototypes *********
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********* *********
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********************************************************************
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********************************************************************/
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/********************************************************************
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********************************************************************
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********* *********
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********* *********
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********* *********
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********************************************************************
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********************************************************************/
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typedef struct {
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typedef struct {
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uint32_t PCI_ID; /* 0x80030000 */
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uint32_t PCI_ID; /* 0x80030000 */
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uint32_t PCI_CSR; /* 0x80030004 */
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uint32_t PCI_CSR; /* 0x80030004 */
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@@ -153,7 +137,6 @@ volatile Universe_Memory *UNIVERSE =
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* by the boot code. This routine should be called by user code only if
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* by the boot code. This routine should be called by user code only if
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* a complete SCORE603e VME initialization is required.
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* a complete SCORE603e VME initialization is required.
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*/
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*/
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void initialize_universe(void)
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void initialize_universe(void)
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{
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{
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uint32_t jumper_selection;
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uint32_t jumper_selection;
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@@ -227,7 +210,7 @@ void set_vme_base_address (
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/*
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/*
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* Gets the VME base address
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* Gets the VME base address
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*/
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*/
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uint32_t get_vme_base_address (void)
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static uint32_t get_vme_base_address (void)
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{
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{
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volatile uint32_t temp;
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volatile uint32_t temp;
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@@ -236,7 +219,7 @@ uint32_t get_vme_base_address (void)
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return (temp);
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return (temp);
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}
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}
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uint32_t get_vme_slave_size(void)
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uint32_t get_vme_slave_size(void)
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{
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{
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volatile uint32_t temp;
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volatile uint32_t temp;
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temp = PCI_bus_read( &UNIVERSE->VSI0_BD);
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temp = PCI_bus_read( &UNIVERSE->VSI0_BD);
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@@ -249,7 +232,7 @@ uint32_t get_vme_slave_size(void)
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* Set the size of the VME slave image
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* Set the size of the VME slave image
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* Note: The maximum size is up to 24 M bytes. (00000000 - 017FFFFF)
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* Note: The maximum size is up to 24 M bytes. (00000000 - 017FFFFF)
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*/
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*/
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void set_vme_slave_size (uint32_t size)
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void set_vme_slave_size (uint32_t size)
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{
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{
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volatile uint32_t temp;
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volatile uint32_t temp;
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@@ -4,8 +4,10 @@
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* This driver uses the termios pseudo driver.
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* This driver uses the termios pseudo driver.
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*
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*
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* Currently only polled mode is supported.
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* Currently only polled mode is supported.
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*
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*/
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* COPYRIGHT (c) 1989-2009.
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/*
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* COPYRIGHT (c) 1989-2014.
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* On-Line Applications Research Corporation (OAR).
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* On-Line Applications Research Corporation (OAR).
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*
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*
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* The license and distribution terms for this file may be
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* The license and distribution terms for this file may be
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@@ -36,14 +38,12 @@ int USE_FOR_CONSOLE = USE_FOR_CONSOLE_DEF;
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* Console Device Driver Entry Points
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* Console Device Driver Entry Points
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*/
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*/
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/* PAGE
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/*
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*
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* console_inbyte_nonblocking
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* console_inbyte_nonblocking
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*
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*
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* Console Termios polling input entry point.
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* Console Termios polling input entry point.
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*/
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*/
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static int console_inbyte_nonblocking(
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int console_inbyte_nonblocking(
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int minor
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int minor
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)
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)
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{
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{
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@@ -164,8 +164,7 @@ void console_outbyte_interrupts(
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#endif
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#endif
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/* PAGE
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/*
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*
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* console_initialize
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* console_initialize
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*
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*
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* Routine called to initialize the console device driver.
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* Routine called to initialize the console device driver.
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@@ -178,7 +177,7 @@ rtems_device_driver console_initialize(
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{
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{
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rtems_status_code status;
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rtems_status_code status;
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rtems_device_minor_number console;
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rtems_device_minor_number console;
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int port, chip, p0,p1;
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int port, p0,p1;
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/*
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/*
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* initialize the termio interface.
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* initialize the termio interface.
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@@ -234,7 +233,6 @@ rtems_device_driver console_initialize(
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*/
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*/
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for (port=1; port<NUM_Z85C30_PORTS; port++) {
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for (port=1; port<NUM_Z85C30_PORTS; port++) {
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chip = port >> 1;
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initialize_85c30_port( &Ports_85C30[port] );
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initialize_85c30_port( &Ports_85C30[port] );
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}
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}
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@@ -245,14 +243,13 @@ rtems_device_driver console_initialize(
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return RTEMS_SUCCESSFUL;
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return RTEMS_SUCCESSFUL;
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}
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}
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/* PAGE
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/*
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*
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* console_write_support
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* console_write_support
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*
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*
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* Console Termios output entry point.
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* Console Termios output entry point.
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*
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*
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*/
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*/
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ssize_t console_write_support(
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static ssize_t console_write_support(
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int minor,
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int minor,
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const char *buf,
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const char *buf,
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size_t len)
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size_t len)
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@@ -289,12 +286,10 @@ ssize_t console_write_support(
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return nwrite;
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return nwrite;
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}
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}
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/* PAGE
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/*
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*
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* console_open
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* console_open
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*
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*
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* open a port as a termios console.
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* open a port as a termios console.
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*
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*/
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*/
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rtems_device_driver console_open(
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rtems_device_driver console_open(
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rtems_device_major_number major,
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rtems_device_major_number major,
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@@ -354,19 +349,10 @@ rtems_device_driver console_open(
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}
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}
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#if (CONSOLE_USE_INTERRUPTS)
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#if (CONSOLE_USE_INTERRUPTS)
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/*
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/*
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* console_outbyte_interrupts
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* console_outbyte_interrupts
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*
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*
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* This routine transmits a character out.
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* This routine transmits a character out.
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*
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* Input parameters:
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* port - port to transmit character to
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* ch - character to be transmitted
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*
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* Output parameters: NONE
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*
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* Return values: NONE
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*/
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*/
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void console_outbyte_interrupts(
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void console_outbyte_interrupts(
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const Port_85C30_info *Port,
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const Port_85C30_info *Port,
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@@ -396,12 +382,10 @@ void console_outbyte_interrupts(
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Ring_buffer_Add_character( &protocol->TX_Buffer, ch );
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Ring_buffer_Add_character( &protocol->TX_Buffer, ch );
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}
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}
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#endif
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#endif
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/* const char arg to be compatible with BSP_output_char decl. */
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/* const char arg to be compatible with BSP_output_char decl. */
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void
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static void debug_putc_onlcr(const char c)
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debug_putc_onlcr(const char c)
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{
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{
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int console;
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int console;
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volatile uint8_t *csr;
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volatile uint8_t *csr;
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11129
c/src/lib/libbsp/powerpc/score603e/cscope.out
Normal file
11129
c/src/lib/libbsp/powerpc/score603e/cscope.out
Normal file
File diff suppressed because it is too large
Load Diff
@@ -1,8 +1,9 @@
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/* bsp.h
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/*
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*
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* This include file contains all board IO definitions.
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* This include file contains all board IO definitions.
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*
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*/
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* COPYRIGHT (c) 1989-2009.
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/*
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* COPYRIGHT (c) 1989-2014.
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* On-Line Applications Research Corporation (OAR).
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* On-Line Applications Research Corporation (OAR).
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*
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*
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* The license and distribution terms for this file may be
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* The license and distribution terms for this file may be
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@@ -123,68 +124,55 @@ rtems_isr_entry set_EE_vector(
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rtems_isr_entry handler, /* isr routine */
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rtems_isr_entry handler, /* isr routine */
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rtems_vector_number vector /* vector number */
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rtems_vector_number vector /* vector number */
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);
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);
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void initialize_external_exception_vector ();
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void initialize_external_exception_vector(void);
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/*
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/*
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* Hwr_init.c
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* Hwr_init.c
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*/
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*/
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void init_PCI();
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void init_PCI(void);
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void instruction_cache_enable ();
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void init_RTC(void);
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void data_cache_enable ();
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void instruction_cache_enable(void);
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void data_cache_enable(void);
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void initialize_PCI_bridge ();
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void initialize_PCI_bridge(void);
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uint16_t read_and_clear_irq ();
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uint16_t read_and_clear_irq(void);
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void set_irq_mask(
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void set_irq_mask(uint16_t value);
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uint16_t value
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uint16_t get_irq_mask(void);
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);
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uint16_t get_irq_mask();
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/*
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/*
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* universe.c
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* universe.c
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*/
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*/
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void initialize_universe();
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void initialize_universe(void);
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void set_irq_mask(uint16_t value);
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void set_irq_mask(
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uint16_t get_irq_mask(void);
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uint16_t value
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void unmask_irq(uint16_t irq_idx);
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);
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void mask_irq(uint16_t irq_idx);
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void init_irq_data_register(void);
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uint16_t get_irq_mask();
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uint16_t read_and_clear_PMC_irq(uint16_t irq);
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bool Is_PMC_IRQ( uint32_t pmc_irq, uint16_t status_word);
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void unmask_irq(
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uint16_t read_and_clear_irq(void);
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uint16_t irq_idx
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void set_vme_base_address(uint32_t base_address);
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);
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uint32_t get_vme_slave_size(void);
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void set_vme_slave_size (uint32_t size);
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void mask_irq(
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uint16_t irq_idx
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);
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void init_irq_data_register();
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uint16_t read_and_clear_PMC_irq(
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uint16_t irq
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);
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bool Is_PMC_IRQ(
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uint32_t pmc_irq,
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uint16_t status_word
|
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);
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uint16_t read_and_clear_irq();
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/*
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/*
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* FPGA.c
|
* FPGA.c
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*/
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*/
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void initialize_PCI_bridge ();
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void initialize_PCI_bridge(void);
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void init_irq_data_register(void);
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uint32_t Read_pci_device_register(uint32_t address);
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void Write_pci_device_register(uint32_t address, uint32_t data);
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|
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/* flash.c */
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/* flash.c */
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unsigned int SCORE603e_FLASH_Disable(uint32_t unused);
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unsigned int SCORE603e_FLASH_verify_enable(void);
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unsigned int SCORE603e_FLASH_Enable_writes(uint32_t area);
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|
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unsigned int SCORE603e_FLASH_Disable(
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/*
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uint32_t unused
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* PCI.c
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);
|
*/
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unsigned int SCORE603e_FLASH_verify_enable();
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uint32_t PCI_bus_read(volatile uint32_t *_addr);
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unsigned int SCORE603e_FLASH_Enable_writes(
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void PCI_bus_write(volatile uint32_t *_addr, uint32_t _data);
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uint32_t area /* Unused */
|
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);
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|
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#define BSP_FLASH_ENABLE_WRITES( _area) SCORE603e_FLASH_Enable_writes( _area )
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#define BSP_FLASH_ENABLE_WRITES( _area) SCORE603e_FLASH_Enable_writes( _area )
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#define BSP_FLASH_DISABLE_WRITES(_area) SCORE603e_FLASH_Disable( _area )
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#define BSP_FLASH_DISABLE_WRITES(_area) SCORE603e_FLASH_Disable( _area )
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@@ -1,6 +1,9 @@
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/* FPGA.c -- Bridge for second and subsequent generations
|
/*
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*
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* FPGA.c -- Bridge for second and subsequent generations
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* COPYRIGHT (c) 1989-2009.
|
*/
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|
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|
/*
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|
* COPYRIGHT (c) 1989-2014.
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||||||
* On-Line Applications Research Corporation (OAR).
|
* On-Line Applications Research Corporation (OAR).
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||||||
*
|
*
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||||||
* The license and distribution terms for this file may be
|
* The license and distribution terms for this file may be
|
||||||
@@ -120,7 +123,7 @@ void init_irq_data_register(void)
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}
|
}
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}
|
}
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|
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uint16_t read_and_clear_PMC_irq(
|
uint16_t read_and_clear_PMC_irq(
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uint16_t irq
|
uint16_t irq
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)
|
)
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{
|
{
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|
|||||||
Reference in New Issue
Block a user