2000-10-19 Antti P Miettinen <anmietti@trshp.ntc.nokia.com>

* configure.in: Add m68k support.
	* include/rdbg/m68k, src/m68k, src/m68k/any: New subdirectory.
	* src/_servtgt.c: add status text to prinf upon task creation failure.
	* src/rdbg.c: reconnect rdbg exception handlers upon RPC calls.
	* src/m68k/Makefile.am, src/m68k/any/Makefile.am,
	src/m68k/any/remdeb_f.x, src/m68k/any/.cvsignore,
	src/m68k/any/remdeb.h, src/m68k/any/remdeb_xdr.c,
	src/m68k/any/remdeb_svc.c, src/m68k/excep_f.c, src/m68k/rdbg_cpu_asm.S,
	src/m68k/rdbg_f.c, src/m68k/.cvsignore: New files.
This commit is contained in:
Joel Sherrill
2000-10-19 15:35:21 +00:00
parent 0da0dea224
commit c92fb641f0
16 changed files with 828 additions and 7 deletions

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@@ -1,3 +1,15 @@
2000-10-19 Antti P Miettinen <anmietti@trshp.ntc.nokia.com>
* configure.in: Add m68k support.
* include/rdbg/m68k, src/m68k, src/m68k/any: New subdirectory.
* src/_servtgt.c: add status text to prinf upon task creation failure.
* src/rdbg.c: reconnect rdbg exception handlers upon RPC calls.
* src/m68k/Makefile.am, src/m68k/any/Makefile.am,
src/m68k/any/remdeb_f.x, src/m68k/any/.cvsignore,
src/m68k/any/remdeb.h, src/m68k/any/remdeb_xdr.c,
src/m68k/any/remdeb_svc.c, src/m68k/excep_f.c, src/m68k/rdbg_cpu_asm.S,
src/m68k/rdbg_f.c, src/m68k/.cvsignore: New files.
2000-09-04 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* src/i386/any/Makefile.am, src/powerpc/mcp750/Makefile.am: Include

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@@ -54,9 +54,12 @@ include/Makefile
include/rdbg/Makefile
include/rdbg/i386/Makefile
include/rdbg/powerpc/Makefile
include/rdbg/m68k/Makefile
src/Makefile
src/i386/Makefile
src/i386/any/Makefile
src/powerpc/Makefile
src/powerpc/mcp750/Makefile
src/m68k/Makefile
src/m68k/any/Makefile
)

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@@ -0,0 +1,2 @@
Makefile
Makefile.in

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@@ -0,0 +1,30 @@
##
## $Id$
##
AUTOMAKE_OPTIONS = foreign 1.4
H_FILES = rdbg_f.h reg.h
noinst_HEADERS = $(H_FILES)
##PREINSTALL_FILES = \
##$(PROJECT_INCLUDE)/rdbg/m68k \
##$(noinst_HEADERS:%=$(PROJECT_INCLUDE)/rdbg/m68k/%)
##$(PROJECT_INCLUDE)/rdbg/m68k:
## @$(mkinstalldirs) $@
##$(PROJECT_INCLUDE)/rdbg/m68k/%.h: %.h
## $(INSTALL_DATA) $< $@
PREINSTALL_FILES += $(PROJECT_INCLUDE)/rdbg \
$(noinst_HEADERS:%=$(PROJECT_INCLUDE)/rdbg/%)
$(PROJECT_INCLUDE)/rdbg:
@$(mkinstalldirs) $@
$(PROJECT_INCLUDE)/rdbg/%.h: %.h
$(INSTALL_DATA) $< $@
all-local: $(PREINSTALL_FILES)
include $(top_srcdir)/../../../automake/local.am

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@@ -0,0 +1,39 @@
/*
**************************************************************************
*
* Component = RDBG
* Module = rdbg_f.h
*
* Synopsis = Machine-dependent header file
*
* $Id$
*
**************************************************************************
*/
#ifndef RDBG_F_H
#define RDBG_F_H
#include <rtems.h>
#include <rdbg/remdeb.h>
static inline int isRdbgException(Exception_context *ctx)
{
if (
ctx->ctx->vecnum != 9 /* trace - singlestep */
&& ctx->ctx->vecnum != 47 /* trap #15 - breakpoint */
&& ctx->ctx->vecnum != 36 /* trap #4 - enter RDBG */
) return 0;
else return 1;
}
static inline int getExcNum(Exception_context *ctx)
{
return ctx->ctx->vecnum;
}
extern void connect_rdbg_exception();
#endif

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@@ -0,0 +1,13 @@
/*
* Registers frame offset definition
*
* $Id$
*/
#define NBREGS 18
typedef unsigned int regs[NBREGS];
/* To be used in common code */
typedef regs REGS;

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@@ -183,7 +183,7 @@ Boolean TgtAttach(
RTEMS_DEFAULT_ATTRIBUTES,
&debugId ))
!= RTEMS_SUCCESSFUL){
printf("status = %d\n",status);
printf("status = %d (%s)\n",status,rtems_status_text(status));
rtems_panic ("Can't create task.\n");
}

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@@ -0,0 +1,2 @@
Makefile
Makefile.in

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@@ -0,0 +1,12 @@
##
## $Id$
##
AUTOMAKE_OPTIONS = foreign 1.4
SUBDIRS = any
EXTRA_DIST = excep_f.c rdbg_cpu_asm.S rdbg_f.c
include $(top_srcdir)/../../../automake/subdirs.am
include $(top_srcdir)/../../../automake/local.am

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@@ -0,0 +1,2 @@
Makefile
Makefile.in

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@@ -0,0 +1,91 @@
##
## $Id$
##
AUTOMAKE_OPTIONS = foreign 1.4
VPATH = @srcdir@:@srcdir@/..:@srcdir@/../..
LIBNAME = librdbg
LIB = ${ARCH}/${LIBNAME}.a
# C and C++ source names
C_FILES = rdbg.c servcon.c servbkpt.c servrpc.c excep.c excep_f.c servtgt.c \
servtsp.c servutil.c _servtgt.c rdbg_f.c ptrace.c
C_O_FILES = $(C_FILES:%.c=${ARCH}/%.o)
# Asm source names
S_FILES = rdbg_cpu_asm.S
S_O_FILES = $(S_FILES:%.S=${ARCH}/%.o)
# Generated C source names
GEN_C_FILES = remdeb_xdr.c remdeb_svc.c
GEN_C_O_FILES = $(GEN_C_FILES:%.c=${ARCH}/%.o)
# H source names
H_FILES = remdeb.h
# X source names
X_FILES = remdeb.x remdeb_f.x
OBJS = $(GEN_C_O_FILES) $(C_O_FILES) $(S_O_FILES)
include $(RTEMS_ROOT)/make/custom/@RTEMS_BSP@.cfg
include $(top_srcdir)/../../../automake/compile.am
include $(top_srcdir)/../../../automake/lib.am
#
# Add local stuff here using +=
#
MAINTAINERCLEANFILES += $(H_FILES) $(GEN_C_FILES)
FRONTEND = \"$(RTEMS_CPU)/any/remdeb_f.x\"
$(PROJECT_RELEASE)/lib/$(LIBNAME)$(LIB_VARIANT).a: $(LIB)
$(INSTALL_DATA) $< $@
$(LIB): ${OBJS}
$(make-library)
$(srcdir)/remdeb.h: $(X_FILES)
if RPCTOOLS
@rm -f $@
( cd $(top_srcdir)/src; \
$(RPCGEN) -h -DFRONTEND=$(FRONTEND) \
-o m68k/any/remdeb.h remdeb.x )
endif
$(srcdir)/remdeb_xdr.c: $(X_FILES)
if RPCTOOLS
@rm -f $@
( cd $(top_srcdir)/src; \
$(RPCGEN) -c -DFRONTEND=$(FRONTEND) \
-o m68k/any/remdeb_xdr.c remdeb.x )
endif
$(srcdir)/remdeb_svc.c: $(X_FILES)
if RPCTOOLS
@rm -f $@ tmpSvc.c
( cd $(top_srcdir)/src; \
$(RPCGEN) -m -DFRONTEND=$(FRONTEND) \
-o m68k/any/tmpSvc.c remdeb.x; \
$(AWK) -f ./awk.svc THEPROG="remdeb.h" m68k/any/tmpSvc.c \
> m68k/any/remdeb_svc.c; \
rm -f m68k/any/tmpSvc.c )
endif
$(PROJECT_INCLUDE)/rdbg/remdeb.h: $(srcdir)/remdeb.h
$(INSTALL_DATA) $< $@
$(PROJECT_INCLUDE)/rdbg:
@$(mkinstalldirs) $@
PREINSTALL_FILES += $(PROJECT_INCLUDE)/rdbg $(PROJECT_INCLUDE)/rdbg/remdeb.h
TMPINSTALL_FILES += $(PROJECT_RELEASE)/lib/$(LIBNAME)$(LIB_VARIANT).a
all-local: ${ARCH} $(PREINSTALL_FILES) $(TMPINSTALL_FILES)
EXTRA_DIST = remdeb_f.x $(GEN_C_FILES)
include $(top_srcdir)/../../../automake/local.am

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@@ -0,0 +1,70 @@
/*
**************************************************************************
*
* Component = rdblib
*
* Synopsis = remdeb_f.x
*
*
* Copyright(C) 2000 Canon Research Center France SA.
*
* Developped by :
* Eric Valette, mail to : valette@crf.canon.fr
* Emmanuel Raguet, mail to : raguet@crf.canon.fr
*
* $Header$
*
**************************************************************************
*/
/* Basic, host-specific, and target-specific definitions for GDB.
Copyright (C) 1986, 1989, 1991, 1992, 1993, 1994, 1995
Free Software Foundation, Inc.
This file is part of GDB.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
struct xdr_regs {
int r_dreg[8]; /* data registers */
int r_areg[8]; /* address registers */
int r_sr; /* status register (actually a short) */
int r_pc; /* program counter */
int r_vec; /* last vector */
};
#ifdef RPC_HDR
%/* now define register macros to apply to xdr_reg struct */
%
%#define r_r0 r_dreg[0] /* r0 for portability */
%#define r_sp r_areg[7] /* user stack pointer */
%#define r_ps r_sr
%#define REG_PC r_pc /* PC register offset */
%#define REG_SP r_areg[7] /* SP register offset */
%#define REG_FP r_areg[6] /* FP register offset */
%/* now define the BREAKPOINT mask technique to a long word */
%#define SET_BREAK(l) ((l&0x0000FFFF) | 0x4E4F0000) /* TRAP 15 */
%#define IS_BREAK(l) (((l) & 0xFFFF0000) == 0x4E4F0000)
%#define ORG_BREAK(c,p) (((c) & 0x0000FFFF) | ((p) & 0xFFFF0000))
%#define IS_STEP(regs) ((regs).r_vec == 9)
%#define BREAK_ADJ 0
%#define BREAK_SIZE 2
%#define TARGET_PROC_TYPE 2
#endif

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@@ -0,0 +1,172 @@
/*
**************************************************************************
*
* Component =
*
* Synopsis = rdbg/m68k/excep_f.c
*
* $Id$
*
**************************************************************************
*/
#include <rtems.h>
#include <rtems/error.h>
#include <assert.h>
#include <errno.h>
#include <rdbg/rdbg.h>
#include <rdbg/servrpc.h>
int
ExcepToSig (Exception_context *ctx)
{
int excep = getExcNum (ctx);
switch (excep) {
case 2 : return 10; break; /* bus error */
case 3 : return 10; break; /* address error */
case 4 : return 4; break; /* illegal instruction */
case 5 : return 8; break; /* zero divide */
case 6 : return 8; break; /* chk instruction */
case 7 : return 8; break; /* trapv instruction */
case 8 : return 11; break; /* privilege violation */
case 9 : return 5; break; /* trace trap */
case 10: return 4; break; /* line 1010 emulator */
case 11: return 4; break; /* line 1111 emulator */
/* Coprocessor protocol violation. Using a standard MMU or FPU
this cannot be triggered by software. Call it a SIGBUS. */
case 13: return 10; break;
case 31: return 2; break; /* interrupt */
case 33: return 5; break; /* monitor breakpoint */
case 34: return 2; break; /* lets use this for SCC1 interrupt */
case 35: return 5; break; /* rdbg breakpoint */
case 36: return 2; break; /* enter RDBG */
/* This is a trap #8 instruction. Apparently it is someone's software
convention for some sort of SIGFPE condition. Whose? How many
people are being screwed by having this code the way it is?
Is there a clean solution? */
case 40: return 8; break; /* floating point err */
case 47: return 5; break; /* rdbg breakpoint */
case 48: return 8; break; /* floating point err */
case 49: return 8; break; /* floating point err */
case 50: return 8; break; /* zero divide */
case 51: return 8; break; /* underflow */
case 52: return 8; break; /* operand error */
case 53: return 8; break; /* overflow */
case 54: return 8; break; /* NAN */
default:
return 7; /* "software generated"*/
}
return SIGKILL;
}
/*----- Breakpoint Exception management -----*/
/*
* Handler for Breakpoint Exceptions :
* software breakpoints.
*/
void
BreakPointExcHdl(CPU_Exception_frame *ctx)
{
rtems_status_code status;
rtems_id continueSemId;
connect_rdbg_exception(); /* monitor stub changes trace vector */
if ( (justSaveContext) && (ctx->vecnum == 47) ) { /* break */
PushSavedExceptCtx (_Thread_Executing->Object.id, ctx);
justSaveContext = 0;
}
else {
if (ctx->vecnum != 9) { /* trace */
NbSerializedCtx++;
rtems_semaphore_obtain(serializeSemId, RTEMS_WAIT, RTEMS_NO_TIMEOUT);
NbSerializedCtx--;
}
currentTargetThread = _Thread_Executing->Object.id;
#ifdef DDEBUG
printk("----------------------------------------------------------\n");
printk("Exception %d caught at PC %x by thread %d\n",
ctx->vecnum,
ctx->pc,
_Thread_Executing->Object.id);
printk("----------------------------------------------------------\n");
printk("Processor execution context at time of the fault was :\n");
printk("----------------------------------------------------------\n");
printk("\t A0 = %x\n", ctx->a0);
printk("\t A1 = %x\n", ctx->a1);
printk("\t A2 = %x\n", ctx->a2);
printk("\t A3 = %x\n", ctx->a3);
printk("\t A4 = %x\n", ctx->a4);
printk("\t A5 = %x\n", ctx->a5);
printk("\t A6 = %x\n", ctx->a6);
printk("\t A7 = %x\n", ctx->a7);
printk("\t D0 = %x\n", ctx->d0);
printk("\t D1 = %x\n", ctx->d1);
printk("\t D2 = %x\n", ctx->d2);
printk("\t D3 = %x\n", ctx->d3);
printk("\t D4 = %x\n", ctx->d4);
printk("\t D5 = %x\n", ctx->d5);
printk("\t D6 = %x\n", ctx->d6);
printk("\t D7 = %x\n", ctx->d7);
printk("\t SR = %x\n", ctx->sr);
#endif
status = rtems_semaphore_create (rtems_build_name('D', 'B', 'G', 'c'),
0,
RTEMS_FIFO |
RTEMS_COUNTING_SEMAPHORE |
RTEMS_NO_INHERIT_PRIORITY |
RTEMS_NO_PRIORITY_CEILING |
RTEMS_LOCAL,
0,
&continueSemId);
if (status != RTEMS_SUCCESSFUL)
rtems_panic ("Can't create continue semaphore: `%s'\n",
rtems_status_text(status));
PushExceptCtx (_Thread_Executing->Object.id, continueSemId, ctx);
switch (ctx->vecnum){
case 9 : /* trace */
DPRINTF((" TRACE EXCEPTION !!!\n"));
ctx->sr &= ~(1 << 15);
ExitForSingleStep-- ;
rtems_semaphore_release( wakeupEventSemId );
break;
case 47 : /* trap #15 */
DPRINTF((" BREAKPOINT EXCEPTION !!!\n"));
rtems_semaphore_release( wakeupEventSemId );
break;
case 36 : /* trap #4 */
DPRINTF((" ENTER RDBG !!!\n"));
rtems_semaphore_release( wakeupEventSemId );
break;
default:
DPRINTF((" OTHER EXCEPTION !!!\n"));
rtems_semaphore_release( wakeupEventSemId );
break;
}
rtems_semaphore_obtain(continueSemId, RTEMS_WAIT, RTEMS_NO_TIMEOUT);
PopExceptCtx (_Thread_Executing->Object.id);
rtems_semaphore_delete(continueSemId);
}
connect_rdbg_exception(); /* monitor stub changes trace vector */
}

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@@ -0,0 +1,199 @@
/* rdbg_cpu_asm.s
*
* This file contains all assembly code for the Motorola m68k implementation
* of RDBG.
*
* $Id$
*
*/
#include <asm.h>
#include <rtems/score/cpu.h>
BEGIN_CODE
/*
* void copyback_data_cache_and_invalidate_instr_cache(addr, size)
*
* This routine performs a copy of the data cache
* and invalidate the instruction cache
*/
.align 2
PUBLIC (copyback_data_cache_and_invalidate_instr_cache)
SYM (copyback_data_cache_and_invalidate_instr_cache):
nop | how?
rts
/*
* void enterRdbg(void)
*
* This function performs trap #4
* It is used :
* 1 - in the user code, to simulate a Breakpoint.
* (with justSaveContext = 0)
* 2 - in the RDBG code, to push a ctx in the list.
* (with justSaveContext = 1)
*
* In most of case, it will be use as described in 1.
* The 2nd possibility will be used by RDBG to obtain
* its own ctx
*/
PUBLIC (enterRdbg)
SYM (enterRdbg):
trap #4
rts
/*
* void excHandler(void)
*
* lotsa copypaste from cpu_asm.S
*
*/
/*
* The RTEMS jump table pushes vector
*
* The two types of exception frames on m68000 are
*
* unsigned16 sr <- sp
* unsigned32 pc
*
* unsigned16 fc <- sp
* unsigned32 addr
* unsigned16 instr
* unsigned16 sr
* unsigned32 pc
*
* after real frame we push d0-d1/a0-a1
*
* after that we push CPU_Exception_frame
*
* exframe <- sp
* d0-d1/a0-a1
* frame
*/
#if ( M68K_COLDFIRE_ARCH == 1 )
.set SR_OFFSET, 2 | Status register offset
.set PC_OFFSET, 4 | Program Counter offset
.set FVO_OFFSET, 0 | Format/vector offset
#elif ( M68K_HAS_VBR == 1 )
.set SR_OFFSET, 0 | Status register offset
.set PC_OFFSET, 2 | Program Counter offset
.set FVO_OFFSET, 6 | Format/vector offset
#else
.set SR_OFFSET, 2 | Status register offset
.set PC_OFFSET, 4 | Program Counter offset
.set FVO_OFFSET, 0 | Format/vector offset placed in the stack
#endif /* M68K_HAS_VBR */
.align 4
PUBLIC (excHandler)
PUBLIC (BreakPointExcHdl)
SYM (excHandler):
#if ( M68K_COLDFIRE_ARCH == 0 )
moveml d0-d1/a0-a1,a7@- | save d0-d1,a0-a1
movew a7@(16+FVO_OFFSET),d0 | d0 = F/VO
andl #0x0fff,d0 | d0 = vector offset in vbr
#else
lea a7@(-16),a7
movm.l d0-d1/a0-a1,a7@ | save d0-d1,a0-a1
movew a7@(16+FVO_OFFSET),d0 | d0 = F/VO
andl #0x0ffc,d0 | d0 = vector offset in vbr
#endif
lsrl #2,d0 | d0 = vector number
lea a7@(16),a1 | address of orig frame
lea a7@(16),a0 | address of orig frame
#if ( M68K_HAS_VBR == 0 )
lea a0@(2),a0 | skip vector
#endif
lea a0@(6),a0 | a0 = orig sp
cmpiw #3,d0 | bus error or address error ?
bgt 1f | if >3 then normal exc
#if ( M68K_HAS_VBR == 1 )
lea a1@(2*29),a0
#else
lea a1@(8),a0 | skip extra stuff
lea a0@(6),a0 | a0 = orig sp
#endif
1:
movew a1@(SR_OFFSET),d1 | d1 = sr
andl #0xffff,d1
lea a7@(-76),a7 | reserve room for exception frame
| build CPU_Exception_frame
movel d0,a7@ | vecnum
movel d1,a7@(4) | sr
movel a1@(PC_OFFSET),d1 | d1 = pc
cmpiw #47,d0 | trap #15, breakpoint?
bne 2f
subql #2,d1 | real PC is at trap insn
2: movel d1,a7@(8) | store pc to exframe struct
movel a7@(76),a7@(12) | the orig d0 pushed at beginning
movel a7@(76+4),a7@(16) | the orig d1 pushed at beginning
movel d2,a7@(20)
movel d3,a7@(24)
movel d4,a7@(28)
movel d5,a7@(32)
movel d6,a7@(36)
movel d7,a7@(40)
movel a7@(76+8),a7@(44) | the orig a0 pushed at beginning
movel a7@(76+12),a7@(48) | the orig a1 pushed at beginning
movel a2,a7@(52)
movel a3,a7@(56)
movel a4,a7@(60)
movel a5,a7@(64)
movel a6,a7@(68)
movel a0,a7@(72) | stack pointer before exception
lea a7@,a0 | exframe address
movel a1,a7@- | save top of orig frame
movel a0,a7@- | push exframe address
jsr SYM(BreakPointExcHdl)
addql #4,a7 | pop exframe address
movel a7@+,a1 | restore orig frame address
| XXX what should be restored from exframe??
movel a7@(4),d1 | sr
movew d1,a1@(SR_OFFSET) | store sr to frame XXX ???
movel a7@(8),a1@(PC_OFFSET) | store pc to frame XXX ???
movel a7@(12),a7@(76) | d0 to be restored from stack
movel a7@(16),a7@(76+4) | d1 to be restored from stack
movel a7@(20),d2
movel a7@(24),d3
movel a7@(28),d4
movel a7@(32),d5
movel a7@(36),d6
movel a7@(40),d7
movel a7@(44),a7@(76+8) | a0 to be restored from stack
movel a7@(48),a7@(76+12) | a1 to be restored from stack
movel a7@(52),a2
movel a7@(56),a3
movel a7@(60),a4
movel a7@(64),a5
movel a7@(68),a6
addl #76,a7 | pop exframe
#if ( M68K_COLDFIRE_ARCH == 0 )
moveml a7@+,d0-d1/a0-a1 | restore d0-d1,a0-a1
#else
moveml a7@,d0-d1/a0-a1 | restore d0-d1,a0-a1
lea a7@(16),a7
#endif
#if ( M68K_HAS_VBR == 0 )
addql #2,a7 | pop format/id
#endif /* M68K_HAS_VBR */
| XXX bus err cleanup
rte
END_CODE
END

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@@ -0,0 +1,166 @@
/*
**************************************************************************
*
* Component =
*
* Synopsis = rdbg/m68k/rdbg_f.c
*
* $Id$
*
**************************************************************************
*/
#include <assert.h>
#include <errno.h>
#include <rdbg/reg.h>
#include <rdbg/remdeb.h>
#include <rdbg/rdbg.h>
#include <rtems/score/cpu.h>
#include <rtems/score/thread.h>
void
CtxToRegs (const CPU_Exception_frame* ctx, xdr_regs* regs)
{
regs->r_dreg[0] = ctx->d0;
regs->r_dreg[1] = ctx->d1;
regs->r_dreg[2] = ctx->d2;
regs->r_dreg[3] = ctx->d3;
regs->r_dreg[4] = ctx->d4;
regs->r_dreg[5] = ctx->d5;
regs->r_dreg[6] = ctx->d6;
regs->r_dreg[7] = ctx->d7;
regs->r_areg[0] = ctx->a0;
regs->r_areg[1] = ctx->a1;
regs->r_areg[2] = ctx->a2;
regs->r_areg[3] = ctx->a3;
regs->r_areg[4] = ctx->a4;
regs->r_areg[5] = ctx->a5;
regs->r_areg[6] = ctx->a6;
regs->r_areg[7] = ctx->a7;
regs->r_sr = ctx->sr;
regs->r_pc = ctx->pc;
regs->r_vec = ctx->vecnum;
}
void
RegsToCtx (const xdr_regs* regs, CPU_Exception_frame* ctx)
{
ctx->d0 = regs->r_dreg[0];
ctx->d1 = regs->r_dreg[1];
ctx->d2 = regs->r_dreg[2];
ctx->d3 = regs->r_dreg[3];
ctx->d4 = regs->r_dreg[4];
ctx->d5 = regs->r_dreg[5];
ctx->d6 = regs->r_dreg[6];
ctx->d7 = regs->r_dreg[7];
ctx->a0 = regs->r_areg[0];
ctx->a1 = regs->r_areg[1];
ctx->a2 = regs->r_areg[2];
ctx->a3 = regs->r_areg[3];
ctx->a4 = regs->r_areg[4];
ctx->a5 = regs->r_areg[5];
ctx->a6 = regs->r_areg[6];
ctx->a7 = regs->r_areg[7];
ctx->sr = regs->r_sr;
ctx->pc = regs->r_pc;
ctx->vecnum = regs->r_vec;
}
void
get_ctx_thread( Thread_Control *thread, CPU_Exception_frame* ctx)
{
unsigned int *ptr;
unsigned int i;
/*
* ISR stores d0-d1/a0-a1, calls _Thread_Dispatch
* _Thread_Dispatch calls _Context_Switch == _CPU_Context_switch
* _CPU_Context_switch stores/restores sr,d2-d7,a2-a7
* so if my reasoning is correct, *sp points to a location in
* _Thread_Dispatch
*/
ctx->vecnum = 0xdeadbeef;
ctx->sr = thread->Registers.sr;
ctx->pc = *(unsigned32 *)thread->Registers.a7_msp;
ctx->d0 = 0xdeadbeef;
ctx->d1 = 0xdeadbeef;
ctx->a0 = 0xdeadbeef;
ctx->a1 = 0xdeadbeef;
ctx->a2 = (unsigned32)thread->Registers.a2;
ctx->a3 = (unsigned32)thread->Registers.a3;
ctx->a4 = (unsigned32)thread->Registers.a4;
ctx->a5 = (unsigned32)thread->Registers.a5;
ctx->a6 = (unsigned32)thread->Registers.a6;
ctx->a7 = (unsigned32)thread->Registers.a7_msp;
ctx->d2 = thread->Registers.d2;
ctx->d3 = thread->Registers.d3;
ctx->d4 = thread->Registers.d4;
ctx->d5 = thread->Registers.d5;
ctx->d6 = thread->Registers.d6;
ctx->d7 = thread->Registers.d7;
}
void
set_ctx_thread( Thread_Control *thread, CPU_Exception_frame* ctx)
{
thread->Registers.sr = ctx->sr;
thread->Registers.d2 = ctx->d2;
thread->Registers.d3 = ctx->d3;
thread->Registers.d4 = ctx->d4;
thread->Registers.d5 = ctx->d5;
thread->Registers.d6 = ctx->d6;
thread->Registers.d7 = ctx->d7;
thread->Registers.a2 = (void *)ctx->a2;
thread->Registers.a3 = (void *)ctx->a3;
thread->Registers.a4 = (void *)ctx->a4;
thread->Registers.a5 = (void *)ctx->a5;
thread->Registers.a6 = (void *)ctx->a6;
thread->Registers.a7_msp = (void *)ctx->a7;
}
int
Single_Step(CPU_Exception_frame* ctx)
{
if ((ctx->sr & (1<<15)) != 0 || ExitForSingleStep != 0) {
/* Check coherency */
assert ((ctx->sr & (1<<15)) != 0);
assert (ExitForSingleStep != 0);
return 0;
}
ctx->sr |= 1<<15;
++ExitForSingleStep;
return 0;
}
int
CheckForSingleStep (CPU_Exception_frame* ctx)
{
if (ExitForSingleStep) {
ctx->sr &= ~(1<<15);
ExitForSingleStep = 0;
return 1;
}
return 0;
}
void
CancelSingleStep (CPU_Exception_frame* ctx)
{
/* Cancel scheduled SS */
ctx->sr &= ~(1<<15);
ExitForSingleStep-- ;
}
rtems_isr excHandler();
void connect_rdbg_exception(void)
{
set_vector(excHandler, 9, 0);
set_vector(excHandler, 47, 0);
set_vector(excHandler, 36, 0);
}

View File

@@ -38,7 +38,7 @@ int PID_LIST_INC = 1;
int TSP_RETRIES = 10;
int
int
getId()
{
rtems_id id;
@@ -47,7 +47,15 @@ getId()
return (int)(id) ;
}
static int
static void
remotedeb_2_hook(struct svc_req *rqstp, register SVCXPRT *transp)
{
connect_rdbg_exception(); /* monitor stub changes trace vector */
remotedeb_2(rqstp, transp);
connect_rdbg_exception();
}
static int
rdbgInit (void)
{
int sock;
@@ -79,13 +87,13 @@ rdbgInit (void)
return 0;
}
rtems_task
rtems_task
rdbgDaemon (rtems_task_argument argument)
{
svc_run();
}
void
void
rtems_rdbg_initialize (void)
{
rtems_name task_name;
@@ -130,13 +138,13 @@ error:
printf ("initialization failed.\n");
}
void
void
setErrno (int error)
{
errno = error;
}
int
int
getErrno()
{
return errno;