forked from Imagelibrary/rtems
2005-02-24 Jay Monkman <jtm@lopingdog.com>
* at91rm9200/include/at91rm9200_emac.h: Cleanup.
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@@ -1,3 +1,7 @@
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2005-02-24 Jay Monkman <jtm@lopingdog.com>
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* at91rm9200/include/at91rm9200_emac.h: Cleanup.
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2005-01-07 Ralf Corsepius <ralf.corsepius@rtems.org>
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* at91rm9200/Makefile.am, mc9328mxl/Makefile.am, shared/Makefile.am:
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@@ -83,6 +83,7 @@
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#define EMAC_CFG_CLK_16 (1 << 10) // MII Clock = HCLK divided by 16
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#define EMAC_CFG_CLK_32 (2 << 10) // MII Clock = HCLK divided by 32
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#define EMAC_CFG_CLK_64 (3 << 10) // MII Clock = HCLK divided by 64
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#define EMAC_CFG_CLK_MASK (3 << 10) // MII Clock mask
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#define EMAC_CFG_RTY BIT12 // Retry Test Mode - Must be 0
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#define EMAC_CFG_RMII BIT13 // Reduced MII Mode Enable
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@@ -128,12 +129,13 @@
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// PHY Maintenance Register, EMAC_MAN, Offset 0x34
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#define EMAC_MAN_DATA(_x_) ((_x_ & 0xFFFF) << 0) // PHY data register
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#define EMAC_MAN_CODE (0x3 << 6) // IEEE Code
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#define EMAC_MAN_CODE (0x2 << 16) // IEEE Code
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#define EMAC_MAN_REGA(_x_) ((_x_ & 0x1F) << 18) // PHY register address
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#define EMAC_MAN_PHYA(_x_) ((_x_ & 0x1F) << 23) // PHY address
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#define EMAC_MAN_WRITE (0x1 << 28) // Transfer is a write
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#define EMAC_MAN_READ (0x2 << 28) // Transfer is a read
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#define EMAC_MAN_HIGH BIT30 // Must be set
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#define EMAC_MAN_LOW BIT31
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// Bit assignments for Receive Buffer Descriptor
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// Address - Word 0
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