forked from Imagelibrary/rtems
bsp/qoriq: Flush and invalidate all L2 caches
This commit is contained in:
@@ -70,6 +70,7 @@ libbsp_a_SOURCES += \
|
||||
../shared/startup/bspidle.c \
|
||||
../shared/uboot_getenv.c \
|
||||
../shared/uboot_dump_bdinfo.c \
|
||||
startup/l2cache.S \
|
||||
startup/mmu.c \
|
||||
startup/mmu-tlb1.S \
|
||||
startup/mmu-config.c \
|
||||
|
||||
@@ -172,9 +172,17 @@ RTEMS_BSPOPTS_SET([QORIQ_HAS_HYPERVISOR_MODE],[qoriq_t*],[1])
|
||||
RTEMS_BSPOPTS_SET([QORIQ_HAS_HYPERVISOR_MODE],[*],[])
|
||||
RTEMS_BSPOPTS_HELP([QORIQ_HAS_HYPERVISOR_MODE],[defined if the processor core has a hypervisor mode])
|
||||
|
||||
RTEMS_BSPOPTS_SET([QORIQ_L2CSR0],[qoriq_t*],[0xfec20000])
|
||||
RTEMS_BSPOPTS_SET([QORIQ_L2CSR0],[*],[])
|
||||
RTEMS_BSPOPTS_HELP([QORIQ_L2CSR0],[address of L2CSR0 register])
|
||||
RTEMS_BSPOPTS_SET([QORIQ_CLUSTER_1_L2CSR0],[qoriq_t*],[0xfec20000])
|
||||
RTEMS_BSPOPTS_SET([QORIQ_CLUSTER_1_L2CSR0],[*],[])
|
||||
RTEMS_BSPOPTS_HELP([QORIQ_CLUSTER_1_L2CSR0],[address of Cluster 1 L2CSR0 register])
|
||||
|
||||
RTEMS_BSPOPTS_SET([QORIQ_CLUSTER_2_L2CSR0],[qoriq_t4240*],[0xfec60000])
|
||||
RTEMS_BSPOPTS_SET([QORIQ_CLUSTER_2_L2CSR0],[*],[])
|
||||
RTEMS_BSPOPTS_HELP([QORIQ_CLUSTER_2_L2CSR0],[address of Cluster 2 L2CSR0 register])
|
||||
|
||||
RTEMS_BSPOPTS_SET([QORIQ_CLUSTER_3_L2CSR0],[qoriq_t4240*],[0xfeca0000])
|
||||
RTEMS_BSPOPTS_SET([QORIQ_CLUSTER_3_L2CSR0],[*],[])
|
||||
RTEMS_BSPOPTS_HELP([QORIQ_CLUSTER_3_L2CSR0],[address of Cluster 3 L2CSR0 register])
|
||||
|
||||
RTEMS_BSPOPTS_SET([QORIQ_CLOCK_TIMER],[qoriq_core_1],[4])
|
||||
RTEMS_BSPOPTS_SET([QORIQ_CLOCK_TIMER],[*],[0])
|
||||
|
||||
@@ -80,27 +80,19 @@ _start:
|
||||
bne 1b
|
||||
isync
|
||||
|
||||
#ifdef QORIQ_L2CSR0
|
||||
/* Flush L2 cache of first cluster */
|
||||
LWI r4, QORIQ_L2CSR0
|
||||
lwz r3, 0(r4)
|
||||
oris r3, r3, FSL_EIS_L2CSR0_L2FL >> 16
|
||||
stw r3, 0(r4)
|
||||
1:
|
||||
lwz r3, 0(r4)
|
||||
andis. r3, r3, FSL_EIS_L2CSR0_L2FL >> 16
|
||||
bne 1b
|
||||
isync
|
||||
#ifdef QORIQ_CLUSTER_1_L2CSR0
|
||||
LWI r3, QORIQ_CLUSTER_1_L2CSR0
|
||||
bl qoriq_l2cache_flush_invalidate
|
||||
#endif
|
||||
|
||||
/* Invalidate L2 cache of first cluster */
|
||||
lwz r3, 0(r4)
|
||||
oris r3, r3, FSL_EIS_L2CSR0_L2FI >> 16
|
||||
stw r3, 0(r4)
|
||||
1:
|
||||
lwz r3, 0(r4)
|
||||
andis. r3, r3, FSL_EIS_L2CSR0_L2FI >> 16
|
||||
bne 1b
|
||||
isync
|
||||
#ifdef QORIQ_CLUSTER_2_L2CSR0
|
||||
LWI r3, QORIQ_CLUSTER_2_L2CSR0
|
||||
bl qoriq_l2cache_flush_invalidate
|
||||
#endif
|
||||
|
||||
#ifdef QORIQ_CLUSTER_3_L2CSR0
|
||||
LWI r3, QORIQ_CLUSTER_3_L2CSR0
|
||||
bl qoriq_l2cache_flush_invalidate
|
||||
#endif
|
||||
|
||||
/* Get start stack */
|
||||
|
||||
43
c/src/lib/libbsp/powerpc/qoriq/startup/l2cache.S
Normal file
43
c/src/lib/libbsp/powerpc/qoriq/startup/l2cache.S
Normal file
@@ -0,0 +1,43 @@
|
||||
/*
|
||||
* Copyright (c) 2015, 2016 embedded brains GmbH. All rights reserved.
|
||||
*
|
||||
* embedded brains GmbH
|
||||
* Dornierstr. 4
|
||||
* 82178 Puchheim
|
||||
* Germany
|
||||
* <rtems@embedded-brains.de>
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rtems.org/license/LICENSE.
|
||||
*/
|
||||
|
||||
#include <libcpu/powerpc-utility.h>
|
||||
|
||||
.global qoriq_l2cache_flush_invalidate
|
||||
|
||||
.section ".bsp_start_text", "ax"
|
||||
|
||||
qoriq_l2cache_flush_invalidate:
|
||||
|
||||
/* Flush L2 cache */
|
||||
lwz r4, 0(r3)
|
||||
oris r4, r4, FSL_EIS_L2CSR0_L2FL >> 16
|
||||
stw r4, 0(r3)
|
||||
1:
|
||||
lwz r4, 0(r3)
|
||||
andis. r4, r4, FSL_EIS_L2CSR0_L2FL >> 16
|
||||
bne 1b
|
||||
isync
|
||||
|
||||
/* Invalidate L2 cache */
|
||||
lwz r4, 0(r3)
|
||||
oris r4, r4, FSL_EIS_L2CSR0_L2FI >> 16
|
||||
stw r4, 0(r3)
|
||||
1:
|
||||
lwz r4, 0(r3)
|
||||
andis. r4, r4, FSL_EIS_L2CSR0_L2FI >> 16
|
||||
bne 1b
|
||||
isync
|
||||
|
||||
blr
|
||||
Reference in New Issue
Block a user