forked from Imagelibrary/rtems
2002-01-21 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* rtems/Makefile.am: New. * rtems/.cvsignore: New. * rtems/score/Makefile.am: New. * rtems/score/.cvsignore: New. * rtems/score/ppc.h: Relocated from shared/. * rtems/score/ppctypes.h: Relocated from shared/. * asm.h: Relocated from shared/. * shared/Makefile.am: Removed. * shared/asm.h: Removed. * shared/ppc.h: Removed. * shared/ppctypes.h: Removed. * shared/.cvsignore: Removed. * Makefile.am: Reflect changes above. * configure.ac: Reflect changes above.
This commit is contained in:
Joel Sherrill
@@ -1,3 +1,20 @@
|
||||
2002-01-21 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
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||||
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||||
* rtems/Makefile.am: New.
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||||
* rtems/.cvsignore: New.
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||||
* rtems/score/Makefile.am: New.
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||||
* rtems/score/.cvsignore: New.
|
||||
* rtems/score/ppc.h: Relocated from shared/.
|
||||
* rtems/score/ppctypes.h: Relocated from shared/.
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||||
* asm.h: Relocated from shared/.
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||||
* shared/Makefile.am: Removed.
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||||
* shared/asm.h: Removed.
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||||
* shared/ppc.h: Removed.
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||||
* shared/ppctypes.h: Removed.
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||||
* shared/.cvsignore: Removed.
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||||
* Makefile.am: Reflect changes above.
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||||
* configure.ac: Reflect changes above.
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||||
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||||
2001-11-28 Joel Sherrill <joel@OARcorp.com>,
|
||||
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||||
This was tracked as PR91.
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||||
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||||
@@ -2,10 +2,35 @@
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||||
## $Id$
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||||
##
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||||
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||||
AUTOMAKE_OPTIONS = foreign 1.4
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||||
AUTOMAKE_OPTIONS = foreign 1.5
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||||
ACLOCAL_AMFLAGS = -I ../../../../../../aclocal
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||||
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||||
SUBDIRS = shared
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||||
SUBDIRS = rtems
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||||
include_HEADERS = asm.h
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||||
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||||
include $(top_srcdir)/../../../../../../automake/multilib.am
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include $(top_srcdir)/../../../../../../automake/compile.am
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||||
include $(top_srcdir)/../../../../../../automake/lib.am
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||||
|
||||
$(PROJECT_INCLUDE):
|
||||
$(mkinstalldirs) $@
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||||
|
||||
$(PROJECT_INCLUDE)/%.h: %.h
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$(INSTALL_DATA) $< $@
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||||
# $(PROJECT_RELEASE)/lib$(MULTISUBDIR)/rtems$(LIB_VARIANT).o: $(ARCH)/rtems.o
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# $(INSTALL_DATA) $< $@
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# $(REL): $(rtems_cpu_rel_OBJECTS)
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# $(make-rel)
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PREINSTALL_FILES = $(PROJECT_INCLUDE) $(include_HEADERS:%=$(PROJECT_INCLUDE)/%)
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||||
# TMPINSTALL_FILES += $(PROJECT_RELEASE)/lib$(MULTISUBDIR)/rtems$(LIB_VARIANT).o
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all-local: $(ARCH) $(PREINSTALL_FILES) $(rtems_cpu_rel_OBJECTS) $(REL) \
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||||
$(TMPINSTALL_FILES)
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||||
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||||
include $(top_srcdir)/../../../../../../automake/subdirs.am
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include $(top_srcdir)/../../../../../../automake/local.am
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||||
@@ -27,5 +27,6 @@ RTEMS_CHECK_NEWLIB
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# Explicitly list all Makefiles here
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AC_CONFIG_FILES([Makefile
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shared/Makefile])
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rtems/Makefile
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rtems/score/Makefile])
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AC_OUTPUT
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||||
10
c/src/exec/score/cpu/powerpc/rtems/Makefile.am
Normal file
10
c/src/exec/score/cpu/powerpc/rtems/Makefile.am
Normal file
@@ -0,0 +1,10 @@
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||||
##
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||||
## $Id$
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||||
##
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||||
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||||
AUTOMAKE_OPTIONS = foreign 1.5
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||||
|
||||
SUBDIRS = score
|
||||
|
||||
include $(top_srcdir)/../../../../../../automake/subdirs.am
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||||
include $(top_srcdir)/../../../../../../automake/local.am
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||||
2
c/src/exec/score/cpu/powerpc/rtems/score/.cvsignore
Normal file
2
c/src/exec/score/cpu/powerpc/rtems/score/.cvsignore
Normal file
@@ -0,0 +1,2 @@
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||||
Makefile
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||||
Makefile.in
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||||
@@ -2,33 +2,24 @@
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||||
## $Id$
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||||
##
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||||
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||||
AUTOMAKE_OPTIONS = foreign 1.4
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||||
AUTOMAKE_OPTIONS = foreign 1.5
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||||
|
||||
include_rtems_scoredir = $(includedir)/rtems/score
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include_HEADERS = asm.h
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include_rtems_score_HEADERS = ppc.h ppctypes.h
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||||
#
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||||
# (OPTIONAL) Add local stuff here using +=
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#
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||||
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||||
PREINSTALL_FILES = $(PROJECT_INCLUDE) $(PROJECT_INCLUDE)/rtems/score \
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||||
$(include_HEADERS:%.h=$(PROJECT_INCLUDE)/%.h) \
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||||
PREINSTALL_FILES = $(PROJECT_INCLUDE)/rtems/score \
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||||
$(include_rtems_score_HEADERS:%.h=$(PROJECT_INCLUDE)/rtems/score/%.h)
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||||
|
||||
$(PROJECT_INCLUDE):
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$(mkinstalldirs) $@
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||||
|
||||
$(PROJECT_INCLUDE)/rtems/score:
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||||
$(mkinstalldirs) $@
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||||
|
||||
$(PROJECT_INCLUDE)/rtems/score/%.h: %.h
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$(INSTALL_DATA) $< $@
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||||
|
||||
$(PROJECT_INCLUDE)/%.h: %.h
|
||||
$(INSTALL_DATA) $< $@
|
||||
|
||||
all-local: $(PREINSTALL_FILES)
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||||
|
||||
include $(top_srcdir)/../../../../../../automake/local.am
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||||
@@ -1,292 +0,0 @@
|
||||
/* asm.h
|
||||
*
|
||||
* This include file attempts to address the problems
|
||||
* caused by incompatible flavors of assemblers and
|
||||
* toolsets. It primarily addresses variations in the
|
||||
* use of leading underscores on symbols and the requirement
|
||||
* that register names be preceded by a %.
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||||
*
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||||
*
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||||
* NOTE: The spacing in the use of these macros
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||||
* is critical to them working as advertised.
|
||||
*
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||||
* COPYRIGHT:
|
||||
*
|
||||
* This file is based on similar code found in newlib available
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||||
* from ftp.cygnus.com. The file which was used had no copyright
|
||||
* notice. This file is freely distributable as long as the source
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||||
* of the file is noted. This file is:
|
||||
*
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||||
* COPYRIGHT (c) 1995.
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||||
* i-cubed ltd.
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||||
*
|
||||
* COPYRIGHT (c) 1994.
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||||
* On-Line Applications Research Corporation (OAR).
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||||
*
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||||
* $Id$
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||||
*/
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||||
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||||
#ifndef __PPC_ASM_h
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||||
#define __PPC_ASM_h
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||||
/*
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* Indicate we are in an assembly file and get the basic CPU definitions.
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||||
*/
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||||
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||||
#ifndef ASM
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#define ASM
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||||
#endif
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||||
#include <rtems/score/targopts.h>
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||||
#include <rtems/score/ppc.h>
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||||
|
||||
/*
|
||||
* Recent versions of GNU cpp define variables which indicate the
|
||||
* need for underscores and percents. If not using GNU cpp or
|
||||
* the version does not support this, then you will obviously
|
||||
* have to define these as appropriate.
|
||||
*/
|
||||
|
||||
#ifndef __USER_LABEL_PREFIX__
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||||
#define __USER_LABEL_PREFIX__
|
||||
#endif
|
||||
|
||||
#ifndef __REGISTER_PREFIX__
|
||||
#define __REGISTER_PREFIX__
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||||
#endif
|
||||
|
||||
#ifndef __FLOAT_REGISTER_PREFIX__
|
||||
#define __FLOAT_REGISTER_PREFIX__ __REGISTER_PREFIX__
|
||||
#endif
|
||||
|
||||
#if (PPC_ABI == PPC_ABI_POWEROPEN)
|
||||
#ifndef __PROC_LABEL_PREFIX__
|
||||
#define __PROC_LABEL_PREFIX__ .
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifndef __PROC_LABEL_PREFIX__
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||||
#define __PROC_LABEL_PREFIX__ __USER_LABEL_PREFIX__
|
||||
#endif
|
||||
|
||||
/* ANSI concatenation macros. */
|
||||
|
||||
#define CONCAT1(a, b) CONCAT2(a, b)
|
||||
#define CONCAT2(a, b) a ## b
|
||||
|
||||
/* Use the right prefix for global labels. */
|
||||
|
||||
#define SYM(x) CONCAT1 (__USER_LABEL_PREFIX__, x)
|
||||
|
||||
/* Use the right prefix for procedure labels. */
|
||||
|
||||
#define PROC(x) CONCAT1 (__PROC_LABEL_PREFIX__, x)
|
||||
|
||||
/* Use the right prefix for registers. */
|
||||
|
||||
#define REG(x) CONCAT1 (__REGISTER_PREFIX__, x)
|
||||
|
||||
/* Use the right prefix for floating point registers. */
|
||||
|
||||
#define FREG(x) CONCAT1 (__FLOAT_REGISTER_PREFIX__, x)
|
||||
|
||||
/*
|
||||
* define macros for all of the registers on this CPU
|
||||
*
|
||||
* EXAMPLE: #define d0 REG (d0)
|
||||
*/
|
||||
#define r0 REG(0)
|
||||
#define r1 REG(1)
|
||||
#define r2 REG(2)
|
||||
#define r3 REG(3)
|
||||
#define r4 REG(4)
|
||||
#define r5 REG(5)
|
||||
#define r6 REG(6)
|
||||
#define r7 REG(7)
|
||||
#define r8 REG(8)
|
||||
#define r9 REG(9)
|
||||
#define r10 REG(10)
|
||||
#define r11 REG(11)
|
||||
#define r12 REG(12)
|
||||
#define r13 REG(13)
|
||||
#define r14 REG(14)
|
||||
#define r15 REG(15)
|
||||
#define r16 REG(16)
|
||||
#define r17 REG(17)
|
||||
#define r18 REG(18)
|
||||
#define r19 REG(19)
|
||||
#define r20 REG(20)
|
||||
#define r21 REG(21)
|
||||
#define r22 REG(22)
|
||||
#define r23 REG(23)
|
||||
#define r24 REG(24)
|
||||
#define r25 REG(25)
|
||||
#define r26 REG(26)
|
||||
#define r27 REG(27)
|
||||
#define r28 REG(28)
|
||||
#define r29 REG(29)
|
||||
#define r30 REG(30)
|
||||
#define r31 REG(31)
|
||||
#define f0 FREG(0)
|
||||
#define f1 FREG(1)
|
||||
#define f2 FREG(2)
|
||||
#define f3 FREG(3)
|
||||
#define f4 FREG(4)
|
||||
#define f5 FREG(5)
|
||||
#define f6 FREG(6)
|
||||
#define f7 FREG(7)
|
||||
#define f8 FREG(8)
|
||||
#define f9 FREG(9)
|
||||
#define f10 FREG(10)
|
||||
#define f11 FREG(11)
|
||||
#define f12 FREG(12)
|
||||
#define f13 FREG(13)
|
||||
#define f14 FREG(14)
|
||||
#define f15 FREG(15)
|
||||
#define f16 FREG(16)
|
||||
#define f17 FREG(17)
|
||||
#define f18 FREG(18)
|
||||
#define f19 FREG(19)
|
||||
#define f20 FREG(20)
|
||||
#define f21 FREG(21)
|
||||
#define f22 FREG(22)
|
||||
#define f23 FREG(23)
|
||||
#define f24 FREG(24)
|
||||
#define f25 FREG(25)
|
||||
#define f26 FREG(26)
|
||||
#define f27 FREG(27)
|
||||
#define f28 FREG(28)
|
||||
#define f29 FREG(29)
|
||||
#define f30 FREG(30)
|
||||
#define f31 FREG(31)
|
||||
|
||||
/*
|
||||
* Some special purpose registers (SPRs).
|
||||
*/
|
||||
#define srr0 0x01a
|
||||
#define srr1 0x01b
|
||||
#if defined(ppc403) || defined(ppc405)
|
||||
#define srr2 0x3de /* IBM 400 series only */
|
||||
#define srr3 0x3df /* IBM 400 series only */
|
||||
#endif /* ppc403 or ppc405 */
|
||||
|
||||
#define sprg0 0x110
|
||||
#define sprg1 0x111
|
||||
#define sprg2 0x112
|
||||
#define sprg3 0x113
|
||||
|
||||
#define dar 0x013 /* Data Address Register */
|
||||
#define dec 0x016 /* Decrementer Register */
|
||||
|
||||
#if defined(ppc403) || defined(ppc405)
|
||||
/* the following SPR/DCR registers exist only in IBM 400 series */
|
||||
#define dear 0x3d5
|
||||
#define evpr 0x3d6 /* SPR: exception vector prefix register */
|
||||
#define iccr 0x3fb /* SPR: instruction cache control reg. */
|
||||
#define dccr 0x3fa /* SPR: data cache control reg. */
|
||||
|
||||
#if defined (ppc403)
|
||||
#define exisr 0x040 /* DCR: external interrupt status register */
|
||||
#define exier 0x042 /* DCR: external interrupt enable register */
|
||||
#endif /* ppc403 */
|
||||
#if defined(ppc405)
|
||||
#define exisr 0x0C0 /* DCR: external interrupt status register */
|
||||
#define exier 0x0C2 /* DCR: external interrupt enable register */
|
||||
#endif /* ppc405 */
|
||||
|
||||
#define br0 0x080 /* DCR: memory bank register 0 */
|
||||
#define br1 0x081 /* DCR: memory bank register 1 */
|
||||
#define br2 0x082 /* DCR: memory bank register 2 */
|
||||
#define br3 0x083 /* DCR: memory bank register 3 */
|
||||
#define br4 0x084 /* DCR: memory bank register 4 */
|
||||
#define br5 0x085 /* DCR: memory bank register 5 */
|
||||
#define br6 0x086 /* DCR: memory bank register 6 */
|
||||
#define br7 0x087 /* DCR: memory bank register 7 */
|
||||
/* end of IBM400 series register definitions */
|
||||
|
||||
#elif defined(mpc860) || defined(mpc821)
|
||||
/* The following registers are for the MPC8x0 */
|
||||
#define der 0x095 /* Debug Enable Register */
|
||||
#define ictrl 0x09E /* Instruction Support Control Register */
|
||||
#define immr 0x27E /* Internal Memory Map Register */
|
||||
/* end of MPC8x0 registers */
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Following must be tailor for a particular flavor of the C compiler.
|
||||
* They may need to put underscores in front of the symbols.
|
||||
*/
|
||||
|
||||
#define PUBLIC_VAR(sym) .globl SYM (sym)
|
||||
#define EXTERN_VAR(sym) .extern SYM (sym)
|
||||
#define PUBLIC_PROC(sym) .globl PROC (sym)
|
||||
#define EXTERN_PROC(sym) .extern PROC (sym)
|
||||
|
||||
/* Other potentially assembler specific operations */
|
||||
#if PPC_ASM == PPC_ASM_ELF
|
||||
#define ALIGN(n,p) .align p
|
||||
#define DESCRIPTOR(x) \
|
||||
.section .descriptors,"aw"; \
|
||||
PUBLIC_VAR (x); \
|
||||
SYM (x):; \
|
||||
.long PROC (x); \
|
||||
.long s.got; \
|
||||
.long 0
|
||||
|
||||
#define EXT_SYM_REF(x) .long x
|
||||
#define EXT_PROC_REF(x) .long x
|
||||
|
||||
/*
|
||||
* Define macros to handle section beginning and ends.
|
||||
*/
|
||||
|
||||
#define BEGIN_CODE_DCL .text
|
||||
#define END_CODE_DCL
|
||||
#define BEGIN_DATA_DCL .data
|
||||
#define END_DATA_DCL
|
||||
#define BEGIN_CODE .text
|
||||
#define END_CODE
|
||||
#define BEGIN_DATA .data
|
||||
#define END_DATA
|
||||
#define BEGIN_BSS .bss
|
||||
#define END_BSS
|
||||
#define END
|
||||
|
||||
#elif PPC_ASM == PPC_ASM_XCOFF
|
||||
#define ALIGN(n,p) .align p
|
||||
#define DESCRIPTOR(x) \
|
||||
.csect x[DS]; \
|
||||
.globl x[DS]; \
|
||||
.long PROC (x)[PR]; \
|
||||
.long TOC[tc0]
|
||||
|
||||
#define EXT_SYM_REF(x) .long x[RW]
|
||||
#define EXT_PROC_REF(x) .long x[DS]
|
||||
|
||||
/*
|
||||
* Define macros to handle section beginning and ends.
|
||||
*/
|
||||
|
||||
#define BEGIN_CODE_DCL .csect .text[PR]
|
||||
#define END_CODE_DCL
|
||||
#define BEGIN_DATA_DCL .csect .data[RW]
|
||||
#define END_DATA_DCL
|
||||
#define BEGIN_CODE .csect .text[PR]
|
||||
#define END_CODE
|
||||
#define BEGIN_DATA .csect .data[RW]
|
||||
#define END_DATA
|
||||
#define BEGIN_BSS .bss
|
||||
#define END_BSS
|
||||
#define END
|
||||
|
||||
#else
|
||||
#error "PPC_ASM_TYPE is not properly defined"
|
||||
#endif
|
||||
#ifndef PPC_ASM
|
||||
#error "PPC_ASM_TYPE is not properly defined"
|
||||
#endif
|
||||
|
||||
|
||||
#endif
|
||||
/* end of include file */
|
||||
|
||||
|
||||
@@ -1,781 +0,0 @@
|
||||
/* ppc.h
|
||||
*
|
||||
* This file contains definitions for the IBM/Motorola PowerPC
|
||||
* family members.
|
||||
*
|
||||
* Author: Andrew Bray <andy@i-cubed.co.uk>
|
||||
*
|
||||
* COPYRIGHT (c) 1995 by i-cubed ltd.
|
||||
*
|
||||
* MPC860 support code was added by Jay Monkman <jmonkman@frasca.com>
|
||||
* MPC8260 support added by Andy Dachs <a.dachs@sstl.co.uk>
|
||||
* Surrey Satellite Technology Limited
|
||||
*
|
||||
* To anyone who acknowledges that this file is provided "AS IS"
|
||||
* without any express or implied warranty:
|
||||
* permission to use, copy, modify, and distribute this file
|
||||
* for any purpose is hereby granted without fee, provided that
|
||||
* the above copyright notice and this notice appears in all
|
||||
* copies, and that the name of i-cubed limited not be used in
|
||||
* advertising or publicity pertaining to distribution of the
|
||||
* software without specific, written prior permission.
|
||||
* i-cubed limited makes no representations about the suitability
|
||||
* of this software for any purpose.
|
||||
*
|
||||
* Derived from c/src/exec/cpu/no_cpu/no_cpu.h:
|
||||
*
|
||||
* COPYRIGHT (c) 1989-1997.
|
||||
* On-Line Applications Research Corporation (OAR).
|
||||
*
|
||||
* The license and distribution terms for this file may in
|
||||
* the file LICENSE in this distribution or at
|
||||
* http://www.OARcorp.com/rtems/license.html.
|
||||
*
|
||||
*
|
||||
* Note:
|
||||
* This file is included by both C and assembler code ( -DASM )
|
||||
*
|
||||
* $Id$
|
||||
*/
|
||||
|
||||
|
||||
#ifndef _INCLUDE_PPC_h
|
||||
#define _INCLUDE_PPC_h
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include <rtems/score/ppctypes.h>
|
||||
|
||||
/*
|
||||
* Define the name of the CPU family.
|
||||
*/
|
||||
|
||||
#define CPU_NAME "PowerPC"
|
||||
|
||||
/*
|
||||
* This file contains the information required to build
|
||||
* RTEMS for a particular member of the PowerPC family. It does
|
||||
* this by setting variables to indicate which implementation
|
||||
* dependent features are present in a particular member
|
||||
* of the family.
|
||||
*
|
||||
* The following architectural feature definitions are defaulted
|
||||
* unless specifically set by the model definition:
|
||||
*
|
||||
* + PPC_DEBUG_MODEL - PPC_DEBUG_MODEL_STANDARD
|
||||
* + PPC_INTERRUPT_MAX - 16
|
||||
* + PPC_CACHE_ALIGNMENT - 32
|
||||
* + PPC_LOW_POWER_MODE - PPC_LOW_POWER_MODE_NONE
|
||||
* + PPC_HAS_EXCEPTION_PREFIX - 1
|
||||
* + PPC_HAS_FPU - 1
|
||||
* + PPC_HAS_DOUBLE - 1 if PPC_HAS_FPU,
|
||||
* - 0 otherwise
|
||||
* + PPC_USE_MULTIPLE - 0
|
||||
*/
|
||||
|
||||
/*
|
||||
* Define the debugging assistance models found in the PPC family.
|
||||
*
|
||||
* Standard: single step and branch trace
|
||||
* Single Step Only: single step only
|
||||
* IBM 4xx: debug exception
|
||||
*/
|
||||
|
||||
#define PPC_DEBUG_MODEL_STANDARD 1
|
||||
#define PPC_DEBUG_MODEL_SINGLE_STEP_ONLY 2
|
||||
#define PPC_DEBUG_MODEL_IBM4xx 3
|
||||
|
||||
/*
|
||||
* Define the low power mode models
|
||||
*
|
||||
* Standard: as defined for 603e
|
||||
* Nap Mode: nap mode only (604)
|
||||
* XXX 403GB, 603, 603e, 604, 821
|
||||
*/
|
||||
|
||||
#define PPC_LOW_POWER_MODE_NONE 0
|
||||
#define PPC_LOW_POWER_MODE_STANDARD 1
|
||||
|
||||
#if defined(rtems_multilib)
|
||||
/*
|
||||
* Figure out all CPU Model Feature Flags based upon compiler
|
||||
* predefines.
|
||||
*/
|
||||
|
||||
#define CPU_MODEL_NAME "rtems_multilib"
|
||||
#define PPC_ALIGNMENT 4
|
||||
#define PPC_CACHE_ALIGNMENT 16
|
||||
#define PPC_HAS_RFCI 1
|
||||
#if defined(_SOFT_FLOAT)
|
||||
#define PPC_HAS_FPU 0
|
||||
#else
|
||||
#define PPC_HAS_FPU 1
|
||||
#endif
|
||||
|
||||
#define PPC_USE_MULTIPLE 1
|
||||
#define PPC_I_CACHE 2048
|
||||
#define PPC_D_CACHE 1024
|
||||
#define PPC_DEBUG_MODEL PPC_DEBUG_MODEL_STANDARD
|
||||
#define PPC_HAS_EXCEPTION_PREFIX 0
|
||||
#define PPC_HAS_EVPR 0
|
||||
#define PPC_INTERRUPT_MAX 16
|
||||
#define PPC_LOW_POWER_MODE PPC_LOW_POWER_MODE_STANDARD
|
||||
#define PPC_HAS_DOUBLE 0
|
||||
|
||||
#elif defined(ppc403) || defined(ppc405)
|
||||
/*
|
||||
* IBM 403
|
||||
*
|
||||
* Developed for 403GA. Book checked for 403GB.
|
||||
*
|
||||
* Does not have user mode.
|
||||
*/
|
||||
|
||||
#if defined(ppc403)
|
||||
#define CPU_MODEL_NAME "PowerPC 403"
|
||||
#elif defined (ppc405)
|
||||
#define CPU_MODEL_NAME "PowerPC 405"
|
||||
#endif
|
||||
#define PPC_ALIGNMENT 4
|
||||
#define PPC_CACHE_ALIGNMENT 16
|
||||
#define PPC_HAS_RFCI 1
|
||||
#define PPC_HAS_FPU 0
|
||||
#define PPC_USE_MULTIPLE 1
|
||||
#define PPC_I_CACHE 2048
|
||||
#define PPC_D_CACHE 1024
|
||||
|
||||
#define PPC_DEBUG_MODEL PPC_DEBUG_MODEL_IBM4xx
|
||||
#define PPC_HAS_EXCEPTION_PREFIX 0
|
||||
#define PPC_HAS_EVPR 1
|
||||
|
||||
|
||||
#elif defined(mpc505) || defined(mpc509)
|
||||
/*
|
||||
* Submitted by Sergei Organov <osv@Javad.RU> as a patch against
|
||||
* 3.6.0 long after 4.0 was released. This is just an attempt
|
||||
* to get the setting correct.
|
||||
*/
|
||||
|
||||
#define CPU_MODEL_NAME "PowerPC 505/509"
|
||||
|
||||
#define PPC_ALIGNMENT 4
|
||||
#define PPC_CACHE_ALIGNMENT 16
|
||||
#define PPC_I_CACHE 4096
|
||||
#define PPC_D_CACHE 0
|
||||
|
||||
|
||||
#elif defined(ppc601)
|
||||
|
||||
/*
|
||||
* Submitted with original port -- book checked only.
|
||||
*/
|
||||
|
||||
#define CPU_MODEL_NAME "PowerPC 601"
|
||||
|
||||
#define PPC_ALIGNMENT 8
|
||||
#define PPC_USE_MULTIPLE 1
|
||||
#define PPC_I_CACHE 0
|
||||
#define PPC_D_CACHE 32768
|
||||
|
||||
#define PPC_DEBUG_MODEL PPC_DEBUG_MODEL_SINGLE_STEP_ONLY
|
||||
|
||||
#elif defined(ppc602)
|
||||
/*
|
||||
* Submitted with original port -- book checked only.
|
||||
*/
|
||||
|
||||
#define CPU_MODEL_NAME "PowerPC 602"
|
||||
|
||||
#define PPC_ALIGNMENT 4
|
||||
#define PPC_HAS_DOUBLE 0
|
||||
#define PPC_I_CACHE 4096
|
||||
#define PPC_D_CACHE 4096
|
||||
|
||||
#elif defined(ppc603)
|
||||
/*
|
||||
* Submitted with original port -- book checked only.
|
||||
*/
|
||||
|
||||
#define CPU_MODEL_NAME "PowerPC 603"
|
||||
|
||||
#define PPC_ALIGNMENT 8
|
||||
#define PPC_I_CACHE 8192
|
||||
#define PPC_D_CACHE 8192
|
||||
|
||||
#elif defined(ppc603e)
|
||||
|
||||
#define CPU_MODEL_NAME "PowerPC 603e"
|
||||
/*
|
||||
* Submitted with original port.
|
||||
*
|
||||
* Known to work on real hardware.
|
||||
*/
|
||||
|
||||
#define PPC_ALIGNMENT 8
|
||||
#define PPC_I_CACHE 16384
|
||||
#define PPC_D_CACHE 16384
|
||||
|
||||
#define PPC_LOW_POWER_MODE PPC_LOW_POWER_MODE_STANDARD
|
||||
|
||||
#elif defined(mpc604)
|
||||
/*
|
||||
* Submitted with original port -- book checked only.
|
||||
*/
|
||||
|
||||
#define CPU_MODEL_NAME "PowerPC 604"
|
||||
|
||||
#define PPC_ALIGNMENT 8
|
||||
#define PPC_I_CACHE 16384
|
||||
#define PPC_D_CACHE 16384
|
||||
|
||||
#elif defined(mpc860)
|
||||
/*
|
||||
* Added by Jay Monkman (jmonkman@frasca.com) 6/28/98
|
||||
* with some changes by Darlene Stewart (Darlene.Stewart@iit.nrc.ca)
|
||||
*/
|
||||
#define CPU_MODEL_NAME "PowerPC MPC860"
|
||||
|
||||
#define PPC_ALIGNMENT 4
|
||||
#define PPC_I_CACHE 4096
|
||||
#define PPC_D_CACHE 4096
|
||||
#define PPC_CACHE_ALIGNMENT 16
|
||||
#define PPC_INTERRUPT_MAX 71
|
||||
#define PPC_HAS_FPU 0
|
||||
#define PPC_HAS_DOUBLE 0
|
||||
#define PPC_USE_MULTIPLE 1
|
||||
|
||||
#define PPC_MSR_0 0x00009000
|
||||
#define PPC_MSR_1 0x00001000
|
||||
#define PPC_MSR_2 0x00001000
|
||||
#define PPC_MSR_3 0x00000000
|
||||
|
||||
#elif defined(mpc821)
|
||||
/*
|
||||
* Added by Andrew Bray <andy@chaos.org.uk> 6/April/1999
|
||||
*/
|
||||
#define CPU_MODEL_NAME "PowerPC MPC821"
|
||||
|
||||
#define PPC_ALIGNMENT 4
|
||||
#define PPC_I_CACHE 4096
|
||||
#define PPC_D_CACHE 4096
|
||||
#define PPC_CACHE_ALIGNMENT 16
|
||||
#define PPC_INTERRUPT_MAX 71
|
||||
#define PPC_HAS_FPU 0
|
||||
#define PPC_HAS_DOUBLE 0
|
||||
|
||||
#define PPC_MSR_0 0x00009000
|
||||
#define PPC_MSR_1 0x00001000
|
||||
#define PPC_MSR_2 0x00001000
|
||||
#define PPC_MSR_3 0x00000000
|
||||
|
||||
#elif defined(mpc750)
|
||||
|
||||
#define CPU_MODEL_NAME "PowerPC 750"
|
||||
|
||||
#define PPC_ALIGNMENT 8
|
||||
#define PPC_I_CACHE 16384
|
||||
#define PPC_D_CACHE 16384
|
||||
|
||||
#elif defined(mpc8260)
|
||||
/*
|
||||
* Added by Andy Dachs <a.dachs@sstl.co.uk> 23/11/2000
|
||||
*/
|
||||
#define CPU_MODEL_NAME "PowerPC MPC8260"
|
||||
|
||||
#define PPC_ALIGNMENT 4
|
||||
#define PPC_I_CACHE 16384
|
||||
#define PPC_D_CACHE 16384
|
||||
#define PPC_CACHE_ALIGNMENT 32
|
||||
#define PPC_INTERRUPT_MAX 125
|
||||
/*#define PPC_HAS_FPU 0 */ /* my 8260 is one the few with no FPU */
|
||||
#define PPC_HAS_FPU 1 /* the rest do have one */
|
||||
#define PPC_HAS_DOUBLE 1
|
||||
#define PPC_USE_MULTIPLE 1
|
||||
#else
|
||||
|
||||
#error "Unsupported CPU Model"
|
||||
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Application binary interfaces.
|
||||
*
|
||||
* PPC_ABI MUST be defined as one of these.
|
||||
* Only PPC_ABI_POWEROPEN is currently fully supported.
|
||||
* Only EABI will be supported in the end when
|
||||
* the tools are there.
|
||||
* Only big endian is currently supported.
|
||||
*/
|
||||
/*
|
||||
* PowerOpen ABI. This is Andy's hack of the
|
||||
* PowerOpen ABI to ELF. ELF rather than a
|
||||
* XCOFF assembler is used. This may work
|
||||
* if PPC_ASM == PPC_ASM_XCOFF is defined.
|
||||
*/
|
||||
#define PPC_ABI_POWEROPEN 0
|
||||
/*
|
||||
* GCC 2.7.0 munched version of EABI, with
|
||||
* PowerOpen calling convention and stack frames,
|
||||
* but EABI style indirect function calls.
|
||||
*/
|
||||
#define PPC_ABI_GCC27 1
|
||||
/*
|
||||
* SVR4 ABI
|
||||
*/
|
||||
#define PPC_ABI_SVR4 2
|
||||
/*
|
||||
* Embedded ABI
|
||||
*/
|
||||
#define PPC_ABI_EABI 3
|
||||
|
||||
/*
|
||||
* Default to the EABI used by current GNU tools
|
||||
*/
|
||||
|
||||
#ifndef PPC_ABI
|
||||
#define PPC_ABI PPC_ABI_EABI
|
||||
#endif
|
||||
|
||||
#if (PPC_ABI == PPC_ABI_POWEROPEN)
|
||||
#define PPC_STACK_ALIGNMENT 8
|
||||
#elif (PPC_ABI == PPC_ABI_GCC27)
|
||||
#define PPC_STACK_ALIGNMENT 8
|
||||
#elif (PPC_ABI == PPC_ABI_SVR4)
|
||||
#define PPC_STACK_ALIGNMENT 16
|
||||
#elif (PPC_ABI == PPC_ABI_EABI)
|
||||
#define PPC_STACK_ALIGNMENT 8
|
||||
#else
|
||||
#error "PPC_ABI is not properly defined"
|
||||
#endif
|
||||
#ifndef PPC_ABI
|
||||
#error "PPC_ABI is not properly defined"
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Assemblers.
|
||||
* PPC_ASM MUST be defined as one of these.
|
||||
*
|
||||
* PPC_ASM_ELF: ELF assembler. Currently used for all ABIs.
|
||||
* PPC_ASM_XCOFF: XCOFF assembler. May be needed for PowerOpen ABI.
|
||||
*
|
||||
* NOTE: Only PPC_ABI_ELF is currently fully supported.
|
||||
*/
|
||||
|
||||
#define PPC_ASM_ELF 0
|
||||
#define PPC_ASM_XCOFF 1
|
||||
|
||||
/*
|
||||
* Default to the assembler format used by the current GNU tools.
|
||||
*/
|
||||
|
||||
#ifndef PPC_ASM
|
||||
#define PPC_ASM PPC_ASM_ELF
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Use the default debug scheme defined in the architectural specification
|
||||
* if another model has not been specified.
|
||||
*/
|
||||
|
||||
#ifndef PPC_DEBUG_MODEL
|
||||
#define PPC_DEBUG_MODEL PPC_DEBUG_MODEL_STANDARD
|
||||
#endif
|
||||
|
||||
/*
|
||||
* If the maximum number of exception sources has not been defined,
|
||||
* then default it to 16.
|
||||
*/
|
||||
|
||||
#ifndef PPC_INTERRUPT_MAX
|
||||
#define PPC_INTERRUPT_MAX 16
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Unless specified otherwise, the cache line size is defaulted to 32.
|
||||
*
|
||||
* The derive the power of 2 the cache line is.
|
||||
*/
|
||||
|
||||
#ifndef PPC_CACHE_ALIGNMENT
|
||||
#define PPC_CACHE_ALIGNMENT 32
|
||||
#endif
|
||||
|
||||
#if (PPC_CACHE_ALIGNMENT == 16)
|
||||
#define PPC_CACHE_ALIGN_POWER 4
|
||||
#elif (PPC_CACHE_ALIGNMENT == 32)
|
||||
#define PPC_CACHE_ALIGN_POWER 5
|
||||
#else
|
||||
#error "Undefined power of 2 for PPC_CACHE_ALIGNMENT"
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Unless otherwise specified, assume the model has an IP/EP bit to
|
||||
* set the exception address prefix.
|
||||
*/
|
||||
|
||||
#ifndef PPC_HAS_EXCEPTION_PREFIX
|
||||
#define PPC_HAS_EXCEPTION_PREFIX 1
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Unless otherwise specified, assume the model does NOT have
|
||||
* 403 style EVPR register to set the exception address prefix.
|
||||
*/
|
||||
|
||||
#ifndef PPC_HAS_EVPR
|
||||
#define PPC_HAS_EVPR 0
|
||||
#endif
|
||||
|
||||
/*
|
||||
* If no low power mode model was specified, then assume there is none.
|
||||
*/
|
||||
|
||||
#ifndef PPC_LOW_POWER_MODE
|
||||
#define PPC_LOW_POWER_MODE PPC_LOW_POWER_MODE_NONE
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Unless specified above, then assume the model has FP support.
|
||||
*/
|
||||
|
||||
#ifndef PPC_HAS_FPU
|
||||
#define PPC_HAS_FPU 1
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Unless specified above, If the model has FP support, it is assumed to
|
||||
* support doubles (8-byte floating point numbers).
|
||||
*
|
||||
* If the model does NOT have FP support, then the model does
|
||||
* NOT have double length FP registers.
|
||||
*/
|
||||
|
||||
#ifndef PPC_HAS_DOUBLE
|
||||
#if (PPC_HAS_FPU)
|
||||
#define PPC_HAS_DOUBLE 1
|
||||
#else
|
||||
#define PPC_HAS_DOUBLE 0
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Unless specified above, then assume the model does NOT have critical
|
||||
* interrupt support.
|
||||
*/
|
||||
|
||||
#ifndef PPC_HAS_RFCI
|
||||
#define PPC_HAS_RFCI 0
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Unless specified above, do not use the load/store multiple instructions
|
||||
* in a context switch.
|
||||
*/
|
||||
|
||||
#ifndef PPC_USE_MULTIPLE
|
||||
#define PPC_USE_MULTIPLE 0
|
||||
#endif
|
||||
|
||||
/*
|
||||
* The following exceptions are not maskable, and are not
|
||||
* necessarily predictable, so cannot be offered to RTEMS:
|
||||
* Alignment exception - handled by the CPU module
|
||||
* Data exceptions.
|
||||
* Instruction exceptions.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Base Interrupt vectors supported on all models.
|
||||
*/
|
||||
#define PPC_IRQ_SYSTEM_RESET 0 /* 0x00100 - System reset. */
|
||||
#define PPC_IRQ_MCHECK 1 /* 0x00200 - Machine check */
|
||||
#define PPC_IRQ_PROTECT 2 /* 0x00300 - Protection violation */
|
||||
#define PPC_IRQ_ISI 3 /* 0x00400 - Instruction Fetch error */
|
||||
#define PPC_IRQ_EXTERNAL 4 /* 0x00500 - External interrupt */
|
||||
#define PPC_IRQ_ALIGNMENT 5 /* 0X00600 - Alignment exception */
|
||||
#define PPC_IRQ_PROGRAM 6 /* 0x00700 - Program exception */
|
||||
#define PPC_IRQ_NOFP 7 /* 0x00800 - Floating point unavailable */
|
||||
#define PPC_IRQ_DECREMENTER 8 /* 0x00900 - Decrementer interrupt */
|
||||
#define PPC_IRQ_RESERVED_A 9 /* 0x00a00 - Implementation Reserved */
|
||||
#define PPC_IRQ_RESERVED_B 10 /* 0x00b00 - Implementation Reserved */
|
||||
#define PPC_IRQ_SCALL 11 /* 0x00c00 - System call */
|
||||
#define PPC_IRQ_TRACE 12 /* 0x00d00 - Trace Exception */
|
||||
#define PPC_IRQ_FP_ASST 13 /* ox00e00 - Floating point assist */
|
||||
#define PPC_STD_IRQ_LAST PPC_IRQ_FP_ASST
|
||||
|
||||
#define PPC_IRQ_FIRST PPC_IRQ_SYSTEM_RESET
|
||||
|
||||
#if defined(ppc403) || defined(ppc405)
|
||||
|
||||
#define PPC_IRQ_CRIT PPC_IRQ_SYSTEM_RESET /*0x00100- Critical int. pin */
|
||||
#define PPC_IRQ_PIT (PPC_STD_IRQ_LAST+1) /*0x01000- Pgm interval timer*/
|
||||
#define PPC_IRQ_FIT (PPC_STD_IRQ_LAST+2) /*0x01010- Fixed int. timer */
|
||||
#define PPC_IRQ_WATCHDOG (PPC_STD_IRQ_LAST+3) /*0x01020- Watchdog timer */
|
||||
#define PPC_IRQ_DEBUG (PPC_STD_IRQ_LAST+4) /*0x02000- Debug exceptions */
|
||||
#define PPC_IRQ_LAST PPC_IRQ_DEBUG
|
||||
|
||||
#elif defined(mpc505) || defined(mpc509)
|
||||
#define PPC_IRQ_SOFTEMU (PPC_STD_IRQ_LAST+1) /* Software emulation. */
|
||||
#define PPC_IRQ_DATA_BP (PPC_STD_IRQ_LAST+ 2)
|
||||
#define PPC_IRQ_INST_BP (PPC_STD_IRQ_LAST+ 3)
|
||||
#define PPC_IRQ_MEXT_BP (PPC_STD_IRQ_LAST+ 4)
|
||||
#define PPC_IRQ_NMEXT_BP (PPC_STD_IRQ_LAST+ 5)
|
||||
|
||||
#elif defined(ppc601)
|
||||
#define PPC_IRQ_TRACE (PPC_STD_IRQ_LAST+1) /*0x02000-Run/Trace Exception*/
|
||||
#define PPC_IRQ_LAST PPC_IRQ_TRACE
|
||||
|
||||
#elif defined(ppc602)
|
||||
#define PPC_IRQ_LAST (PPC_STD_IRQ_LAST)
|
||||
|
||||
#elif defined(ppc603)
|
||||
#define PPC_IRQ_TRANS_MISS (PPC_STD_IRQ_LAST+1) /*0x1000-Ins Translation Miss*/
|
||||
#define PPC_IRQ_DATA_LOAD (PPC_STD_IRQ_LAST+2) /*0x1100-Data Load Trans Miss*/
|
||||
#define PPC_IRQ_DATA_STORE (PPC_STD_IRQ_LAST+3) /*0x1200-Data Store Miss */
|
||||
#define PPC_IRQ_ADDR_BRK (PPC_STD_IRQ_LAST+4) /*0x1300-Instruction Bkpoint */
|
||||
#define PPC_IRQ_SYS_MGT (PPC_STD_IRQ_LAST+5) /*0x1400-System Management */
|
||||
#define PPC_IRQ_LAST PPC_IRQ_SYS_MGT
|
||||
|
||||
#elif defined(ppc603e)
|
||||
#define PPC_TLB_INST_MISS (PPC_STD_IRQ_LAST+1) /*0x1000-Instruction TLB Miss*/
|
||||
#define PPC_TLB_LOAD_MISS (PPC_STD_IRQ_LAST+2) /*0x1100-TLB miss on load */
|
||||
#define PPC_TLB_STORE_MISS (PPC_STD_IRQ_LAST+3) /*0x1200-TLB Miss on store */
|
||||
#define PPC_IRQ_ADDRBRK (PPC_STD_IRQ_LAST+4) /*0x1300-Instruct addr break */
|
||||
#define PPC_IRQ_SYS_MGT (PPC_STD_IRQ_LAST+5) /*0x1400-System Management */
|
||||
#define PPC_IRQ_LAST PPC_IRQ_SYS_MGT
|
||||
|
||||
|
||||
#elif defined(mpc604)
|
||||
#define PPC_IRQ_ADDR_BRK (PPC_STD_IRQ_LAST+1) /*0x1300- Inst. addr break */
|
||||
#define PPC_IRQ_SYS_MGT (PPC_STD_IRQ_LAST+2) /*0x1400- System Management */
|
||||
#define PPC_IRQ_LAST PPC_IRQ_SYS_MGT
|
||||
|
||||
#elif defined(mpc860) || defined(mpc821)
|
||||
#define PPC_IRQ_EMULATE (PPC_STD_IRQ_LAST+1) /*0x1000-Software emulation */
|
||||
#define PPC_IRQ_INST_MISS (PPC_STD_IRQ_LAST+2) /*0x1100-Instruction TLB miss*/
|
||||
#define PPC_IRQ_DATA_MISS (PPC_STD_IRQ_LAST+3) /*0x1200-Data TLB miss */
|
||||
#define PPC_IRQ_INST_ERR (PPC_STD_IRQ_LAST+4) /*0x1300-Instruction TLB err */
|
||||
#define PPC_IRQ_DATA_ERR (PPC_STD_IRQ_LAST+5) /*0x1400-Data TLB error */
|
||||
#define PPC_IRQ_DATA_BPNT (PPC_STD_IRQ_LAST+6) /*0x1C00-Data breakpoint */
|
||||
#define PPC_IRQ_INST_BPNT (PPC_STD_IRQ_LAST+7) /*0x1D00-Inst breakpoint */
|
||||
#define PPC_IRQ_IO_BPNT (PPC_STD_IRQ_LAST+8) /*0x1E00-Peripheral breakpnt */
|
||||
#define PPC_IRQ_DEV_PORT (PPC_STD_IRQ_LAST+9) /*0x1F00-Development port */
|
||||
#define PPC_IRQ_IRQ0 (PPC_STD_IRQ_LAST + 10)
|
||||
#define PPC_IRQ_LVL0 (PPC_STD_IRQ_LAST + 11)
|
||||
#define PPC_IRQ_IRQ1 (PPC_STD_IRQ_LAST + 12)
|
||||
#define PPC_IRQ_LVL1 (PPC_STD_IRQ_LAST + 13)
|
||||
#define PPC_IRQ_IRQ2 (PPC_STD_IRQ_LAST + 14)
|
||||
#define PPC_IRQ_LVL2 (PPC_STD_IRQ_LAST + 15)
|
||||
#define PPC_IRQ_IRQ3 (PPC_STD_IRQ_LAST + 16)
|
||||
#define PPC_IRQ_LVL3 (PPC_STD_IRQ_LAST + 17)
|
||||
#define PPC_IRQ_IRQ4 (PPC_STD_IRQ_LAST + 18)
|
||||
#define PPC_IRQ_LVL4 (PPC_STD_IRQ_LAST + 19)
|
||||
#define PPC_IRQ_IRQ5 (PPC_STD_IRQ_LAST + 20)
|
||||
#define PPC_IRQ_LVL5 (PPC_STD_IRQ_LAST + 21)
|
||||
#define PPC_IRQ_IRQ6 (PPC_STD_IRQ_LAST + 22)
|
||||
#define PPC_IRQ_LVL6 (PPC_STD_IRQ_LAST + 23)
|
||||
#define PPC_IRQ_IRQ7 (PPC_STD_IRQ_LAST + 24)
|
||||
#define PPC_IRQ_LVL7 (PPC_STD_IRQ_LAST + 25)
|
||||
#define PPC_IRQ_CPM_ERROR (PPC_STD_IRQ_LAST + 26)
|
||||
#define PPC_IRQ_CPM_PC4 (PPC_STD_IRQ_LAST + 27)
|
||||
#define PPC_IRQ_CPM_PC5 (PPC_STD_IRQ_LAST + 28)
|
||||
#define PPC_IRQ_CPM_SMC2 (PPC_STD_IRQ_LAST + 29)
|
||||
#define PPC_IRQ_CPM_SMC1 (PPC_STD_IRQ_LAST + 30)
|
||||
#define PPC_IRQ_CPM_SPI (PPC_STD_IRQ_LAST + 31)
|
||||
#define PPC_IRQ_CPM_PC6 (PPC_STD_IRQ_LAST + 32)
|
||||
#define PPC_IRQ_CPM_TIMER4 (PPC_STD_IRQ_LAST + 33)
|
||||
#define PPC_IRQ_CPM_RESERVED_8 (PPC_STD_IRQ_LAST + 34)
|
||||
#define PPC_IRQ_CPM_PC7 (PPC_STD_IRQ_LAST + 35)
|
||||
#define PPC_IRQ_CPM_PC8 (PPC_STD_IRQ_LAST + 36)
|
||||
#define PPC_IRQ_CPM_PC9 (PPC_STD_IRQ_LAST + 37)
|
||||
#define PPC_IRQ_CPM_TIMER3 (PPC_STD_IRQ_LAST + 38)
|
||||
#define PPC_IRQ_CPM_RESERVED_D (PPC_STD_IRQ_LAST + 39)
|
||||
#define PPC_IRQ_CPM_PC10 (PPC_STD_IRQ_LAST + 40)
|
||||
#define PPC_IRQ_CPM_PC11 (PPC_STD_IRQ_LAST + 41)
|
||||
#define PPC_IRQ_CPM_I2C (PPC_STD_IRQ_LAST + 42)
|
||||
#define PPC_IRQ_CPM_RISC_TIMER (PPC_STD_IRQ_LAST + 43)
|
||||
#define PPC_IRQ_CPM_TIMER2 (PPC_STD_IRQ_LAST + 44)
|
||||
#define PPC_IRQ_CPM_RESERVED_13 (PPC_STD_IRQ_LAST + 45)
|
||||
#define PPC_IRQ_CPM_IDMA2 (PPC_STD_IRQ_LAST + 46)
|
||||
#define PPC_IRQ_CPM_IDMA1 (PPC_STD_IRQ_LAST + 47)
|
||||
#define PPC_IRQ_CPM_SDMA_ERROR (PPC_STD_IRQ_LAST + 48)
|
||||
#define PPC_IRQ_CPM_PC12 (PPC_STD_IRQ_LAST + 49)
|
||||
#define PPC_IRQ_CPM_PC13 (PPC_STD_IRQ_LAST + 50)
|
||||
#define PPC_IRQ_CPM_TIMER1 (PPC_STD_IRQ_LAST + 51)
|
||||
#define PPC_IRQ_CPM_PC14 (PPC_STD_IRQ_LAST + 52)
|
||||
#define PPC_IRQ_CPM_SCC4 (PPC_STD_IRQ_LAST + 53)
|
||||
#define PPC_IRQ_CPM_SCC3 (PPC_STD_IRQ_LAST + 54)
|
||||
#define PPC_IRQ_CPM_SCC2 (PPC_STD_IRQ_LAST + 55)
|
||||
#define PPC_IRQ_CPM_SCC1 (PPC_STD_IRQ_LAST + 56)
|
||||
#define PPC_IRQ_CPM_PC15 (PPC_STD_IRQ_LAST + 57)
|
||||
|
||||
#define PPC_IRQ_LAST PPC_IRQ_CPM_PC15
|
||||
|
||||
#elif defined(mpc8260)
|
||||
|
||||
#define PPC_IRQ_INST_MISS (PPC_STD_IRQ_LAST+1) /*0x1000-Instruction TLB miss*/
|
||||
#define PPC_IRQ_DATA_MISS (PPC_STD_IRQ_LAST+2) /*0x1100-Data TLB miss */
|
||||
#define PPC_IRQ_DATA_L_MISS (PPC_STD_IRQ_LAST+3) /*0x1200-Data TLB load miss */
|
||||
#define PPC_IRQ_DATA_S_MISS (PPC_STD_IRQ_LAST+4) /*0x1300-Data TLB store miss */
|
||||
#define PPC_IRQ_INST_BPNT (PPC_STD_IRQ_LAST+5) /*0x1400-Inst address breakpoint */
|
||||
#define PPC_IRQ_SYS_MGT (PPC_STD_IRQ_LAST+6) /*0x1500-System Management */
|
||||
/* 0x1600 - 0x2F00 reserved */
|
||||
#define PPC_IRQ_CPM_NONE (PPC_STD_IRQ_LAST + 50)
|
||||
#define PPC_IRQ_CPM_I2C (PPC_STD_IRQ_LAST + 51)
|
||||
#define PPC_IRQ_CPM_SPI (PPC_STD_IRQ_LAST + 52)
|
||||
#define PPC_IRQ_CPM_RISC_TIMER (PPC_STD_IRQ_LAST + 53)
|
||||
#define PPC_IRQ_CPM_SMC1 (PPC_STD_IRQ_LAST + 54)
|
||||
#define PPC_IRQ_CPM_SMC2 (PPC_STD_IRQ_LAST + 55)
|
||||
#define PPC_IRQ_CPM_IDMA1 (PPC_STD_IRQ_LAST + 56)
|
||||
#define PPC_IRQ_CPM_IDMA2 (PPC_STD_IRQ_LAST + 57)
|
||||
#define PPC_IRQ_CPM_IDMA3 (PPC_STD_IRQ_LAST + 58)
|
||||
#define PPC_IRQ_CPM_IDMA4 (PPC_STD_IRQ_LAST + 59)
|
||||
#define PPC_IRQ_CPM_SDMA (PPC_STD_IRQ_LAST + 60)
|
||||
#define PPC_IRQ_CPM_RES_A (PPC_STD_IRQ_LAST + 61)
|
||||
#define PPC_IRQ_CPM_TIMER1 (PPC_STD_IRQ_LAST + 62)
|
||||
#define PPC_IRQ_CPM_TIMER2 (PPC_STD_IRQ_LAST + 63)
|
||||
#define PPC_IRQ_CPM_TIMER3 (PPC_STD_IRQ_LAST + 64)
|
||||
#define PPC_IRQ_CPM_TIMER4 (PPC_STD_IRQ_LAST + 65)
|
||||
#define PPC_IRQ_CPM_TMCNT (PPC_STD_IRQ_LAST + 66)
|
||||
#define PPC_IRQ_CPM_PIT (PPC_STD_IRQ_LAST + 67)
|
||||
#define PPC_IRQ_CPM_RES_B (PPC_STD_IRQ_LAST + 68)
|
||||
#define PPC_IRQ_CPM_IRQ1 (PPC_STD_IRQ_LAST + 69)
|
||||
#define PPC_IRQ_CPM_IRQ2 (PPC_STD_IRQ_LAST + 70)
|
||||
#define PPC_IRQ_CPM_IRQ3 (PPC_STD_IRQ_LAST + 71)
|
||||
#define PPC_IRQ_CPM_IRQ4 (PPC_STD_IRQ_LAST + 72)
|
||||
#define PPC_IRQ_CPM_IRQ5 (PPC_STD_IRQ_LAST + 73)
|
||||
#define PPC_IRQ_CPM_IRQ6 (PPC_STD_IRQ_LAST + 74)
|
||||
#define PPC_IRQ_CPM_IRQ7 (PPC_STD_IRQ_LAST + 75)
|
||||
#define PPC_IRQ_CPM_RES_C (PPC_STD_IRQ_LAST + 76)
|
||||
#define PPC_IRQ_CPM_RES_D (PPC_STD_IRQ_LAST + 77)
|
||||
#define PPC_IRQ_CPM_RES_E (PPC_STD_IRQ_LAST + 78)
|
||||
#define PPC_IRQ_CPM_RES_F (PPC_STD_IRQ_LAST + 79)
|
||||
#define PPC_IRQ_CPM_RES_G (PPC_STD_IRQ_LAST + 80)
|
||||
#define PPC_IRQ_CPM_RES_H (PPC_STD_IRQ_LAST + 81)
|
||||
#define PPC_IRQ_CPM_FCC1 (PPC_STD_IRQ_LAST + 82)
|
||||
#define PPC_IRQ_CPM_FCC2 (PPC_STD_IRQ_LAST + 83)
|
||||
#define PPC_IRQ_CPM_FCC3 (PPC_STD_IRQ_LAST + 84)
|
||||
#define PPC_IRQ_CPM_RES_I (PPC_STD_IRQ_LAST + 85)
|
||||
#define PPC_IRQ_CPM_MCC1 (PPC_STD_IRQ_LAST + 86)
|
||||
#define PPC_IRQ_CPM_MCC2 (PPC_STD_IRQ_LAST + 87)
|
||||
#define PPC_IRQ_CPM_RES_J (PPC_STD_IRQ_LAST + 88)
|
||||
#define PPC_IRQ_CPM_RES_K (PPC_STD_IRQ_LAST + 89)
|
||||
#define PPC_IRQ_CPM_SCC1 (PPC_STD_IRQ_LAST + 90)
|
||||
#define PPC_IRQ_CPM_SCC2 (PPC_STD_IRQ_LAST + 91)
|
||||
#define PPC_IRQ_CPM_SCC3 (PPC_STD_IRQ_LAST + 92)
|
||||
#define PPC_IRQ_CPM_SCC4 (PPC_STD_IRQ_LAST + 93)
|
||||
#define PPC_IRQ_CPM_RES_L (PPC_STD_IRQ_LAST + 94)
|
||||
#define PPC_IRQ_CPM_RES_M (PPC_STD_IRQ_LAST + 95)
|
||||
#define PPC_IRQ_CPM_RES_N (PPC_STD_IRQ_LAST + 96)
|
||||
#define PPC_IRQ_CPM_RES_O (PPC_STD_IRQ_LAST + 97)
|
||||
#define PPC_IRQ_CPM_PC15 (PPC_STD_IRQ_LAST + 98)
|
||||
#define PPC_IRQ_CPM_PC14 (PPC_STD_IRQ_LAST + 99)
|
||||
#define PPC_IRQ_CPM_PC13 (PPC_STD_IRQ_LAST + 100)
|
||||
#define PPC_IRQ_CPM_PC12 (PPC_STD_IRQ_LAST + 101)
|
||||
#define PPC_IRQ_CPM_PC11 (PPC_STD_IRQ_LAST + 102)
|
||||
#define PPC_IRQ_CPM_PC10 (PPC_STD_IRQ_LAST + 103)
|
||||
#define PPC_IRQ_CPM_PC9 (PPC_STD_IRQ_LAST + 104)
|
||||
#define PPC_IRQ_CPM_PC8 (PPC_STD_IRQ_LAST + 105)
|
||||
#define PPC_IRQ_CPM_PC7 (PPC_STD_IRQ_LAST + 106)
|
||||
#define PPC_IRQ_CPM_PC6 (PPC_STD_IRQ_LAST + 107)
|
||||
#define PPC_IRQ_CPM_PC5 (PPC_STD_IRQ_LAST + 108)
|
||||
#define PPC_IRQ_CPM_PC4 (PPC_STD_IRQ_LAST + 109)
|
||||
#define PPC_IRQ_CPM_PC3 (PPC_STD_IRQ_LAST + 110)
|
||||
#define PPC_IRQ_CPM_PC2 (PPC_STD_IRQ_LAST + 111)
|
||||
#define PPC_IRQ_CPM_PC1 (PPC_STD_IRQ_LAST + 112)
|
||||
#define PPC_IRQ_CPM_PC0 (PPC_STD_IRQ_LAST + 113)
|
||||
|
||||
#define PPC_IRQ_LAST PPC_IRQ_CPM_PC0
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
/*
|
||||
* If the maximum number of exception sources is too low,
|
||||
* then fix it
|
||||
*/
|
||||
|
||||
#if PPC_INTERRUPT_MAX <= PPC_IRQ_LAST
|
||||
#undef PPC_INTERRUPT_MAX
|
||||
#define PPC_INTERRUPT_MAX ((PPC_IRQ_LAST) + 1)
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Machine Status Register (MSR) Constants Used by RTEMS
|
||||
*/
|
||||
|
||||
/*
|
||||
* Some PPC model manuals refer to the Exception Prefix (EP) bit as
|
||||
* IP for no apparent reason.
|
||||
*/
|
||||
|
||||
#define PPC_MSR_RI 0x000000002 /* bit 30 - recoverable exception */
|
||||
#define PPC_MSR_DR 0x000000010 /* bit 27 - data address translation */
|
||||
#define PPC_MSR_IR 0x000000020 /* bit 26 - instruction addr translation*/
|
||||
|
||||
#if (PPC_HAS_EXCEPTION_PREFIX)
|
||||
#define PPC_MSR_EP 0x000000040 /* bit 25 - exception prefix */
|
||||
#else
|
||||
#define PPC_MSR_EP 0x000000000 /* bit 25 - exception prefix */
|
||||
#endif
|
||||
|
||||
#if (PPC_HAS_FPU)
|
||||
#define PPC_MSR_FP 0x000002000 /* bit 18 - floating point enable */
|
||||
#else
|
||||
#define PPC_MSR_FP 0x000000000 /* bit 18 - floating point enable */
|
||||
#endif
|
||||
|
||||
#if (PPC_LOW_POWER_MODE == PPC_LOW_POWER_MODE_NONE)
|
||||
#define PPC_MSR_POW 0x000000000 /* bit 13 - power management enable */
|
||||
#else
|
||||
#define PPC_MSR_POW 0x000040000 /* bit 13 - power management enable */
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Interrupt/exception MSR bits set as defined on p. 2-20 in "The Programming
|
||||
* Environments" and the manuals for various PPC models.
|
||||
*/
|
||||
|
||||
#if (PPC_DEBUG_MODEL == PPC_DEBUG_MODEL_STANDARD)
|
||||
#define PPC_MSR_DE 0x000000000 /* bit 22 - debug exception enable */
|
||||
#define PPC_MSR_BE 0x000000200 /* bit 22 - branch trace enable */
|
||||
#define PPC_MSR_SE 0x000000400 /* bit 21 - single step trace enable */
|
||||
#elif (PPC_DEBUG_MODEL == PPC_DEBUG_MODEL_SINGLE_STEP_ONLY)
|
||||
#define PPC_MSR_DE 0x000000000 /* bit 22 - debug exception enable */
|
||||
#define PPC_MSR_BE 0x000000200 /* bit 22 - branch trace enable */
|
||||
#define PPC_MSR_SE 0x000000000 /* bit 21 - single step trace enable */
|
||||
#elif (PPC_DEBUG_MODEL == PPC_DEBUG_MODEL_IBM4xx)
|
||||
#define PPC_MSR_DE 0x000000200 /* bit 22 - debug exception enable */
|
||||
#define PPC_MSR_BE 0x000000000 /* bit 22 - branch trace enable */
|
||||
#define PPC_MSR_SE 0x000000000 /* bit 21 - single step trace enable */
|
||||
#else
|
||||
#error "MSR constants -- unknown PPC_DEBUG_MODEL!!"
|
||||
#endif
|
||||
|
||||
#define PPC_MSR_ME 0x000001000 /* bit 19 - machine check enable */
|
||||
#define PPC_MSR_EE 0x000008000 /* bit 16 - external interrupt enable */
|
||||
|
||||
#if (PPC_HAS_RFCI)
|
||||
#define PPC_MSR_CE 0x000020000 /* bit 14 - critical interrupt enable */
|
||||
#else
|
||||
#define PPC_MSR_CE 0x000000000 /* bit 14 - critical interrupt enable */
|
||||
#endif
|
||||
|
||||
#define PPC_MSR_DISABLE_MASK (PPC_MSR_ME|PPC_MSR_EE|PPC_MSR_CE)
|
||||
|
||||
/*
|
||||
* Initial value for the FPSCR register
|
||||
*/
|
||||
|
||||
#define PPC_INIT_FPSCR 0x000000f8
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* ! _INCLUDE_PPC_h */
|
||||
/* end of include file */
|
||||
|
||||
|
||||
@@ -1,72 +0,0 @@
|
||||
/* ppctypes.h
|
||||
*
|
||||
* This include file contains type definitions pertaining to the PowerPC
|
||||
* processor family.
|
||||
*
|
||||
* Author: Andrew Bray <andy@i-cubed.co.uk>
|
||||
*
|
||||
* COPYRIGHT (c) 1995 by i-cubed ltd.
|
||||
*
|
||||
* To anyone who acknowledges that this file is provided "AS IS"
|
||||
* without any express or implied warranty:
|
||||
* permission to use, copy, modify, and distribute this file
|
||||
* for any purpose is hereby granted without fee, provided that
|
||||
* the above copyright notice and this notice appears in all
|
||||
* copies, and that the name of i-cubed limited not be used in
|
||||
* advertising or publicity pertaining to distribution of the
|
||||
* software without specific, written prior permission.
|
||||
* i-cubed limited makes no representations about the suitability
|
||||
* of this software for any purpose.
|
||||
*
|
||||
* Derived from c/src/exec/cpu/no_cpu/no_cputypes.h:
|
||||
*
|
||||
* COPYRIGHT (c) 1989-1997.
|
||||
* On-Line Applications Research Corporation (OAR).
|
||||
*
|
||||
* The license and distribution terms for this file may in
|
||||
* the file LICENSE in this distribution or at
|
||||
* http://www.OARcorp.com/rtems/license.html.
|
||||
*
|
||||
* $Id$
|
||||
*/
|
||||
|
||||
#ifndef __PPC_TYPES_h
|
||||
#define __PPC_TYPES_h
|
||||
|
||||
#ifndef ASM
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* This section defines the basic types for this processor.
|
||||
*/
|
||||
|
||||
typedef unsigned char unsigned8; /* unsigned 8-bit integer */
|
||||
typedef unsigned short unsigned16; /* unsigned 16-bit integer */
|
||||
typedef unsigned int unsigned32; /* unsigned 32-bit integer */
|
||||
typedef unsigned long long unsigned64; /* unsigned 64-bit integer */
|
||||
|
||||
typedef unsigned32 Priority_Bit_map_control;
|
||||
|
||||
typedef signed char signed8; /* 8-bit signed integer */
|
||||
typedef signed short signed16; /* 16-bit signed integer */
|
||||
typedef signed int signed32; /* 32-bit signed integer */
|
||||
typedef signed long long signed64; /* 64 bit signed integer */
|
||||
|
||||
typedef unsigned32 boolean; /* Boolean value */
|
||||
|
||||
typedef float single_precision; /* single precision float */
|
||||
typedef double double_precision; /* double precision float */
|
||||
|
||||
typedef void ppc_isr;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* !ASM */
|
||||
|
||||
#endif
|
||||
/* end of include file */
|
||||
@@ -1,3 +1,20 @@
|
||||
2002-01-21 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
|
||||
|
||||
* rtems/Makefile.am: New.
|
||||
* rtems/.cvsignore: New.
|
||||
* rtems/score/Makefile.am: New.
|
||||
* rtems/score/.cvsignore: New.
|
||||
* rtems/score/ppc.h: Relocated from shared/.
|
||||
* rtems/score/ppctypes.h: Relocated from shared/.
|
||||
* asm.h: Relocated from shared/.
|
||||
* shared/Makefile.am: Removed.
|
||||
* shared/asm.h: Removed.
|
||||
* shared/ppc.h: Removed.
|
||||
* shared/ppctypes.h: Removed.
|
||||
* shared/.cvsignore: Removed.
|
||||
* Makefile.am: Reflect changes above.
|
||||
* configure.ac: Reflect changes above.
|
||||
|
||||
2001-11-28 Joel Sherrill <joel@OARcorp.com>,
|
||||
|
||||
This was tracked as PR91.
|
||||
|
||||
@@ -2,10 +2,35 @@
|
||||
## $Id$
|
||||
##
|
||||
|
||||
AUTOMAKE_OPTIONS = foreign 1.4
|
||||
AUTOMAKE_OPTIONS = foreign 1.5
|
||||
ACLOCAL_AMFLAGS = -I ../../../../../../aclocal
|
||||
|
||||
SUBDIRS = shared
|
||||
SUBDIRS = rtems
|
||||
|
||||
include_HEADERS = asm.h
|
||||
|
||||
include $(top_srcdir)/../../../../../../automake/multilib.am
|
||||
include $(top_srcdir)/../../../../../../automake/compile.am
|
||||
include $(top_srcdir)/../../../../../../automake/lib.am
|
||||
|
||||
$(PROJECT_INCLUDE):
|
||||
$(mkinstalldirs) $@
|
||||
|
||||
$(PROJECT_INCLUDE)/%.h: %.h
|
||||
$(INSTALL_DATA) $< $@
|
||||
|
||||
# $(PROJECT_RELEASE)/lib$(MULTISUBDIR)/rtems$(LIB_VARIANT).o: $(ARCH)/rtems.o
|
||||
# $(INSTALL_DATA) $< $@
|
||||
|
||||
# $(REL): $(rtems_cpu_rel_OBJECTS)
|
||||
# $(make-rel)
|
||||
|
||||
PREINSTALL_FILES = $(PROJECT_INCLUDE) $(include_HEADERS:%=$(PROJECT_INCLUDE)/%)
|
||||
|
||||
# TMPINSTALL_FILES += $(PROJECT_RELEASE)/lib$(MULTISUBDIR)/rtems$(LIB_VARIANT).o
|
||||
|
||||
all-local: $(ARCH) $(PREINSTALL_FILES) $(rtems_cpu_rel_OBJECTS) $(REL) \
|
||||
$(TMPINSTALL_FILES)
|
||||
|
||||
include $(top_srcdir)/../../../../../../automake/subdirs.am
|
||||
include $(top_srcdir)/../../../../../../automake/local.am
|
||||
|
||||
@@ -27,5 +27,6 @@ RTEMS_CHECK_NEWLIB
|
||||
|
||||
# Explicitly list all Makefiles here
|
||||
AC_CONFIG_FILES([Makefile
|
||||
shared/Makefile])
|
||||
rtems/Makefile
|
||||
rtems/score/Makefile])
|
||||
AC_OUTPUT
|
||||
|
||||
2
cpukit/score/cpu/powerpc/rtems/.cvsignore
Normal file
2
cpukit/score/cpu/powerpc/rtems/.cvsignore
Normal file
@@ -0,0 +1,2 @@
|
||||
Makefile
|
||||
Makefile.in
|
||||
2
cpukit/score/cpu/powerpc/rtems/score/.cvsignore
Normal file
2
cpukit/score/cpu/powerpc/rtems/score/.cvsignore
Normal file
@@ -0,0 +1,2 @@
|
||||
Makefile
|
||||
Makefile.in
|
||||
Reference in New Issue
Block a user