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bsps: Simplify _CPU_SMP_Finalize_initialization()

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The processor count is always positive.
This commit is contained in:
Sebastian Huber
2024-09-23 02:17:45 +02:00
parent d8822514e7
commit b0a688e69c
3 changed files with 34 additions and 40 deletions
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34
bsps/aarch64/shared/start/aarch64-smp.c
View File

@@ -52,28 +52,26 @@ static rtems_interrupt_entry aarch64_ipi_entry;
void _CPU_SMP_Finalize_initialization( uint32_t cpu_count ) void _CPU_SMP_Finalize_initialization( uint32_t cpu_count )
{ {
if ( cpu_count > 0 ) { rtems_status_code sc;
rtems_status_code sc;
rtems_interrupt_entry_initialize( rtems_interrupt_entry_initialize(
&aarch64_ipi_entry, &aarch64_ipi_entry,
bsp_inter_processor_interrupt, bsp_inter_processor_interrupt,
NULL, NULL,
"IPI" "IPI"
); );
sc = rtems_interrupt_entry_install( sc = rtems_interrupt_entry_install(
ARM_GIC_IRQ_SGI_0, ARM_GIC_IRQ_SGI_0,
RTEMS_INTERRUPT_UNIQUE, RTEMS_INTERRUPT_UNIQUE,
&aarch64_ipi_entry &aarch64_ipi_entry
); );
_Assert_Unused_variable_equals( sc, RTEMS_SUCCESSFUL ); _Assert_Unused_variable_equals( sc, RTEMS_SUCCESSFUL );
#if defined( BSP_DATA_CACHE_ENABLED ) || \ #if defined( BSP_DATA_CACHE_ENABLED ) || \
defined( BSP_INSTRUCTION_CACHE_ENABLED ) defined( BSP_INSTRUCTION_CACHE_ENABLED )
/* Enable unified L2 cache */ /* Enable unified L2 cache */
rtems_cache_enable_data(); rtems_cache_enable_data();
#endif #endif
}
} }
void _CPU_SMP_Prepare_start_multitasking( void ) void _CPU_SMP_Prepare_start_multitasking( void )

20
bsps/arm/shared/start/arm-a9mpcore-smp.c
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@@ -50,21 +50,19 @@ static rtems_interrupt_entry arm_a9mpcore_ipi_entry =
void _CPU_SMP_Finalize_initialization(uint32_t cpu_count) void _CPU_SMP_Finalize_initialization(uint32_t cpu_count)
{ {
if (cpu_count > 0) { rtems_status_code sc;
rtems_status_code sc;
sc = rtems_interrupt_entry_install( sc = rtems_interrupt_entry_install(
ARM_GIC_IRQ_SGI_0, ARM_GIC_IRQ_SGI_0,
RTEMS_INTERRUPT_UNIQUE, RTEMS_INTERRUPT_UNIQUE,
&arm_a9mpcore_ipi_entry &arm_a9mpcore_ipi_entry
); );
_Assert_Unused_variable_equals(sc, RTEMS_SUCCESSFUL); _Assert_Unused_variable_equals(sc, RTEMS_SUCCESSFUL);
#if defined(BSP_DATA_CACHE_ENABLED) || defined(BSP_INSTRUCTION_CACHE_ENABLED) #if defined(BSP_DATA_CACHE_ENABLED) || defined(BSP_INSTRUCTION_CACHE_ENABLED)
/* Enable unified L2 cache */ /* Enable unified L2 cache */
rtems_cache_enable_data(); rtems_cache_enable_data();
#endif #endif
}
} }
void _CPU_SMP_Prepare_start_multitasking( void ) void _CPU_SMP_Prepare_start_multitasking( void )

18
bsps/x86_64/amd64/start/bspsmp.c
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@@ -118,16 +118,14 @@ uint32_t _CPU_SMP_Initialize(void)
void _CPU_SMP_Finalize_initialization(uint32_t cpu_count) void _CPU_SMP_Finalize_initialization(uint32_t cpu_count)
{ {
if (cpu_count > 0) { rtems_status_code sc = rtems_interrupt_handler_install(
rtems_status_code sc = rtems_interrupt_handler_install( BSP_VECTOR_IPI,
BSP_VECTOR_IPI, "IPI",
"IPI", RTEMS_INTERRUPT_UNIQUE,
RTEMS_INTERRUPT_UNIQUE, bsp_inter_processor_interrupt,
bsp_inter_processor_interrupt, NULL
NULL );
); assert(sc == RTEMS_SUCCESSFUL);
assert(sc == RTEMS_SUCCESSFUL);
}
} }
void _CPU_SMP_Send_interrupt(uint32_t target_processor_index) void _CPU_SMP_Send_interrupt(uint32_t target_processor_index)