forked from Imagelibrary/rtems
150 lines
4.0 KiB
C
150 lines
4.0 KiB
C
/* SPDX-License-Identifier: BSD-2-Clause */
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/**
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* @file
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*
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* @ingroup RTEMSBSPsX8664AMD64
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*
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* @brief BSP SMP implementation
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*/
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/*
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* Copyright (C) 2024 Matheus Pecoraro
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <rtems/score/smpimpl.h>
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#include <apic.h>
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#include <assert.h>
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#include <bsp.h>
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#include <smp.h>
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#include <libcpu/page.h>
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#include <rtems/score/idt.h>
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#include <string.h>
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extern void _Trampoline_start(void);
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extern const uint64_t _Trampoline_size;
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static bool has_ap_started = false;
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/**
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* @brief Copies the trampoline code to the address where APs will boot from.
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*
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* TODO: We should ideally parse through the UEFI Memory Map to find a
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* free page under 1MB
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*/
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static void copy_trampoline(void)
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{
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/* Copy the trampoline code to its destiny address */
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void* trampoline_dest = (void*) TRAMPOLINE_ADDR;
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memcpy(trampoline_dest, (void*) _Trampoline_start, _Trampoline_size);
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}
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/**
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* @brief Waits for the Application Processor to set the flag.
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*
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* @param timeout_ms Timeout in miliseconds.
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*
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* @return true if successful.
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*/
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static bool wait_for_ap(uint32_t timeout_ms)
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{
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uint8_t chan2_value;
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uint32_t pit_ticks = PIT_FREQUENCY/1000; /* a milisecond */
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PIT_CHAN2_ENABLE(chan2_value);
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PIT_CHAN2_WRITE_TICKS(pit_ticks);
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for (int i = 0; has_ap_started == false && i < timeout_ms; i++) {
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PIT_CHAN2_START_DELAY(chan2_value);
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PIT_CHAN2_WAIT_DELAY(pit_ticks);
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amd64_spinwait();
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}
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return has_ap_started;
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}
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static void bsp_inter_processor_interrupt(void* arg)
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{
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_SMP_Inter_processor_interrupt_handler(_Per_CPU_Get());
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lapic_eoi();
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}
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void _CPU_SMP_Prepare_start_multitasking(void)
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{
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/* Do nothing */
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}
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bool _CPU_SMP_Start_processor(uint32_t cpu_index)
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{
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has_ap_started = false;
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lapic_start_ap(cpu_index, TRAMPOLINE_PAGE_VECTOR);
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return wait_for_ap(WAIT_FOR_AP_TIMEOUT_MS);
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}
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uint32_t _CPU_SMP_Get_current_processor(void)
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{
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uint8_t lapic_id = lapic_get_id();
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return amd64_lapic_to_cpu_map[lapic_id];
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}
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uint32_t _CPU_SMP_Initialize(void)
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{
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copy_trampoline();
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return lapic_get_num_of_procesors();
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}
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void _CPU_SMP_Finalize_initialization(uint32_t cpu_count)
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{
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rtems_status_code sc = rtems_interrupt_handler_install(
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BSP_VECTOR_IPI,
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"IPI",
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RTEMS_INTERRUPT_UNIQUE,
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bsp_inter_processor_interrupt,
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NULL
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);
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assert(sc == RTEMS_SUCCESSFUL);
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}
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void _CPU_SMP_Send_interrupt(uint32_t target_processor_index)
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{
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lapic_send_ipi(target_processor_index, BSP_VECTOR_IPI);
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}
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void smp_init_ap(void)
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{
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has_ap_started = true;
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Context_Control_fp* null_fp_context_p = &_CPU_Null_fp_context;
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_CPU_Context_restore_fp(&null_fp_context_p);
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amd64_lapic_base[LAPIC_REGISTER_SPURIOUS] =
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LAPIC_SPURIOUS_ENABLE | BSP_VECTOR_SPURIOUS;
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lidt(&amd64_idtr);
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_SMP_Start_multitasking_on_secondary_processor(_Per_CPU_Get());
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}
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