Initial revision

c/src/lib/include/clockdrv.h

@@ -0,0 +1,58 @@
+/*  clock.h
+ *
+ *  This file describes the Clock Driver for all boards.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#ifndef __CLOCK_DRIVER_h
+#define __CLOCK_DRIVER_h
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* variables */
+
+extern volatile rtems_unsigned32 Clock_driver_ticks;
+
+/* functions */
+
+rtems_task Exit_task();
+void exit_task_init();
+
+void Install_clock( rtems_isr_entry );
+void ReInstall_clock( rtems_isr_entry );
+void Clock_exit();
+
+rtems_isr Clock_isr(
+  rtems_vector_number
+);
+
+/* driver entries */
+
+#define CLOCK_DRIVER_TABLE_ENTRY \
+  { Clock_initialize, NULL, NULL, NULL, NULL, NULL }
+
+rtems_device_driver Clock_initialize(
+  rtems_device_major_number,
+  rtems_device_minor_number,
+  void *,
+  rtems_id,
+  rtems_unsigned32 *
+);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+/* end of include file */

c/src/lib/include/console.h

@@ -0,0 +1,40 @@
+/*  console.h
+ *
+ *  This file describes the Console Device Driver for all boards.
+ *  This driver provides support for the standard C Library.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#ifndef _CONSOLE_DRIVER_h
+#define _CONSOLE_DRIVER_h
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define CONSOLE_DRIVER_TABLE_ENTRY \
+  { console_initialize, NULL, NULL, NULL, NULL, NULL }
+
+rtems_device_driver console_initialize(
+  rtems_device_major_number,
+  rtems_device_minor_number,
+  void *,
+  rtems_id,
+  rtems_unsigned32 *
+);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+/* end of include file */

c/src/lib/include/iosupp.h

@@ -0,0 +1,44 @@
+/*  iosupp.h
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#ifndef __IOSUPP_h
+#define __IOSUPP_h
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* character constants */
+
+#define BS              0x08            /* backspace */
+#define LF              0x0a            /* line feed */
+#define CR              0x0d            /* carriage return */
+#define XON             0x11            /* control-Q */
+#define XOFF            0x13            /* control-S */
+
+/* structures */
+
+#ifdef IOSUPP_INIT
+#define IOSUPP_EXTERN
+#else
+#undef IOSUPP_EXTERN
+#define IOSUPP_EXTERN  extern
+#endif
+
+/* functions */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif

c/src/lib/include/rtems/libcsupport.h

@@ -0,0 +1,47 @@
+/*  libcsupport.h
+ *
+ *  This include file contains the information regarding the
+ *  RTEMS specific support for the standard C library.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#ifndef __LIBC_SUPPORT_h
+#define __LIBC_SUPPORT_h
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <sys/types.h>
+
+void RTEMS_Malloc_Initialize(
+  void   *start,
+  size_t  length,
+  size_t  sbrk_amount
+);
+
+extern void libc_init(int reentrant);
+
+#ifdef __cplusplus
+}
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+/* end of include file */

c/src/lib/include/spurious.h

@@ -0,0 +1,38 @@
+/*  spurious.h
+ *
+ *  This file describes the Spurious Interrupt Driver for all boards.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#ifndef __SPURIOUS_h
+#define __SPURIOUS_h
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define SPURIOUS_DRIVER_TABLE_ENTRY \
+  { Spurious_Initialize, NULL, NULL, NULL, NULL, NULL }
+
+rtems_device_driver Spurious_Initialize(
+  rtems_device_major_number,
+  rtems_device_minor_number,
+  void *,
+  rtems_id,
+  rtems_unsigned32 *
+);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+/* end of include file */

c/src/lib/include/timerdrv.h

@@ -0,0 +1,40 @@
+/*  timerdrv.h
+ *
+ *  This file describes the Timer Driver for all boards.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#ifndef __TIMER_DRIVER_h
+#define __TIMER_DRIVER_h
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* functions */
+
+void Timer_initialize( void );
+
+rtems_unsigned32 Read_timer( void );
+
+rtems_status_code Empty_function( void );
+
+void Set_find_average_overhead(
+  rtems_boolean find_flag
+);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+/* end of include file */

c/src/lib/include/vmeintr.h

@@ -0,0 +1,58 @@
+/*
+ *  vmeintr.h
+ *
+ *  This file is the specification for the VMEbus interface library
+ *  which should be provided by all BSPs for VMEbus Single Board
+ *  Computers but currently only a few do so.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#ifndef __VME_INTERRUPT_h
+#define __VME_INTERRUPT_h
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ *  This defines the mask which is used to determine which
+ *  interrupt levels are affected by a call to this package.
+ *  The LSB corresponds to VME interrupt 0 and the MSB
+ *  to VME interrupt 7.
+ *
+ */
+
+typedef rtems_unsigned8 VME_interrupt_Mask;
+
+/*
+ *  VME_interrupt_Disable
+ *
+ */
+
+void VME_interrupt_Disable (
+  VME_interrupt_Mask                mask                        /* IN  */
+);
+
+/*
+ *  VME_interrupt_Disable
+ *
+ */
+
+void VME_interrupt_Enable (
+  VME_interrupt_Mask                mask                        /* IN  */
+);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* end of include file */

c/src/lib/libbsp/README

@@ -0,0 +1,46 @@
+#
+#  $Id$
+#
+
+Board Support Package library
+
+This directory contains the source for the libbsp.a library.
+For each supported board $(RTEMS_BSP) there is a standard
+set of functions which must be provided in the BSP:
+
+   + start up initialization
+   + exit support
+   + set vector
+   + console IO support
+   + drivers
+
+In addition, the BSP also determines the memory usage by providing
+any necessary linker scripts.
+
+There are also "generic" drivers in this directory.  Currently
+they are shmdr and stubdr.
+
+Some of the supplied generic drivers (for example, shared memory) require
+target board specific support routines.
+
+NOTE: The library libbsp.a is actually built by $(RTEMS_BSP)/wrapup/Makefile.
+
+To execute all of the test in the RTEMS Tests Suites the following
+device drivers must be supplied:
+
+   + Clock Tick
+   + IO Driver Support
+   + Timer
+   + Shared Memory Driver Support
+
+The Timer Driver is used only by the Timing Test Suite (c/src/tests/tmtests/*).
+These tests are used to generate the execution times for RTEMS found in the
+flyers.  It is recommended that these tests be run to verify a port to a new
+CPU or with a newly developed BSP.  Looking at the times as compared to a
+known CPU and target can yield insights into potential performance problems
+in either the port, the BSP, or the target hardware.
+
+The Shared Memory Support is only required to execute the Multiprocessor
+Test Suite (c/src/tests/mptests/*).  Multiprocessing is not a required part
+of a BSP.
+

c/src/lib/libbsp/hppa1.1/simhppa/include/bsp.h

@@ -0,0 +1,93 @@
+/*  bsp.h
+ *
+ *  This include file contains all HP PA-RISC simulator definitions.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#ifndef __SIMHPPA_h
+#define __SIMHPPA_h
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <rtems.h>
+#include <iosupp.h>
+
+/*
+ *  Define the time limits for RTEMS Test Suite test durations.
+ *  Long test and short test duration limits are provided.  These
+ *  values are in seconds and need to be converted to ticks for the
+ *  application.
+ *
+ */
+
+#define MAX_LONG_TEST_DURATION       3   /* 3 seconds */
+#define MAX_SHORT_TEST_DURATION      3   /* 3 seconds */
+
+/*
+ *  Define the interrupt mechanism for Time Test 27
+ */
+
+#define MUST_WAIT_FOR_INTERRUPT 1
+
+#define Install_tm27_vector( handler ) \
+    ( void ) set_vector( handler, HPPA_INTERRUPT_EXTERNAL_INTERVAL_TIMER, 1 );
+
+#define Cause_tm27_intr() \
+  set_itimer( get_itimer() + 20 )
+
+#define Clear_tm27_intr()  \
+  set_eirr( 0x80000000 )
+
+#define Lower_tm27_intr() \
+  { \
+    register unsigned32 ignored; \
+    HPPA_ASM_SSM( HPPA_PSW_I, ignored ); \
+  }
+
+/*
+ *  Simple spin delay in microsecond units for device drivers.
+ *  This is very dependent on the clock speed of the target.
+ */
+
+extern void Clock_delay(rtems_unsigned32 microseconds);
+#define delay( microseconds ) \
+        Clock_delay(microseconds);
+
+/*
+ * We printf() to a buffer if multiprocessing, *or* if this is set.
+ * ref: src/lib/libbsp/hppa/simhppa/iosupp/consupp.c
+ */
+
+extern int use_print_buffer;
+
+#define HPPA_INTERRUPT_EXTERNAL_MPCI        HPPA_INTERRUPT_EXTERNAL_10
+
+void bsp_start( void );
+void bsp_cleanup( void );
+
+/* miscellaneous stuff assumed to exist */
+
+extern rtems_configuration_table BSP_Configuration;     /* owned by BSP */
+extern rtems_cpu_table           Cpu_table;             /* owned by BSP */
+
+extern rtems_unsigned32          bsp_isr_level;
+
+extern int cpu_number;         /* from 0; cpu number in a multi cpu system */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+/* end of include file */

c/src/lib/libbsp/hppa1.1/simhppa/include/coverhd.h

@@ -0,0 +1,104 @@
+/*  coverhd.h
+ *
+ *  This include file has defines to represent the overhead associated
+ *  with calling a particular directive from C for this target.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#ifndef __COVERHD_h
+#define __COVERHD_h
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define CALLING_OVERHEAD_INITIALIZE_EXECUTIVE      0
+#define CALLING_OVERHEAD_SHUTDOWN_EXECUTIVE        0
+#define CALLING_OVERHEAD_TASK_CREATE               0
+#define CALLING_OVERHEAD_TASK_IDENT                0
+#define CALLING_OVERHEAD_TASK_START                0
+#define CALLING_OVERHEAD_TASK_RESTART              0
+#define CALLING_OVERHEAD_TASK_DELETE               0
+#define CALLING_OVERHEAD_TASK_SUSPEND              0
+#define CALLING_OVERHEAD_TASK_RESUME               0
+#define CALLING_OVERHEAD_TASK_SET_PRIORITY         0
+#define CALLING_OVERHEAD_TASK_MODE                 0
+#define CALLING_OVERHEAD_TASK_GET_NOTE             0
+#define CALLING_OVERHEAD_TASK_SET_NOTE             0
+#define CALLING_OVERHEAD_TASK_WAKE_WHEN            0
+#define CALLING_OVERHEAD_TASK_WAKE_AFTER           0
+#define CALLING_OVERHEAD_INTERRUPT_CATCH           0
+#define CALLING_OVERHEAD_CLOCK_GET                 0
+#define CALLING_OVERHEAD_CLOCK_SET                 0
+#define CALLING_OVERHEAD_CLOCK_TICK                0
+
+#define CALLING_OVERHEAD_TIMER_CREATE              0
+#define CALLING_OVERHEAD_TIMER_IDENT               0
+#define CALLING_OVERHEAD_TIMER_DELETE              0
+#define CALLING_OVERHEAD_TIMER_FIRE_AFTER          0
+#define CALLING_OVERHEAD_TIMER_FIRE_WHEN           0
+#define CALLING_OVERHEAD_TIMER_RESET               0
+#define CALLING_OVERHEAD_TIMER_CANCEL              0
+#define CALLING_OVERHEAD_SEMAPHORE_CREATE          0
+#define CALLING_OVERHEAD_SEMAPHORE_IDENT           0
+#define CALLING_OVERHEAD_SEMAPHORE_DELETE          0
+#define CALLING_OVERHEAD_SEMAPHORE_OBTAIN          0
+#define CALLING_OVERHEAD_SEMAPHORE_RELEASE         0
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_CREATE      0
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_IDENT       0
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_DELETE      0
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_SEND        0
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_URGENT      0
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_BROADCAST   0
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_RECEIVE     0
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_FLUSH       0
+
+#define CALLING_OVERHEAD_EVENT_SEND                0
+#define CALLING_OVERHEAD_EVENT_RECEIVE             0
+#define CALLING_OVERHEAD_SIGNAL_CATCH              0
+#define CALLING_OVERHEAD_SIGNAL_SEND               0
+#define CALLING_OVERHEAD_PARTITION_CREATE          0
+#define CALLING_OVERHEAD_PARTITION_IDENT           0
+#define CALLING_OVERHEAD_PARTITION_DELETE          0
+#define CALLING_OVERHEAD_PARTITION_GET_BUFFER      0
+#define CALLING_OVERHEAD_PARTITION_RETURN_BUFFER   0
+#define CALLING_OVERHEAD_REGION_CREATE             0
+#define CALLING_OVERHEAD_REGION_IDENT              0
+#define CALLING_OVERHEAD_REGION_DELETE             0
+#define CALLING_OVERHEAD_REGION_GET_SEGMENT        0
+#define CALLING_OVERHEAD_REGION_RETURN_SEGMENT     0
+#define CALLING_OVERHEAD_PORT_CREATE               0
+#define CALLING_OVERHEAD_PORT_IDENT                0
+#define CALLING_OVERHEAD_PORT_DELETE               0
+#define CALLING_OVERHEAD_PORT_EXTERNAL_TO_INTERNAL 0
+#define CALLING_OVERHEAD_PORT_INTERNAL_TO_EXTERNAL 0
+
+#define CALLING_OVERHEAD_IO_INITIALIZE             0
+#define CALLING_OVERHEAD_IO_OPEN                   0
+#define CALLING_OVERHEAD_IO_CLOSE                  0
+#define CALLING_OVERHEAD_IO_READ                   0
+#define CALLING_OVERHEAD_IO_WRITE                  0
+#define CALLING_OVERHEAD_IO_CONTROL                0
+#define CALLING_OVERHEAD_FATAL_ERROR_OCCURRED      0
+#define CALLING_OVERHEAD_RATE_MONOTONIC_CREATE     0
+#define CALLING_OVERHEAD_RATE_MONOTONIC_IDENT      0
+#define CALLING_OVERHEAD_RATE_MONOTONIC_DELETE     0
+#define CALLING_OVERHEAD_RATE_MONOTONIC_CANCEL     0
+#define CALLING_OVERHEAD_RATE_MONOTONIC_PERIOD     0
+#define CALLING_OVERHEAD_MULTIPROCESSING_ANNOUNCE  0
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+/* end of include file */

c/src/lib/libbsp/hppa1.1/simhppa/shmsupp/README

@@ -0,0 +1,9 @@
+#
+#  $Id$
+#
+
+This directory contains the SHM driver support files for the
+HP PA-RISC simulator for the 72000 processor.
+
+WARNING: The interrupt support in this directory currently will
+         only work in a homogeneous system.

c/src/lib/libbsp/hppa1.1/simhppa/shmsupp/addrconv.c

@@ -0,0 +1,30 @@
+/*  Shm_Convert_address
+ *
+ *  No address range conversion is required.
+ *
+ *  Input parameters:
+ *    address - address to convert
+ *
+ *  Output parameters:
+ *    returns - converted address
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include <bsp.h>
+#include <shm.h>
+
+void *Shm_Convert_address(
+  void *address
+)
+{
+  return ( address );
+}

c/src/lib/libbsp/hppa1.1/simhppa/shmsupp/getcfg.c

@@ -0,0 +1,84 @@
+/*  void Shm_Get_configuration( localnode, &shmcfg )
+ *
+ *  This routine initializes, if necessary, and returns a pointer
+ *  to the Shared Memory Configuration Table for the HP PA-RISC
+ *  simulator.
+ *
+ *  INPUT PARAMETERS:
+ *    localnode - local node number
+ *    shmcfg    - address of pointer to SHM Config Table
+ *
+ *  OUTPUT PARAMETERS:
+ *    *shmcfg   - pointer to SHM Config Table
+ *
+ *  NOTES:  The MP interrupt used is the Runway bus' ability to directly
+ *          address the control registers of up to four CPUs and cause
+ *          interrupts on them.
+ *
+ *          The following table illustrates the configuration limitations:
+ *
+ *                                   BUS     MAX
+ *                          MODE    ENDIAN  NODES
+ *                        ========= ====== =======
+ *                         POLLED    BIG    2+
+ *                        INTERRUPT  BIG    2..4 (on Runway)
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include <bsp.h>
+#include <runway.h>
+
+#include "shm.h"
+
+#define INTERRUPT 0        /* can be interrupt or polling */
+#define POLLING   1
+
+shm_config_table BSP_shm_cfgtbl;
+
+void Shm_Cause_interrupt_simhppa(
+  rtems_unsigned32 node
+);
+
+void Shm_Get_configuration(
+  rtems_unsigned32   localnode,
+  shm_config_table **shmcfg
+)
+{
+   BSP_shm_cfgtbl.base         = (vol_u32 *) 0x44000000;
+   BSP_shm_cfgtbl.length       = 16 * KILOBYTE;
+   BSP_shm_cfgtbl.format       = SHM_BIG;
+
+   BSP_shm_cfgtbl.cause_intr   = Shm_Cause_interrupt_simhppa;
+
+#ifdef NEUTRAL_BIG
+   BSP_shm_cfgtbl.convert      = NULL_CONVERT;
+#else
+   BSP_shm_cfgtbl.convert      = CPU_swap_u32;
+#endif
+
+#if ( POLLING == 1 )
+   BSP_shm_cfgtbl.poll_intr    = POLLED_MODE;
+   BSP_shm_cfgtbl.Intr.address = NO_INTERRUPT;
+   BSP_shm_cfgtbl.Intr.value   = NO_INTERRUPT;
+   BSP_shm_cfgtbl.Intr.length  = NO_INTERRUPT;
+#else
+   BSP_shm_cfgtbl.poll_intr    = INTR_MODE;
+   BSP_shm_cfgtbl.Intr.address =
+        (vol_u32 *) (HPPA_RUNWAY_HPA( localnode - 1) +
+                     HPPA_RUNWAY_REG_IO_EIR_OFFSET);
+   BSP_shm_cfgtbl.Intr.value   = HPPA_INTERRUPT_EXTERNAL_MPCI;
+   BSP_shm_cfgtbl.Intr.length  = LONG;
+#endif
+
+   *shmcfg = &BSP_shm_cfgtbl;
+}
+

c/src/lib/libbsp/hppa1.1/simhppa/shmsupp/intr.c

@@ -0,0 +1,64 @@
+/*  void Shm_Cause_interrupt_simhppa( node )
+ *
+ *  This routine is the shared memory driver routine which
+ *  generates interrupts to other CPUs.
+ *
+ *  Input parameters:
+ *    node          - destination of this packet (0 = broadcast)
+ *
+ *  Output parameters: NONE
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include "stdio.h"
+
+#include <rtems.h>
+#include "shm.h"
+
+void Shm_Cause_interrupt_simhppa(
+  rtems_unsigned32 node
+)
+{
+  Shm_Interrupt_information *intr;
+  rtems_unsigned8  *u8;
+  rtems_unsigned16 *u16;
+  rtems_unsigned32 *u32;
+  rtems_unsigned32  value;
+
+  intr = &Shm_Interrupt_table[node];
+  value = intr->value;
+
+  switch ( intr->length ) {
+    case NO_INTERRUPT:
+       break;
+    case BYTE:
+      u8   = (rtems_unsigned8 *)intr->address;
+      fprintf(
+        stderr,
+        "Shm_Cause_interrupt_simhppa: Writes of unsigned8 not supported!!!\n"
+      );
+      rtems_shutdown_executive( 0 );
+      break;
+    case WORD:
+      u16   = (rtems_unsigned16 *)intr->address;
+      fprintf(
+        stderr,
+        "Shm_Cause_interrupt_simhppa: Writes of unsigned8 not supported!!!\n"
+      );
+      rtems_shutdown_executive( 0 );
+      break;
+    case LONG:
+      u32   = (rtems_unsigned32 *)intr->address;
+      HPPA_ASM_STWAS( value, 0, u32 );
+      break;
+  }
+}

c/src/lib/libbsp/hppa1.1/simhppa/shmsupp/lock.c

@@ -0,0 +1,75 @@
+/*  Shared Memory Lock Routines
+ *
+ *  This shared memory locked queue support routine need to be
+ *  able to lock the specified locked queue.  Interrupts are
+ *  disabled while the queue is locked to prevent preemption
+ *  and deadlock when two tasks poll for the same lock.
+ *  previous level.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include <bsp.h>
+#include <shm.h>
+
+/*
+ *  Shm_Initialize_lock
+ *
+ *  Initialize the lock for the specified locked queue.
+ */
+
+void Shm_Initialize_lock(
+  Shm_Locked_queue_Control *lq_cb
+)
+{
+  lq_cb->lock = LQ_UNLOCKED;
+}
+
+/*  Shm_Lock( &lq_cb )
+ *
+ *  This shared memory locked queue support routine locks the
+ *  specified locked queue.  It disables interrupts to prevent
+ *  a deadlock condition.
+ */
+
+void Shm_Lock(
+  Shm_Locked_queue_Control *lq_cb
+)
+{
+  rtems_unsigned32  isr_level;
+  vol_u32          *lockptr = &lq_cb->lock;
+  rtems_unsigned32  lock_value;
+
+  rtems_interrupt_disable( isr_level );
+
+    Shm_isrstat = isr_level;
+
+    do {
+      HPPA_ASM_LDCWS( 0, 0, lockptr, lock_value );
+    } while (lock_value == SHM_LOCK_VALUE);
+}
+
+/*
+ *  Shm_Unlock
+ *
+ *  Unlock the lock for the specified locked queue.
+ */
+
+void Shm_Unlock(
+  Shm_Locked_queue_Control *lq_cb
+)
+{
+  rtems_unsigned32 isr_level;
+
+  lq_cb->lock = SHM_UNLOCK_VALUE;
+  isr_level = Shm_isrstat;
+  rtems_interrupt_enable( isr_level );
+}

c/src/lib/libbsp/hppa1.1/simhppa/shmsupp/mpisr.c

@@ -0,0 +1,27 @@
+/*  Shm_setvec
+ *
+ *  This driver routine sets the SHM interrupt vector to point to the
+ *  driver's SHM interrupt service routine.
+ *
+ *  Input parameters:  NONE
+ *
+ *  Output parameters: NONE
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include <bsp.h>
+#include <shm.h>
+
+void Shm_setvec( void )
+{
+  set_vector( Shm_isr, HPPA_INTERRUPT_EXTERNAL_MPCI, 1 );
+}

c/src/lib/libbsp/hppa1.1/simhppa/startup/bspclean.c

@@ -0,0 +1,36 @@
+/*  bsp_cleanup()
+ *
+ *  This routine normally is part of start.s and returns
+ *  control to a monitor but on the HP PA-RISC simulator
+ *  we do that directly from main.c.
+ *
+ *  INPUT:  NONE
+ *
+ *  OUTPUT: NONE
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include <bsp.h>
+
+/*
+ * The app has "exited" (called rtems_shutdown_executive)
+ */
+
+void bsp_cleanup( void )
+{
+    /*
+     * Invoke any fatal error extension and "halt"
+     * By definition, rtems_fatal_error_occurred does not return.
+     */
+
+    rtems_fatal_error_occurred(0);
+}

c/src/lib/libbsp/hppa1.1/simhppa/startup/bspstart.c

@@ -0,0 +1,387 @@
+/*
+ *	@(#)bspstart.c	1.13 - 95/04/25
+ *	
+ */
+
+/*  bsp_start()
+ *
+ *  This routine starts the application.  It includes application,
+ *  board, and monitor specific initialization and configuration.
+ *  The generic CPU dependent initialization has been performed
+ *  before this routine is invoked.
+ *
+ *  Called by RTEMS::RTEMS constructor in startup-ctor.cc
+ *
+ *  INPUT:  NONE
+ *
+ *  OUTPUT: NONE
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include <bsp.h>
+#include <libcsupport.h>
+
+#include <string.h>
+
+#ifdef STACK_CHECKER_ON
+#include <stackchk.h>
+#endif
+
+extern rtems_configuration_table  Configuration;
+
+rtems_configuration_table BSP_Configuration;
+rtems_cpu_table           Cpu_table;
+rtems_unsigned32          bsp_isr_level;
+
+#define WORKSPACE_SIZE (1024 * 1024)
+rtems_unsigned8   MY_WORK_SPACE[ WORKSPACE_SIZE ];
+
+/*
+ * Amount to increment itimer by each pass
+ * It is a variable instead of a #define to allow the 'looptest'
+ * script to bump it without recompiling rtems
+ */
+
+rtems_unsigned32 CPU_HPPA_CLICKS_PER_TICK;
+
+#if SIMHPPA_FAST_IDLE
+
+/*
+ * Many of the tests are very slow on the simulator because they have
+ * have 5 second delays hardwired in.
+ * Try to speed those tests up by speeding up the clock when in idle
+ */
+
+rtems_extension
+fast_idle_switch_hook(rtems_tcb *current_task,
+                      rtems_tcb *heir_task)
+{
+    static rtems_unsigned32 normal_clock = ~0;
+    static rtems_unsigned32 fast_clock;
+
+    /* init our params on first call */
+    if (normal_clock == ~0)
+    {
+        normal_clock = CPU_HPPA_CLICKS_PER_TICK;
+        fast_clock = CPU_HPPA_CLICKS_PER_TICK / 0x100;
+        if (fast_clock == 0)    /* who? me?  pathological?  never! */
+            fast_clock++;
+    }
+
+    /*
+     * Checking for 'name' field of 'IDLE' is not the best/safest,
+     * but its the best we could think of at the moment.
+     */
+
+    if (heir_task->name == rtems_build_name('I', 'D', 'L', 'E'))
+        CPU_HPPA_CLICKS_PER_TICK = fast_clock;
+    else if (current_task->name == rtems_build_name('I', 'D', 'L', 'E'))
+        CPU_HPPA_CLICKS_PER_TICK = normal_clock;
+}
+
+#endif
+
+/*
+ *  Function:   bsp_libc_init
+ *  Created:    94/12/6
+ *
+ *  Description:
+ *      Initialize whatever libc we are using
+ *      called from bsp_postdriver_hook
+ *
+ *
+ *  Parameters:
+ *      none
+ *
+ *  Returns:
+ *      none.
+ *
+ *  Side Effects:
+ *
+ *
+ *  Notes:
+ *
+ *  Deficiencies/ToDo:
+ *
+ *
+ */
+
+void
+bsp_libc_init(void)
+{
+    extern int end;
+    rtems_unsigned32        heap_start;
+
+    heap_start = (rtems_unsigned32) &end;
+    if (heap_start & (CPU_ALIGNMENT-1))
+        heap_start = (heap_start + CPU_ALIGNMENT) & ~(CPU_ALIGNMENT-1);
+
+    RTEMS_Malloc_Initialize((void *) heap_start, 64 * 1024, 0);
+
+    /*
+     * Set up for the libc handling.
+     */
+
+    if (BSP_Configuration.ticks_per_timeslice > 0)
+        libc_init(1);                /* reentrant if possible */
+    else
+        libc_init(0);                /* non-reentrant */
+
+    /*
+     * on MP systems, always use the print buffer
+     *  instead of the (broken) system calls
+     */
+
+    if (BSP_Configuration.User_multiprocessing_table)
+        use_print_buffer = 1;
+
+#ifdef SIMHPPA_ROM
+    use_print_buffer = 1;
+#endif
+}
+
+
+/*
+ *  Function:   bsp_pretasking_hook
+ *  Created:    95/03/10
+ *
+ *  Description:
+ *      BSP pretasking hook.  Called just before drivers are initialized.
+ *      Used to setup libc and install any BSP extensions.
+ *
+ *  Parameters:
+ *      none
+ *
+ *  Returns:
+ *      nada
+ *
+ *  Side Effects:
+ *      installs a few extensions
+ *
+ *  Notes:
+ *      Must not use libc (to do io) from here, since drivers are
+ *      not yet initialized.
+ *
+ *  Deficiencies/ToDo:
+ *
+ *
+ */
+
+void
+bsp_pretasking_hook(void)
+{
+    bsp_libc_init();
+
+#if SIMHPPA_FAST_IDLE
+    /*
+     * Install the fast idle task switch extension
+     *
+     * on MP systems, might now want to do this; it confuses at least
+     * one test (mp06)
+     */
+
+#if 0
+    if (BSP_Configuration.User_multiprocessing_table == 0)
+#endif
+    {
+        rtems_extensions_table  fast_idle_extension;
+        rtems_id                extension_id;
+        rtems_status_code       rc;
+
+        memset(&fast_idle_extension, 0, sizeof(fast_idle_extension));
+
+        fast_idle_extension.task_switch  = fast_idle_switch_hook;
+
+        rc = rtems_extension_create(rtems_build_name('F', 'D', 'L', 'E'),
+                              &fast_idle_extension, &extension_id);
+        if (rc != RTEMS_SUCCESSFUL)
+            rtems_fatal_error_occurred(rc);
+    }
+#endif
+
+
+#ifdef STACK_CHECKER_ON
+    /*
+     *  Initialize the stack bounds checker
+     *  We can either turn it on here or from the app.
+     */
+
+    Stack_check_Initialize();
+#endif
+}
+
+/*
+ *  Function:   bsp_start
+ *  Created:    94/12/6
+ *
+ *  Description:
+ *      called by crt0 as our "main" equivalent
+ *
+ *
+ *
+ *  Parameters:
+ *
+ *
+ *  Returns:
+ *
+ *
+ *  Side Effects:
+ *
+ *
+ *  Notes:
+ *
+ *
+ *  Deficiencies/ToDo:
+ *
+ *
+ */
+
+
+void
+bsp_start(void)
+{
+    /*
+     * Set cpu_number to accurately reflect our cpu number
+     */
+
+#ifdef hppa7200
+    /*
+     * Use DR0 if supported
+     */
+    {
+        int dr0;
+        HPPA_ASM_MFCPU(DR0, dr0);
+        cpu_number = (dr0 >> 4) & 0x7;
+    }
+#else
+    if (Configuration.User_multiprocessing_table)
+        cpu_number = Configuration.User_multiprocessing_table->node - 1;
+    else
+        cpu_number = 0;
+#endif
+
+    /*
+     *  Copy the table
+     */
+
+    BSP_Configuration = Configuration;
+
+    BSP_Configuration.work_space_start = (void *)MY_WORK_SPACE;
+    if (BSP_Configuration.work_space_size)
+        BSP_Configuration.work_space_size = WORKSPACE_SIZE;
+
+    /*
+     * Set up our hooks
+     * Make sure libc_init is done before drivers init'd so that
+     * they can use atexit()
+     */
+
+    Cpu_table.pretasking_hook = bsp_pretasking_hook;    /* init libc, etc. */
+
+    Cpu_table.predriver_hook = NULL;
+
+    Cpu_table.postdriver_hook = NULL;
+
+    Cpu_table.idle_task = NULL;  /* do not override system IDLE task */
+
+    /*
+     *  Don't zero out the workspace.  The simulator did it for us.
+     */
+
+    Cpu_table.do_zero_of_workspace = FALSE;
+
+    Cpu_table.interrupt_stack_size = (12 * 1024);
+
+    Cpu_table.extra_system_initialization_stack = 0;
+
+    /*
+     * Set this artificially low for the simulator
+     */
+
+    Cpu_table.itimer_clicks_per_microsecond = 1;
+
+    /*
+     * Determine the external interrupt processing order
+     * the external interrupt handler walks thru this table, in
+     * order checking for posted interrupts.
+     */
+
+    Cpu_table.external_interrupts = 0;
+
+    Cpu_table.external_interrupt[ Cpu_table.external_interrupts ] =
+         HPPA_INTERRUPT_EXTERNAL_INTERVAL_TIMER - HPPA_INTERRUPT_EXTERNAL_BASE;
+    Cpu_table.external_interrupts++;
+
+    if ( Configuration.User_multiprocessing_table ) {
+      Cpu_table.external_interrupt[ Cpu_table.external_interrupts ] =
+         HPPA_INTERRUPT_EXTERNAL_10 - HPPA_INTERRUPT_EXTERNAL_BASE;
+      Cpu_table.external_interrupts++;
+    }
+
+    /*
+     * Add 1 region for RTEMS Malloc
+     */
+
+    BSP_Configuration.maximum_regions++;
+
+#ifdef RTEMS_NEWLIB
+    /*
+     * Add 1 extension for newlib libc
+     */
+
+    BSP_Configuration.maximum_extensions++;
+#endif
+
+#ifdef STACK_CHECKER_ON
+  /*
+   * Add 1 extension for stack checker
+   */
+
+    BSP_Configuration.maximum_extensions++;
+#endif
+
+#if SIMHPPA_FAST_IDLE
+  /*
+   * Add 1 extension for fast idle
+   */
+
+    BSP_Configuration.maximum_extensions++;
+#endif
+
+    /*
+     * Add 1 extension for MPCI_fatal
+     */
+
+    if (BSP_Configuration.User_multiprocessing_table)
+        BSP_Configuration.maximum_extensions++;
+
+    /*
+     * Set the "clicks per tick" for the simulator
+     *  used by libcpu/hppa/clock/clock.c to schedule interrupts
+     *
+     * Set it only if 0 to allow for simulator setting it via script
+     *   on test startup.
+     */
+
+    if (CPU_HPPA_CLICKS_PER_TICK == 0)
+        CPU_HPPA_CLICKS_PER_TICK = 0x4000;
+
+    /*
+     *  Start most of RTEMS
+     *  main() will start the rest
+     */
+
+    bsp_isr_level = rtems_initialize_executive_early(
+      &BSP_Configuration,
+      &Cpu_table
+    );
+}

c/src/lib/libbsp/hppa1.1/simhppa/startup/setvec.c

@@ -0,0 +1,66 @@
+/*  set_vector
+ *
+ *  This routine installs an interrupt vector on the HP PA-RISC simulator.
+ *
+ *  INPUT:
+ *    handler - interrupt handler entry point
+ *    vector  - vector number
+ *    type    - 0 indicates raw hardware connect
+ *              1 indicates RTEMS interrupt connect
+ *
+ *  NOTE 'type' is ignored on hppa; all interrupts are owned by RTEMS
+ *
+ *  RETURNS:
+ *    address of previous interrupt handler
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include <rtems.h>
+
+/*
+ * Install an interrupt handler in the right place
+ * given its vector number from cpu/hppa.h
+ * There are 2 places an interrupt can be installed
+ *      _ISR_Vector_table
+ *      bsp interrupt      XXX: nyi
+ *
+ * We decide which based on the vector number
+ */
+
+rtems_isr_entry
+set_vector(                                     /* returns old vector */
+    rtems_isr_entry     handler,                /* isr routine        */
+    rtems_vector_number vector,                 /* vector number      */
+    int                 type                    /* RTEMS or RAW intr  */
+)
+{
+    rtems_isr_entry previous_isr;
+
+    /* is it an on chip interrupt? */
+    /* XXX this should say CPU_INTERRUPT_NUMBER_OF_VECTORS */
+    if (vector < HPPA_INTERRUPT_MAX)
+    {
+        rtems_interrupt_catch(handler, vector, &previous_isr);
+    }
+#if 0   /* XXX */
+    else if ((vector >= HPPA_INTERRUPT_BSP_BASE) &&
+             (vector < (HPPA_INTERRUPT_BSP_BASE + HPPA_BSP_INTERRUPTS)))
+    {
+        simhppa_interrupt_install(handler,
+                                  vector - HPPA_INTERRUPT_BSP_BASE,
+                                  (rtems_isr_entry *) &previous_isr);
+    }
+#endif
+
+    return previous_isr;
+}
+

c/src/lib/libbsp/hppa1.1/simhppa/tools/print_dump.c

@@ -0,0 +1,332 @@
+/*
+ *  print_dump
+ *
+ * $Id$
+ *
+ *  COPYRIGHT (c) 1994 by Division Incorporated
+ *
+ *  To anyone who acknowledges that this file is provided "AS IS"
+ *  without any express or implied warranty:
+ *      permission to use, copy, modify, and distribute this file
+ *      for any purpose is hereby granted without fee, provided that
+ *      the above copyright notice and this notice appears in all
+ *      copies, and that the name of Division Incorporated not be
+ *      used in advertising or publicity pertaining to distribution
+ *      of the software without specific, written prior permission.
+ *      Division Incorporated makes no representations about the
+ *      suitability of this software for any purpose.
+ */
+
+#define GETOPTARGS "v"
+
+char *USAGE = "\
+usage:  print_dump  [ -v ] \n\
+            -v          -- verbose\n\
+ Reads HP simulator 'memdump' output of 'print_buffer' structure
+ on stdin.  Dumps it out in vanilla ASCII.
+";
+
+#include <stdio.h>
+#include <fcntl.h>
+#include <ctype.h>
+#include <stdlib.h>
+#include <unistd.h>
+#include <string.h>
+#include <memory.h>
+#include <stdarg.h>
+
+#define Failed(x)       (((int) (x)) == -1)
+#define TRUE    1
+#define FALSE   0
+#define STREQ(a,b)      (strcmp(a,b) == 0)
+#define NUMELEMS(arr)   (sizeof(arr) / sizeof(arr[0]))
+
+/*
+ * Definitions for unsigned "ints"; especially for use in data structures
+ *  that will be shared among (potentially) different cpu's (we punt on
+ *  byte ordering problems tho)
+ */
+
+typedef unsigned char   u8;
+typedef unsigned short  u16;
+typedef unsigned int    u32;
+
+typedef union uval {
+    u8      uv_chars[4];
+    u16     uv_words[2];
+    u32     uv_long;
+    void    *uv_ptr[sizeof(long) / sizeof(void *)];
+} uval_t;
+
+
+/*
+ * vars controlled by command line options
+ */
+
+int verbose = FALSE;                    /* be verbose */
+
+extern char *optarg;                    /* getopt(3) control vars */
+extern int optind, opterr;
+extern int errno;
+
+char *progname;                         /* for error() */
+
+void error(int errn, ...);
+
+#define ERR_ERRNO  (1<<((sizeof(int) * 8) - 2)) /* hi bit; use 'errno' */
+#define ERR_FATAL  (ERR_ERRNO / 2)              /* error is fatal; no return */
+#define ERR_ABORT  (ERR_ERRNO / 4)              /* error is fatal; abort */
+#define ERR_MASK   (ERR_ERRNO | ERR_FATAL | ERR_ABORT) /* all */
+
+int  process(void);
+void prchar(unsigned int ch);
+
+
+int
+main(int argc, char **argv, char **env)
+{
+    register int c;
+    int showusage = FALSE;                      /* usage error? */
+
+    /*
+     * figure out invocation leaf-name
+     */
+
+    if ((progname = strrchr(argv[0], '/')) == (char *) NULL)
+        progname = argv[0];
+    else
+        progname++;
+
+    argv[0] = progname;                         /* for getopt err reporting */
+
+    /*
+     *  Check options and arguments.
+     */
+
+    opterr = 0;                                 /* we'll report all errors */
+    while ((c = getopt(argc, argv, GETOPTARGS)) != EOF)
+        switch (c)
+        {
+            case 'v':                           /* toggle verbose */
+                verbose = ! verbose;
+                break;
+
+            case '?':
+                showusage = TRUE;
+        }
+
+    if (showusage)
+    {
+        (void) fprintf(stderr, "%s", USAGE);
+        exit(1);
+    }
+
+    return process();
+}
+
+
+/*
+ * process(arg)
+ *
+ * Input looks like this
+ *
+ *   Starting address: 00000001.480035a0
+ *   -----------------------------------
+
++0000 / 0d0a0d0a 2a2a2a20 53454d20 54455354 202d2d20 4e4f4445 2032202a 2a2a0d0a
++0020 / 73703a20 30783433 30303030 31300d0a 30783438 30613161 38383a20 676f7420
+  ....
++0b40 / xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx
+
+ *
+ * The 'xxxxxxxxx' shows up if the page has not been allocated.
+ */
+
+int
+process(void)
+{
+    uval_t b[8];
+    u32   ignore;
+    char *p;
+    int  i;
+    int  failed_once;
+
+    char line[1024];
+
+#define PRINT_BUFFER_SIZE (16 * 1024)
+    struct {
+        int  index;
+        int  size;
+        u8   buffer[PRINT_BUFFER_SIZE];
+    } print_buffer;
+
+    /* we stuff the data into print_buffer using memcpy() */
+    p = (char *) &print_buffer;
+
+    failed_once = 0;
+
+    while (gets(line))
+    {
+        char *cp;
+
+        /* hack; deal with the 'xxxxxxxx' problem noted above */
+        for (cp=line; *cp; cp++)
+            if (*cp == 'x')
+                *cp = '0';
+
+        if (*line != '+')
+            continue;
+        if (sscanf(line, "+%x / %x %x %x %x %x %x %x %x\n",
+                   &ignore,
+                   &b[0].uv_long,
+                   &b[1].uv_long,
+                   &b[2].uv_long,
+                   &b[3].uv_long,
+                   &b[4].uv_long,
+                   &b[5].uv_long,
+                   &b[6].uv_long,
+                   &b[7].uv_long) != 9)
+        {
+            if (failed_once)
+                error(ERR_FATAL, "2nd format problem; giving up");
+            error(0, "format problem in line: `%s`", line);
+            failed_once = 1;
+        }
+
+        memcpy((void *) p, (void *) b, sizeof(b));
+        p += sizeof(b);
+    }
+
+    if (verbose)
+        printf("buffer size: %d\n", print_buffer.size);
+
+    if (print_buffer.size < 0)
+        error(ERR_FATAL, "size is too small");
+
+    if (print_buffer.size != sizeof(print_buffer.buffer))
+    {
+        error(ERR_FATAL, "buffer size mismatch, expected %d",
+              sizeof(print_buffer.buffer));
+        /* XXX we really should just dynamically allocate the buffer */
+    }
+
+    i = print_buffer.index + 1;
+    while (i != print_buffer.index)
+    {
+        unsigned int c;
+        c = print_buffer.buffer[i++];
+        if (c && (c != '\r'))
+            prchar(c);
+        i %= print_buffer.size;
+    }
+    printf("\n");
+    return 0;
+}
+
+/* de-controlify */
+char *de_control[] = {
+    "^@", "^A", "^B", "^C", "^D", "^E", "^F", "^G", "^H", "^I", "^J", "^K",
+    "^L", "^M", "^N", "^O", "^P", "^Q", "^R", "^S", "^T", "^U", "^V", "^W",
+    "^X", "^Y", "^Z", "^[", "^\\", "^]", "^~", "^_",
+    " ", "!", "\"", "#", "$",  "%", "&", "'", "(", ")", "*", "+", ",", "-",
+    ".", "/", "0",  "1", "2",  "3", "4", "5", "6", "7", "8", "9", ":", ";",
+    "<", "=", ">",  "?", "@",  "A", "B", "C", "D", "E", "F", "G", "H", "I",
+    "J", "K", "L",  "M", "N",  "O", "P", "Q", "R", "S", "T", "U", "V", "W",
+    "X", "Y", "Z",  "[", "\\", "]", "^", "_", "`", "a", "b", "c", "d", "e",
+    "f", "g", "h",  "i", "j",  "k", "l", "m", "n", "o", "p", "q", "r", "s",
+    "t", "u", "v",  "w", "x",  "y", "z", "{", "|", "}", "~", "^?",
+    "M-^@", "M-^A", "M-^B", "M-^C", "M-^D", "M-^E", "M-^F", "M-^G",
+    "M-^H", "M-^I", "M-^J", "M-^K", "M-^L", "M-^M", "M-^N", "M-^O",
+    "M-^P", "M-^Q", "M-^R", "M-^S", "M-^T", "M-^U", "M-^V", "M-^W",
+    "M-^X", "M-^Y", "M-^Z", "M-^[", "M-^\\", "M-^]", "M-^~", "M-^_",
+    "M- ", "M-!", "M-\"", "M-#", "M-$", "M-%", "M-&", "M-'",
+    "M-(", "M-)", "M-*", "M-+", "M-,", "M--", "M-.", "M-/",
+    "M-0", "M-1", "M-2", "M-3", "M-4", "M-5", "M-6", "M-7",
+    "M-8", "M-9", "M-:", "M-;", "M-<", "M-=", "M->", "M-?",
+    "M-@", "M-A", "M-B", "M-C", "M-D", "M-E", "M-F", "M-G",
+    "M-H", "M-I", "M-J", "M-K", "M-L", "M-M", "M-N", "M-O",
+    "M-P", "M-Q", "M-R", "M-S", "M-T", "M-U", "M-V", "M-W",
+    "M-X", "M-Y", "M-Z", "M-[", "M-\\", "M-]", "M-^", "M-_",
+    "M-`", "M-a", "M-b", "M-c", "M-d", "M-e", "M-f", "M-g",
+    "M-h", "M-i", "M-j", "M-k", "M-l", "M-m", "M-n", "M-o",
+    "M-p", "M-q", "M-r", "M-s", "M-t", "M-u", "M-v", "M-w",
+    "M-x", "M-y", "M-z", "M-{", "M-|", "M-}", "M-~", "M-^?"
+};
+
+/*
+ * prchar(ch); print ch in a readable format, ie ^X or X or ~^X or DEL, etc.
+ */
+
+void
+prchar(unsigned int ch)
+{
+    if (isprint(ch) || isspace(ch))
+        putchar(ch);
+    else
+        printf("%s", de_control[ch]);
+}
+
+
+/*
+ * error(errn, arglist)
+ *      report an error to stderr using printf(3) conventions.
+ *      Any output is preceded by '<progname>: '
+ *
+ * Uses ERR_EXIT  bit to request exit(errn)
+ *      ERR_ABORT to request abort()
+ *      ERR_ERRNO to indicate use of errno instead of argument.
+ *
+ * If resulting 'errn' is non-zero, it is assumed to be an 'errno' and its
+ *      associated error message is appended to the output.
+ */
+
+/*VARARGS*/
+
+void
+error(int error_flag, ...)
+{
+    va_list arglist;
+    register char *format;
+    extern char *sys_errlist[];
+    extern int sys_nerr;
+    int local_errno;
+
+    extern int errno;
+
+    (void) fflush(stdout);          /* in case stdout/stderr same */
+
+    local_errno = error_flag & ~ERR_MASK;
+    if (error_flag & ERR_ERRNO)     /* use errno? */
+        local_errno = errno;
+
+    va_start(arglist, error_flag);
+    format = va_arg(arglist, char *);
+    (void) fprintf(stderr, "%s: ", progname);
+    (void) vfprintf(stderr, format, arglist);
+    va_end(arglist);
+
+    if (local_errno)
+        if ((local_errno > 0) && (local_errno < sys_nerr))
+            (void) fprintf(stderr, " (%s)\n", sys_errlist[local_errno]);
+        else
+            (void) fprintf(stderr, " (unknown errno=%d)\n", local_errno);
+    else
+        (void) fprintf(stderr, "\n");
+
+    (void) fflush(stderr);
+
+    if (error_flag & (ERR_FATAL | ERR_ABORT))
+    {
+        if (error_flag & ERR_FATAL)
+        {
+            error(0, local_errno ? "fatal error, exiting" : "exiting");
+            exit(local_errno);
+        }
+        else
+        {
+            error(0, "fatal error, aborting");
+            abort();
+        }
+    }
+}
+

c/src/lib/libbsp/i386/force386/clock/ckinit.c

@@ -0,0 +1,75 @@
+/*  Clock_initialize
+ *
+ *  This routine initializes the Motorola MFP 68901 on the
+ *  FORCE CPU386 board.  The tick frequency is 1 millisecond.
+ *
+ *  Input parameters:  NONE
+ *
+ *  Output parameters:  NONE
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include <bsp.h>
+#include <clockdrv.h>
+#include <stdlib.h>
+
+volatile rtems_unsigned32 Clock_driver_ticks;
+rtems_unsigned32 Clock_isrs;              /* ISRs until next tick */
+rtems_isr_entry  Old_ticker;
+
+rtems_device_driver Clock_initialize(
+  rtems_device_major_number major,
+  rtems_device_minor_number minor,
+  void *pargp,
+  rtems_id tid,
+  rtems_unsigned32 *rval
+)
+{
+  Install_clock( Clock_isr );
+}
+
+void ReInstall_clock(
+  rtems_isr_entry clock_isr
+)
+{
+  rtems_unsigned32 isrlevel = 0;
+
+  rtems_interrupt_disable( isrlevel );
+   (void) set_vector( clock_isr, 0x38, 1 );
+  rtems_interrupt_enable( isrlevel );
+}
+
+void Install_clock(
+  rtems_isr_entry clock_isr
+)
+{
+  Clock_driver_ticks = 0;
+  Clock_isrs = BSP_Configuration.microseconds_per_tick / 1000;
+
+  if ( BSP_Configuration.ticks_per_timeslice ) {
+    Old_ticker = ( rtems_isr_entry ) set_vector( clock_isr, 0x38, 1 );
+    outport_byte( TBCR, 0x14 );  /* reset it, delay mode, 50X */
+    outport_byte( TBDR, 0x50 );  /* 1 millisecond */
+    outport_byte( IERA, 0x41 );  /* enable interrupt for B */
+  }
+  atexit( Clock_exit );
+}
+
+void Clock_exit( void )
+{
+  if ( BSP_Configuration.ticks_per_timeslice ) {
+    outport_byte( TBCR, 0x00 );  /* initial value */
+    outport_byte( IERA, 0x40 );  /* disable interrupt */
+    /* ??? Is "do not restore old vector" causing problems? */
+  }
+}
+

c/src/lib/libbsp/i386/force386/console/console.c

@@ -0,0 +1,219 @@
+/*
+ *  This file contains the Force CPU386 console IO package.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#define F386_INIT
+
+#include <stdlib.h>
+
+#include <rtems.h>
+#include "console.h"
+#include "bsp.h"
+
+/*  console_cleanup
+ *
+ *  This routine is called at exit to clean up the console hardware.
+ *
+ *  Input parameters: NONE
+ *
+ *  Output parameters:  NONE
+ *
+ *  Return values:
+ */
+
+void console_cleanup( void )
+{
+  register rtems_unsigned8 ignored;
+  /*
+   *  FORCE technical support mentioned that it may be necessary to
+   *  read the DUSCC RX_BUFFER port four times to remove all junk.
+   *  This code is a little more paranoid.
+   */
+
+   inport_byte( RX_BUFFER, ignored );
+   inport_byte( RX_BUFFER, ignored );
+   inport_byte( RX_BUFFER, ignored );
+   inport_byte( RX_BUFFER, ignored );
+   inport_byte( RX_BUFFER, ignored );
+}
+
+/*  console_initialize
+ *
+ *  This routine initializes the console IO driver.
+ *
+ *  Input parameters: NONE
+ *
+ *  Output parameters:  NONE
+ *
+ *  Return values:
+ */
+
+rtems_device_driver console_initialize(
+  rtems_device_major_number  major,
+  rtems_device_minor_number  minor,
+  void                      *arg,
+  rtems_id                   self,
+  rtems_unsigned32          *status
+)
+{
+   /*
+    *  flush the console now and at exit.  Just in case.
+    */
+
+   console_cleanup();
+
+   atexit( console_cleanup );
+}
+
+
+/*  is_character_ready
+ *
+ *  This routine returns TRUE if a character is available.
+ *
+ *  Input parameters: NONE
+ *
+ *  Output parameters:  NONE
+ *
+ *  Return values:
+ */
+
+rtems_boolean is_character_ready(
+  char *ch
+)
+{
+  register rtems_unsigned8 status;
+
+  inport_byte( RX_STATUS, status );
+
+  if ( Is_rx_ready( status ) ) {
+     inport_byte( RX_BUFFER,  status );
+     *ch = status;
+     return TRUE;
+  }
+  return FALSE;
+}
+
+/*  inbyte
+ *
+ *  This routine reads a character from the UART.
+ *
+ *  Input parameters: NONE
+ *
+ *  Output parameters:  NONE
+ *
+ *  Return values:
+ *    character read from UART
+ */
+
+char inbyte( void )
+{
+  register rtems_unsigned8 status;
+  char                     ch;
+
+  do {
+    inport_byte( RX_STATUS, status );
+  } while ( !Is_rx_ready( status ) );
+
+#if ( PORTB == 1 )
+  /*
+   *  Force example code resets the Channel B Receiver here.
+   *  It appears to cause XON's to be lost.
+   */
+
+   /* outport_byte( RX_STATUS, 0x10 );  */
+#endif
+
+  inport_byte( RX_BUFFER, ch );
+
+  return ch;
+}
+
+/*  outbyte
+ *
+ *  This routine transmits a character out the port.  It supports
+ *  XON/XOFF flow control.
+ *
+ *  Input parameters:
+ *    ch  - character to be transmitted
+ *
+ *  Output parameters:  NONE
+ */
+
+void outbyte(
+  char ch
+)
+{
+  rtems_unsigned8 status;
+
+  do {
+    inport_byte( TX_STATUS, status );
+  } while ( !Is_tx_ready( status ) );
+
+#if 0
+  while ( is_character_ready( &status ) == TRUE ) {      /* must be an XOFF */
+    if ( status == XOFF )
+      do {
+        while ( is_character_ready( &status ) == FALSE ) ;
+      } while ( status != XON );
+  }
+#endif
+
+  outport_byte( TX_BUFFER, ch );
+}
+
+/*
+ * __read  -- read bytes from the serial port. Ignore fd, since
+ *            we only have stdin.
+ */
+
+int __read(
+  int fd,
+  char *buf,
+  int nbytes
+)
+{
+  int i = 0;
+
+  for (i = 0; i < nbytes; i++) {
+    *(buf + i) = inbyte();
+    if ((*(buf + i) == '\n') || (*(buf + i) == '\r')) {
+      (*(buf + i++)) = '\n';
+      (*(buf + i)) = 0;
+      break;
+    }
+  }
+  return (i);
+}
+
+/*
+ * __write -- write bytes to the serial port. Ignore fd, since
+ *            stdout and stderr are the same. Since we have no filesystem,
+ *            open will only return an error.
+ */
+
+int __write(
+  int fd,
+  char *buf,
+  int nbytes
+)
+{
+  int i;
+
+  for (i = 0; i < nbytes; i++) {
+    if (*(buf + i) == '\n') {
+      outbyte ('\r');
+    }
+    outbyte (*(buf + i));
+  }
+  return (nbytes);
+}

c/src/lib/libbsp/i386/force386/include/bsp.h

@@ -0,0 +1,156 @@
+/*  bsp.h
+ *
+ *  This include file definitions related to the Force CPU-386 board.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#ifndef __FORCE386_h
+#define __FORCE386_h
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <rtems.h>
+#include <iosupp.h>
+
+/*
+ *  Define the time limits for RTEMS Test Suite test durations.
+ *  Long test and short test duration limits are provided.  These
+ *  values are in seconds and need to be converted to ticks for the
+ *  application.
+ *
+ */
+
+#define MAX_LONG_TEST_DURATION       300 /* 5 minutes = 300 seconds */
+#define MAX_SHORT_TEST_DURATION      3   /* 3 seconds */
+
+/*
+ *  Define the interrupt mechanism for Time Test 27
+ *
+ *  NOTE: Use a software interrupt for the i386.
+ */
+
+#define MUST_WAIT_FOR_INTERRUTPT 0
+
+#define Install_tm27_vector( handler ) set_vector( (handler), 0x90, 1 )
+
+#define Cause_tm27_intr()              asm volatile( "int $0x90" : : );
+
+#define Clear_tm27_intr()
+
+#define Lower_tm27_intr()
+
+/*
+ *  Simple spin delay in microsecond units for device drivers.
+ *  This is very dependent on the clock speed of the target.
+ */
+
+#define delay( _microseconds ) \
+  { \
+    rtems_unsigned32 _counter; \
+    \
+    _counter = (_microseconds); \
+    \
+    asm volatile ( "0: nop;" \
+                   " mov %0,%0 ;" \
+                   " loop 0b" : "=c" (_counter) \
+                              : "0"  (_counter) \
+                 ); \
+    \
+  }
+
+/* Constants */
+
+#define RAM_START 0
+#define RAM_END   0x100000
+
+/* I/O addressing */
+
+/*
+ *  The following determines whether Port B or the Console should
+ *  be used for test I/O.  Setting ONE (and only ONE) of these to 1
+ *  enables I/O on that port.
+ *
+ *  PORT A - DUSCC MC68562 Channel A
+ *  PORT B - DUSCC MC68562 Channel B
+ *  PORT C - MFP MC68901 Channel      (*** FORCEbug console ***)
+ */
+
+#define PORTB         1               /* use port b as test port */
+#define PORTC         0               /* use console port as test port */
+
+#if ( PORTB == 1 )
+#define TX_STATUS     0x1b6           /* DUSCC General Status Register */
+#define RX_STATUS     0x1b6           /* DUSCC General Status Register */
+#define TX_BUFFER     0x1e0           /* DUSCC Transmitter Channel B */
+#define RX_BUFFER     0x1e8           /* DUSCC Receiver Channel B */
+#define Is_tx_ready( _status ) ( (_status) & 0x20 )
+#define Is_rx_ready( _status ) ( (_status) & 0x10 )
+#endif
+
+#if ( PORTC == 1 )
+#define TX_STATUS     0x12c           /* MFP Transmit Status Register */
+#define RX_STATUS     0x12a           /* MFP Receive Status Register */
+#define TX_BUFFER     0x12e           /* MFP Transmitter Channel  */
+#define RX_BUFFER     0x12e           /* MFP Receiver Channel  */
+#define Is_tx_ready( _status ) ( (_status) & 0x80 )
+#define Is_rx_ready( _status ) ( (_status) & 0x80 )
+#endif
+
+/* Timer constants */
+
+#define IERA   0x106     /* Interrupt Enable Register A */
+#define IMRA   0x112     /* Interrupt Mask Register A */
+#define TACR   0x118     /* Timer A Control Register */
+#define TADR   0x11e     /* Timer A Data Register */
+
+#define IERB   0x108     /* Interrupt Enable Register B */
+#define TBCR   0x11a     /* Timer B Control Register */
+#define TBDR   0x120     /* Timer B Data Register */
+
+/* Structures */
+
+#ifdef F386_INIT
+#undef BSP_EXTERN
+#define BSP_EXTERN
+#else
+#undef BSP_EXTERN
+#define BSP_EXTERN extern
+#endif
+
+/* miscellaneous stuff assumed to exist */
+
+extern rtems_configuration_table BSP_Configuration;
+
+extern i386_IDT_slot Interrupt_descriptor_table[ 256 ];
+extern i386_GDT_slot Global_descriptor_table[ 8192 ];
+
+BSP_EXTERN unsigned short Idt[3];  /* Interrupt Descriptor Table Address */
+BSP_EXTERN unsigned short Gdt[3];  /* Global Descriptor Table Address */
+BSP_EXTERN unsigned int   Idt_base;
+BSP_EXTERN unsigned int   Gdt_base;
+
+/* routines */
+
+i386_isr set_vector(
+  rtems_isr_entry     handler,
+  rtems_vector_number vector,
+  int                 type
+);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+/* end of include file */

c/src/lib/libbsp/i386/force386/include/coverhd.h

@@ -0,0 +1,104 @@
+/* coverhd.h
+ *
+ *  This include file has defines to represent the overhead associated
+ *  with calling a particular directive from C on this target.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#ifndef __COVERHD_h
+#define __COVERHD_h
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define CALLING_OVERHEAD_INITIALIZE_EXECUTIVE      3
+#define CALLING_OVERHEAD_SHUTDOWN_EXECUTIVE        3
+#define CALLING_OVERHEAD_TASK_CREATE               4
+#define CALLING_OVERHEAD_TASK_IDENT                4
+#define CALLING_OVERHEAD_TASK_START                4
+#define CALLING_OVERHEAD_TASK_RESTART              3
+#define CALLING_OVERHEAD_TASK_DELETE               3
+#define CALLING_OVERHEAD_TASK_SUSPEND              3
+#define CALLING_OVERHEAD_TASK_RESUME               3
+#define CALLING_OVERHEAD_TASK_SET_PRIORITY         4
+#define CALLING_OVERHEAD_TASK_MODE                 4
+#define CALLING_OVERHEAD_TASK_GET_NOTE             4
+#define CALLING_OVERHEAD_TASK_SET_NOTE             4
+#define CALLING_OVERHEAD_TASK_WAKE_WHEN            7
+#define CALLING_OVERHEAD_TASK_WAKE_AFTER           3
+#define CALLING_OVERHEAD_INTERRUPT_CATCH           4
+#define CALLING_OVERHEAD_CLOCK_GET                 7
+#define CALLING_OVERHEAD_CLOCK_SET                 7
+#define CALLING_OVERHEAD_CLOCK_TICK                2
+
+#define CALLING_OVERHEAD_TIMER_CREATE              3
+#define CALLING_OVERHEAD_TIMER_IDENT               3
+#define CALLING_OVERHEAD_TIMER_DELETE              3
+#define CALLING_OVERHEAD_TIMER_FIRE_AFTER          4
+#define CALLING_OVERHEAD_TIMER_FIRE_WHEN           8
+#define CALLING_OVERHEAD_TIMER_RESET               3
+#define CALLING_OVERHEAD_TIMER_CANCEL              3
+#define CALLING_OVERHEAD_SEMAPHORE_CREATE          4
+#define CALLING_OVERHEAD_SEMAPHORE_DELETE          3
+#define CALLING_OVERHEAD_SEMAPHORE_IDENT           4
+#define CALLING_OVERHEAD_SEMAPHORE_OBTAIN          4
+#define CALLING_OVERHEAD_SEMAPHORE_RELEASE         3
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_CREATE      4
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_IDENT       4
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_DELETE      3
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_SEND        3
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_URGENT      3
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_BROADCAST   4
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_RECEIVE     4
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_FLUSH       3
+
+#define CALLING_OVERHEAD_EVENT_SEND                4
+#define CALLING_OVERHEAD_EVENT_RECEIVE             4
+#define CALLING_OVERHEAD_SIGNAL_CATCH              3
+#define CALLING_OVERHEAD_SIGNAL_SEND               3
+#define CALLING_OVERHEAD_PARTITION_CREATE          4
+#define CALLING_OVERHEAD_PARTITION_IDENT           4
+#define CALLING_OVERHEAD_PARTITION_DELETE          3
+#define CALLING_OVERHEAD_PARTITION_GET_BUFFER      4
+#define CALLING_OVERHEAD_PARTITION_RETURN_BUFFER   4
+#define CALLING_OVERHEAD_REGION_CREATE             4
+#define CALLING_OVERHEAD_REGION_IDENT              3
+#define CALLING_OVERHEAD_REGION_DELETE             3
+#define CALLING_OVERHEAD_REGION_GET_SEGMENT        4
+#define CALLING_OVERHEAD_REGION_RETURN_SEGMENT     4
+#define CALLING_OVERHEAD_PORT_CREATE               4
+#define CALLING_OVERHEAD_PORT_IDENT                3
+#define CALLING_OVERHEAD_PORT_DELETE               3
+#define CALLING_OVERHEAD_PORT_EXTERNAL_TO_INTERNAL 4
+#define CALLING_OVERHEAD_PORT_INTERNAL_TO_EXTERNAL 4
+
+#define CALLING_OVERHEAD_IO_INITIALIZE             4
+#define CALLING_OVERHEAD_IO_OPEN                   4
+#define CALLING_OVERHEAD_IO_CLOSE                  4
+#define CALLING_OVERHEAD_IO_READ                   4
+#define CALLING_OVERHEAD_IO_WRITE                  4
+#define CALLING_OVERHEAD_IO_CONTROL                4
+#define CALLING_OVERHEAD_FATAL_ERROR_OCCURRED      3
+#define CALLING_OVERHEAD_RATE_MONOTONIC_CREATE     3
+#define CALLING_OVERHEAD_RATE_MONOTONIC_IDENT      3
+#define CALLING_OVERHEAD_RATE_MONOTONIC_DELETE     3
+#define CALLING_OVERHEAD_RATE_MONOTONIC_CANCEL     3
+#define CALLING_OVERHEAD_RATE_MONOTONIC_PERIOD     3
+#define CALLING_OVERHEAD_MULTIPROCESSING_ANNOUNCE  2
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+/* end of include file */

c/src/lib/libbsp/i386/force386/shmsupp/addrconv.c

@@ -0,0 +1,32 @@
+/*  Shm_Convert_address
+ *
+ *  The CPU386 has a "normal" view of the VME address space.
+ *  No address range conversion is required.
+ *
+ *  Input parameters:
+ *    address - address to convert
+ *
+ *  Output parameters:
+ *    returns - converted address
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include <rtems.h>
+#include <bsp.h>
+#include <shm.h>
+
+void *Shm_Convert_address(
+  void *address
+)
+{
+  return ( address );
+}

c/src/lib/libbsp/i386/force386/shmsupp/getcfg.c

@@ -0,0 +1,73 @@
+/*  void Shm_Get_configuration( localnode, &shmcfg )
+ *
+ *  This routine initializes, if necessary, and returns a pointer
+ *  to the Shared Memory Configuration Table for the FORCE CPU-386
+ *
+ *  INPUT PARAMETERS:
+ *    localnode - local node number
+ *    shmcfg    - address of pointer to SHM Config Table
+ *
+ *  OUTPUT PARAMETERS:
+ *    *shmcfg   - pointer to SHM Config Table
+ *
+ *  NOTES:  The FORCE CPU-386 does not have an interprocessor interrupt.
+ *
+ *          The following table illustrates the configuration limitations:
+ *
+ *                                   BUS     MAX
+ *                          MODE    ENDIAN  NODES
+ *                        ========= ====== =======
+ *                         POLLED    BIG    2+
+ *                        INTERRUPT **** NOT SUPPORTED ****
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include <rtems.h>
+#include <shm.h>
+#include <bsp.h>
+
+#define INTERRUPT 0
+#define POLLING   1        /* FORCE CPU-386 target is polling ONLY!!! */
+
+
+shm_config_table BSP_shm_cfgtbl;
+
+void Shm_Get_configuration(
+  rtems_unsigned32   localnode,
+  shm_config_table **shmcfg
+)
+{
+   set_segment( get_ds(), 0x00002000, 0xffffd000  );
+
+   BSP_shm_cfgtbl.base         = i386_Physical_to_logical(
+                                    get_ds(),
+                                    (void *) 0x20000000
+                                  );
+
+   BSP_shm_cfgtbl.length       = 1 * MEGABYTE;
+   BSP_shm_cfgtbl.format       = SHM_BIG;
+
+   BSP_shm_cfgtbl.cause_intr   = Shm_Cause_interrupt;
+
+#ifdef NEUTRAL_BIG
+   BSP_shm_cfgtbl.convert      = NULL_CONVERT;
+#else
+   BSP_shm_cfgtbl.convert      = CPU_swap_u32;
+#endif
+
+   BSP_shm_cfgtbl.poll_intr    = POLLED_MODE;
+   BSP_shm_cfgtbl.Intr.address = NO_INTERRUPT;
+   BSP_shm_cfgtbl.Intr.value   = NO_INTERRUPT;
+   BSP_shm_cfgtbl.Intr.length  = NO_INTERRUPT;
+
+   *shmcfg = &BSP_shm_cfgtbl;
+}

c/src/lib/libbsp/i386/force386/shmsupp/lock.c

@@ -0,0 +1,83 @@
+/*  Shared Memory Lock Routines
+ *
+ *  This shared memory locked queue support routine need to be
+ *  able to lock the specified locked queue.  Interrupts are
+ *  disabled while the queue is locked to prevent preemption
+ *  and deadlock when two tasks poll for the same lock.
+ *  previous level.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include <rtems.h>
+#include <bsp.h>
+#include <shm.h>
+
+/*
+ *  Shm_Initialize_lock
+ *
+ *  Initialize the lock for the specified locked queue.
+ */
+
+void Shm_Initialize_lock(
+  Shm_Locked_queue_Control *lq_cb
+)
+{
+  lq_cb->lock = LQ_UNLOCKED;
+}
+
+/*  void _Shm_Lock( &lq_cb )
+ *
+ *  This shared memory locked queue support routine locks the
+ *  specified locked queue.  It disables interrupts to prevent
+ *  a deadlock condition.
+ */
+
+void Shm_Lock(
+  Shm_Locked_queue_Control *lq_cb
+)
+{
+  rtems_unsigned32 isr_level;
+  volatile rtems_unsigned32 *lockptr = &lq_cb->lock;
+  rtems_unsigned32 lock_value;
+
+  lock_value = SHM_LOCK_VALUE;
+  rtems_interrupt_disable( isr_level );
+
+    Shm_isrstat = isr_level;
+    while ( 1 ) {
+      asm volatile( "lock ; xchg (%0),%1"
+                         : "=r" (lockptr), "=r" (lock_value)
+                         : "0" (lockptr),  "1" (lock_value)
+                  );
+      if ( lock_value == SHM_UNLOCK_VALUE )
+        break;
+      delay( 10 );   /* approximately 10 microseconds */
+   }
+}
+
+/*
+ *  Shm_Unlock
+ *
+ *  Unlock the lock for the specified locked queue.
+ */
+
+void Shm_Unlock(
+  Shm_Locked_queue_Control *lq_cb
+)
+{
+  rtems_unsigned32 isr_level;
+
+  lq_cb->lock = SHM_UNLOCK_VALUE;
+  isr_level = Shm_isrstat;
+  rtems_interrupt_enable( isr_level );
+}
+

c/src/lib/libbsp/i386/force386/shmsupp/mpisr.c

@@ -0,0 +1,31 @@
+/*  Shm_setvec
+ *
+ *  This driver routine sets the SHM interrupt vector to point to the
+ *  driver's SHM interrupt service routine.
+ *
+ *  NOTE: This routine is not used by the FORCE CPU-386 because it
+ *        only supports polling mode.
+ *
+ *  Input parameters:  NONE
+ *
+ *  Output parameters: NONE
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include <rtems.h>
+#include <bsp.h>
+#include <shm.h>
+
+void Shm_setvec()
+{
+  /* NOT USED ON FORCE CPU-386!!! */
+}

c/src/lib/libbsp/i386/force386/startup/bspstart.c

@@ -0,0 +1,144 @@
+/*  bsp_start()
+ *
+ *  This routine starts the application.  It includes application,
+ *  board, and monitor specific initialization and configuration.
+ *  The generic CPU dependent initialization has been performed
+ *  before this routine is invoked.
+ *
+ *  INPUT:  NONE
+ *
+ *  OUTPUT: NONE
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include <rtems.h>
+#include <bsp.h>
+#include <libcsupport.h>
+
+#include <stackchk.h>
+
+/*
+ *  The original table from the application and our copy of it with
+ *  some changes.
+ */
+
+extern rtems_configuration_table  Configuration;
+rtems_configuration_table  BSP_Configuration;
+
+rtems_cpu_table Cpu_table;
+
+/*      Initialize whatever libc we are using
+ *      called from postdriver hook
+ */
+
+void bsp_libc_init()
+{
+    extern int end;
+    rtems_unsigned32        heap_start;
+
+    heap_start = (rtems_unsigned32) &end;
+    if (heap_start & (CPU_ALIGNMENT-1))
+        heap_start = (heap_start + CPU_ALIGNMENT) & ~(CPU_ALIGNMENT-1);
+
+    RTEMS_Malloc_Initialize((void *) heap_start, 64 * 1024, 0);
+
+    /*
+     * Set up for the libc handling.
+     */
+
+    if (BSP_Configuration.ticks_per_timeslice > 0)
+        libc_init(1);                /* reentrant if possible */
+    else
+        libc_init(0);                /* non-reentrant */
+
+    /*
+     *  Initialize the stack bounds checker
+     */
+
+#ifdef STACK_CHECKER_ON
+    Stack_check_Initialize();
+#endif
+
+}
+
+int bsp_start(
+  int argc,
+  char **argv,
+  char **environp
+)
+{
+  /*
+   *  FORCE documentation incorrectly states that the bus request
+   *  level is initialized to 3.  It is actually initialized by
+   *  FORCEbug to 0.
+   */
+
+  outport_byte( 0x00, 0x3f );      /* resets VMEbus request level */
+
+  /*
+   *  we do not use the pretasking_hook.
+   */
+
+  Cpu_table.pretasking_hook = NULL;
+
+  Cpu_table.predriver_hook = bsp_libc_init;  /* RTEMS resources available */
+
+  Cpu_table.postdriver_hook = NULL;   /* Call our main() for constructors */
+
+  Cpu_table.idle_task = NULL;  /* do not override system IDLE task */
+
+  Cpu_table.do_zero_of_workspace = TRUE;
+
+  Cpu_table.interrupt_table_segment = get_ds();
+
+  Cpu_table.interrupt_table_offset = (void *)Interrupt_descriptor_table;
+
+  Cpu_table.interrupt_stack_size = 4096;
+
+  Cpu_table.extra_system_initialization_stack = 0;
+
+  /*
+   *  Copy the table
+   */
+
+  BSP_Configuration = Configuration;
+
+  BSP_Configuration.work_space_start = (void *)
+     RAM_END - BSP_Configuration.work_space_size;
+
+  /*
+   * Add 1 region for Malloc in libc_low
+   */
+
+  BSP_Configuration.maximum_regions++;
+
+  /*
+   * Add 1 extension for newlib libc
+   */
+
+#ifdef RTEMS_NEWLIB
+    BSP_Configuration.maximum_extensions++;
+#endif
+
+  /*
+   * Add another extension if using the stack checker
+   */
+
+#ifdef STACK_CHECKER_ON
+    BSP_Configuration.maximum_extensions++;
+#endif
+
+  rtems_initialize_executive( &BSP_Configuration, &Cpu_table );
+  /* does not return */
+  /* no cleanup necessary for Force CPU-386 */
+  return 0;
+}

c/src/lib/libbsp/i386/force386/startup/exit.c

@@ -0,0 +1,29 @@
+/*
+ *  exit
+ *
+ *  This routine returns control to FORCEbug.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include <rtems.h>
+#include <bsp.h>
+#include <clockdrv.h>
+#include <iodrv.h>
+
+void _exit( )
+{
+   /* Clock or Timer cleanup is run by at_exit() */
+
+   Io_cleanup();
+
+   bsp_cleanup();
+}

c/src/lib/libbsp/i386/force386/startup/ldsegs.s

@@ -0,0 +1,86 @@
+/*  _load_segments
+ *
+ *  This file assists the board independent startup code by
+ *  loading the proper segment register values.  The values
+ *  loaded are board dependent.
+ *
+ *  NOTE:  No stack has been established when this routine
+ *         is invoked.  It returns by jumping back to bspentry.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include "asm.h"
+
+BEGIN_CODE
+
+/*
+ *  FORCEBUG loads us into a virtual address space which
+ *  really starts at PHYSICAL_ADDRESS_BASE.
+ */
+
+.set PHYSICAL_ADDRESS_BASE,    0x00002000
+
+/*
+ *  At reset time, FORCEBUG normally has the segment selectors preloaded.
+ *  If a human resets the instruction pointer, this will not have occurred.
+ *  However, no guarantee can be made of the other registers if cs:ip was
+ *  modified to restart the program.  Because of this, the BSP reloads all
+ *  segment registers (except cs) with the values they have following
+ *  a reset.
+ */
+
+
+.set RESET_SS, 0x40        # initial value of stack segment register
+.set RESET_DS, 0x40        # initial value of data segment register
+.set RESET_ES, 0x40        # initial value of extra segment register
+.set RESET_FS, 0x40        # initial value of "f" segment register
+.set RESET_GS, 0x30        # initial value of "g" segment register
+
+
+#define LOAD_SEGMENTS(_value,_segment) \
+        movw      $ ## _value, ax ; \
+        movw      _segment, ax
+
+        EXTERN (establish_stack)
+
+        PUBLIC (_load_segments)
+SYM (_load_segments):
+        LOAD_SEGMENTS( RESET_SS, ss )
+        LOAD_SEGMENTS( RESET_DS, ds )
+        LOAD_SEGMENTS( RESET_ES, es )
+        LOAD_SEGMENTS( RESET_FS, fs )
+        LOAD_SEGMENTS( RESET_GS, gs )
+
+        jmp     SYM (_establish_stack)  # return to the bsp entry code
+
+        PUBLIC (_return_to_monitor)
+SYM (_return_to_monitor):
+
+        call    SYM (Clock_exit)
+        movb    $0,al
+        int     $0x20                   # restart FORCEbug
+        jmp     SYM (start)             # FORCEbug does not reset PC
+
+END_CODE
+
+BEGIN_DATA
+
+        PUBLIC (_Do_Load_IDT)
+SYM (_Do_Load_IDT):
+       .byte 1
+
+        PUBLIC (_Do_Load_GDT)
+SYM (_Do_Load_GDT):
+       .byte 0
+
+END_DATA
+END

c/src/lib/libbsp/i386/force386/startup/linkcmds

@@ -0,0 +1,44 @@
+/*
+ *  This file contains directives for the GNU linker which are specific
+ *  to the FORCE CPU386 board.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+MEMORY
+        {
+        ram : org = 0x0, l = 1M
+        }
+
+SECTIONS
+{
+        .text 0x0 :
+        {
+        _text_start = . ;
+        *(.text)
+        _etext = ALIGN( 0x10 ) ;
+        }
+        .data ADDR( .text ) + SIZEOF( .text ):
+        {
+        _data_start = . ;
+        *(.data)
+        _edata = ALIGN( 0x10 ) ;
+        }
+        .bss ADDR( .data ) + SIZEOF( .data ):
+        {
+        _bss_start = . ;
+        *(.bss)
+        *(COMMON)
+        end = . ;
+        _end = . ;
+        __end = . ;
+        }
+}

c/src/lib/libbsp/i386/force386/startup/setvec.c

@@ -0,0 +1,59 @@
+/*  set_vector
+ *
+ *  This routine installs an interrupt vector on the Force CPU-386.
+ *
+ *  INPUT:
+ *    handler - interrupt handler entry point
+ *    vector  - vector number
+ *    type    - 0 indicates raw hardware connect
+ *              1 indicates RTEMS interrupt connect
+ *
+ *  RETURNS:
+ *    address of previous interrupt handler
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include <rtems.h>
+#include <bsp.h>
+
+i386_isr set_vector(                            /* returns old vector */
+  rtems_isr_entry     handler,                  /* isr routine        */
+  rtems_vector_number vector,                   /* vector number      */
+  int                 type                      /* RTEMS or RAW intr  */
+)
+{
+  i386_isr       previous_isr;
+  i386_IDT_slot  idt;
+
+  if ( type )
+    rtems_interrupt_catch( handler, vector, (rtems_isr_entry *) &previous_isr );
+  else {
+    /* get the address of the old handler */
+
+    idt = Interrupt_descriptor_table[ vector ];
+
+    previous_isr = (i386_isr)
+                      ((idt.offset_16_31 << 16) | idt.offset_0_15);
+
+    /* build the IDT entry */
+    idt.offset_0_15      = ((rtems_unsigned32) handler) & 0xffff;
+    idt.segment_selector = get_cs();
+    idt.reserved         = 0x00;
+    idt.p_dpl            = 0x8e;         /* present, ISR */
+    idt.offset_16_31     = ((rtems_unsigned32) handler) >> 16;
+
+    /* install the IDT entry */
+    Interrupt_descriptor_table[ vector ] = idt;
+  }
+  return previous_isr;
+}
+

c/src/lib/libbsp/i386/force386/timer/timer.c

@@ -0,0 +1,96 @@
+/*  Timer_init()
+ *
+ *  This routine initializes the timer on the FORCE CPU-386 board.
+ *
+ *  Input parameters:  NONE
+ *
+ *  Output parameters:  NONE
+ *
+ *  NOTE: This routine will not work if the optimizer is enabled
+ *        for some compilers.  The multiple writes to the Z8036
+ *        may be optimized away.
+ *
+ *        It is important that the timer start/stop overhead be
+ *        determined when porting or modifying this code.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+
+#include <rtems.h>
+#include <bsp.h>
+
+int Ttimer_val;
+rtems_boolean Timer_driver_Find_average_overhead;
+
+rtems_isr timerisr();
+
+void Timer_initialize()
+{
+
+  (void) set_vector( timerisr, 0x38, 0 );   /* install ISR */
+
+  Ttimer_val = 0;                           /* clear timer ISR count */
+
+  outport_byte( IERA, 0x40 );               /* disable interrupt */
+  outport_byte( TBCR, 0x40 );               /* stop the timer */
+  outport_byte( TBDR, 250 );                /* 250 units */
+
+  outport_byte( TBCR, 0x11 );               /* reset it, delay mode, 4X */
+#if 0
+  outport_byte( TBCR, 0x13 );               /* reset it, delay mode, 16X */
+#endif
+
+  outport_byte( IERA, 0x41 );               /* enable interrupt */
+
+}
+
+#define AVG_OVERHEAD      3  /* It typically takes 3.0 microseconds */
+                             /* (3 ticks) to start/stop the timer. */
+#define LEAST_VALID       4  /* Don't trust a value lower than this */
+
+int Read_timer()
+{
+  register rtems_unsigned32 clicks;
+  register rtems_unsigned32 total;
+
+  outport_byte( TBCR, 0x00 );        /* stop the timer */
+
+  inport_byte( TBDR, clicks );
+
+  total = Ttimer_val + 250 - clicks;
+
+  outport_byte( TBCR, 0x00 );  /* initial value */
+  outport_byte( IERA, 0x40 );  /* disable interrupt */
+
+  /* ??? Is "do not restore old vector" causing problems? */
+
+  if ( Timer_driver_Find_average_overhead == 1 )
+    return total;          /* in one microsecond units */
+
+  else {
+    if ( total < LEAST_VALID )
+      return 0;            /* below timer resolution */
+    return (total - AVG_OVERHEAD);
+  }
+}
+
+rtems_status_code Empty_function( void )
+{
+  return RTEMS_SUCCESSFUL;
+}
+
+void Set_find_average_overhead(
+  rtems_boolean find_flag
+)
+{
+  Timer_driver_Find_average_overhead = find_flag;
+}

c/src/lib/libbsp/i386/force386/timer/timerisr.s

@@ -0,0 +1,34 @@
+/*  timer_isr()
+ *
+ *  This routine provides the ISR for the Z8036 timer on the MVME136
+ *  board.   The timer is set up to generate an interrupt at maximum
+ *  intervals.
+ *
+ *  Input parameters:  NONE
+ *
+ *  Output parameters:  NONE
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include "asm.h"
+
+        BEGIN_CODE
+
+        EXTERN (Ttimer_val)
+
+        PUBLIC (timerisr)
+SYM (timerisr):
+        addl    $250, SYM (Ttimer_val)   # another 250 microseconds
+        iret
+
+END_CODE
+END

c/src/lib/libbsp/i960/cvme961/clock/ckinit.c

@@ -0,0 +1,77 @@
+/*  Clock_init()
+ *
+ *  This routine initializes the timer on the VIC chip on the CVME961.
+ *  The tick frequency is 1 millisecond.
+ *
+ *  Input parameters:  NONE
+ *
+ *  Output parameters:  NONE
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include <stdlib.h>
+
+#include <rtems.h>
+#include <bsp.h>
+#include <clockdrv.h>
+
+rtems_unsigned32 Clock_isrs;              /* ISRs until next tick */
+i960_isr         Old_ticker;
+volatile rtems_unsigned32 Clock_driver_ticks;
+                                          /* ticks since initialization */
+
+rtems_device_driver Clock_initialize(
+  rtems_device_major_number major,
+  rtems_device_minor_number minor,
+  void *pargp,
+  rtems_id id,
+  rtems_unsigned32 *rval )
+{
+  Install_clock( Clock_isr );
+  atexit( Clock_exit );
+}
+
+void ReInstall_clock(
+  rtems_isr_entry clock_isr
+)
+{
+   (void) set_vector( clock_isr, 5, 1 );
+}
+
+void Install_clock(
+  rtems_isr_entry clock_isr
+)
+{
+  volatile unsigned char *victimer;
+
+  Clock_driver_ticks = 0;
+  Clock_isrs = BSP_Configuration.microseconds_per_tick / 1000;
+
+  if ( BSP_Configuration.ticks_per_timeslice ) {
+    Old_ticker = set_vector( clock_isr, 5, 1 );
+    victimer = (volatile unsigned char *) 0xa00000c3;
+    *victimer = 0x12;
+    *victimer = 0x92;      /* 1000 HZ */
+  }
+}
+
+void Clock_exit()
+{
+  unsigned char *victimer;
+
+  if ( BSP_Configuration.ticks_per_timeslice ) {
+    victimer = (unsigned char *) 0xa00000c3;
+    *victimer = 0x12;
+    i960_mask_intr( 5 );
+    /* do not restore old vector */
+  }
+}

c/src/lib/libbsp/i960/cvme961/console/console.c

@@ -0,0 +1,147 @@
+/*
+ *  This file contains the MVME136 console IO package.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#define C961_INIT
+
+#include <rtems.h>
+#include "console.h"
+#include "bsp.h"
+
+/*  console_initialize
+ *
+ *  This routine initializes the console IO driver.
+ *
+ *  Input parameters: NONE
+ *
+ *  Output parameters:  NONE
+ *
+ *  Return values:
+ */
+
+rtems_device_driver console_initialize(
+  rtems_device_major_number  major,
+  rtems_device_minor_number  minor,
+  void                      *arg,
+  rtems_id                   self,
+  rtems_unsigned32          *status
+)
+{
+  *status = RTEMS_SUCCESSFUL;
+}
+
+/*
+ *  NINDY_IO( ... )
+ *
+ *  Interface to NINDY.
+ */
+
+#define NINDY_INPUT   0
+#define NINDY_OUTPUT  1
+
+void NINDY_IO();
+
+void ___NINDY_IO_WRAPPER( void )  /* never called */
+{
+   asm volatile ( "       .text" );
+   asm volatile ( "       .align 4" );
+   asm volatile ( "       .globl _NINDY_IO" );
+   asm volatile ( "_NINDY_IO:" );
+   asm volatile ( "        calls   0       /* call console routines */" );
+   asm volatile ( "        ret" );
+}
+
+/*  inbyte
+ *
+ *  This routine reads a character from the console using NINDY.
+ *
+ *  Input parameters: NONE
+ *
+ *  Output parameters:  NONE
+ *
+ *  Return values:
+ *    character read from UART
+ */
+
+char inbyte( void )
+{
+  char ch;
+
+  NINDY_IO( NINDY_INPUT, &ch );
+  return ch;
+}
+
+
+/*  outbyte
+ *
+ *  This routine transmits a character out the console using NINDY.
+ *
+ *  Input parameters:
+ *    ch  - character to be transmitted
+ *
+ *  Output parameters:  NONE
+ */
+
+void outbyte(
+  char ch
+)
+{
+  NINDY_IO( NINDY_OUTPUT, ch );
+}
+
+/*
+ * __read  -- read bytes from the serial port. Ignore fd, since
+ *            we only have stdin.
+ */
+
+int __read(
+  int fd,
+  char *buf,
+  int nbytes
+)
+{
+  int i = 0;
+
+  for (i = 0; i < nbytes; i++) {
+    *(buf + i) = inbyte();
+    if ((*(buf + i) == '\n') || (*(buf + i) == '\r')) {
+      (*(buf + i++)) = '\n';
+      (*(buf + i)) = 0;
+      break;
+    }
+  }
+  return (i);
+}
+
+/*
+ * __write -- write bytes to the serial port. Ignore fd, since
+ *            stdout and stderr are the same. Since we have no filesystem,
+ *            open will only return an error.
+ */
+
+int __write(
+  int fd,
+  char *buf,
+  int nbytes
+)
+{
+  int i;
+
+  for (i = 0; i < nbytes; i++) {
+    if (*(buf + i) == '\n') {
+      outbyte ('\r');
+    }
+    outbyte (*(buf + i));
+  }
+  return (nbytes);
+}

c/src/lib/libbsp/i960/cvme961/include/bsp.h

@@ -0,0 +1,129 @@
+/*  bsp.h
+ *
+ *  This include file contains some definitions specific to the
+ *  Cyclone CVME960 and CVME961 boards.  These boards are the
+ *  same except the 960 uses SRAM and the 961 DRAM.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#ifndef __CVME961_h
+#define __CVME961_h
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <rtems.h>
+#include <iosupp.h>
+
+/*
+ *  Define the time limits for RTEMS Test Suite test durations.
+ *  Long test and short test duration limits are provided.  These
+ *  values are in seconds and need to be converted to ticks for the
+ *  application.
+ *
+ */
+
+#define MAX_LONG_TEST_DURATION       300 /* 5 minutes = 300 seconds */
+#define MAX_SHORT_TEST_DURATION      3   /* 3 seconds */
+
+/*
+ *  Define the interrupt mechanism for Time Test 27
+ *
+ *  NOTE: Following are for i960CA and are board independent
+ *
+ */
+
+#define MUST_WAIT_FOR_INTERRUPT 0
+
+#define Install_tm27_vector( handler ) set_vector( (handler), 6, 1 )
+
+#define Cause_tm27_intr()  i960_cause_intr( 0x62 )
+
+#define Clear_tm27_intr()  i960_clear_intr( 6 )
+
+#define Lower_tm27_intr()
+
+/*
+ *  Simple spin delay in microsecond units for device drivers.
+ *  This is very dependent on the clock speed of the target.
+ */
+
+#define delay( microseconds ) \
+  { register rtems_unsigned32 _delay=(microseconds); \
+    register rtems_unsigned32 _tmp; \
+    asm volatile( "0: \
+                     remo      3,31,%0 ; \
+                     cmpo      0,%0 ; \
+                     subo      1,%1,%1 ; \
+                     cmpobne.t 0,%1,0b " \
+                  : "=d" (_tmp), "=d" (_delay) \
+                  : "0"  (_tmp), "1"  (_delay) ); \
+  }
+
+/* Constants */
+
+#define RAM_START 0
+#define RAM_END   0x100000
+
+/* NINDY console I/O requests:
+ *   CO sends a single character to stdout,
+ *   CI reads one.
+ */
+
+#define NINDY_INPUT   0
+#define NINDY_OUTPUT  1
+
+/*
+ *  get_prcb
+ *
+ *  Returns the PRCB pointer.
+ */
+
+static inline i960ca_PRCB *get_prcb( void )
+{
+  register i960ca_PRCB *_prcb = 0;
+
+  asm volatile( "calls 5; \
+                 mov   g0,%0" \
+                 : "=d" (_prcb) \
+                 : "0" (_prcb) );
+  return ( _prcb );
+}
+
+#ifdef C961_INIT
+#undef BSP_EXTERN
+#define BSP_EXTERN
+#else
+#undef BSP_EXTERN
+#define BSP_EXTERN extern
+#endif
+
+/* miscellaneous stuff assumed to exist */
+
+extern rtems_configuration_table BSP_Configuration;
+
+BSP_EXTERN i960ca_PRCB          *Prcb;
+BSP_EXTERN i960ca_control_table *Ctl_tbl;
+
+/* functions */
+
+void bsp_cleanup( void );
+
+i960_isr set_vector( rtems_isr_entry, unsigned int, unsigned int );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+/* end of include file */

c/src/lib/libbsp/i960/cvme961/include/coverhd.h

@@ -0,0 +1,104 @@
+/*  coverhd.h
+ *
+ *  This include file has defines to represent the overhead associated
+ *  with calling a particular directive from C on this target.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#ifndef __COVERHD_h
+#define __COVERHD_h
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define CALLING_OVERHEAD_INITIALIZE_EXECUTIVE      0
+#define CALLING_OVERHEAD_SHUTDOWN_EXECUTIVE        0
+#define CALLING_OVERHEAD_TASK_CREATE               0
+#define CALLING_OVERHEAD_TASK_IDENT                0
+#define CALLING_OVERHEAD_TASK_START                0
+#define CALLING_OVERHEAD_TASK_RESTART              0
+#define CALLING_OVERHEAD_TASK_DELETE               0
+#define CALLING_OVERHEAD_TASK_SUSPEND              0
+#define CALLING_OVERHEAD_TASK_RESUME               0
+#define CALLING_OVERHEAD_TASK_SET_PRIORITY         0
+#define CALLING_OVERHEAD_TASK_MODE                 0
+#define CALLING_OVERHEAD_TASK_GET_NOTE             0
+#define CALLING_OVERHEAD_TASK_SET_NOTE             0
+#define CALLING_OVERHEAD_TASK_WAKE_WHEN            3
+#define CALLING_OVERHEAD_TASK_WAKE_AFTER           0
+#define CALLING_OVERHEAD_INTERRUPT_CATCH           0
+#define CALLING_OVERHEAD_CLOCK_GET                 3
+#define CALLING_OVERHEAD_CLOCK_SET                 3
+#define CALLING_OVERHEAD_CLOCK_TICK                0
+
+#define CALLING_OVERHEAD_TIMER_CREATE              0
+#define CALLING_OVERHEAD_TIMER_IDENT               0
+#define CALLING_OVERHEAD_TIMER_DELETE              0
+#define CALLING_OVERHEAD_TIMER_FIRE_AFTER          0
+#define CALLING_OVERHEAD_TIMER_FIRE_WHEN           6
+#define CALLING_OVERHEAD_TIMER_RESET               0
+#define CALLING_OVERHEAD_TIMER_CANCEL              0
+#define CALLING_OVERHEAD_SEMAPHORE_CREATE          0
+#define CALLING_OVERHEAD_SEMAPHORE_IDENT           0
+#define CALLING_OVERHEAD_SEMAPHORE_DELETE          0
+#define CALLING_OVERHEAD_SEMAPHORE_OBTAIN          0
+#define CALLING_OVERHEAD_SEMAPHORE_RELEASE         0
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_CREATE      0
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_IDENT       0
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_DELETE      0
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_SEND        0
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_URGENT      0
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_BROADCAST   0
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_RECEIVE     0
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_FLUSH       0
+
+#define CALLING_OVERHEAD_EVENT_SEND                0
+#define CALLING_OVERHEAD_EVENT_RECEIVE             0
+#define CALLING_OVERHEAD_SIGNAL_CATCH              0
+#define CALLING_OVERHEAD_SIGNAL_SEND               0
+#define CALLING_OVERHEAD_PARTITION_CREATE          0
+#define CALLING_OVERHEAD_PARTITION_IDENT           0
+#define CALLING_OVERHEAD_PARTITION_DELETE          0
+#define CALLING_OVERHEAD_PARTITION_GET_BUFFER      0
+#define CALLING_OVERHEAD_PARTITION_RETURN_BUFFER   0
+#define CALLING_OVERHEAD_REGION_CREATE             0
+#define CALLING_OVERHEAD_REGION_IDENT              0
+#define CALLING_OVERHEAD_REGION_DELETE             0
+#define CALLING_OVERHEAD_REGION_GET_SEGMENT        0
+#define CALLING_OVERHEAD_REGION_RETURN_SEGMENT     0
+#define CALLING_OVERHEAD_PORT_CREATE               0
+#define CALLING_OVERHEAD_PORT_IDENT                0
+#define CALLING_OVERHEAD_PORT_DELETE               0
+#define CALLING_OVERHEAD_PORT_EXTERNAL_TO_INTERNAL 0
+#define CALLING_OVERHEAD_PORT_INTERNAL_TO_EXTERNAL 0
+
+#define CALLING_OVERHEAD_IO_INITIALIZE             0
+#define CALLING_OVERHEAD_IO_OPEN                   0
+#define CALLING_OVERHEAD_IO_CLOSE                  0
+#define CALLING_OVERHEAD_IO_READ                   0
+#define CALLING_OVERHEAD_IO_WRITE                  0
+#define CALLING_OVERHEAD_IO_CONTROL                0
+#define CALLING_OVERHEAD_FATAL_ERROR_OCCURRED      0
+#define CALLING_OVERHEAD_RATE_MONOTONIC_CREATE     0
+#define CALLING_OVERHEAD_RATE_MONOTONIC_IDENT      0
+#define CALLING_OVERHEAD_RATE_MONOTONIC_DELETE     0
+#define CALLING_OVERHEAD_RATE_MONOTONIC_CANCEL     0
+#define CALLING_OVERHEAD_RATE_MONOTONIC_PERIOD     0
+#define CALLING_OVERHEAD_MULTIPROCESSING_ANNOUNCE  0
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+/* end of include file */

c/src/lib/libbsp/i960/cvme961/shmsupp/addrconv.c

@@ -0,0 +1,37 @@
+/*  Shm_Convert_address
+ *
+ *  This routine takes into account the peculiar short VME address
+ *  of the CVME961 board.  The CVME961 maps short address space
+ *  0xffffxxxx to 0xb400xxxx.
+ *
+ *  Input parameters:
+ *    address - address to convert
+ *
+ *  Output parameters:
+ *    returns - converted address
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include <rtems.h>
+#include <bsp.h>
+#include "shm.h"
+
+void *Shm_Convert_address(
+  void *address
+)
+{
+  rtems_unsigned32 workaddr = (rtems_unsigned32) address;
+
+  if ( workaddr >= 0xffff0000 )
+    workaddr = (workaddr & 0xffff) | 0xb4000000;
+  return ( (rtems_unsigned32 *)workaddr );
+}

c/src/lib/libbsp/i960/cvme961/shmsupp/getcfg.c

@@ -0,0 +1,98 @@
+/*  void Shm_Get_configuration( localnode, &shmcfg )
+ *
+ *  This routine initializes, if necessary, and returns a pointer
+ *  to the Shared Memory Configuration Table for the Cyclone CVME961.
+ *
+ *  INPUT PARAMETERS:
+ *    localnode - local node number
+ *    shmcfg    - address of pointer to SHM Config Table
+ *
+ *  OUTPUT PARAMETERS:
+ *    *shmcfg   - pointer to SHM Config Table
+ *
+ *  NOTES:  CVME961 target system has onboard dual-ported memory.  This
+ *          file uses the USE_ONBOARD_RAM macro to determine if this
+ *          RAM is to be used as the SHM.  If so (i.e. USE_ONBOARD_RAM
+ *          is set to 1), it is assumed that the master node's dual
+ *          ported memory will be used and that it is configured
+ *          correctly.  The node owning the memory CANNOT access it
+ *          using a local address.  The "if" insures that the MASTER
+ *          node uses a local address to access the dual-ported memory.
+ *
+ *          The interprocessor interrupt used on the CVME961 is generated
+ *          by the VIC068.   The ICMS capablities of the VIC068 are used
+ *          to generate interprocessor interrupts for up to eight nodes.
+ *
+ *           The following table illustrates the configuration limitations:
+ *
+ *                                   BUS     MAX
+ *                          MODE    ENDIAN  NODES
+ *                        ========= ====== =======
+ *                         POLLED   LITTLE  2+
+ *                        INTERRUPT LITTLE  2-8
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include <rtems.h>
+#include "shm.h"
+
+#define USE_ONBOARD_RAM 0             /* use onboard (1) or VME RAM   */
+                                      /*   for SHM communications     */
+
+#define INTERRUPT 1                   /* CVME961 target supports both */
+#define POLLING   0                   /* polling and interrupt modes  */
+
+
+shm_config_table BSP_shm_cfgtbl;
+
+void Shm_Get_configuration(
+  rtems_unsigned32   localnode,
+  shm_config_table **shmcfg
+)
+{
+#if ( USE_ONBOARD_RAM == 1 )
+   if ( Shm_RTEMS_MP_Configuration->node == MASTER )
+     BSP_shm_cfgtbl.base   = (rtems_unsigned32 *)0x00300000;
+   else
+     BSP_shm_cfgtbl.base   = (rtems_unsigned32 *)0x10300000;
+#else
+   BSP_shm_cfgtbl.base     = (rtems_unsigned32 *)0x20000000;
+#endif
+
+   BSP_shm_cfgtbl.length       = 1 * MEGABYTE;
+   BSP_shm_cfgtbl.format       = SHM_LITTLE;
+
+   BSP_shm_cfgtbl.cause_intr   = Shm_Cause_interrupt;
+
+#ifdef NEUTRAL_BIG
+   BSP_shm_cfgtbl.convert      = (void *)CPU_swap_u32;
+#else
+   BSP_shm_cfgtbl.convert      = NULL_CONVERT;
+#endif
+
+#if (POLLING==1)
+   BSP_shm_cfgtbl.poll_intr    = POLLED_MODE;
+   BSP_shm_cfgtbl.Intr.address = NO_INTERRUPT;
+   BSP_shm_cfgtbl.Intr.value   = NO_INTERRUPT;
+   BSP_shm_cfgtbl.Intr.length  = NO_INTERRUPT;
+#else
+   BSP_shm_cfgtbl.poll_intr    = INTR_MODE;
+   BSP_shm_cfgtbl.Intr.address =
+        (rtems_unsigned32 *) (0xffff0021|((localnode-1) << 12));
+                                                          /* use ICMS0 */
+   BSP_shm_cfgtbl.Intr.value   = 1;
+   BSP_shm_cfgtbl.Intr.length  = BYTE;
+#endif
+
+   *shmcfg = &BSP_shm_cfgtbl;
+
+}

c/src/lib/libbsp/i960/cvme961/shmsupp/lock.c

@@ -0,0 +1,77 @@
+/*  Shared Memory Lock Routines
+ *
+ *  This shared memory locked queue support routine need to be
+ *  able to lock the specified locked queue.  Interrupts are
+ *  disabled while the queue is locked to prevent preemption
+ *  and deadlock when two tasks poll for the same lock.
+ *  previous level.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include <rtems.h>
+#include "cpu.h"
+#include "bsp.h"
+#include "shm.h"
+
+/*
+ *  Shm_Initialize_lock
+ *
+ *  Initialize the lock for the specified locked queue.
+ */
+
+void Shm_Initialize_lock(
+  Shm_Locked_queue_Control *lq_cb
+)
+{
+  lq_cb->lock = LQ_UNLOCKED;
+}
+
+/*  void _Shm_Lock( &lq_cb )
+ *
+ *  This shared memory locked queue support routine locks the
+ *  specified locked queue.  It disables interrupts to prevent
+ *  a deadlock condition.
+ */
+
+void Shm_Lock(
+  Shm_Locked_queue_Control *lq_cb
+)
+{
+  rtems_unsigned32 isr_level, oldlock;
+
+  rtems_interrupt_disable( isr_level );
+    Shm_isrstat = isr_level;
+    while ( 1 ) {
+      atomic_modify( SHM_LOCK_VALUE, &lq_cb->lock, oldlock );
+      if ( !(oldlock & SHM_LOCK_VALUE) )
+        return;
+      delay( 28 );        /* delay 28 microseconds */
+    }
+}
+
+/*
+ *  Shm_Unlock
+ *
+ *  Unlock the lock for the specified locked queue.
+ */
+
+void Shm_Unlock(
+  Shm_Locked_queue_Control *lq_cb
+)
+{
+  rtems_unsigned32 isr_level;
+
+  lq_cb->lock = SHM_UNLOCK_VALUE;
+  isr_level = Shm_isrstat;
+  rtems_interrupt_enable( isr_level );
+}
+

c/src/lib/libbsp/i960/cvme961/shmsupp/mpisr.c

@@ -0,0 +1,70 @@
+/*  Shm_isr_cvme961()
+ *
+ *  NOTE: This routine is not used when in polling mode.  Either
+ *        this routine OR Shm_clockisr is used in a particular system.
+ *
+ *        There must be sufficient time after the IACK (read at
+ *        0xb600000x) for the VIC068 to clear the interrupt request
+ *        before the interrupt request is cleared from IPND (sf0).
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include <rtems.h>
+#include <bsp.h>
+#include "shm.h"
+
+rtems_isr Shm_isr_cvme961(
+  rtems_vector_number vector
+)
+{
+  rtems_unsigned32 vic_vector;
+
+  /* enable_tracing(); */
+  vic_vector = (*(volatile rtems_unsigned8 *)0xb6000007);
+                                           /* reset intr by reading */
+                                           /*   vector at IPL=3 */
+  Shm_Interrupt_count += 1;
+  rtems_multiprocessing_announce();
+  (*(volatile rtems_unsigned8 *)0xa000005f) = 0; /* clear ICMS0 */
+  i960_clear_intr( 6 );
+
+}
+
+/*  void _Shm_setvec( )
+ *
+ *  This driver routine sets the SHM interrupt vector to point to the
+ *  driver's SHM interrupt service routine.
+ *
+ *  NOTE: See pp. 21-22, 36-39 of the CVME961 Manual for more info.
+ *
+ *  Input parameters:  NONE
+ *
+ *  Output parameters: NONE
+ */
+
+void Shm_setvec()
+{
+  rtems_unsigned32 isrlevel;
+
+  rtems_interrupt_disable( isrlevel );
+                                        /* set SQSIO4 CTL REG for */
+                                        /*   VME slave address */
+    (*(rtems_unsigned8 *)0xc00000b0) =
+      (Shm_RTEMS_MP_Configuration->node - 1) | 0x10;
+    set_vector( Shm_isr_cvme961, 6, 1 );
+                                        /* set ICMS Bector Base Register */
+    (*(rtems_unsigned8 *)0xa0000053) = 0x60;  /* XINT6 vector is 0x62 */
+                                        /* set  ICMS Intr Control Reg */
+    (*(rtems_unsigned8 *)0xa0000047) = 0xeb;  /* ICMS0 enabled, IPL=0 */
+    (*(rtems_unsigned8 *)0xa000005f) = 0;     /* clear ICMS0 */
+  rtems_interrupt_enable( isrlevel );
+}

c/src/lib/libbsp/i960/cvme961/startup/bspclean.c

@@ -0,0 +1,32 @@
+/*
+ *  This routine is used to return control to the NINDY monitor
+ *  and is automatically invoked at shutdown.
+ *
+ *  NOTES:  DOES NOT RETURN!!!
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include <rtems.h>
+#include "bsp.h"
+
+void bsp_cleanup( void )
+{
+  asm volatile( "mov   0,g0; \
+                 fmark ; \
+                 syncf ; \
+                 .word    0xfeedface ; \
+                 bx       start" : : );
+ /*  The constant 0xfeedface is a magic word for break which
+  *  is defined by NINDY.  The branch extended restarts the
+  *  application if the user types "go".
+  */
+}

c/src/lib/libbsp/i960/cvme961/startup/bspstart.c

@@ -0,0 +1,163 @@
+/*  bsp_start()
+ *
+ *  This routine starts the application.  It includes application,
+ *  board, and monitor specific initialization and configuration.
+ *  The generic CPU dependent initialization has been performed
+ *  before this routine is invoked.
+ *
+ *  INPUT:  NONE
+ *
+ *  OUTPUT: NONE
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include <rtems.h>
+#include <bsp.h>
+#include "libcsupport.h"
+
+
+#include "stackchk.h"
+
+/*
+ *  The original table from the application and our copy of it with
+ *  some changes.
+ */
+
+extern rtems_configuration_table Configuration;
+
+rtems_configuration_table  BSP_Configuration;
+
+rtems_cpu_table Cpu_table;
+
+/*      Initialize whatever libc we are using
+ *      called from postdriver hook
+ */
+
+void bsp_libc_init()
+{
+    extern int end;
+    rtems_unsigned32        heap_start;
+
+    heap_start = (rtems_unsigned32) &end;
+    if (heap_start & (CPU_ALIGNMENT-1))
+        heap_start = (heap_start + CPU_ALIGNMENT) & ~(CPU_ALIGNMENT-1);
+
+    RTEMS_Malloc_Initialize((void *) heap_start, 64 * 1024, 0);
+
+    /*
+     * Set up for the libc handling.
+     */
+
+    if (BSP_Configuration.ticks_per_timeslice > 0)
+        libc_init(1);                /* reentrant if possible */
+    else
+        libc_init(0);                /* non-reentrant */
+    /*
+     *  Initialize the stack bounds checker
+     */
+
+#ifdef STACK_CHECKER_ON
+    Stack_check_Initialize();
+#endif
+}
+
+int bsp_start(
+  int argc,
+  char **argv,
+  char **environp
+)
+{
+  /* set node number in SQSIO4 CTL REG */
+
+  *((rtems_unsigned32 *)0xc00000b0) =
+       (Configuration.User_multiprocessing_table) ?
+          Configuration.User_multiprocessing_table->node : 0;
+
+  Prcb    = get_prcb();
+  Ctl_tbl = Prcb->control_tbl;
+
+  /* following configures the data breakpoint (which must be set
+   *   before this is executed) to break on writes only.
+   */
+
+  Ctl_tbl->bpcon &= ~0x00cc0000;
+  i960_reload_ctl_group( 6 );
+
+  /*  bit 31 of the Register Cache Control can be set to
+   *  enable an alternative caching algorithm.  It does
+   *  not appear to help RTEMS.
+   */
+
+  /* Configure Number of Register Caches */
+
+  Prcb->reg_cache_cfg = 8;
+  i960_soft_reset( Prcb );
+
+  /*
+   *  we do not use the pretasking_hook.
+   */
+
+  Cpu_table.pretasking_hook = NULL;
+
+  Cpu_table.predriver_hook = bsp_libc_init;  /* RTEMS resources available */
+
+  Cpu_table.postdriver_hook = NULL;   /* Call our main() for constructors */
+
+  Cpu_table.idle_task = NULL;  /* do not override system IDLE task */
+
+  Cpu_table.do_zero_of_workspace = TRUE;
+
+  Cpu_table.interrupt_stack_size = 4096;
+
+  Cpu_table.extra_system_initialization_stack = 0;
+
+  Cpu_table.Prcb = Prcb;
+
+  /*
+   *  Copy the table
+   */
+
+  BSP_Configuration = Configuration;
+
+  /*
+   * Add 1 region for the RTEMS Malloc
+   */
+
+  BSP_Configuration.maximum_regions++;
+
+  /*
+   * Add 1 extension for newlib libc
+   */
+
+#ifdef RTEMS_NEWLIB
+    BSP_Configuration.maximum_extensions++;
+#endif
+
+  /*
+   * Add another extension if using the stack checker
+   */
+
+#ifdef STACK_CHECKER_ON
+    BSP_Configuration.maximum_extensions++;
+#endif
+
+  BSP_Configuration.work_space_start = (void *)
+     (RAM_END - BSP_Configuration.work_space_size);
+
+  rtems_initialize_executive( &BSP_Configuration, &Cpu_table );
+  /* does not return */
+
+  bsp_cleanup();
+
+  return 0;
+
+}

c/src/lib/libbsp/i960/cvme961/startup/exit.c

@@ -0,0 +1,38 @@
+/*  exit
+ *
+ *  This routine is used to return control to the NINDY monitor
+ *  and is automatically invoked by the STDIO exit() routine.
+ *
+ *  INPUT:
+ *    status - exit status
+ *
+ *  OUTPUT: NONE
+ *
+ *  NOTES:  DOES NOT RETURN!!!
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include <rtems.h>
+#include "bsp.h"
+
+void _exit( )
+{
+  asm volatile( "mov   0,g0; \
+                 fmark ; \
+                 syncf ; \
+                 .word    0xfeedface ; \
+                 bx       start" : : );
+ /*  The constant 0xfeedface is a magic word for break which
+  *  is defined by NINDY.  The branch extended restarts the
+  *  application if the user types "go".
+  */
+}

c/src/lib/libbsp/i960/cvme961/startup/linkcmds

@@ -0,0 +1,48 @@
+/*
+ *  This file contains directives for the GNU linker which are specific
+ *  to the Cyclone CVME960/CVME961 boards.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+MEMORY
+        {
+            ram : org = 0x0, l = 1M
+        }
+
+SECTIONS
+{
+        .text 0x10000 :
+        {
+            text_start = . ;
+            _text_start = . ;
+            *(.text)
+            etext = ALIGN( 0x10 ) ;
+/*            _etext = .; */
+        }
+        .data ADDR( .text ) + SIZEOF( .text ):
+        {
+            data_start = . ;
+            _data_start = .;
+            *(.data)
+            edata = ALIGN( 0x10 ) ;
+/*            _edata = .; */
+        }
+        .bss ADDR( .data ) + SIZEOF( .data ):
+        {
+            bss_start = . ;
+/*            _bss_start = . ; */
+            *(.bss)
+            *(COMMON)
+            end = . ;
+            _end = . ;
+        }
+}

c/src/lib/libbsp/i960/cvme961/startup/setvec.c

@@ -0,0 +1,145 @@
+/*  set_vector
+ *
+ *  This routine attempts to perform all "generic" interrupt initialization
+ *  for the specified XINT line.  It is specific to the Cyclone CVME961 in
+ *  that it knows which interrupts are initialized by the monitor, the
+ *  characteristics of XINT5 (VIC068 clock tick), and that it assumes the
+ *  i960 is processing interrupts in dedicated mode.  It attempts to map
+ *  XINTs to interrupt vectors in a fairly straght forward way.
+ *
+ *         XINT   USE          VECTOR INTR TBL INDEX TRIGGERED
+ *         ==== =============  ====== ============== =========
+ *          0   VMEbus ERROR    0x02       0x03        EDGE
+ *          1   DRAM PARITY     0x12       0x13        EDGE
+ *          2   Z8530           0x22       0x23        LEVEL
+ *          3   SQUALL 0        0x52       0x53        ----
+ *          4   Z8536 (SQSIO4)  0x72       0x73        LEVEL
+ *          5   TICK            0x32       0x33        EDGE
+ *          6   VIC068          0x62       0x63        LEVEL
+ *          7   UNUSED          0x42       0x43        LEVEL
+ *
+ *  The interrupt handler is installed in both the cached and memory
+ *  resident interrupt tables.  The appropriate IMAP register is updated to
+ *  reflect the vector selected by this routine.  Global interrupts are
+ *  enabled. If XINT5 is being installed, places it in trigger mode.
+ *  Finally, set_vector_support() is invoked to install the new IMAP and
+ *  ICON, unmask the XINT in IMASK, and lower the i960's interrupt
+ *  level to 0.
+ *
+ *  INPUT:
+ *    func  - interrupt handler entry point
+ *    xint  - external interrupt line
+ *    type  - 0 indicates raw hardware connect
+ *            1 indicates RTEMS interrupt connect
+ *
+ *  RETURNS:
+ *    address of previous interrupt handler
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include <rtems.h>
+#include <bsp.h>
+
+#include <stdio.h>
+
+void print_prcb();
+void print_intr_info();
+void print_ipnd_imsk();
+
+unsigned int Xint_2_Group_Map[8] = { 0, 1, 2, 5, 7, 3, 6, 4 };
+
+i960_isr set_vector(                       /* returns old vector */
+  rtems_isr_entry func,                    /* isr routine */
+  unsigned int    xint,                    /* XINT number */
+  unsigned int    type                     /* RTEMS or RAW */
+)
+{
+  i960_isr        *intr_tbl, *cached_intr_tbl;
+  i960_isr         saved_intr;
+  unsigned int     vector, group, nibble;
+  unsigned int    *imap;
+
+  if ( xint > 7 )
+    exit( 0x80 );
+
+  cached_intr_tbl = (i960_isr *) 0;
+  intr_tbl        = (i960_isr *) Prcb->intr_tbl;
+  group           = Xint_2_Group_Map[xint];  /* remap XINT to group */
+  vector          = (group << 4) + 2;        /* direct vector num   */
+
+  if ( type )
+    rtems_interrupt_catch( func, vector, (rtems_isr_entry *) &saved_intr );
+  else {
+    saved_intr    = (i960_isr) intr_tbl[ vector ];
+                                             /* return old vector   */
+    intr_tbl[ vector + 1 ]   =               /* normal vector table */
+    cached_intr_tbl[ group ] = (i960_isr) func;    /* cached vector */
+  }
+
+  if       ( xint <= 3 ) imap = &Ctl_tbl->imap0;  /* updating IMAP0 */
+  else                   imap = &Ctl_tbl->imap1;  /* updating IMAP1 */
+  nibble = (xint % 4) * 4;
+  *imap &= ~(0xf << nibble);
+  *imap |= group << nibble;
+
+  Ctl_tbl->icon &= ~0x00000400;        /* enable global interrupts */
+  Ctl_tbl->icon |=  0x00004000;        /* fast sampling mode       */
+  switch ( xint ) {
+    case 0:   Ctl_tbl->icon |=  0x00000004;  break;
+    case 1:   Ctl_tbl->icon |=  0x00000008;  break;
+    case 2:   Ctl_tbl->icon &= ~0x00000010;  break;
+    case 4:   Ctl_tbl->icon &= ~0x00000040;  break;
+    case 5:   Ctl_tbl->icon |=  0x00000080;  break;
+    case 6:   Ctl_tbl->icon &= ~0x00000100;  break;
+    default:  exit( 0x81 );                  break; /* unsupported  */
+  }
+
+  if ( xint == 4 ) {                   /* reprogram MCON for SQSIO4 */
+    Ctl_tbl->mcon12 = 0x00002012;      /* MCON12 - 0xCxxxxxxx       */
+    Ctl_tbl->mcon13 = 0x00000000;      /* MCON13 - 0xDxxxxxxx       */
+    i960_reload_ctl_group( 5 );        /* update MCON12-MCON15      */
+  }
+
+  i960_unmask_intr( xint );            /* update IMSK               */
+  i960_reload_ctl_group( 1 );          /* update IMAP?/ICON         */
+  return( saved_intr );                /* return old vector         */
+}
+
+void print_prcb()
+{
+  printf( "fault_table  =0x%p\n", Prcb->fault_tbl );
+  printf( "control_tbl  =0x%p\n", Prcb->control_tbl );
+  printf( "AC mask ov   =0x%x\n", Prcb->initial_ac );
+  printf( "fltconfig    =0x%x\n", Prcb->fault_config );
+  printf( "intr tbl     =0x%p\n", Prcb->intr_tbl );
+  printf( "systable     =0x%p\n", Prcb->sys_proc_tbl );
+  printf( "reserved     =0x%x\n", Prcb->reserved );
+  printf( "isr stk      =0x%p\n", Prcb->intr_stack );
+  printf( "ins cache    =0x%x\n", Prcb->ins_cache_cfg );
+  printf( "reg cache    =0x%x\n", Prcb->reg_cache_cfg );
+}
+
+void print_intr_info()
+{
+  printf( "prcb =0x%p\n",    Prcb );
+  printf( "ctl_tbl =0x%p\n", Ctl_tbl );
+  printf( "intr_tbl=0x%p\n", Prcb->intr_tbl );
+  printf( "IMAP0 = 0x%x\n",  Ctl_tbl->imap0 );
+  printf( "IMAP1 = 0x%x\n",  Ctl_tbl->imap1 );
+  print_ipnd_imsk();
+}
+
+void print_ipnd_imsk()
+{
+  printf(" IPEND = 0x%x\n", i960_pend_intrs() );
+  printf(" IMASK = 0x%x\n", i960_mask_intrs() );
+}

c/src/lib/libbsp/i960/cvme961/timer/timer.c

@@ -0,0 +1,107 @@
+/*  Timer_init()
+ *
+ *  This routine initializes the Z8536 timer on the SQSIO4 SQUALL
+ *  board for the CVME961 board.  The timer is setup to provide a
+ *  tick every 1 millisecond.
+ *
+ *  Input parameters:  NONE
+ *
+ *  Output parameters:  NONE
+ *
+ *  NOTE: This routine will not work if the optimizer is enabled
+ *        for most compilers.  The multiple writes to the Z8536
+ *        will be optimized away.
+ *
+ *        It is important that the timer start/stop overhead be
+ *        determined when porting or modifying this code.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+
+#include <rtems.h>
+#include <bsp.h>
+#include "z8536.h"
+
+#define TIMER       0xc00000a0
+
+int Ttimer_val;
+rtems_boolean Timer_driver_Find_average_overhead;
+
+void flush_reg();
+rtems_isr timerisr();
+
+void Timer_initialize()
+{
+  set_vector( timerisr, 4, 0 );               /* install ISR */
+
+  i960_mask_intr( 5 );                        /* disable VIC068 tick */
+  flush_reg();                                /* timed code starts clean */
+  Ttimer_val = 0;                             /* clear timer ISR count */
+  Z8x36_WRITE( TIMER, MASTER_INTR,    0x01 ); /* reset              */
+  Z8x36_WRITE( TIMER, MASTER_INTR,    0x00 ); /* clear reset        */
+  Z8x36_WRITE( TIMER, MASTER_CFG,     0x00 ); /* disable everything */
+  Z8x36_WRITE( TIMER, CNT_TMR_VECTOR, 0x72 ); /* clear intr vector  */
+  Z8x36_WRITE( TIMER, MASTER_CFG,     0x20 ); /* clear intr info    */
+  Z8x36_WRITE( TIMER, MASTER_CFG,     0xe0 ); /* disable interrupts */
+  Z8x36_WRITE( TIMER, MASTER_CFG,     0x20 ); /* clear intr info    */
+  Z8x36_WRITE( TIMER, MASTER_CFG,     0xe0 ); /* disable interrupts */
+  Z8x36_WRITE( TIMER, MASTER_INTR,    0xe2 ); /* disable lower chain,   */
+                                              /*   no vector, set right */
+                                              /*   justified addr and   */
+                                              /*   master int enable    */
+  Z8x36_WRITE( TIMER, CT1_MODE_SPEC,      0x80 ); /* T1 continuous, and   */
+                                                  /*   cycle/pulse output */
+  Z8x36_WRITE( TIMER, CT1_TIME_CONST_MSB, 0x00 );
+  Z8x36_WRITE( TIMER, CT1_TIME_CONST_LSB, 0x00 );
+  Z8x36_WRITE( TIMER, CT1_CMD_STATUS,     0xc0 ); /* set INTR enable (IE) */
+  Z8x36_WRITE( TIMER, MASTER_CFG,         0x40 ); /* enable timer1        */
+  Z8x36_WRITE( TIMER, CT1_CMD_STATUS,     0x06 ); /* set trigger command  */
+                                                  /*   (TCB) and gate     */
+                                                  /* command (GCB) bits   */
+}
+
+#define AVG_OVERHEAD      11 /* It typically takes 5.5 microseconds */
+                             /* (11 countdowns) to start/stop the timer. */
+#define LEAST_VALID       15 /* Don't trust a value lower than this */
+
+int Read_timer()
+{
+  rtems_unsigned8  msb, lsb;
+  rtems_unsigned32 remaining, total;
+
+  Z8x36_WRITE( TIMER, CT1_CMD_STATUS,  0xce );  /* read the counter value */
+  Z8x36_READ(  TIMER, CT1_CUR_CNT_MSB, msb );
+  Z8x36_READ(  TIMER, CT1_CUR_CNT_LSB, lsb );
+
+  remaining = 0xffff - ((msb << 8) + lsb);
+  total = (Ttimer_val * 0x10000) + remaining;
+
+  if ( Timer_driver_Find_average_overhead == 1 )
+    return total;          /* in one-half microsecond units */
+  else {
+    if ( total < LEAST_VALID )
+      return 0;            /* below timer resolution */
+    return (total-AVG_OVERHEAD) >> 1;
+  }
+}
+
+rtems_status_code Empty_function( void )
+{
+  return RTEMS_SUCCESSFUL;
+}
+
+void Set_find_average_overhead(
+  rtems_boolean find_flag
+)
+{
+  Timer_driver_Find_average_overhead = find_flag;
+}

c/src/lib/libbsp/i960/cvme961/timer/timerisr.s

@@ -0,0 +1,59 @@
+/*  timer_isr()
+ *
+ *  This routine initializes the Z8536 timer on the SQSIO4 SQUALL
+ *  board for the CVME961 board.  The timer is setup to provide a
+ *  tick every 0x10000 / 2 milliseconds.  This is used to time
+ *  executing code.
+ *
+ *  Input parameters:  NONE
+ *
+ *  Output parameters:  NONE
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include "asm.h"
+
+.set PORT_A,     0xc00000a8                 # port A
+.set PORT_B,     0xc00000a4                 # port B
+.set PORT_C,     0xc00000a0                 # port C
+.set CTL_PORT,   0xc00000ac                 # control port
+
+.set T1CSR,      0x0a                       # T1 command/status reg
+.set RELOAD,     0x24                       # clr IP & IUS,allow countdown
+
+        PUBLIC(_timerisr)
+SYM (_timerisr):
+        #ldconst   1,r4
+        #modpc     0,r4,r4               # enable tracing
+
+        ld      _Ttimer_val,r6           # r6 = test timer
+
+        ldconst T1CSR,r4                 # r4 = T1 control status reg
+        stob    r4,CTL_PORT              # select T1CSR
+        ldconst RELOAD,r5                # r5 = reset value
+        stob    r5,CTL_PORT              # reset countdown
+        addo    1,r6,r6
+        st      r6,_Ttimer_val           # increment test timer
+loop_til_cleared:
+        clrbit 4,sf0,sf0
+        bbs    4,sf0,loop_til_cleared
+leaf:   ret
+
+        .leafproc _flush_reg, flush_reg.lf
+        .globl    _flush_reg, flush_reg.lf
+_flush_reg:
+        lda     leaf,g14                 # g14 = exit address
+flush_reg.lf:
+        flushreg
+        mov     g14,g0                   # g0 = exit address
+        ldconst 0,g14                    # set g14 for non-leaf
+        bx      (g0)

c/src/lib/libbsp/m68k/dmv152/clock/ckinit.c

@@ -0,0 +1,101 @@
+/*  Clock_init()
+ *
+ *  This routine initializes the Z80386 1 on the MVME136 board.
+ *  The tick frequency is 1 millisecond.
+ *
+ *  Input parameters:  NONE
+ *
+ *  Output parameters:  NONE
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include <stdlib.h>
+
+#include <rtems.h>
+#include <bsp.h>
+#include <clockdrv.h>
+
+rtems_unsigned32 Clock_isrs;        /* ISRs until next tick */
+volatile rtems_unsigned32 Clock_driver_ticks;
+                                    /* ticks since initialization */
+rtems_isr_entry  Old_ticker;
+
+rtems_device_driver Clock_initialize(
+  rtems_device_major_number major,
+  rtems_device_minor_number minor,
+  void *pargp,
+  rtems_id tid,
+  rtems_unsigned32 *rval
+)
+{
+  Install_clock( Clock_isr );
+}
+
+void ReInstall_clock(
+  rtems_isr_entry clock_isr
+)
+{
+  rtems_unsigned32 isrlevel = 0 ;
+
+  rtems_interrupt_disable( isrlevel );
+   (void) set_vector( clock_isr, TIMER_VECTOR, 1 );
+  rtems_interrupt_enable( isrlevel );
+}
+
+void Install_clock(
+  rtems_isr_entry clock_isr
+)
+{
+  rtems_unsigned8 data;
+
+  Clock_driver_ticks = 0;
+  Clock_isrs = BSP_Configuration.microseconds_per_tick / 1000;
+
+  if ( BSP_Configuration.ticks_per_timeslice ) {
+    Old_ticker = (rtems_isr_entry) set_vector( clock_isr, TIMER_VECTOR, 1 );
+
+    Z8x36_WRITE( TIMER, MASTER_CFG, 0xd4 );
+    Z8x36_READ ( TIMER, MASTER_INTR, data );
+    Z8x36_WRITE( TIMER, MASTER_INTR, (data & 0x7E) );
+    Z8x36_WRITE( TIMER, CT1_TIME_CONST_MSB, 0x04 );
+    Z8x36_WRITE( TIMER, CT1_TIME_CONST_LSB, 0xCE );
+    Z8x36_WRITE( TIMER, CT1_MODE_SPEC, 0x83 );
+    Z8x36_WRITE( TIMER, CNT_TMR_VECTOR, TIMER_VECTOR );
+    Z8x36_WRITE( TIMER, CT1_CMD_STATUS, 0x20 );
+    Z8x36_READ ( TIMER, MASTER_INTR, data );
+    Z8x36_WRITE( TIMER, MASTER_INTR, (data & 0xDA) | 0x80 );
+
+    /*
+     * ACC_IC54 - interrupt 5 will be vectored and mapped to level 6
+     */
+
+    data = (*(rtems_unsigned8 *)0x0D00000B);
+    (*(rtems_unsigned8 *)0x0D00000B) = (data & 0x7F) | 0x60;
+
+    Z8x36_WRITE( TIMER, CT1_CMD_STATUS, 0xC6 );
+
+    atexit( Clock_exit );
+  }
+}
+
+void Clock_exit( void )
+{
+  rtems_unsigned8 data;
+
+  if ( BSP_Configuration.ticks_per_timeslice ) {
+
+    Z8x36_READ ( TIMER, MASTER_INTR, data );
+    Z8x36_WRITE( TIMER, MASTER_INTR, (data & 0x01) );
+    /* do not restore old vector */
+
+  }
+}

c/src/lib/libbsp/m68k/dmv152/console/console.c

@@ -0,0 +1,186 @@
+/*
+ *  This file contains the DMV152 console IO package.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#define D152_INIT
+
+#include <rtems.h>
+#include "console.h"
+#include "bsp.h"
+
+/*  console_initialize
+ *
+ *  This routine initializes the console IO driver.
+ *
+ *  Input parameters: NONE
+ *
+ *  Output parameters:  NONE
+ *
+ *  Return values:
+ */
+
+rtems_device_driver console_initialize(
+  rtems_device_major_number  major,
+  rtems_device_minor_number  minor,
+  void                      *arg,
+  rtems_id                   self,
+  rtems_unsigned32          *status
+)
+{
+  *status = RTEMS_SUCCESSFUL;
+}
+
+
+/*  is_character_ready
+ *
+ *  This routine returns TRUE if a character is available.
+ *
+ *  Input parameters: NONE
+ *
+ *  Output parameters:  NONE
+ *
+ *  Return values:
+ */
+
+rtems_boolean is_character_ready(
+  char *ch
+)
+{
+  rtems_unsigned8 rr_0;
+
+  for ( ; ; ) {
+    Z8x30_READ_CONTROL( CONSOLE_CONTROL, RR_0, rr_0 );
+    if ( !(rr_0 & RR_0_RX_DATA_AVAILABLE) )
+      return( FALSE );
+
+    Z8x30_READ_DATA( CONSOLE_DATA, *ch );
+    return( TRUE );
+  }
+}
+
+/*  inbyte
+ *
+ *  This routine reads a character from the SCC.
+ *
+ *  Input parameters: NONE
+ *
+ *  Output parameters:  NONE
+ *
+ *  Return values:
+ *    character read from SCC
+ */
+
+char inbyte( void )
+{
+  rtems_unsigned8 rr_0;
+  char ch;
+
+  for ( ; ; ) {
+    Z8x30_READ_CONTROL( CONSOLE_CONTROL, RR_0, rr_0 );
+    if ( (rr_0 & RR_0_RX_DATA_AVAILABLE) != 0 )
+      break;
+  }
+
+  Z8x30_READ_DATA( CONSOLE_DATA, ch );
+  return ( ch );
+}
+
+/*  outbyte
+ *
+ *  This routine transmits a character out the SCC.  It supports
+ *  XON/XOFF flow control.
+ *
+ *  Input parameters:
+ *    ch  - character to be transmitted
+ *
+ *  Output parameters:  NONE
+ */
+
+void outbyte(
+  char ch
+)
+{
+  rtems_unsigned8 rr_0;
+  char            flow_control;
+
+  for ( ; ; ) {
+    Z8x30_READ_CONTROL( CONSOLE_CONTROL, RR_0, rr_0 );
+    if ( (rr_0 & RR_0_TX_BUFFER_EMPTY) != 0 )
+      break;
+  }
+
+  for ( ; ; ) {
+    Z8x30_READ_CONTROL( CONSOLE_CONTROL, RR_0, rr_0 );
+    if ( (rr_0 & RR_0_RX_DATA_AVAILABLE) == 0 )
+      break;
+
+    Z8x30_READ_DATA( CONSOLE_DATA, flow_control );
+
+    if ( flow_control == XOFF )
+      do {
+        do {
+          Z8x30_READ_CONTROL( CONSOLE_CONTROL, RR_0, rr_0 );
+        } while ( (rr_0 & RR_0_RX_DATA_AVAILABLE) == 0 );
+        Z8x30_READ_DATA( CONSOLE_DATA, flow_control );
+      } while ( flow_control != XON );
+  }
+
+  Z8x30_WRITE_DATA( CONSOLE_DATA, ch );
+}
+
+/*
+ * __read  -- read bytes from the serial port. Ignore fd, since
+ *            we only have stdin.
+ */
+
+int __read(
+  int fd,
+  char *buf,
+  int nbytes
+)
+{
+  int i = 0;
+
+  for (i = 0; i < nbytes; i++) {
+    *(buf + i) = inbyte();
+    if ((*(buf + i) == '\n') || (*(buf + i) == '\r')) {
+      (*(buf + i++)) = '\n';
+      (*(buf + i)) = 0;
+      break;
+    }
+  }
+  return (i);
+}
+
+/*
+ * __write -- write bytes to the serial port. Ignore fd, since
+ *            stdout and stderr are the same. Since we have no filesystem,
+ *            open will only return an error.
+ */
+
+int __write(
+  int fd,
+  char *buf,
+  int nbytes
+)
+{
+  int i;
+
+  for (i = 0; i < nbytes; i++) {
+    if (*(buf + i) == '\n') {
+      outbyte ('\r');
+    }
+    outbyte (*(buf + i));
+  }
+  return (nbytes);
+}

c/src/lib/libbsp/m68k/dmv152/include/bsp.h

@@ -0,0 +1,169 @@
+/*  bsp.h
+ *
+ *  This include file contains all DMV152 board IO definitions.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#ifndef __DMV152_h
+#define __DMV152_h
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <rtems.h>
+#include <iosupp.h>
+#include <z8530.h>
+#include <z8536.h>
+
+/*
+ *  Define the time limits for RTEMS Test Suite test durations.
+ *  Long test and short test duration limits are provided.  These
+ *  values are in seconds and need to be converted to ticks for the
+ *  application.
+ *
+ */
+
+#define MAX_LONG_TEST_DURATION       300 /* 5 minutes = 300 seconds */
+#define MAX_SHORT_TEST_DURATION      3   /* 3 seconds */
+
+/*
+ *  Define the interrupt mechanism for Time Test 27
+ */
+
+/* use a VMEbus interrupt */
+
+#define MUST_WAIT_FOR_INTERRUPT 1
+
+#define Install_tm27_vector( handler ) \
+  { \
+    set_vector( (handler), 0x50, 1 );  \
+    (*(volatile rtems_unsigned32 *)0x0d800024) = 0x50; /* set IVECT reg */ \
+    (*(volatile rtems_unsigned8  *)0x0d00000c) = 0x40; /* set VIE reg */ \
+  }
+
+#define Cause_tm27_intr()  \
+  (*(volatile rtems_unsigned8 *)0x0d000003) = 0x0f  /* set VINT */
+
+#define Clear_tm27_intr()  /* no operation necessary */
+
+#define Lower_tm27_intr()
+
+/*
+ *  Simple spin delay in microsecond units for device drivers.
+ *  This is very dependent on the clock speed of the target.
+ */
+
+#define delay( microseconds ) \
+  { register rtems_unsigned32 _delay=(microseconds); \
+    register rtems_unsigned32 _tmp=123; \
+    asm volatile( "0: \
+                     nbcd      %0 ; \
+                     nbcd      %0 ; \
+                     dbf       %1,0b" \
+                  : "=d" (_tmp), "=d" (_delay) \
+                  : "0"  (_tmp), "1"  (_delay) ); \
+  }
+
+/* macros */
+
+#undef Z8x36_STATE0
+#undef Z8x36_WRITE
+#undef Z8x36_READ
+
+#define Z8x36_STATE0 ( z8536 ) \
+  { char *garbage; \
+    (garbage) = *(VOL8(z8536+0x7)) \
+  }
+
+#define Z8x36_WRITE( z8536, reg, data ) \
+   *(VOL8(z8536+0x7)) = (reg); \
+   *(VOL8(z8536+0x7)) = (data)
+
+#define Z8x36_READ( z8536, reg, data ) \
+   *(VOL8(z8536+0x7)) = (reg); \
+   (data) = *(VOL8(z8536+0x7))
+
+/*
+ *  ACC Register Addresses
+ */
+
+#define ACC_BASE    0x0D000000
+
+#define ACC_STAT0   ((volatile rtems_unsigned8 *) (ACC_BASE + 0x00))
+#define ACC_STAT1   ((volatile rtems_unsigned8 *) (ACC_BASE + 0x01))
+#define ACC_GENCTL  ((volatile rtems_unsigned8 *) (ACC_BASE + 0x02))
+#define ACC_VINT    ((volatile rtems_unsigned8 *) (ACC_BASE + 0x03))
+#define ACC_VREQ    ((volatile rtems_unsigned8 *) (ACC_BASE + 0x04))
+#define ACC_VARB    ((volatile rtems_unsigned8 *) (ACC_BASE + 0x05))
+#define ACC_ID      ((volatile rtems_unsigned8 *) (ACC_BASE + 0x06))
+#define ACC_CTL2    ((volatile rtems_unsigned8 *) (ACC_BASE + 0x07))
+#define ACC_7IS     ((volatile rtems_unsigned8 *) (ACC_BASE + 0x08))
+#define ACC_LIS     ((volatile rtems_unsigned8 *) (ACC_BASE + 0x09))
+#define ACC_7IE     ((volatile rtems_unsigned8 *) (ACC_BASE + 0x0A))
+#define ACC_LIE     ((volatile rtems_unsigned8 *) (ACC_BASE + 0x0B))
+#define ACC_VIE     ((volatile rtems_unsigned8 *) (ACC_BASE + 0x0C))
+#define ACC_IC10    ((volatile rtems_unsigned8 *) (ACC_BASE + 0x0D))
+#define ACC_IC32    ((volatile rtems_unsigned8 *) (ACC_BASE + 0x0E))
+#define ACC_IC54    ((volatile rtems_unsigned8 *) (ACC_BASE + 0x0F))
+
+/* constants */
+
+#define RAM_START 0
+#define RAM_END   0x100000
+
+#define USE_CHANNEL_A   0                /* 1 = use channel A for console */
+#define USE_CHANNEL_B   1                /* 1 = use channel B for console */
+
+#define TIMER 0x0c000000
+#define TIMER_VECTOR 0x4D
+
+#if (USE_CHANNEL_A == 1)
+#define CONSOLE_CONTROL  0x0C800007
+#define CONSOLE_DATA     0x0C800005
+#elif (USE_CHANNEL_B == 1)
+#define CONSOLE_CONTROL  0x0C800001
+#define CONSOLE_DATA     0x0C800003
+#endif
+
+/* Structures */
+
+#ifdef D152_INIT
+#undef EXTERN
+#define EXTERN
+#else
+#undef EXTERN
+#define EXTERN extern
+#endif
+
+/* miscellaneous stuff assumed to exist */
+
+extern rtems_configuration_table BSP_Configuration;
+
+extern m68k_isr     M68Kvec[];   /* vector table address */
+
+/* functions */
+
+void bsp_cleanup( void );
+
+m68k_isr set_vector(
+  rtems_isr_entry     handler,
+  rtems_vector_number vector,
+  int                 type
+);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+/* end of include file */

c/src/lib/libbsp/m68k/dmv152/include/coverhd.h

@@ -0,0 +1,104 @@
+/* coverhd.h
+ *
+ *  This include file has defines to represent the overhead associated
+ *  with calling a particular directive from C on this target.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#ifndef __COVERHD_h
+#define __COVERHD_h
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define CALLING_OVERHEAD_INITIALIZE_EXECUTIVE      2
+#define CALLING_OVERHEAD_SHUTDOWN_EXECUTIVE        1
+#define CALLING_OVERHEAD_TASK_CREATE               3
+#define CALLING_OVERHEAD_TASK_IDENT                2
+#define CALLING_OVERHEAD_TASK_START                2
+#define CALLING_OVERHEAD_TASK_RESTART              2
+#define CALLING_OVERHEAD_TASK_DELETE               1
+#define CALLING_OVERHEAD_TASK_SUSPEND              1
+#define CALLING_OVERHEAD_TASK_RESUME               2
+#define CALLING_OVERHEAD_TASK_SET_PRIORITY         2
+#define CALLING_OVERHEAD_TASK_MODE                 2
+#define CALLING_OVERHEAD_TASK_GET_NOTE             2
+#define CALLING_OVERHEAD_TASK_SET_NOTE             2
+#define CALLING_OVERHEAD_TASK_WAKE_WHEN            4
+#define CALLING_OVERHEAD_TASK_WAKE_AFTER           1
+#define CALLING_OVERHEAD_INTERRUPT_CATCH           2
+#define CALLING_OVERHEAD_CLOCK_GET                 4
+#define CALLING_OVERHEAD_CLOCK_SET                 4
+#define CALLING_OVERHEAD_CLOCK_TICK                1
+
+#define CALLING_OVERHEAD_TIMER_CREATE              2
+#define CALLING_OVERHEAD_TIMER_IDENT               1
+#define CALLING_OVERHEAD_TIMER_DELETE              2
+#define CALLING_OVERHEAD_TIMER_FIRE_AFTER          2
+#define CALLING_OVERHEAD_TIMER_FIRE_WHEN           5
+#define CALLING_OVERHEAD_TIMER_RESET               1
+#define CALLING_OVERHEAD_TIMER_CANCEL              1
+#define CALLING_OVERHEAD_SEMAPHORE_CREATE          2
+#define CALLING_OVERHEAD_SEMAPHORE_IDENT           1
+#define CALLING_OVERHEAD_SEMAPHORE_DELETE          2
+#define CALLING_OVERHEAD_SEMAPHORE_OBTAIN          2
+#define CALLING_OVERHEAD_SEMAPHORE_RELEASE         1
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_CREATE      2
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_IDENT       2
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_DELETE      1
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_SEND        2
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_URGENT      2
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_BROADCAST   2
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_RECEIVE     2
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_FLUSH       2
+
+#define CALLING_OVERHEAD_EVENT_SEND                2
+#define CALLING_OVERHEAD_EVENT_RECEIVE             2
+#define CALLING_OVERHEAD_SIGNAL_CATCH              2
+#define CALLING_OVERHEAD_SIGNAL_SEND               2
+#define CALLING_OVERHEAD_PARTITION_CREATE          3
+#define CALLING_OVERHEAD_PARTITION_IDENT           2
+#define CALLING_OVERHEAD_PARTITION_DELETE          2
+#define CALLING_OVERHEAD_PARTITION_GET_BUFFER      2
+#define CALLING_OVERHEAD_PARTITION_RETURN_BUFFER   2
+#define CALLING_OVERHEAD_REGION_CREATE             3
+#define CALLING_OVERHEAD_REGION_IDENT              2
+#define CALLING_OVERHEAD_REGION_DELETE             1
+#define CALLING_OVERHEAD_REGION_GET_SEGMENT        3
+#define CALLING_OVERHEAD_REGION_RETURN_SEGMENT     2
+#define CALLING_OVERHEAD_PORT_CREATE               3
+#define CALLING_OVERHEAD_PORT_IDENT                2
+#define CALLING_OVERHEAD_PORT_DELETE               2
+#define CALLING_OVERHEAD_PORT_EXTERNAL_TO_INTERNAL 2
+#define CALLING_OVERHEAD_PORT_INTERNAL_TO_EXTERNAL 2
+
+#define CALLING_OVERHEAD_IO_INITIALIZE             3
+#define CALLING_OVERHEAD_IO_OPEN                   2
+#define CALLING_OVERHEAD_IO_CLOSE                  2
+#define CALLING_OVERHEAD_IO_READ                   2
+#define CALLING_OVERHEAD_IO_WRITE                  2
+#define CALLING_OVERHEAD_IO_CONTROL                2
+#define CALLING_OVERHEAD_FATAL_ERROR_OCCURRED      1
+#define CALLING_OVERHEAD_RATE_MONOTONIC_CREATE     2
+#define CALLING_OVERHEAD_RATE_MONOTONIC_IDENT      2
+#define CALLING_OVERHEAD_RATE_MONOTONIC_DELETE     1
+#define CALLING_OVERHEAD_RATE_MONOTONIC_CANCEL     1
+#define CALLING_OVERHEAD_RATE_MONOTONIC_PERIOD     2
+#define CALLING_OVERHEAD_MULTIPROCESSING_ANNOUNCE  1
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+/* end of include file */

c/src/lib/libbsp/m68k/dmv152/spurious/spinit.c

@@ -0,0 +1,46 @@
+/*  Spurious_driver
+ *
+ *  This routine installs spurious interrupt handlers for the DMV152.
+ *
+ *  Input parameters:  NONE
+ *
+ *  Output parameters:  NONE
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include <rtems.h>
+#include <bsp.h>
+#include <stdio.h>
+
+rtems_isr Spurious_Isr(
+  rtems_vector_number vector
+)
+{
+  void *sp = 0;
+
+  asm volatile ( "movea.l   %%sp,%0 " : "=a" (sp) : "0" (sp) );
+
+  fprintf( stderr, "Vector 0x%x sp=0x%p\n", vector, sp );
+}
+
+rtems_device_driver Spurious_Initialize(
+  rtems_device_major_number major,
+  rtems_device_minor_number minor,
+  void *pargp,
+  rtems_id tid,
+  rtems_unsigned32 *rval
+)
+{
+  rtems_vector_number vector;
+
+  for ( vector = 0x40 ; vector <= 0xFF ; vector++ )
+    (void) set_vector( Spurious_Isr, vector, 1 );
+}

c/src/lib/libbsp/m68k/dmv152/startup/bspstart.c

@@ -0,0 +1,171 @@
+#define STACK_CHECKER_ON
+/*  bsp_start()
+ *
+ *  This routine starts the application.  It includes application,
+ *  board, and monitor specific initialization and configuration.
+ *  The generic CPU dependent initialization has been performed
+ *  before this routine is invoked.
+ *
+ *  INPUT:  NONE
+ *
+ *  OUTPUT: NONE
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include <rtems.h>
+#include <bsp.h>
+#include <libcsupport.h>
+#include <vmeintr.h>
+
+/*
+ *  The original table from the application and our copy of it with
+ *  some changes.
+ */
+
+extern rtems_configuration_table  Configuration;
+rtems_configuration_table         BSP_Configuration;
+
+rtems_cpu_table Cpu_table;
+
+/*      Initialize whatever libc we are using
+ *      called from postdriver hook
+ */
+
+void bsp_libc_init()
+{
+    extern int end;
+    rtems_unsigned32        heap_start;
+
+    heap_start = (rtems_unsigned32) &end;
+    if (heap_start & (CPU_ALIGNMENT-1))
+        heap_start = (heap_start + CPU_ALIGNMENT) & ~(CPU_ALIGNMENT-1);
+
+    RTEMS_Malloc_Initialize((void *) heap_start, 64 * 1024, 0);
+
+    /*
+     * Set up for the libc handling.
+     */
+
+    if (BSP_Configuration.ticks_per_timeslice > 0)
+        libc_init(1);                /* reentrant if possible */
+    else
+        libc_init(0);                /* non-reentrant */
+
+    /*
+     *  Initialize the stack bounds checker
+     */
+
+#ifdef STACK_CHECKER_ON
+    Stack_check_Initialize();
+#endif
+}
+
+int bsp_start(
+  int argc,
+  char **argv,
+  char **environp
+)
+{
+  m68k_isr *monitors_vector_table;
+  int       index;
+  void     *vbr;
+
+  monitors_vector_table = (m68k_isr *)0;   /* Monitor Vectors are at 0 */
+  m68k_set_vbr( monitors_vector_table );
+
+  for ( index=2 ; index<=255 ; index++ )
+    M68Kvec[ index ] = monitors_vector_table[ 32 ];
+
+  M68Kvec[  2 ] = monitors_vector_table[  2 ];   /* bus error vector */
+  M68Kvec[  4 ] = monitors_vector_table[  4 ];   /* breakpoints vector */
+  M68Kvec[  9 ] = monitors_vector_table[  9 ];   /* trace vector */
+
+  /*
+   *  Uncommenting this seems to confuse/break the monitor on this board.
+   *  It probably assumes the vector table is at 0.
+   */
+
+  /* m68k_set_vbr( &M68Kvec ); */
+
+  /*
+   *  Adjust the VMEbus mode to round-robin.
+   */
+
+  /*
+   *  This is only apparent with the shared memory driver which has not
+   *  yet been supported on this target.
+   */
+
+  m68k_enable_caching();
+
+  /*
+   *  we only use a hook to get the C library initialized.
+   */
+
+  Cpu_table.pretasking_hook = NULL;
+
+  Cpu_table.predriver_hook = bsp_libc_init;  /* RTEMS resources available */
+
+  Cpu_table.postdriver_hook = NULL;   /* Call our main() for constructors */
+
+  Cpu_table.idle_task = NULL;  /* do not override system IDLE task */
+
+  Cpu_table.do_zero_of_workspace = TRUE;
+
+  m68k_get_vbr( vbr );
+  Cpu_table.interrupt_vector_table = vbr;
+
+  Cpu_table.interrupt_stack_size = 4096;
+
+  Cpu_table.extra_system_initialization_stack = 0;
+
+  /*
+   *  Copy the table
+   */
+
+  BSP_Configuration = Configuration;
+
+  BSP_Configuration.work_space_start = (void *)
+     (RAM_END - BSP_Configuration.work_space_size);
+
+  /*
+   * Add 1 region for Malloc in libc_low
+   */
+
+  BSP_Configuration.maximum_regions++;
+
+  /*
+   * Add 1 extension for newlib libc
+   */
+
+#ifdef RTEMS_NEWLIB
+    BSP_Configuration.maximum_extensions++;
+#endif
+
+  /*
+   * Add another extension if using the stack checker
+   */
+
+#ifdef STACK_CHECKER_ON
+    BSP_Configuration.maximum_extensions++;
+#endif
+
+  rtems_initialize_executive( &BSP_Configuration, &Cpu_table );
+  /* does not return */
+
+  /* Clock_exit is done as an atexit() function */
+
+  VME_interrupt_Disable( 0xff );
+
+  /* return like a "normal" subroutine to the monitor */
+  return 0;
+}

c/src/lib/libbsp/m68k/dmv152/startup/linkcmds

@@ -0,0 +1,48 @@
+/*
+ *  This file contains directives for the GNU linker which are specific
+ *  to the DY-4 DMV152/SVME153 boards.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+MEMORY
+        {
+        ram : org = 0x12800, l = 1M
+        }
+
+SECTIONS
+{
+        .text 0x12800 :
+        {
+        text_start = . ;
+        _text_start = . ;
+        *(.text)
+        etext = ALIGN( 0x10 ) ;
+        _etext = .;
+        }
+        .data ADDR( .text ) + SIZEOF( .text ):
+        {
+        data_start = . ;
+        _data_start = . ;
+        *(.data)
+        edata = ALIGN( 0x10 ) ;
+        _edata = .;
+        }
+        .bss ADDR( .data ) + SIZEOF( .data ):
+        {
+        bss_start = . ;
+        _bss_start = . ;
+        *(.bss)
+        *(COMMON)
+        end = . ;
+        _end = . ;
+        }
+}

c/src/lib/libbsp/m68k/dmv152/startup/vmeintr.c

@@ -0,0 +1,60 @@
+/*  vmeintr.c
+ *
+ *  VMEbus support routines for the DMV152.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include <rtems.h>
+#include <bsp.h>
+#include <vmeintr.h>
+
+/*PAGE
+ *
+ *  VME_interrupt_Disable
+ *
+ */
+
+void VME_interrupt_Disable (
+  VME_interrupt_Mask                mask                        /* IN  */
+)
+{
+  volatile rtems_unsigned8  *VME_interrupt_enable;
+  rtems_unsigned8  value;
+
+  VME_interrupt_enable = ACC_VIE;
+  value = *VME_interrupt_enable;
+
+  value &= ~mask;  /* turn off interrupts for all levels in mask */
+
+  *VME_interrupt_enable = value;
+}
+
+/*PAGE
+ *
+ *  VME_interrupt_Enable
+ *
+ */
+
+void VME_interrupt_Enable (
+  VME_interrupt_Mask                mask                        /* IN  */
+)
+{
+  volatile rtems_unsigned8  *VME_interrupt_enable;
+  rtems_unsigned8  value;
+
+  VME_interrupt_enable = ACC_VIE;
+  value = *VME_interrupt_enable;
+
+  value |= mask;  /* turn on interrupts for all levels in mask */
+
+  *VME_interrupt_enable = value;
+}

c/src/lib/libbsp/m68k/dmv152/timer/timer.c

@@ -0,0 +1,105 @@
+/*  timer.c
+ *
+ *  NOTE: These routines will not work if the optimizer is enabled
+ *        for some compilers.  The multiple writes to the Z8036
+ *        may be optimized away.
+ *
+ *        It is important that the timer start/stop overhead be
+ *        determined when porting or modifying this code.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+
+#include <rtems.h>
+#include <bsp.h>
+
+int Ttimer_val;
+rtems_boolean Timer_driver_Find_average_overhead;
+
+rtems_isr timerisr();
+
+void Timer_initialize()
+{
+  rtems_unsigned8 data;
+
+  (void) set_vector( timerisr, TIMER_VECTOR, 0 );  /* install ISR */
+
+  Ttimer_val = 0;                          /* clear timer ISR count */
+  Z8x36_READ ( TIMER, MASTER_INTR, data );
+  Z8x36_WRITE( TIMER, MASTER_INTR, (data & 0x01) );
+
+  Z8x36_WRITE( TIMER, MASTER_CFG, 0xd4 );
+  Z8x36_READ ( TIMER, MASTER_INTR, data );
+  Z8x36_WRITE( TIMER, MASTER_INTR, (data & 0x7E) );
+  Z8x36_WRITE( TIMER, CT1_TIME_CONST_MSB, 0x00 );
+  Z8x36_WRITE( TIMER, CT1_TIME_CONST_LSB, 0x00 );
+  Z8x36_WRITE( TIMER, CT1_MODE_SPEC, 0x87 );
+  Z8x36_WRITE( TIMER, CNT_TMR_VECTOR, TIMER_VECTOR );
+  Z8x36_WRITE( TIMER, CT1_CMD_STATUS, 0x20 );
+  Z8x36_WRITE( TIMER, CT1_CMD_STATUS, 0x26 );
+  Z8x36_READ ( TIMER, MASTER_INTR, data );
+  Z8x36_WRITE( TIMER, MASTER_INTR, (data & 0xDA) | 0x80 );
+
+  Z8x36_WRITE( TIMER, CT1_CMD_STATUS, 0xC6 );
+
+  /*
+   * ACC_IC54 - interrupt 5 will be vectored and mapped to level 6
+   */
+
+  data = (*(rtems_unsigned8 *)0x0D00000B);
+  (*(rtems_unsigned8 *)0x0D00000B) = (data & 0x0F) | 0x60;
+
+}
+
+#define AVG_OVERHEAD      9  /* It typically takes 3.65 microseconds */
+                             /* (9 countdowns) to start/stop the timer. */
+#define LEAST_VALID       10 /* Don't trust a value lower than this */
+
+int Read_timer()
+{
+  rtems_unsigned8 data;
+  rtems_unsigned8  msb, lsb;
+  rtems_unsigned32 remaining, total;
+
+  Z8x36_WRITE( TIMER, CT1_CMD_STATUS,  0xce ); /* read the counter value */
+  Z8x36_READ(  TIMER, CT1_CUR_CNT_MSB, msb );
+  Z8x36_READ(  TIMER, CT1_CUR_CNT_LSB, lsb );
+
+  remaining = 0x10000 - ((msb << 8) + lsb);
+  total = (Ttimer_val * 0x10000) + remaining;
+
+  Z8x36_READ ( TIMER, MASTER_INTR, data );
+  Z8x36_WRITE( TIMER, MASTER_INTR, (data & 0x01) );
+
+  /* do not restore old vector */
+  if ( Timer_driver_Find_average_overhead == 1 )
+    return total;          /* in countdown units */
+
+  if ( total < LEAST_VALID )
+    return 0;            /* below timer resolution */
+
+  /* Clocked at 2.4615 Mhz */
+
+  return (int)(((float)(total-AVG_OVERHEAD)) / 2.4615 * 2.0);
+}
+
+rtems_status_code Empty_function( void )
+{
+  return RTEMS_SUCCESSFUL;
+}
+
+void Set_find_average_overhead(
+  rtems_boolean find_flag
+)
+{
+  Timer_driver_Find_average_overhead = find_flag;
+}

c/src/lib/libbsp/m68k/dmv152/timer/timerisr.s

@@ -0,0 +1,38 @@
+/*  timer_isr()
+ *
+ *  This routine provides the ISR for the Z8536 timer on the DMV152
+ *  board.   The timer is set up to generate an interrupt at maximum
+ *  intervals.
+ *
+ *  Input parameters:  NONE
+ *
+ *  Output parameters:  NONE
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include "asm.h"
+
+BEGIN_CODE
+
+.set TIMER,           0x0c000007         | port A
+.set CT1_CMD_STATUS,  0x0a               | command status register
+.set RELOAD,          0x26               | clr IP & IUS,allow countdown
+
+        PUBLIC(timerisr)
+SYM (timerisr):
+        movb    #CT1_CMD_STATUS,TIMER    | set pointer to cmd status reg
+        movb    #RELOAD,TIMER            | reload countdown
+        addql   #1, SYM (Ttimer_val)     | increment timer value
+        rte
+
+END_CODE
+END

c/src/lib/libbsp/m68k/idp/README

@@ -0,0 +1,31 @@
+This board support package has not been tested with multiprocessor
+or the timing support.  The uniprocessor IDP package was tested though
+with a fairly large application (although bugs may exist).  The
+$RTEMS_ROOT/src/tests/Makefile should therefore have the samples and
+the tests directories compiled first with the tmtests (timing) and
+multiprocessor directories optional.
+
+Let me know if you have any problems or bug fixes.  Bug fixes are greatly
+appreciated.  I do not work for RTEMS or am a member of the RTEMS support
+group in any way, however.  I am just one of many that appreciate
+"free" software and enjoy contributing when possible :).  You can do it too!
+ 
+		-- doug mcbride
+		   mcbride@rodin.colorado.edu
+
+==============================================================
+Notes: Make sure that -msoft-float is defined when compiling in the
+newlib-beta-rtems/newlib/msoft-float directory subtree.  You also probably
+want to add the following line to line 413 of
+newlib-beta-rtems/newlib/msoft-float/libc/stdio/vfprintf.c:
+
+#define INTEGER_ONLY
+
+That allows you to pass most of the paranoia test in the samples
+directory of RTEMS although you can't see the floating point values actually
+printed (software floating point tends to make that difficult anyway).
+In order to pass the whole paranoia test (with one flaw), however, I had to
+comment out the following line in milestone 140 (why?):
+
+/*  printf ("Testing X^((X + 1) / (X - 1)) vs. exp(2) = %.17e as X -> 1.\n",
+    Exp2); */

c/src/lib/libbsp/m68k/idp/clock/ckinit.c

@@ -0,0 +1,126 @@
+/*  Clock_init()
+ *
+ *
+ *  This is modified by Doug McBride to get it to work for the MC68EC040
+ *  IDP board.  The below comments are kept to show that some prior work
+ *  was done in the area and the modifications performed was application
+ *  specific for the IDP board to port it to.
+ *
+ *  This routine initializes the mc68230 on the MC68EC040 board.
+ *  The tick frequency is 40 milliseconds.
+ *
+ *  Input parameters:  NONE
+ *
+ *  Output parameters:  NONE
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include <stdlib.h>
+
+#include "rtems.h"
+#include "clockdrv.h"
+#include "bsp.h"
+#include "cpu.h"
+
+rtems_unsigned32 Clock_isrs;        /* ISRs until next tick */
+volatile rtems_unsigned32 Clock_driver_ticks;
+                                    /* ticks since initialization */
+rtems_isr_entry  Old_ticker;
+
+extern rtems_configuration_table Configuration;
+extern void led_putnum();
+void Disable_clock();
+
+#define TIMER_VECTOR 0x4D
+
+rtems_device_driver Clock_initialize( 
+  rtems_device_major_number major,
+  rtems_device_minor_number minor,
+  void *pargp,
+  rtems_id tid,
+  rtems_unsigned32 *rval
+)
+{
+  Install_clock( Clock_isr );
+}
+
+void ReInstall_clock( clock_isr )
+rtems_isr_entry clock_isr;
+{
+  rtems_unsigned32 isrlevel = 0 ;
+
+  rtems_interrupt_disable( isrlevel );
+   (void) set_vector( clock_isr, TIMER_VECTOR, 1 );
+  rtems_interrupt_enable( isrlevel );
+}
+
+/* The following was added for debugging purposes */
+void Disable_clock()
+{
+	/* Disable timer */
+	MC68230_WRITE (TCR, 0x00);
+}
+
+void Install_clock( clock_isr )
+rtems_isr_entry clock_isr;
+{
+  Clock_driver_ticks = 0;
+  Clock_isrs = (int)(Configuration.microseconds_per_tick / 1000);
+
+  if ( Configuration.ticks_per_timeslice ) {
+/*    led_putnum('c'); * for debugging purposes */
+    Old_ticker = (rtems_isr_entry) set_vector( clock_isr, TIMER_VECTOR, 1 );
+
+	/* Disable timer for initialization */
+	MC68230_WRITE (TCR, 0x00);
+
+	/* some PI/T initialization stuff here -- see comment in the ckisr.c
+	   file in this directory to understand why I use the values that I do */
+	/* Set up the interrupt vector on the MC68230 chip:
+		TIVR = TIMER_VECTOR; */
+	MC68230_WRITE (TIVR, TIMER_VECTOR);
+
+	/* Set CPRH through CPRL to 193 (not 203) decimal for countdown--see ckisr.c
+		CPRH = 0x00;
+		CPRM = 0x00;
+		CPRL = 0xC1; */
+	MC68230_WRITE (CPRH, 0x00);
+	MC68230_WRITE (CPRM, 0x00);
+	MC68230_WRITE (CPRL, 0xC1);
+
+	/* Enable timer and use it as an external periodic interrupt generator
+		TCR = 0xA1; */
+/*    led_putnum('a'); * for debugging purposes */
+	MC68230_WRITE (TCR, 0xA1);
+
+	/*
+	 *  Schedule the clock cleanup routine to execute if the application exits.
+	 */
+    atexit( Clock_exit );
+  } 
+}
+
+void Clock_exit( void )
+{
+  rtems_unsigned8 data;
+
+  if ( Configuration.ticks_per_timeslice ) {
+
+	/* disable timer
+		data = TCR;
+		TCR = (data & 0xFE); */
+	MC68230_READ (TCR, data);
+	MC68230_WRITE (TCR, (data & 0xFE));
+
+    /* do not restore old vector */
+  }
+}

c/src/lib/libbsp/m68k/idp/console/console.c

@@ -0,0 +1,216 @@
+/*  
+ *  This file contains the Motorola IDP console IO package.
+ *
+ *  Written by Doug McBride, Colorado Space Grant College
+ *  Based off of the board support packages of RTEMS
+ *
+ *  Updated to RTEMS 3.2.0 by Joel Sherrill.
+ *
+ *  $Id$
+ */
+
+#define MIDP_INIT
+
+#include "rtems.h"
+#include "console.h"
+#include "bsp.h"
+
+#include "ringbuf.h"
+
+Ring_buffer_t  Buffer[ 2 ];
+
+rtems_isr C_Receive_ISR(rtems_vector_number vector);
+
+
+/*  console_initialize
+ *
+ *  This routine initializes the console IO driver.
+ *
+ *  Input parameters: NONE
+ *
+ *  Output parameters:  NONE
+ *
+ *  Return values:
+ */
+
+rtems_device_driver console_initialize(
+  rtems_device_major_number  major,
+  rtems_device_minor_number  minor,
+  void                      *arg,
+  rtems_id                   self,
+  rtems_unsigned32          *status
+)
+{
+
+  Ring_buffer_Initialize( &Buffer[ 0 ] );
+  Ring_buffer_Initialize( &Buffer[ 1 ] );
+
+  init_pit();
+
+  *status = RTEMS_SUCCESSFUL;
+}
+
+
+/*  is_character_ready
+ *
+ *  This routine returns TRUE if a character is available.
+ *
+ *  Input parameters: NONE
+ *
+ *  Output parameters:  NONE
+ *
+ *  Return values:
+ */
+
+rtems_boolean is_character_ready( 
+  char *ch,
+  int   port
+)
+{
+  if ( Ring_buffer_Is_empty( &Buffer[ port ] ) )
+    return FALSE;
+
+  Ring_buffer_Remove_character( &Buffer[ port ], *ch );
+  return TRUE;
+}
+
+/*  quick_char_check
+ *
+ *  This routine returns TRUE if a character is available.
+ *  It is different from above because it does not disturb the ring buffer
+ *
+ *  Input parameters: NONE
+ *
+ *  Output parameters:  NONE
+ *
+ *  Return values:
+ */
+
+rtems_boolean quick_char_check( 
+  int   port
+)
+{
+  if ( Ring_buffer_Is_empty( &Buffer[ port ] ) )
+    return FALSE;
+
+  return TRUE;
+}
+
+/*  inbyte
+ *
+ *  This routine reads a character from the UART through a buffer.
+ *
+ *  Input parameters: NONE
+ *
+ *  Output parameters:  NONE
+ *
+ *  Return values:
+ *    character read from UART
+ */
+
+char inbyte( 
+  int port
+)
+{
+  unsigned char tmp_char;
+ 
+  /* If you come into this routine without checking is_character_ready() first
+     and you want nonblocking code, then it's your own fault */
+
+  while ( !is_character_ready( &tmp_char, port ) );
+ 
+  return tmp_char;
+}
+
+
+/*  outbyte
+ *
+ *  This routine transmits a character out the M68681.  It supports
+ *  XON/XOFF flow control.
+ *
+ *  Input parameters:
+ *    ch  - character to be transmitted 
+ *
+ *  Output parameters:  NONE
+ */
+
+void outbyte( 
+  char ch,
+  int  port
+)
+{
+  switch ( port ) {
+    case 0:
+      transmit_char( ch );
+      break;
+    case 1:
+      transmit_char_portb( ch );
+      break;
+  }
+
+}
+
+/*
+ * __read  -- read bytes from the serial port. Ignore fd, since
+ *            we only have stdin.
+ */
+
+int __read(
+  int fd,
+  char *buf,
+  int nbytes
+)
+{
+  int i = 0;
+  int port;
+
+  /*
+   *  Map port A to stdin, stdout, and stderr.
+   *  Map everything else to port B.
+   */
+
+  if ( fd <= 2 ) port = 0;
+  else           port = 1;
+
+  for (i = 0; i < nbytes; i++) {
+    *(buf + i) = inbyte( port );
+    if ((*(buf + i) == '\n') || (*(buf + i) == '\r')) {
+      (*(buf + i++)) = '\n';
+      (*(buf + i)) = 0;
+      break;
+    }
+  }
+  return (i);
+}
+
+/*
+ * __write -- write bytes to the serial port. Ignore fd, since
+ *            stdout and stderr are the same. Since we have no filesystem,
+ *            open will only return an error.
+ */
+
+int __write(
+  int fd,
+  char *buf,
+  int nbytes
+)
+{
+  int i;
+  int port;
+ 
+  /*
+   *  Map port A to stdin, stdout, and stderr.
+   *  Map everything else to port B.
+   */
+ 
+  if ( fd <= 2 ) port = 0;
+  else           port = 1;
+ 
+  for (i = 0; i < nbytes; i++) {
+    if (*(buf + i) == '\n') {
+      outbyte ('\r', port );
+    }
+    outbyte (*(buf + i), port );
+  }
+  return (nbytes);
+}

c/src/lib/libbsp/m68k/idp/console/duart.c

@@ -0,0 +1,170 @@
+/*#########################################################
+#
+# This code is a modified version of what you will find at the
+# end of the IDP User's manual.  The original code is copyrighted
+# by Motorola and Motorola Semiconductor Products as well as
+# Motorola Software products group.
+#
+# Modifications to the original IDP code by Doug McBride, Colorado
+# Space Grant College.  Modifications include a means of accessing
+# port B of the duart as well as port A as well as modifications for
+# buffering and RTEMS support.  Modifications are provided
+# as is and may not be correct.
+#
+# Rob Savoye provided the format for the mc68681 header file
+#
+# Joel Sherrill provided inspiration for recoding my original assembly
+# for this file into C (a good idea)
+#
+##########################################################*/
+
+#include "mc68230.h"
+#include "mc68681.h"
+#include "ringbuf.h"
+#include "rtems.h"
+#include "bsp.h"
+
+rtems_isr C_Receive_ISR(rtems_vector_number vector);
+extern Ring_buffer_t  Buffer[];
+
+extern unsigned char inbuf[];
+extern unsigned char inbuf_portb[];
+extern unsigned tail;
+extern unsigned tail_portb;
+unsigned char Pit_initialized = 0;
+
+/*#####################################################################
+# The volatile routine to initialize the duart -- port a and port b
+######################################################################*/
+volatile void init_pit()
+{
+	/* Disable ports A & B while configuring PIT */
+	MC68681_WRITE(DUART_IMR, 0x00);		/* disable imr */
+	MC68681_WRITE(DUART_CRA, 0x08);		/* disable port a transmitter */
+	MC68681_WRITE(DUART_CRA, 0x02);		/* disable port a receiver */
+	MC68681_WRITE(DUART_CRB, 0x08);		/* disable port b transmitter */
+	MC68681_WRITE(DUART_CRB, 0x02);		/* disable port b receiver */
+
+	/* install ISR for ports A and B */
+	set_vector(C_Receive_ISR, (VECT+H3VECT), 1);
+
+	/* initialize pit */
+	MC68230_WRITE(PGCR, 0x00);  /* set mode to 0 -- disable all ports */
+	MC68230_WRITE(PSRR, 0x18);	/* set up pirq and piack */
+	MC68230_WRITE(PBDDR, 0x00);	/* all pins on port b are input */
+	MC68230_WRITE(PBCR, 0x82);	/* submode 1x, h3 interrupt enabled */
+	MC68230_WRITE(PIVR, VECT);	/* setup pivr */
+	MC68230_WRITE(PGCR, 0x20);	/* turn on all ports */
+
+	/* For some reason, the reset of receiver/transmitter only works for
+       the first time around -- it garbles the output otherwise (e.g., sp21) */
+	if (!Pit_initialized)
+	{
+	   /* now initialize the duart registers on port b */
+	   /* WARNING:OPTIMIZER MAY ONLY EXECUTE THIRD STATEMENT IF NOT VOLATILE */
+	   MC68681_WRITE(DUART_CRB, 0x30);		/* reset tx, channel b */
+	   MC68681_WRITE(DUART_CRB, 0x20);		/* reset rx, channel b */
+	   MC68681_WRITE(DUART_CRB, 0x10);		/* reset mr pointer, channel b */
+
+	   /* now initialize the duart registers on port a */
+	   /* WARNING:OPTIMIZER MAY ONLY EXECUTE THIRD STATEMENT IF NOT VOLATILE */
+	   MC68681_WRITE(DUART_CRA, 0x30);		/* reset tx, channel a */
+	   MC68681_WRITE(DUART_CRA, 0x20);		/* reset rx, channel a */
+	   MC68681_WRITE(DUART_CRA, 0x10);		/* reset mr pointer, channel a */
+	   Pit_initialized = 1;
+	}
+
+	/* init the general registers of the duart */
+	MC68681_WRITE(DUART_IVR, 0x0f);		/* init ivr */
+	MC68681_WRITE(DUART_IMR, 0x22);		/* init imr */
+	MC68681_WRITE(DUART_ACR, 0x00);		/* init acr */
+	MC68681_WRITE(DUART_CTUR, 0x00);	/* init ctur */
+	MC68681_WRITE(DUART_CTLR, 0x02);	/* init ctlr */
+	MC68681_WRITE(DUART_OPCR, 0x00);	/* init opcr */
+	MC68681_WRITE(DUART_OPRSET, 0x01);	/* init cts */
+
+	/* init the actual serial port for port a */
+	MC68681_WRITE(DUART_CSRA, 0xbb);	/* init csra -- 9600 baud */
+	MC68681_WRITE(DUART_MR1A, 0x13);	/* init mr1a */
+	MC68681_WRITE(DUART_MR2A, 0x07);	/* init mr2a */
+	MC68681_WRITE(DUART_CRA, 0x05);		/* init cra */
+
+	/* init the actual serial port for port b */
+	MC68681_WRITE(DUART_CSRB, 0xbb);	/* init csrb -- 9600 baud */
+#define EIGHT_BITS_NO_PARITY
+#ifdef EIGHT_BITS_NO_PARITY
+	MC68681_WRITE(DUART_MR1B, 0x13);	/* init mr1b */
+#else /* 7 bits, even parity */
+	MC68681_WRITE(DUART_MR1B, 0x02);	/* init mr1b */
+#endif
+	MC68681_WRITE(DUART_MR2B, 0x07);	/* init mr2b -- one stop bit */
+	MC68681_WRITE(DUART_CRB, 0x05);		/* init crb */
+}
+
+/*#####################################################################
+# interrupt handler for receive of character from duart on ports A & B
+#####################################################################*/
+rtems_isr C_Receive_ISR(rtems_vector_number vector)
+{
+	volatile unsigned char *_addr;
+
+	_addr = (unsigned char *) (PIT_ADDR + PITSR);
+	*_addr = 0x04;		/* clear pit interrupt */
+
+	/* Let's check port A first for input */
+	_addr = (unsigned char *) (DUART_ADDR + DUART_SRA);
+	if (*_addr & 0x01)	/* extract rcvrdy on port A */
+	{
+		/* Read input on port A */
+		_addr = (unsigned char *) (DUART_ADDR + DUART_RBA);
+		Ring_buffer_Add_character( &Buffer[ 0 ], *_addr );
+	}
+	else	/* If not on port A, let's check port B */
+	{
+		_addr = (unsigned char *) (DUART_ADDR + DUART_SRB);
+		if (*_addr & 0x01)	/* extract rcvrdy on port B */
+		{
+			/* Read input on port B */
+			_addr = (unsigned char *) (DUART_ADDR + DUART_RBB);
+			Ring_buffer_Add_character( &Buffer[ 1 ], *_addr );
+		}
+		/* if not ready on port A or port B, must be an error */
+		/* if error, get out so that fifo is undisturbed */
+	}
+}
+
+/*#####################################################################
+# This is the routine that actually transmits a character one at a time
+# This routine transmits on port A of the IDP board
+#####################################################################*/
+void transmit_char(char ch)
+{
+	volatile unsigned char *_addr;
+
+	/* Get SRA (extract txrdy) */
+	_addr = (unsigned char *) (DUART_ADDR + DUART_SRA);
+	while (!(*_addr & 0x04))
+	{
+	}
+
+	/* transmit character over port A */
+	MC68681_WRITE(DUART_TBA, ch);
+}
+
+/*#####################################################################
+# This is the routine that actually transmits a character one at a time
+# This routine transmits on port B of the IDP board
+#####################################################################*/
+void transmit_char_portb(char ch)
+{
+	volatile unsigned char *_addr;
+
+	/* Get SRB (extract txrdy) */
+	_addr = (unsigned char *) (DUART_ADDR + DUART_SRB);
+	while (!(*_addr & 0x04))
+	{
+	}
+
+	/* transmit character over port B */
+	MC68681_WRITE(DUART_TBB, ch);
+}

c/src/lib/libbsp/m68k/idp/console/leds.c

@@ -0,0 +1,80 @@
+/*
+ * leds.c -- control the led's on a Motorola mc68ec0x0 board.
+ *           Written by rob@cygnus.com (Rob Savoye)
+ */
+#include "leds.h"
+
+void zylons();
+void led_putnum();
+void clear_leds();
+
+/*
+ * led_putnum -- print a hex number on the LED. the value of num must be a char with
+ *              the ascii value. ie... number 0 is '0', a is 'a', ' ' (null) clears
+ *		the led display.
+ *		Setting the bit to 0 turns it on, 1 turns it off.
+ * 		the LED's are controlled by setting the right bit mask in the base
+ * 		address. 
+ *		The bits are:
+ *			[d.p | g | f | e | d | c | b | a ] is the byte.
+ *
+ *		The locations are:
+ *		
+ *			 a
+ *		       -----
+ *		    f |     | b
+ *		      |  g  |
+ *		       -----
+ *                    |     |
+ *                  e |     | c
+ *                     -----
+ *                       d                . d.p (decimal point)
+ */
+void
+led_putnum ( num )
+char num;
+{
+    static unsigned char *leds = (unsigned char *)LED_ADDR;
+    static unsigned char num_bits [18] = {
+      0xff,						/* clear all */
+      0xc0, 0xf9, 0xa4, 0xb0, 0x99, 0x92, 0x82, 0xf8, 0x80, 0x98, /* numbers 0-9 */
+      0x98, 0x20, 0x3, 0x27, 0x21, 0x4, 0xe 		/* letters a-f */
+    };
+
+    if (num >= '0' && num <= '9')
+      num = (num - '0') + 1;
+
+    if (num >= 'a' && num <= 'f')
+      num = (num - 'a') + 12;
+
+    if (num == ' ')
+      num = 0;
+
+    *leds = num_bits[(int)num];
+}
+
+/* This procedure added by Doug McBride, Colorado Space Grant College --
+   Probably should be a macro instead */
+void
+clear_leds ( )
+{
+    static unsigned char *leds = (unsigned char *)LED_ADDR;
+    *leds = 0xFF;
+}
+
+/*
+ * zylons -- draw a rotating pattern. NOTE: this function never returns.
+ */
+void
+zylons()
+{
+  unsigned char *leds 	= (unsigned char *)LED_ADDR;
+  unsigned char curled = 0xfe;
+
+  while (1)
+    {
+      *leds = curled;
+      curled = (curled >> 1) | (curled << 7);
+      delay ( 8000 );
+    }
+}

c/src/lib/libbsp/m68k/idp/console/mc68ec.c

@@ -0,0 +1,18 @@
+/*
+ * mc68ec.c -- Low level support for the Motorola mc68ec0x0 board.
+ *             Written by rob@cygnus.com (Rob Savoye)
+ */
+#include "leds.h"
+
+/*
+ * delay -- delay execution. This is an ugly hack. It should
+ *          use the timer, but I'm waiting for docs. (sigh)
+ */
+void delay(num)
+int num;
+{
+  while (num--)
+    {
+      asm ("nop");
+    }
+}

c/src/lib/libbsp/m68k/idp/include/README

@@ -0,0 +1,13 @@
+#
+#  $Id$
+#
+
+The following files really should be made generic and allowed to
+be shared between BSPs:
+
+  mc68230.h
+  mc68681.h
+  ringbuf.h
+
+However at the moment the BSP is not tested under 3.2.0 so it is 
+dangerous to do so.

c/src/lib/libbsp/m68k/idp/include/bsp.h

@@ -0,0 +1,79 @@
+/*  bsp.h
+ * 
+ *  This include file contains all Motorola 680x0 IDP board IO definitions.
+ *
+ *  $Id$
+ */
+
+#ifndef __IDP_BSP_H
+#define __IDP_BSP_H
+
+#include "rtems.h"
+#include "cpu.h"
+#include "console.h"
+#include "mc68230.h"
+#include "mc68681.h"
+
+/*
+ *  Define the time limits for RTEMS Test Suite test durations.
+ *  Long test and short test duration limits are provided.  These
+ *  values are in seconds and need to be converted to ticks for the
+ *  application.
+ */
+
+#define MAX_LONG_TEST_DURATION       300 /* 5 minutes = 300 seconds */
+#define MAX_SHORT_TEST_DURATION      3   /* 3 seconds */
+
+/*
+ *  Define the interrupt mechanism for Time Test 27 
+ *
+ *  NOTE: tm27 apparently not supported.
+ */
+
+#define MUST_WAIT_FOR_INTERRUPT 0
+
+#define Install_tm27_vector( handler ) 
+
+#define Cause_tm27_intr()  
+
+#define Clear_tm27_intr()  
+
+#define Lower_tm27_intr()
+
+/* Constants */
+
+#define RAM_START 0
+#define RAM_END   0x200000
+
+#ifdef MIDP_INIT
+#undef EXTERN
+#define EXTERN
+#else
+#undef EXTERN
+#define EXTERN extern
+#endif
+
+/* miscellaneous stuff assumed to exist */
+
+extern rtems_configuration_table BSP_Configuration;
+
+extern m68k_isr     M68Kvec[];   /* vector table address */
+
+/* functions */
+
+void bsp_cleanup( void );
+
+m68k_isr set_vector(
+  rtems_isr_entry     handler,
+  rtems_vector_number vector,
+  int                 type
+);
+
+void init_pit( void );
+
+void transmit_char( char ch );
+
+void transmit_char_portb( char ch );
+
+#endif
+/* end of include file */

c/src/lib/libbsp/m68k/idp/include/coverhd.h

@@ -0,0 +1,106 @@
+/*  coverhd.h
+ *
+ *  This include file has defines to represent the overhead associated
+ *  with calling a particular directive from C.  These are used in the
+ *  Timing Test Suite to ignore the overhead required to pass arguments 
+ *  to directives.  On some CPUs and/or target boards, this overhead 
+ *  is significant and makes it difficult to distinguish internal 
+ *  RTEMS execution time from that used to call the directive.
+ *  This file should be updated after running the C overhead timing
+ *  test.  Once this update has been performed, the RTEMS Time Test
+ *  Suite should be rebuilt to account for these overhead times in the
+ *  timing results.
+ *
+ *  NOTE:  If these are all zero, then the times reported include all
+ *         all calling overhead including passing of arguments.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#ifndef __COVERHD_h
+#define __COVERHD_h
+
+#define CALLING_OVERHEAD_INITIALIZE_EXECUTIVE      0
+#define CALLING_OVERHEAD_SHUTDOWN_EXECUTIVE        0
+#define CALLING_OVERHEAD_TASK_CREATE               0
+#define CALLING_OVERHEAD_TASK_IDENT                0
+#define CALLING_OVERHEAD_TASK_START                0
+#define CALLING_OVERHEAD_TASK_RESTART              0
+#define CALLING_OVERHEAD_TASK_DELETE               0
+#define CALLING_OVERHEAD_TASK_SUSPEND              0
+#define CALLING_OVERHEAD_TASK_RESUME               0
+#define CALLING_OVERHEAD_TASK_SET_PRIORITY         0
+#define CALLING_OVERHEAD_TASK_MODE                 0
+#define CALLING_OVERHEAD_TASK_GET_NOTE             0
+#define CALLING_OVERHEAD_TASK_SET_NOTE             0
+#define CALLING_OVERHEAD_TASK_WAKE_WHEN            0
+#define CALLING_OVERHEAD_TASK_WAKE_AFTER           0
+#define CALLING_OVERHEAD_INTERRUPT_CATCH           0
+#define CALLING_OVERHEAD_CLOCK_GET                 0
+#define CALLING_OVERHEAD_CLOCK_SET                 0
+#define CALLING_OVERHEAD_CLOCK_TICK                0
+
+#define CALLING_OVERHEAD_TIMER_CREATE              0
+#define CALLING_OVERHEAD_TIMER_IDENT               0
+#define CALLING_OVERHEAD_TIMER_DELETE              0
+#define CALLING_OVERHEAD_TIMER_FIRE_AFTER          0
+#define CALLING_OVERHEAD_TIMER_FIRE_WHEN           0
+#define CALLING_OVERHEAD_TIMER_RESET               0
+#define CALLING_OVERHEAD_TIMER_CANCEL              0
+#define CALLING_OVERHEAD_SEMAPHORE_CREATE          0
+#define CALLING_OVERHEAD_SEMAPHORE_IDENT           0
+#define CALLING_OVERHEAD_SEMAPHORE_DELETE          0
+#define CALLING_OVERHEAD_SEMAPHORE_OBTAIN          0
+#define CALLING_OVERHEAD_SEMAPHORE_RELEASE         0
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_CREATE      0
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_IDENT       0
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_DELETE      0
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_SEND        0
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_URGENT      0
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_BROADCAST   0
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_RECEIVE     0
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_FLUSH       0
+
+#define CALLING_OVERHEAD_EVENT_SEND                0
+#define CALLING_OVERHEAD_EVENT_RECEIVE             0
+#define CALLING_OVERHEAD_SIGNAL_CATCH              0
+#define CALLING_OVERHEAD_SIGNAL_SEND               0
+#define CALLING_OVERHEAD_PARTITION_CREATE          0
+#define CALLING_OVERHEAD_PARTITION_IDENT           0
+#define CALLING_OVERHEAD_PARTITION_DELETE          0
+#define CALLING_OVERHEAD_PARTITION_GET_BUFFER      0
+#define CALLING_OVERHEAD_PARTITION_RETURN_BUFFER   0
+#define CALLING_OVERHEAD_REGION_CREATE             0
+#define CALLING_OVERHEAD_REGION_IDENT              0
+#define CALLING_OVERHEAD_REGION_DELETE             0
+#define CALLING_OVERHEAD_REGION_GET_SEGMENT        0
+#define CALLING_OVERHEAD_REGION_RETURN_SEGMENT     0
+#define CALLING_OVERHEAD_PORT_CREATE               0
+#define CALLING_OVERHEAD_PORT_IDENT                0
+#define CALLING_OVERHEAD_PORT_DELETE               0
+#define CALLING_OVERHEAD_PORT_EXTERNAL_TO_INTERNAL 0
+#define CALLING_OVERHEAD_PORT_INTERNAL_TO_EXTERNAL 0
+
+#define CALLING_OVERHEAD_IO_INITIALIZE             0
+#define CALLING_OVERHEAD_IO_OPEN                   0
+#define CALLING_OVERHEAD_IO_CLOSE                  0
+#define CALLING_OVERHEAD_IO_READ                   0
+#define CALLING_OVERHEAD_IO_WRITE                  0
+#define CALLING_OVERHEAD_IO_CONTROL                0
+#define CALLING_OVERHEAD_FATAL_ERROR_OCCURRED      0
+#define CALLING_OVERHEAD_RATE_MONOTONIC_CREATE     0
+#define CALLING_OVERHEAD_RATE_MONOTONIC_IDENT      0
+#define CALLING_OVERHEAD_RATE_MONOTONIC_DELETE     0
+#define CALLING_OVERHEAD_RATE_MONOTONIC_CANCEL     0
+#define CALLING_OVERHEAD_RATE_MONOTONIC_PERIOD     0
+#define CALLING_OVERHEAD_MULTIPROCESSING_ANNOUNCE  0
+
+#endif

c/src/lib/libbsp/m68k/idp/include/leds.h

@@ -0,0 +1,25 @@
+/*
+ * leds.c -- control the led's on a Motorola mc68ec0x0 board.
+ *           Written by rob@cygnus.com (Rob Savoye)
+ */
+
+#ifndef __LEDS_H__
+#define __LEDS_H__
+
+#define LED_ADDR	0xd00003
+#define LED_0           ~0x1
+#define LED_1           ~0x2
+#define LED_2           ~0x4
+#define LED_3           ~0x8
+#define LED_4           ~0x10
+#define LED_5           ~0x20
+#define LED_6           ~0x40
+#define LED_7           ~0x80
+#define LEDS_OFF	0xff
+#define LEDS_ON		0x0
+
+#define FUDGE(x) ((x >= 0xa && x <= 0xf) ? (x + 'a') & 0x7f : (x + '0') & 0x7f)
+
+extern void led_putnum( char );
+
+#endif		/* __LEDS_H__ */

c/src/lib/libbsp/m68k/idp/startup/bspstart.c

@@ -0,0 +1,175 @@
+/*  bsp_start()
+ *
+ *  This routine starts the application.  It includes application,
+ *  board, and monitor specific initialization and configuration.
+ *  The generic CPU dependent initialization has been performed
+ *  before this routine is invoked.
+ * 
+ *  INPUT:  NONE
+ * 
+ *  OUTPUT: NONE
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include "rtems.h"
+#include "bsp.h"
+#include "cpu.h"
+#include "libcsupport.h"
+
+unsigned char *duart_base;
+extern struct duart_regs duart_info;
+
+#define DELAY 5000
+
+void led_putnum();
+
+/*
+ *  The original table from the application and our copy of it with
+ *  some changes.
+ */
+ 
+extern rtems_configuration_table  Configuration;
+rtems_configuration_table         BSP_Configuration;
+
+rtems_cpu_table Cpu_table;
+ 
+/*      Initialize whatever libc we are using
+ *      called from postdriver hook
+ */
+ 
+void bsp_libc_init()
+{
+    extern int end;
+    rtems_unsigned32        heap_start;
+ 
+    heap_start = (rtems_unsigned32) &end;
+    if (heap_start & (CPU_ALIGNMENT-1))
+        heap_start = (heap_start + CPU_ALIGNMENT) & ~(CPU_ALIGNMENT-1);
+ 
+	/* Create 64 KByte memory region for RTEMS executive */
+    RTEMS_Malloc_Initialize((void *) heap_start, 64 * 1024, 0);
+ 
+    /*
+     * Set up for the libc handling.
+     */
+ 
+    if (BSP_Configuration.ticks_per_timeslice > 0)
+        libc_init(1);                /* reentrant if possible */
+	else
+        libc_init(0);                /* non-reentrant */
+ 
+    /*
+     *  Initialize the stack bounds checker
+     */
+ 
+#ifdef STACK_CHECKER_ON
+    Stack_check_Initialize();
+#endif
+}
+ 
+
+int bsp_start(
+  int argc,
+  char **argv,
+  char **environp
+)
+{
+  m68k_isr *monitors_vector_table;
+  int          index;
+
+  duart_base = (unsigned char *)DUART_ADDR;
+
+  /* 
+   *  Set the VBR here to the monitor's default.
+   */
+
+  monitors_vector_table = (m68k_isr *)0;   /* This is where
+											  you set vector base
+											  register = 0 */
+  m68k_set_vbr( monitors_vector_table );
+
+  /* The vector interrupt table for the 680x0 is in appendix B-2 
+	 of the M68000 Family Programmer's reference table */
+  for ( index=2 ; index<=255 ; index++ )
+    M68Kvec[ index ] = monitors_vector_table[ 32 ];
+
+
+  M68Kvec[  2 ] = monitors_vector_table[  2 ];   /* bus error vector */
+  M68Kvec[  4 ] = monitors_vector_table[  4 ];   /* breakpoints vector */
+  M68Kvec[  9 ] = monitors_vector_table[  9 ];   /* trace vector */
+
+  /* 
+   *  Set the VBR here if you do not want to use the monitor's vector table.
+   */
+
+  m68k_set_vbr( &M68Kvec );
+
+  m68k_enable_caching();
+
+  /*
+   *  we only use a hook to get the C library initialized.
+   */
+ 
+  Cpu_table.pretasking_hook = NULL;
+ 
+  Cpu_table.predriver_hook = bsp_libc_init;  /* RTEMS resources available */
+ 
+  Cpu_table.postdriver_hook = NULL;
+ 
+  Cpu_table.idle_task = NULL;  /* do not override system IDLE task */
+
+  Cpu_table.do_zero_of_workspace = TRUE;
+ 
+  Cpu_table.interrupt_vector_table = (m68k_isr *) &M68Kvec;
+ 
+  Cpu_table.interrupt_stack_size = 4096;
+
+  Cpu_table.extra_system_initialization_stack = 0;
+
+  /*
+   *  Copy the table
+   */
+ 
+  BSP_Configuration = Configuration;
+ 
+  BSP_Configuration.work_space_start = (void *)
+     (RAM_END - BSP_Configuration.work_space_size);
+ 
+  /*
+   * Add 1 region for the RTEMS Malloc
+   */
+ 
+  BSP_Configuration.maximum_regions++;
+ 
+  /*
+   * Add 1 extension for newlib libc
+   */
+ 
+#ifdef RTEMS_NEWLIB
+    BSP_Configuration.maximum_extensions++;
+#endif
+ 
+  /*
+   * Add another extension if using the stack checker
+   */
+ 
+#ifdef STACK_CHECKER_ON
+    BSP_Configuration.maximum_extensions++;
+#endif
+ 
+/*  led_putnum('e'); * for debugging purposes only */
+  rtems_initialize_executive( &BSP_Configuration, &Cpu_table );/* does not return */
+ 
+  /* Clock_exit is done as an atexit() function */
+
+  return 0;
+}

c/src/lib/libbsp/m68k/idp/startup/linkcmds

@@ -0,0 +1,44 @@
+/* This file is a derivation of that found with the newlib-1.6 distribution
+ * for the idp.ld file.  That file, it appears, was originally written by
+ * Rob Savoye.  Other ideas came from Joel Sherrill for the RTEMS linkcmds
+ * file (this is basically a mixture of the two).
+ */
+
+/*
+ * Setup the memory map of the MC68ec0x0 Board (IDP)
+ * stack grows up towards high memory. This works for
+ * both the rom68k and the mon68k monitors.
+ */
+MEMORY 
+{
+     ram : org = 0x10000, l = 2M
+}
+
+SECTIONS
+{
+    .text 0x10000:  
+    {
+        text_start = . ;
+        _text_start = . ;
+        *(.text)
+        etext = ALIGN( 0x10 ) ;
+        _etext = .;
+    } 
+    .data ADDR( .text ) + SIZEOF( .text ): 
+    {
+        data_start = . ;
+        _data_start = .;
+        *(.data)
+        edata = ALIGN( 0x10 ) ;
+        _edata = .;
+    }
+    .bss ADDR( .data ) + SIZEOF( .data ): 
+    {
+        bss_start = . ;
+        _bss_start = . ;
+        *(.bss)
+        *(COMMON)
+        end = . ;
+        _end = . ;
+    }  
+}

c/src/lib/libbsp/m68k/idp/timer/timer.c

@@ -0,0 +1,121 @@
+/*  Timer_init()
+ *
+ *  This routine initializes the MC68230 timer on the Motorola IDP board.
+ *
+ *  Input parameters:  NONE
+ *
+ *  Output parameters:  NONE
+ *
+ *  NOTE: This routine will not work if the optimizer is enabled
+ *        for some compilers.  The multiple writes to the MC68230
+ *        may be optimized away.
+ *
+ *        It is important that the timer start/stop overhead be 
+ *        determined when porting or modifying this code.
+ *
+ *  Code Modified for the MC68230 by Doug McBride, Colorado Space Grant College
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+
+#include "rtems.h"
+#include "cpu.h"
+#include "bsp.h"
+#include "mc68230.h"
+
+#define TIMER_VECTOR 0x4D
+
+int Ttimer_val;
+rtems_boolean Timer_driver_Find_average_overhead;
+
+rtems_isr timerisr();
+
+void Timer_initialize()
+{
+  (void) set_vector( timerisr, TIMER_VECTOR, 0 );  /* install ISR */
+  
+  Ttimer_val = 0;                          /* clear timer ISR count */
+
+  /* some PI/T initialization stuff here */
+  /* Set up the interrupt vector on the MC68230 chip:
+     TIVR = TIMER_VECTOR; */
+  MC68230_WRITE (TIVR, TIMER_VECTOR);
+
+  /* Set CPRH through CPRL to maximum count to reduce interrupt overhead
+      CPRH = 0xFF;
+      CPRM = 0xFF;
+      CPRL = 0xFF; */
+  MC68230_WRITE (CPRH, 0xFF);
+  MC68230_WRITE (CPRM, 0xFF);
+  MC68230_WRITE (CPRL, 0xFF);
+
+  /* Enable timer and use it as an external periodic interrupt generator
+      TCR = 0xA1; */
+  MC68230_WRITE (TCR, 0xA1);
+
+}
+
+#define AVG_OVERHEAD      9  /* may not be right -- do this later */
+#define LEAST_VALID       10 /* Don't trust a value lower than this */
+
+int Read_timer() 
+{
+  rtems_unsigned8 data;
+  rtems_unsigned8  msb, osb, lsb;
+  rtems_unsigned32 remaining, total;
+
+  /* Disable timer so that timer can be read
+        data = TCR;
+        TCR = (data & 0xFE); */
+  MC68230_READ (TCR, data);
+  MC68230_WRITE (TCR, (data & 0xFE));
+
+  /* Read the counter value
+        msb = CNTRH;
+        osb = CNTRM;
+        lsb = CNTRL; */
+  MC68230_READ (CNTRH, msb);
+  MC68230_READ (CNTRM, osb);
+  MC68230_READ (CNTRL, lsb);
+
+  /* Calculate the time so far */
+  remaining = 0x1000000 - ((msb << 16) + (osb << 8) + lsb);
+  total = (Ttimer_val * 0x1000000) + remaining;
+
+  /* Enable timer so that timer can continue
+	 	TCR = 0xA1; */
+  MC68230_WRITE (TCR, 0xA1);
+
+  /* do not restore old vector */
+  if ( Timer_driver_Find_average_overhead == 1 )
+    return total;          /* in countdown units */
+
+  if ( total < LEAST_VALID )
+    return 0;            /* below timer resolution */
+   
+  /* Clocked at 6.5 Mhz */
+  /* Avoid floating point problems, be lazy, and return the total minus
+     the average overhead */
+  return (total - AVG_OVERHEAD);
+}
+
+rtems_status_code Empty_function( void )
+{
+  return RTEMS_SUCCESSFUL;
+}
+
+void Set_find_average_overhead(
+  rtems_boolean find_flag
+)
+{
+  Timer_driver_Find_average_overhead = find_flag;
+}

c/src/lib/libbsp/m68k/idp/timer/timerisr.s

@@ -0,0 +1,38 @@
+/*  timer_isr()
+ *
+ *  This routine provides the ISR for the MC68230 timer on the Motorola
+ *  IDP board.   The timer is set up to generate an interrupt at maximum
+ *  intervals.
+ *
+ *  Code modified by Doug McBride, Colorado Space Grant College
+ *  countdown should be loaded automatically
+ *
+ *  Input parameters:  NONE
+ *
+ *  Output parameters:  NONE
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include "asm.h"
+
+BEGIN_CODE
+
+.set TSR,        0x00c0106B         	 | base address of PIT register "TSR"
+
+        PUBLIC (timerisr)
+SYM (timerisr):
+        movb    #1,TSR				 	       | acknowledge interrupt
+        addql   #1, SYM (Ttimer_val)   | increment timer value
+        rte
+
+END_CODE
+END

c/src/lib/libbsp/m68k/mvme136/clock/ckinit.c

@@ -0,0 +1,111 @@
+/*  Clock_init()
+ *
+ *  This routine initializes the Z80386 1 on the MVME136 board.
+ *  The tick frequency is 1 millisecond.
+ *
+ *  Input parameters:  NONE
+ *
+ *  Output parameters:  NONE
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include <stdlib.h>
+
+#include <rtems.h>
+#include <bsp.h>
+#include <clockdrv.h>
+#include <z8036.h>
+
+#define MICRVAL     0xe2            /* disable lower chain, no vec */
+                                    /*  set right justified addr */
+                                    /*  and master int enable */
+#define MCCRVAL     0xc4            /* enable T1 and port B */
+                                    /*   timers independent */
+#define MS_COUNT    0x07d0          /* T1's countdown constant (1 ms) */
+#define T1MSRVAL    0x80            /* T1 cont. cycle/pulse output */
+#define T1CSRVAL    0xc6            /* enable interrupt, allow and */
+                                    /*   and trigger countdown */
+
+rtems_unsigned32 Clock_isrs;        /* ISRs until next tick */
+volatile rtems_unsigned32 Clock_driver_ticks;
+                                    /* ticks since initialization */
+rtems_isr_entry  Old_ticker;
+
+rtems_device_driver Clock_initialize(
+  rtems_device_major_number major,
+  rtems_device_minor_number minor,
+  void *pargp,
+  rtems_id tid,
+  rtems_unsigned32 *rval
+)
+{
+  Install_clock( Clock_isr );
+}
+
+void ReInstall_clock(
+  rtems_isr_entry clock_isr
+)
+{
+  rtems_unsigned32 isrlevel;
+
+  rtems_interrupt_disable( isrlevel );
+   (void) set_vector( clock_isr, 66, 1 );
+  rtems_interrupt_enable( isrlevel );
+}
+
+void Install_clock(
+  rtems_isr_entry clock_isr
+)
+{
+  volatile struct z8036_map *timer;
+
+  Clock_driver_ticks = 0;
+  Clock_isrs = BSP_Configuration.microseconds_per_tick / 1000;
+
+  if ( BSP_Configuration.ticks_per_timeslice ) {
+    Old_ticker = (rtems_isr_entry) set_vector( clock_isr, 66, 1 );
+    timer = (struct z8036_map *) 0xfffb0000;
+    timer->MASTER_INTR        = MICRVAL;
+    timer->CT1_MODE_SPEC      = T1MSRVAL;
+
+  *((rtems_unsigned16 *)0xfffb0016) = MS_COUNT;  /* write countdown value */
+/*
+    timer->CT1_TIME_CONST_MSB = (MS_COUNT >> 8);
+    timer->CT1_TIME_CONST_LSB = (MS_COUNT &  0xff);
+*/
+    timer->MASTER_CFG         = MCCRVAL;
+    timer->CT1_CMD_STATUS     = T1CSRVAL;
+
+/*
+ * Enable interrupt via VME interrupt mask register
+ */
+    (*(rtems_unsigned8 *)0xfffb0038) &= 0xfd;
+
+
+    atexit( Clock_exit );
+  }
+
+}
+
+void Clock_exit( void )
+{
+  volatile struct z8036_map *timer;
+
+  if ( BSP_Configuration.ticks_per_timeslice ) {
+    timer = (struct z8036_map *) 0xfffb0000;
+    timer->MASTER_INTR        = 0x62;
+    timer->CT1_MODE_SPEC      = 0x00;
+    timer->MASTER_CFG         = 0xf4;
+    timer->CT1_CMD_STATUS     = 0x00;
+    /* do not restore old vector */
+  }
+}

c/src/lib/libbsp/m68k/mvme136/console/console.c

@@ -0,0 +1,159 @@
+/*
+ *  This file contains the MVME136 console IO package.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#define M136_INIT
+
+#include <rtems.h>
+#include "console.h"
+#include "bsp.h"
+
+/*  console_initialize
+ *
+ *  This routine initializes the console IO driver.
+ *
+ *  Input parameters: NONE
+ *
+ *  Output parameters:  NONE
+ *
+ *  Return values:
+ */
+
+rtems_device_driver console_initialize(
+  rtems_device_major_number  major,
+  rtems_device_minor_number  minor,
+  void                      *arg,
+  rtems_id                   self,
+  rtems_unsigned32          *status
+)
+{
+  _Write_m681 = ( struct w_m681_info * ) M681ADDR;
+  _Read_m681 = ( struct r_m681_info * ) M681ADDR;
+  *status = RTEMS_SUCCESSFUL;
+}
+
+
+/*  is_character_ready
+ *
+ *  This routine returns TRUE if a character is available.
+ *
+ *  Input parameters: NONE
+ *
+ *  Output parameters:  NONE
+ *
+ *  Return values:
+ */
+
+rtems_boolean is_character_ready(
+  char *ch
+)
+{
+  if ( !(_Read_m681->srb & RXRDYB) )
+    return(FALSE);
+
+  *ch = _Read_m681->rbb;
+  return(TRUE);
+}
+
+/*  inbyte
+ *
+ *  This routine reads a character from the UART.
+ *
+ *  Input parameters: NONE
+ *
+ *  Output parameters:  NONE
+ *
+ *  Return values:
+ *    character read from UART
+ */
+
+char inbyte( void )
+{
+  while ( !(_Read_m681->srb & RXRDYB) );
+  return _Read_m681->rbb;
+}
+
+
+/*  outbyte
+ *
+ *  This routine transmits a character out the M68681.  It supports
+ *  XON/XOFF flow control.
+ *
+ *  Input parameters:
+ *    ch  - character to be transmitted
+ *
+ *  Output parameters:  NONE
+ */
+
+void outbyte(
+  char ch
+)
+{
+  while ( ! (_Read_m681->srb & TXRDYB) ) ;
+  while ( _Read_m681->srb & RXRDYB )        /* must be an XOFF */
+    if ( _Read_m681->rbb == XOFF )
+      do {
+        while ( ! (_Read_m681->srb & RXRDYB) ) ;
+      } while ( _Read_m681->rbb != XON );
+
+  _Write_m681->tbb = ch;
+  if ( ch == '\n' )
+    outbyte( CR );
+}
+
+/*
+ * __read  -- read bytes from the serial port. Ignore fd, since
+ *            we only have stdin.
+ */
+
+int __read(
+  int fd,
+  char *buf,
+  int nbytes
+)
+{
+  int i = 0;
+
+  for (i = 0; i < nbytes; i++) {
+    *(buf + i) = inbyte();
+    if ((*(buf + i) == '\n') || (*(buf + i) == '\r')) {
+      (*(buf + i++)) = '\n';
+      (*(buf + i)) = 0;
+      break;
+    }
+  }
+  return (i);
+}
+
+/*
+ * __write -- write bytes to the serial port. Ignore fd, since
+ *            stdout and stderr are the same. Since we have no filesystem,
+ *            open will only return an error.
+ */
+
+int __write(
+  int fd,
+  char *buf,
+  int nbytes
+)
+{
+  int i;
+
+  for (i = 0; i < nbytes; i++) {
+    if (*(buf + i) == '\n') {
+      outbyte ('\r');
+    }
+    outbyte (*(buf + i));
+  }
+  return (nbytes);
+}

c/src/lib/libbsp/m68k/mvme136/include/bsp.h

@@ -0,0 +1,142 @@
+/*  bsp.h
+ *
+ *  This include file contains all MVME136 board IO definitions.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#ifndef __MVME136_h
+#define __MVME136_h
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <rtems.h>
+#include <iosupp.h>
+
+/*
+ *  Define the time limits for RTEMS Test Suite test durations.
+ *  Long test and short test duration limits are provided.  These
+ *  values are in seconds and need to be converted to ticks for the
+ *  application.
+ *
+ */
+
+#define MAX_LONG_TEST_DURATION       300 /* 5 minutes = 300 seconds */
+#define MAX_SHORT_TEST_DURATION      3   /* 3 seconds */
+
+/*
+ *  Define the interrupt mechanism for Time Test 27
+ *
+ *  NOTE: Use the MPCSR vector for the MVME136
+ */
+
+#define MUST_WAIT_FOR_INTERRUPT 0
+
+#define Install_tm27_vector( handler ) set_vector( (handler), 75, 1 )
+
+#define Cause_tm27_intr()  (*(volatile rtems_unsigned8 *)0xfffb006b) = 0x80
+
+#define Clear_tm27_intr()  (*(volatile rtems_unsigned8 *)0xfffb006b) = 0x00
+
+#define Lower_tm27_intr()
+
+/*
+ *  Simple spin delay in microsecond units for device drivers.
+ *  This is very dependent on the clock speed of the target.
+ */
+
+#define delay( microseconds ) \
+  { register rtems_unsigned32 _delay=(microseconds); \
+    register rtems_unsigned32 _tmp=123; \
+    asm volatile( "0: \
+                     nbcd      %0 ; \
+                     nbcd      %0 ; \
+                     dbf       %1,0b" \
+                  : "=d" (_tmp), "=d" (_delay) \
+                  : "0"  (_tmp), "1"  (_delay) ); \
+  }
+
+/* Constants */
+
+#define RAM_START 0
+#define RAM_END   0x100000
+
+#define M681ADDR      0xfffb0040         /* address of the M68681 chip */
+#define RXRDYB        0x01               /* status reg recv ready mask */
+#define TXRDYB        0x04               /* status reg trans ready mask */
+#define PARITYERR     0x20               /* status reg parity error mask */
+#define FRAMEERR      0x40               /* status reg frame error mask */
+
+
+#define FOREVER       1                  /* infinite loop */
+
+/* Structures */
+
+struct r_m681_info {
+  char fill1[ 5 ];                       /* channel A regs ( not used ) */
+  char isr;                              /* interrupt status reg */
+  char fill2[ 2 ];                       /* counter regs (not used) */
+  char mr1mr2b;                          /* MR1B and MR2B regs */
+  char srb;                              /* status reg channel B */
+  char fill3;                            /* do not access */
+  char rbb;                              /* receive buffer channel B */
+  char ivr;                              /* interrupt vector register */
+};
+
+struct w_m681_info {
+  char fill1[ 4 ];                       /* channel A regs (not used) */
+  char acr;                              /* auxillary control reg */
+  char imr;                              /* interrupt mask reg */
+  char fill2[ 2 ];                       /* counter regs (not used) */
+  char mr1mr2b;                          /* MR1B and MR2B regs */
+  char csrb;                             /* clock select reg */
+  char crb;                              /* command reg */
+  char tbb;                              /* transmit buffer channel B */
+  char ivr;                              /* interrupt vector register */
+};
+
+#ifdef M136_INIT
+#undef EXTERN
+#define EXTERN
+#else
+#undef EXTERN
+#define EXTERN extern
+#endif
+
+/* miscellaneous stuff assumed to exist */
+
+extern rtems_configuration_table BSP_Configuration;
+
+/* M68681 DUART chip register variables */
+
+EXTERN volatile struct r_m681_info *_Read_m681;  /* M68681 read registers */
+EXTERN volatile struct w_m681_info *_Write_m681; /* M68681 write registers */
+
+extern m68k_isr     M68Kvec[];   /* vector table address */
+
+/* functions */
+
+void bsp_cleanup( void );
+
+m68k_isr set_vector(
+  rtems_isr_entry     handler,
+  rtems_vector_number vector,
+  int                 type
+);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+/* end of include file */

c/src/lib/libbsp/m68k/mvme136/include/coverhd.h

@@ -0,0 +1,104 @@
+/* coverhd.h
+ *
+ *  This include file has defines to represent the overhead associated
+ *  with calling a particular directive from C on this target.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#ifndef __COVERHD_h
+#define __COVERHD_h
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define CALLING_OVERHEAD_INITIALIZE_EXECUTIVE      2
+#define CALLING_OVERHEAD_SHUTDOWN_EXECUTIVE        1
+#define CALLING_OVERHEAD_TASK_CREATE               3
+#define CALLING_OVERHEAD_TASK_IDENT                2
+#define CALLING_OVERHEAD_TASK_START                2
+#define CALLING_OVERHEAD_TASK_RESTART              2
+#define CALLING_OVERHEAD_TASK_DELETE               1
+#define CALLING_OVERHEAD_TASK_SUSPEND              1
+#define CALLING_OVERHEAD_TASK_RESUME               2
+#define CALLING_OVERHEAD_TASK_SET_PRIORITY         2
+#define CALLING_OVERHEAD_TASK_MODE                 2
+#define CALLING_OVERHEAD_TASK_GET_NOTE             2
+#define CALLING_OVERHEAD_TASK_SET_NOTE             2
+#define CALLING_OVERHEAD_TASK_WAKE_WHEN            4
+#define CALLING_OVERHEAD_TASK_WAKE_AFTER           1
+#define CALLING_OVERHEAD_INTERRUPT_CATCH           2
+#define CALLING_OVERHEAD_CLOCK_GET                 5
+#define CALLING_OVERHEAD_CLOCK_SET                 4
+#define CALLING_OVERHEAD_CLOCK_TICK                1
+
+#define CALLING_OVERHEAD_TIMER_CREATE              2
+#define CALLING_OVERHEAD_TIMER_IDENT               1
+#define CALLING_OVERHEAD_TIMER_DELETE              2
+#define CALLING_OVERHEAD_TIMER_FIRE_AFTER          2
+#define CALLING_OVERHEAD_TIMER_FIRE_WHEN           5
+#define CALLING_OVERHEAD_TIMER_RESET               1
+#define CALLING_OVERHEAD_TIMER_CANCEL              1
+#define CALLING_OVERHEAD_SEMAPHORE_CREATE          3
+#define CALLING_OVERHEAD_SEMAPHORE_DELETE          1
+#define CALLING_OVERHEAD_SEMAPHORE_IDENT           2
+#define CALLING_OVERHEAD_SEMAPHORE_OBTAIN          2
+#define CALLING_OVERHEAD_SEMAPHORE_RELEASE         1
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_CREATE      2
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_IDENT       2
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_DELETE      1
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_SEND        2
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_URGENT      2
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_BROADCAST   2
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_RECEIVE     3
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_FLUSH       2
+
+#define CALLING_OVERHEAD_EVENT_SEND                2
+#define CALLING_OVERHEAD_EVENT_RECEIVE             2
+#define CALLING_OVERHEAD_SIGNAL_CATCH              2
+#define CALLING_OVERHEAD_SIGNAL_SEND               2
+#define CALLING_OVERHEAD_PARTITION_CREATE          3
+#define CALLING_OVERHEAD_PARTITION_IDENT           2
+#define CALLING_OVERHEAD_PARTITION_DELETE          1
+#define CALLING_OVERHEAD_PARTITION_GET_BUFFER      2
+#define CALLING_OVERHEAD_PARTITION_RETURN_BUFFER   2
+#define CALLING_OVERHEAD_REGION_CREATE             3
+#define CALLING_OVERHEAD_REGION_IDENT              2
+#define CALLING_OVERHEAD_REGION_DELETE             2
+#define CALLING_OVERHEAD_REGION_GET_SEGMENT        3
+#define CALLING_OVERHEAD_REGION_RETURN_SEGMENT     2
+#define CALLING_OVERHEAD_PORT_CREATE               3
+#define CALLING_OVERHEAD_PORT_IDENT                2
+#define CALLING_OVERHEAD_PORT_DELETE               1
+#define CALLING_OVERHEAD_PORT_EXTERNAL_TO_INTERNAL 2
+#define CALLING_OVERHEAD_PORT_INTERNAL_TO_EXTERNAL 2
+
+#define CALLING_OVERHEAD_IO_INITIALIZE             2
+#define CALLING_OVERHEAD_IO_OPEN                   2
+#define CALLING_OVERHEAD_IO_CLOSE                  3
+#define CALLING_OVERHEAD_IO_READ                   2
+#define CALLING_OVERHEAD_IO_WRITE                  2
+#define CALLING_OVERHEAD_IO_CONTROL                2
+#define CALLING_OVERHEAD_FATAL_ERROR_OCCURRED      1
+#define CALLING_OVERHEAD_RATE_MONOTONIC_CREATE     2
+#define CALLING_OVERHEAD_RATE_MONOTONIC_IDENT      2
+#define CALLING_OVERHEAD_RATE_MONOTONIC_DELETE     1
+#define CALLING_OVERHEAD_RATE_MONOTONIC_CANCEL     1
+#define CALLING_OVERHEAD_RATE_MONOTONIC_PERIOD     2
+#define CALLING_OVERHEAD_MULTIPROCESSING_ANNOUNCE  1
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+/* end of include file */

c/src/lib/libbsp/m68k/mvme136/shmsupp/addrconv.c

@@ -0,0 +1,32 @@
+/*  Shm_Convert_address
+ *
+ *  This MVME136 has a "normal" view of the VME address space.
+ *  No address range conversion is required.
+ *
+ *  Input parameters:
+ *    address - address to convert
+ *
+ *  Output parameters:
+ *    returns - converted address
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include <rtems.h>
+#include <bsp.h>
+#include <shm.h>
+
+void *Shm_Convert_address(
+  void *address
+)
+{
+  return ( address );
+}

c/src/lib/libbsp/m68k/mvme136/shmsupp/getcfg.c

@@ -0,0 +1,85 @@
+/*  void Shm_Get_configuration( localnode, &shmcfg )
+ *
+ *  This routine initializes, if necessary, and returns a pointer
+ *  to the Shared Memory Configuration Table for the Cyclone CVME961.
+ *
+ *  INPUT PARAMETERS:
+ *    localnode - local node number
+ *    shmcfg    - address of pointer to SHM Config Table
+ *
+ *  OUTPUT PARAMETERS:
+ *    *shmcfg   - pointer to SHM Config Table
+ *
+ *  NOTES:  The MPCSR interrupt on the MVME136 is used as an interprocessor
+ *          interrupt.   The capablities of the MPCSR are used to generate
+ *          interprocessor interrupts for up to eight nodes.
+ *
+ *          The following table illustrates the configuration limitations:
+ *
+ *                                   BUS     MAX
+ *                          MODE    ENDIAN  NODES
+ *                        ========= ====== =======
+ *                         POLLED   LITTLE  2+
+ *                        INTERRUPT LITTLE  2-8
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include <rtems.h>
+#include "shm.h"
+
+#define INTERRUPT 1                   /* MVME136 target supports both */
+#define POLLING   0                   /* polling and interrupt modes  */
+
+shm_config_table BSP_shm_cfgtbl;
+
+rtems_unsigned32 *BSP_int_address()
+{
+  rtems_unsigned32 id, offset;
+
+  id      = (rtems_unsigned32) *(rtems_unsigned8 *)0xfffb0061;
+  offset  = ((id & 0x1f) << 5) | ((id & 0xe0) << 8);
+  offset |= 0xffff000b;
+  return( (rtems_unsigned32 * ) offset );
+}
+
+void Shm_Get_configuration(
+  rtems_unsigned32   localnode,
+  shm_config_table **shmcfg
+)
+{
+   BSP_shm_cfgtbl.base         = (rtems_unsigned32 *)0x20000000;
+   BSP_shm_cfgtbl.length       = 1 * MEGABYTE;
+   BSP_shm_cfgtbl.format       = SHM_BIG;
+
+   BSP_shm_cfgtbl.cause_intr   = Shm_Cause_interrupt;
+
+#ifdef NEUTRAL_BIG
+   BSP_shm_cfgtbl.convert      = NULL_CONVERT;
+#else
+   BSP_shm_cfgtbl.convert      = CPU_swap_u32;
+#endif
+
+#if (POLLING==1)
+   BSP_shm_cfgtbl.poll_intr    = POLLED_MODE;
+   BSP_shm_cfgtbl.Intr.address = NO_INTERRUPT;
+   BSP_shm_cfgtbl.Intr.value   = NO_INTERRUPT;
+   BSP_shm_cfgtbl.Intr.length  = NO_INTERRUPT;
+#else
+   BSP_shm_cfgtbl.poll_intr    = INTR_MODE;
+   BSP_shm_cfgtbl.Intr.address = BSP_int_address();
+   BSP_shm_cfgtbl.Intr.value   = 0x80;
+   BSP_shm_cfgtbl.Intr.length  = BYTE;
+#endif
+
+   *shmcfg = &BSP_shm_cfgtbl;
+
+}

c/src/lib/libbsp/m68k/mvme136/shmsupp/lock.c

@@ -0,0 +1,75 @@
+/*  Shared Memory Lock Routines
+ *
+ *  This shared memory locked queue support routine need to be
+ *  able to lock the specified locked queue.  Interrupts are
+ *  disabled while the queue is locked to prevent preemption
+ *  and deadlock when two tasks poll for the same lock.
+ *  previous level.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include <rtems.h>
+#include <bsp.h>
+#include <shm.h>
+
+/*
+ *  Shm_Initialize_lock
+ *
+ *  Initialize the lock for the specified locked queue.
+ */
+
+void Shm_Initialize_lock(
+  Shm_Locked_queue_Control *lq_cb
+)
+{
+  lq_cb->lock = LQ_UNLOCKED;
+}
+
+/*  void _Shm_Lock( &lq_cb )
+ *
+ *  This shared memory locked queue support routine locks the
+ *  specified locked queue.  It disables interrupts to prevent
+ *  a deadlock condition.
+ */
+
+void Shm_Lock(
+  Shm_Locked_queue_Control *lq_cb
+)
+{
+  rtems_unsigned32 isr_level;
+  rtems_unsigned32 *lockptr = (rtems_unsigned32 *)&lq_cb->lock;
+
+  rtems_interrupt_disable( isr_level );
+    Shm_isrstat = isr_level;
+    asm volatile( "lockit:"    : : );
+    asm volatile( "tas %0@"    : "=a" (lockptr) : "0" (lockptr) );
+    asm volatile( "bne lockit" : : );
+/* should delay */
+}
+
+/*
+ *  Shm_Unlock
+ *
+ *  Unlock the lock for the specified locked queue.
+ */
+
+void Shm_Unlock(
+  Shm_Locked_queue_Control *lq_cb
+)
+{
+  rtems_unsigned32 isr_level;
+
+  lq_cb->lock = SHM_UNLOCK_VALUE;
+  isr_level = Shm_isrstat;
+  rtems_interrupt_enable( isr_level );
+}
+

c/src/lib/libbsp/m68k/mvme136/shmsupp/mpisr.c

@@ -0,0 +1,42 @@
+/*  Shm_isr_mvme136()
+ *
+ *  NOTE: This routine is not used when in polling mode.  Either
+ *        this routine OR Shm_clockisr is used in a particular system.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include <rtems.h>
+#include <bsp.h>
+#include <shm.h>
+
+rtems_isr Shm_isr_mvme136()
+{
+  Shm_Interrupt_count += 1;
+  rtems_multiprocessing_announce();
+  (*(volatile rtems_unsigned8 *)0xfffb006b) = 0; /* clear MPCSR intr */
+}
+
+/*  void _Shm_setvec( )
+ *
+ *  This driver routine sets the SHM interrupt vector to point to the
+ *  driver's SHM interrupt service routine.
+ *
+ *  Input parameters:  NONE
+ *
+ *  Output parameters: NONE
+ */
+
+void Shm_setvec()
+{
+  /* may need to disable intr */
+  set_vector( Shm_isr_mvme136, 75, 1 );
+}

c/src/lib/libbsp/m68k/mvme136/startup/bspclean.c

@@ -0,0 +1,46 @@
+/*
+ *  This routine returns control to 135Bug.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include <rtems.h>
+#include <bsp.h>
+#include <clockdrv.h>
+#include <z8036.h>
+
+void bsp_return_to_monitor_trap()
+{
+  extern void start( void  );
+
+  register volatile void *start_addr;
+
+  m68k_set_vbr( 0 );                /* restore 135Bug vectors */
+  asm volatile( "trap   #15"  );    /* trap to 135Bug */
+  asm volatile( ".short 0x63" );    /* return to 135Bug (.RETURN) */
+                                    /* restart program */
+  start_addr = start;
+
+  asm volatile ( "jmp %0@" : "=a" (start_addr) : "0" (start_addr) );
+}
+
+#define TIMER   0xfffb0000
+
+void bsp_cleanup( void )
+{
+   Z8x36_WRITE( TIMER, MASTER_INTR,    0x62 );   /* redo timer */
+   Z8x36_WRITE( TIMER, CT1_MODE_SPEC,  0x00 );
+   Z8x36_WRITE( TIMER, MASTER_CFG,     0xf4 );
+   Z8x36_WRITE( TIMER, CT1_CMD_STATUS, 0x00 );
+
+   M68Kvec[ 45 ] = bsp_return_to_monitor_trap;   /* install handler */
+   asm volatile( "trap #13" );  /* insures SUPV mode */
+}

c/src/lib/libbsp/m68k/mvme136/startup/bspstart.c

@@ -0,0 +1,156 @@
+/*  bsp_start()
+ *
+ *  This routine starts the application.  It includes application,
+ *  board, and monitor specific initialization and configuration.
+ *  The generic CPU dependent initialization has been performed
+ *  before this routine is invoked.
+ *
+ *  INPUT:  NONE
+ *
+ *  OUTPUT: NONE
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include <rtems.h>
+#include <bsp.h>
+#include <libcsupport.h>
+#include <z8036.h>
+
+#include "stackchk.h"
+
+/*
+ *  The original table from the application and our copy of it with
+ *  some changes.
+ */
+
+extern rtems_configuration_table  Configuration;
+rtems_configuration_table         BSP_Configuration;
+
+rtems_cpu_table Cpu_table;
+
+/*      Initialize whatever libc we are using
+ *      called from postdriver hook
+ */
+
+void bsp_libc_init()
+{
+    extern int end;
+    rtems_unsigned32        heap_start;
+
+    heap_start = (rtems_unsigned32) &end;
+    if (heap_start & (CPU_ALIGNMENT-1))
+        heap_start = (heap_start + CPU_ALIGNMENT) & ~(CPU_ALIGNMENT-1);
+
+    RTEMS_Malloc_Initialize((void *) heap_start, 64 * 1024, 0);
+
+    /*
+     * Set up for the libc handling.
+     */
+
+    if (BSP_Configuration.ticks_per_timeslice > 0)
+        libc_init(1);                /* reentrant if possible */
+    else
+        libc_init(0);                /* non-reentrant */
+
+    /*
+     *  Initialize the stack bounds checker
+     */
+
+#ifdef STACK_CHECKER_ON
+    Stack_check_Initialize();
+#endif
+}
+
+int bsp_start(
+  int argc,
+  char **argv,
+  char **environp
+)
+{
+  m68k_isr *monitors_vector_table;
+  int       index;
+
+  monitors_vector_table = (m68k_isr *)0;   /* 135Bug Vectors are at 0 */
+  m68k_set_vbr( monitors_vector_table );
+
+  for ( index=2 ; index<=255 ; index++ )
+    M68Kvec[ index ] = monitors_vector_table[ 32 ];
+
+  M68Kvec[  2 ] = monitors_vector_table[  2 ];   /* bus error vector */
+  M68Kvec[  4 ] = monitors_vector_table[  4 ];   /* breakpoints vector */
+  M68Kvec[  9 ] = monitors_vector_table[  9 ];   /* trace vector */
+  M68Kvec[ 47 ] = monitors_vector_table[ 47 ];   /* system call vector */
+
+  m68k_set_vbr( &M68Kvec );
+
+  (*(rtems_unsigned8 *)0xfffb0067) = 0x7f; /* make VME access round-robin */
+
+  m68k_enable_caching();
+
+  /*
+   *  we only use a hook to get the C library initialized.
+   */
+
+  Cpu_table.pretasking_hook = NULL;
+
+  Cpu_table.predriver_hook = bsp_libc_init;  /* RTEMS resources available */
+
+  Cpu_table.postdriver_hook = NULL;
+
+  Cpu_table.idle_task = NULL;  /* do not override system IDLE task */
+
+  Cpu_table.do_zero_of_workspace = TRUE;
+
+  Cpu_table.interrupt_vector_table = (m68k_isr *) &M68Kvec;
+
+  Cpu_table.interrupt_stack_size = 4096;
+
+  Cpu_table.extra_system_initialization_stack = 0;
+
+  /*
+   *  Copy the table
+   */
+
+  BSP_Configuration = Configuration;
+
+  BSP_Configuration.work_space_start = (void *)
+     (RAM_END - BSP_Configuration.work_space_size);
+
+  /*
+   * Add 1 region for the RTEMS Malloc
+   */
+
+  BSP_Configuration.maximum_regions++;
+
+  /*
+   * Add 1 extension for newlib libc
+   */
+
+#ifdef RTEMS_NEWLIB
+    BSP_Configuration.maximum_extensions++;
+#endif
+
+  /*
+   * Add another extension if using the stack checker
+   */
+
+#ifdef STACK_CHECKER_ON
+    BSP_Configuration.maximum_extensions++;
+#endif
+
+  rtems_initialize_executive( &BSP_Configuration, &Cpu_table );
+  /* does not return */
+
+  bsp_cleanup();
+
+  return 0;
+}

c/src/lib/libbsp/m68k/mvme136/startup/linkcmds

@@ -0,0 +1,48 @@
+/*
+ *  This file contains directives for the GNU linker which are specific
+ *  to the Motorola MVME136/MVME135 boards.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+MEMORY
+	{
+	ram : org = 0x3000, l = 1M
+	}
+
+SECTIONS
+{
+        .text 0x3000 :
+	{
+	    text_start = . ;
+	    _text_start = . ;
+            *(.text)
+	    etext = ALIGN( 0x10 ) ;
+	    _etext = .;
+        }
+        .data ADDR( .text ) + SIZEOF( .text ):
+	{
+	    data_start = . ;
+            _data_start = .;
+            *(.data)
+	    edata = ALIGN( 0x10 ) ;
+            _edata = .;
+        }
+        .bss ADDR( .data ) + SIZEOF( .data ):
+        {
+	    bss_start = . ;
+	    _bss_start = . ;
+	    *(.bss)
+	    *(COMMON)
+	    end = . ;
+	    _end = . ;
+	}
+}

c/src/lib/libbsp/m68k/mvme136/timer/timer.c

@@ -0,0 +1,108 @@
+/*  Timer_init()
+ *
+ *  This routine initializes the Z8036 timer on the MVME136 board.
+ *
+ *  Input parameters:  NONE
+ *
+ *  Output parameters:  NONE
+ *
+ *  NOTE: This routine will not work if the optimizer is enabled
+ *        for some compilers.  The multiple writes to the Z8036
+ *        may be optimized away.
+ *
+ *        It is important that the timer start/stop overhead be
+ *        determined when porting or modifying this code.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+
+#include <rtems.h>
+#include <bsp.h>
+#include <z8036.h>
+
+#define TIMER 0xfffb0000   /* address of Z8036 on MVME136 */
+
+int Ttimer_val;
+rtems_boolean Timer_driver_Find_average_overhead;
+
+rtems_isr timerisr();
+
+void Timer_initialize()
+{
+  (void) set_vector( timerisr, 66, 0 );       /* install ISR */
+
+  Ttimer_val = 0;                             /* clear timer ISR count */
+  Z8x36_WRITE( TIMER, MASTER_INTR, 0x01 ); /* reset */
+  Z8x36_WRITE( TIMER, MASTER_INTR, 0x00 ); /* clear reset */
+  Z8x36_WRITE( TIMER, MASTER_INTR, 0xe2 ); /* disable lower chain, no vec */
+                                           /*  set right justified addr */
+                                              /*  and master int enable */
+  Z8x36_WRITE( TIMER, CT1_MODE_SPEC,  0x80 ); /* T1 continuous, and   */
+                                              /* cycle/pulse output   */
+
+  *((rtems_unsigned16 *)0xfffb0016) = 0x0000; /* write countdown value */
+/*
+  Z8x36_WRITE( TIMER, CT1_TIME_CONST_MSB, 0x00 );
+  Z8x36_WRITE( TIMER, CT1_TIME_CONST_LSB, 0x00 );
+*/
+  Z8x36_WRITE( TIMER, MASTER_CFG,         0xc4 ); /* enable timer1        */
+
+  Z8x36_WRITE( TIMER, CT1_CMD_STATUS,     0xc6 ); /* set INTR enable (IE), */
+                                                 /*  trigger command      */
+                                                 /*  (TCB) and gate       */
+                                                 /* command (GCB) bits    */
+  *((rtems_unsigned8 *)0xfffb0038) &= 0xfd;      /* enable timer INTR on  */
+                                                 /*    VME controller     */
+}
+
+#define AVG_OVERHEAD      6  /* It typically takes 3.0 microseconds */
+                             /* (6 countdowns) to start/stop the timer. */
+#define LEAST_VALID       10 /* Don't trust a value lower than this */
+
+int Read_timer()
+{
+/*
+  rtems_unsigned8  msb, lsb;
+*/
+  rtems_unsigned32 remaining, total;
+
+  Z8x36_WRITE( TIMER, CT1_CMD_STATUS,  0xce ); /* read the counter value */
+remaining = 0xffff - *((rtems_unsigned16 *) 0xfffb0010);
+/*
+  Z8x36_READ(  TIMER, CT1_CUR_CNT_MSB, msb );
+  Z8x36_READ(  TIMER, CT1_CUR_CNT_LSB, lsb );
+
+  remaining = 0xffff - ((msb << 8) + lsb);
+*/
+  total = (Ttimer_val * 0x10000) + remaining;
+
+  if ( Timer_driver_Find_average_overhead == 1 )
+    return total;          /* in one-half microsecond units */
+
+  else {
+    if ( total < LEAST_VALID )
+      return 0;            /* below timer resolution */
+    return (total-AVG_OVERHEAD) >> 1;
+  }
+}
+
+rtems_status_code Empty_function( void )
+{
+  return RTEMS_SUCCESSFUL;
+}
+
+void Set_find_average_overhead(
+  rtems_boolean find_flag
+)
+{
+  Timer_driver_Find_average_overhead = find_flag;
+}

c/src/lib/libbsp/m68k/mvme136/timer/timerisr.s

@@ -0,0 +1,39 @@
+#  timer_isr()
+#
+#  This routine provides the ISR for the Z8036 timer on the MVME136
+#  board.   The timer is set up to generate an interrupt at maximum
+#  intervals.
+#
+#  Input parameters:  NONE
+#
+#  Output parameters:  NONE
+#
+#  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+#  On-Line Applications Research Corporation (OAR).
+#  All rights assigned to U.S. Government, 1994.
+#
+#  This material may be reproduced by or for the U.S. Government pursuant
+#  to the copyright license under the clause at DFARS 252.227-7013.  This
+#  notice must appear in all copies of this file and its derivatives.
+#
+#  $Id$
+#
+
+#include "asm.h"
+
+BEGIN_CODE
+
+.set CT1_CMD_STATUS,  0xfffb000a         | port A
+.set RELOAD,          0x24               | clr IP & IUS,allow countdown
+
+        PUBLIC (timerisr)
+SYM (timerisr):
+        movl    a0,a7@-                  | save a0
+        movl    #CT1_CMD_STATUS,a0       | a0 = addr of cmd status reg
+        movb    #RELOAD,a0@              | reload countdown
+        addql   #1, SYM (Ttimer_val)     | increment timer value
+        movl    a7@+,a0                  | save a0
+        rte
+
+END_CODE
+END

c/src/lib/libbsp/m68k/mvme162/README

@@ -0,0 +1,124 @@
+--
+--  EISCAT Scientific Association. M.Savitski
+--
+--  This material is a part of the MVME162 Board Support Package
+--  for the RTEMS executive. Its licensing policies are those of the
+--  RTEMS distribution.
+--
+--  Updated by Joel Sherrill (jsherril@redstone.army.mil) after
+--  inclusion in the standard release.
+--
+--  $Id$
+--
+
+This is a README file for the MVME162 port of RTEMS.
+
+Disclaimer
+----------
+This is my first attempt at porting RTEMS. The resulting code obviously
+contains bugs (know and unknown) and limitations. I assume no
+responsibility for quality and support of the software in question.
+
+Now on more optimistic note:
+
+I have run most of the standard RTEMS sptests, and neither of them
+failed. My present (short) experience of developing RTEMS applications
+is essentially positive and suggestive of a long-term commitment. In
+any case I am ready to answer questions regarding the port and intend
+to follow the future RTEMS versions. I will do my best to provide
+whatever support I can afford time-wise.
+
+Installation
+------------
+Nothing unique to the MVME162.  It has been incorporated into the
+standard release.
+
+Port Description
+----------------
+The port was done using already existing ports to the M68020 boards,
+DMV152 and MVME136.
+
+The host system was SUN/Solaris 2.3, and the cross-development
+environment consisted of Free Software Foundation (FSF)'s GNU C
+compiler (version 2.6), GNU Assembler (version 2.3) and GNU binary
+utilities binutils version 2.5.2, built with m68k as a target. The
+recent/latest versions of other GNU programs (flex, make, etc) were
+also used at the build stage.
+
+In all subdirectories of the RTEMS distribution tree, the directories
+mvme136 were duplicated as mvme162.
+
+Essential modifications are detailed below:
+
+- the MVME162-specific hardware registers were described in bsp.h
+
+- timer and clock routines were made to use the MVME162's Tick Timers 1
+and 2, respectively
+
+- shared memory support was replaced by stubs for the time being
+
+- console IO was lifted entirely from the DMV152 support code, thanks
+to the fact that Z8530 SCC used in DMV152 is upwards compatible with
+the Z85230 SCC of the MVME162. (Only the memory mapping of the SCC
+registers had to be changed.)
+
+- symbols in several *.s files were prepended with underscores to
+comply with the xgcc configuration used (it prepends underscores to all
+symbols defined in c code)
+
+- linkcmds file was modified to place the linked code into the memory
+configured for the board in use
+
+- bspstart.c was modified as follows:
+
+         monitors_vector_table = (m68k_isr *)0xFFE00000;
+
+was made to point to the power-up location of MVME162 interrupt vector
+table.
+
+- The shutdown is a temporary solution. To exit cleanly, it has to disable
+all enabled interrupts and restore the board to its power-up status.
+Presently this is not done satisfactorily, as a result, the board needs
+a hardware reset from the external VMEbus master or from the front
+panel to ensure correct operation for subsequent downloads.
+
+Host System
+-----------
+The VMEbus master used to externally control and download the MVME162
+is a FORCE CPU-2CE board running Solaris 2.3. A simple program to load
+s-records and start/reset the MVME162 was written. The code is in the
+file tools/sload.c
+
+This code depends on the external VMEbus master's vme driver and is
+provided as an example, without the Makefile. The bulk of the program
+which parses the s-records is courtesy of Kym Newbery,
+(8918927y@lux.levels.unisa.edu.au).
+
+In general, apart from x-gcc, the tools most often used while building
+RTEMS for MVME162 were: find, grep, diff, and, of course
+
+MVME162 Embedded Controller Programmer's Reference Guide,
+Motorola, MVME162PG/D1.
+
+Thanks
+------
+- to On-Line Applications Research Corporation (OAR) for developing
+RTEMS and making it available on a Technology Transfer basis;
+- to Joel Sherril, the leader of the RTEMS development group for
+stimulating and helpful discussions;
+- to Kym Newbery (8918927y@lux.levels.unisa.edu.au) for his s-record
+parser;
+- to Gerd Truschinski (gt@first.gmd.de) for creating and running the
+crossgcc mailing list
+- to FSF and Cygnus Support for great free software;
+
+
++----------------------------------+-------------------------------+
+|  Dr. Mikhail (Misha) Savitski    |  Voice : +46-980-79162        |
+|  Software Systems Engineer       |  Fax   : +46-980-79161        |
+|  EISCAT Svalbard Radar Project   |  E-mail: mms@eiscathq.irf.se  |
+|  EISCAT Scientific Association   |-----------  /\_/\  -----------|
+|  Box 812 S-98128 Kiruna, Sweden  |  EIS       { o o }       CAT  |
++----------------------------------+-------oQQQ--(>I<)--QQQo-------+
+
+

c/src/lib/libbsp/m68k/mvme162/clock/ckinit.c

@@ -0,0 +1,91 @@
+/*  Clock_init()
+ *
+ *  This routine initializes the Tick Timer 2 on the MVME162 board.
+ *  The tick frequency is 1 millisecond.
+ *
+ *  Input parameters:  NONE
+ *
+ *  Output parameters:  NONE
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  Modifications of respective RTEMS file: COPYRIGHT (c) 1994.
+ *  EISCAT Scientific Association. M.Savitski
+ *
+ *  This material is a part of the MVME162 Board Support Package
+ *  for the RTEMS executive. Its licensing policies are those of the
+ *  RTEMS above.
+ *
+ *  $Id$
+ */
+
+#include <stdlib.h>
+
+#include <rtems.h>
+#include <bsp.h>
+#include <clockdrv.h>
+
+#define MS_COUNT          1000            /* T2's countdown constant (1 ms) */
+#define CLOCK_INT_LEVEL   6                         /* T2's interrupt level */
+
+rtems_unsigned32 Clock_isrs;        /* ISRs until next tick */
+volatile rtems_unsigned32 Clock_driver_ticks;
+                                    /* ticks since initialization */
+rtems_isr_entry  Old_ticker;
+
+rtems_device_driver Clock_initialize(
+  rtems_device_major_number major,
+  rtems_device_minor_number minor,
+  void *pargp,
+  rtems_id tid,
+  rtems_unsigned32 *rval
+)
+{
+  Install_clock( Clock_isr );
+}
+
+void ReInstall_clock( clock_isr )
+rtems_isr_entry clock_isr;
+{
+  rtems_unsigned32 isrlevel;
+
+  rtems_interrupt_disable( isrlevel );
+  (void) set_vector( clock_isr, (VECTOR_BASE >> 28) * 0x10 + 0x9, 1 );
+  rtems_interrupt_enable( isrlevel );
+}
+
+void Install_clock( clock_isr )
+rtems_isr_entry clock_isr;
+{
+
+  Clock_driver_ticks = 0;
+  Clock_isrs = BSP_Configuration.microseconds_per_tick / 1000;
+
+  if ( BSP_Configuration.ticks_per_timeslice ) {
+    Old_ticker = (rtems_isr_entry)
+      set_vector( clock_isr, (VECTOR_BASE >> 28) * 0x10 + 0x9, 1 );
+
+    lcsr->vector_base = 0x67800000;              /* set vb, enable interrupts */
+    lcsr->to_ctl = 0xE7;              /* prescaler to 1 MHz (see Appendix A1) */
+    lcsr->timer_cmp_2 = MS_COUNT;
+    lcsr->timer_cnt_2 = 0;                                   /* clear counter */
+    lcsr->board_ctl |= 0x700;  /* increment, reset-on-compare, clear-ovfl-cnt */
+
+    lcsr->intr_level[0] |= CLOCK_INT_LEVEL * 0x10;           /* set int level */
+    lcsr->intr_ena |= 0x02000000;            /* enable tick timer 2 interrupt */
+
+    atexit( Clock_exit );
+  }
+
+}
+
+void Clock_exit( void )
+{
+/* Dummy for now. See other m68k BSP's for code examples */
+}

c/src/lib/libbsp/m68k/mvme162/console/console.c

@@ -0,0 +1,193 @@
+/*
+ *  This file contains the MVME162 console IO package.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  Modifications of respective RTEMS file: COPYRIGHT (c) 1994.
+ *  EISCAT Scientific Association. M.Savitski
+ *
+ *  This material is a part of the MVME162 Board Support Package
+ *  for the RTEMS executive. Its licensing policies are those of the
+ *  RTEMS above.
+ *
+ *  $Id$
+ */
+
+#define M162_INIT
+
+#include <rtems.h>
+#include "console.h"
+#include "bsp.h"
+
+/*  console_initialize
+ *
+ *  This routine initializes the console IO driver.
+ *
+ *  Input parameters: NONE
+ *
+ *  Output parameters:  NONE
+ *
+ *  Return values:
+ */
+
+rtems_device_driver console_initialize(
+  rtems_device_major_number  major,
+  rtems_device_minor_number  minor,
+  void                      *arg,
+  rtems_id                   self,
+  rtems_unsigned32          *status
+)
+{
+  *status = RTEMS_SUCCESSFUL;
+}
+
+
+/*  is_character_ready
+ *
+ *  This routine returns TRUE if a character is available.
+ *
+ *  Input parameters: NONE
+ *
+ *  Output parameters:  NONE
+ *
+ *  Return values:
+ */
+
+rtems_boolean is_character_ready(
+  char *ch
+)
+{
+  rtems_unsigned8 rr_0;
+
+  Z8x30_READ_CONTROL( CONSOLE_CONTROL, RR_0, rr_0 );
+  if ( !(rr_0 & RR_0_RX_DATA_AVAILABLE) )
+    return( FALSE );
+
+  Z8x30_READ_DATA( CONSOLE_DATA, *ch );
+
+  return(TRUE);
+}
+
+/*  inbyte
+ *
+ *  This routine reads a character from the SCC.
+ *
+ *  Input parameters: NONE
+ *
+ *  Output parameters:  NONE
+ *
+ *  Return values:
+ *    character read from SCC
+ */
+
+char inbyte( void )
+{
+  rtems_unsigned8 rr_0;
+  char ch;
+
+  while ( 1 ) {
+    Z8x30_READ_CONTROL( CONSOLE_CONTROL, RR_0, rr_0 );
+    if ( (rr_0 & RR_0_RX_DATA_AVAILABLE) != 0 )
+      break;
+  }
+
+  Z8x30_READ_DATA( CONSOLE_DATA, ch );
+  return ch;
+}
+
+
+/*  outbyte
+ *
+ *  This routine transmits a character out the SCC.  It supports
+ *  XON/XOFF flow control.
+ *
+ *  Input parameters:
+ *    ch  - character to be transmitted
+ *
+ *  Output parameters:  NONE
+ */
+
+void outbyte(
+  char ch
+)
+{
+  rtems_unsigned8 rr_0;
+  char            flow_control;
+
+  while ( 1 ) {
+    Z8x30_READ_CONTROL( CONSOLE_CONTROL, RR_0, rr_0 );
+    if ( (rr_0 & RR_0_TX_BUFFER_EMPTY) != 0 )
+      break;
+  }
+
+  while ( 1 ) {
+    Z8x30_READ_CONTROL( CONSOLE_CONTROL, RR_0, rr_0 );
+    if ( (rr_0 & RR_0_RX_DATA_AVAILABLE) == 0 )
+      break;
+
+    Z8x30_READ_DATA( CONSOLE_DATA, flow_control );
+
+    if ( flow_control == XOFF )
+      do {
+        do {
+          Z8x30_READ_CONTROL( CONSOLE_CONTROL, RR_0, rr_0 );
+        } while ( (rr_0 & RR_0_RX_DATA_AVAILABLE) == 0 );
+        Z8x30_READ_DATA( CONSOLE_DATA, flow_control );
+      } while ( flow_control != XON );
+  }
+
+  Z8x30_WRITE_DATA( CONSOLE_DATA, ch );
+}
+
+/*
+ * __read  -- read bytes from the serial port. Ignore fd, since
+ *            we only have stdin.
+ */
+
+int __read(
+  int fd,
+  char *buf,
+  int nbytes
+)
+{
+  int i = 0;
+
+  for (i = 0; i < nbytes; i++) {
+    *(buf + i) = inbyte();
+    if ((*(buf + i) == '\n') || (*(buf + i) == '\r')) {
+      (*(buf + i++)) = '\n';
+      (*(buf + i)) = 0;
+      break;
+    }
+  }
+  return (i);
+}
+
+/*
+ * __write -- write bytes to the serial port. Ignore fd, since
+ *            stdout and stderr are the same. Since we have no filesystem,
+ *            open will only return an error.
+ */
+
+int __write(
+  int fd,
+  char *buf,
+  int nbytes
+)
+{
+  int i;
+
+  for (i = 0; i < nbytes; i++) {
+    if (*(buf + i) == '\n') {
+      outbyte ('\r');
+    }
+    outbyte (*(buf + i));
+  }
+  return (nbytes);
+}

c/src/lib/libbsp/m68k/mvme162/include/bsp.h

@@ -0,0 +1,225 @@
+/*  bsp.h
+ *
+ *  This include file contains all MVME162 board IO definitions.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  Modifications of respective RTEMS file: COPYRIGHT (c) 1994.
+ *  EISCAT Scientific Association. M.Savitski
+ *
+ *  This material is a part of the MVME162 Board Support Package
+ *  for the RTEMS executive. Its licensing policies are those of the
+ *  RTEMS above.
+ *
+ *  $Id$
+ */
+
+#ifndef __MVME162_h
+#define __MVME162_h
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <rtems.h>
+#include <iosupp.h>
+#include <z8530.h>
+
+/*
+// Following defines must reflect the setup of the particular MVME162
+//-----------------------------------
+*/
+#define GROUP_BASE_ADDRESS    0x0000F200
+#define BOARD_BASE_ADDRESS    0x00000000
+/* Base for local interrupters' vectors (with enable bit set) */
+#define VECTOR_BASE           0x67800000
+/* RAM limits */
+#define RAM_START             0x00100000
+#define RAM_END               0x00200000
+/*
+//-----------------------------------
+*/
+static volatile struct lcsr {
+  unsigned long     slave_adr[2];
+  unsigned long     slave_trn[2];
+  unsigned long     slave_ctl;
+  unsigned long     mastr_adr[4];
+  unsigned long     mastr_trn;
+  unsigned long     mastr_att;
+  unsigned long     mastr_ctl;
+  unsigned long     dma_ctl_1;
+  unsigned long     dma_ctl_2;
+  unsigned long     dma_loc_cnt;
+  unsigned long     dma_vme_cnt;
+  unsigned long     dma_byte_cnt;
+  unsigned long     dma_adr_cnt;
+  unsigned long     dma_status;
+  unsigned long     to_ctl;
+  unsigned long     timer_cmp_1;
+  unsigned long     timer_cnt_1;
+  unsigned long     timer_cmp_2;
+  unsigned long     timer_cnt_2;
+  unsigned long     board_ctl;
+  unsigned long     prescaler_cnt;
+  unsigned long     intr_stat;
+  unsigned long     intr_ena;
+  unsigned long     intr_soft_set;
+  unsigned long     intr_clear;
+  unsigned long     intr_level[4];
+  unsigned long     vector_base;
+} *lcsr = (void *) 0xFFF40000;
+
+#define USE_CHANNEL_A   1                /* 1 = use channel A for console */
+#define USE_CHANNEL_B   0                /* 1 = use channel B for console */
+
+/* Constants */
+
+#if   (USE_CHANNEL_A == 1)
+  #define CONSOLE_CONTROL  0xFFF45005
+  #define CONSOLE_DATA     0xFFF45007
+#elif (USE_CHANNEL_B == 1)
+  #define CONSOLE_CONTROL  0xFFF45001
+  #define CONSOLE_DATA     0xFFF45003
+#endif
+
+/*
+// The following registers are located in the VMEbus short
+// IO space and respond to address modifier codes $29 and $2D.
+// On FORCE SPARC CPU use address gcsr_vme and device /dev/vme16d32.
+*/
+static volatile struct gcsr {
+  unsigned char       chip_revision;
+  unsigned char       chip_id;
+  unsigned char       lmsig;
+  unsigned char       board_scr;
+  unsigned short      gpr[6];
+} *gcsr_vme = (void *) (GROUP_BASE_ADDRESS + BOARD_BASE_ADDRESS),
+  *gcsr = (void *) 0xFFF40100;
+
+static volatile unsigned short  *ipio[6] = {  (unsigned short *) 0xFFF58000,
+                                              (unsigned short *) 0xFFF58100,
+                                              (unsigned short *) 0xFFF58200,
+                                              (unsigned short *) 0xFFF58300,
+                                              (unsigned short *) 0xFFF58400,
+                                              (unsigned short *) 0xFFF58500
+                                           };
+
+static volatile unsigned short  *ipid[6] = {  (unsigned short *) 0xFFF58080,
+                                              (unsigned short *) 0xFFF58180,
+                                              (unsigned short *) 0xFFF58280,
+                                              (unsigned short *) 0xFFF58380,
+                                              (unsigned short *) 0xFFF58080,
+                                              (unsigned short *) 0xFFF58280
+                                           };
+
+static volatile struct ipic_space {
+  struct sing {
+    unsigned short    io_space[64];
+    unsigned short    id_space[32];
+    unsigned short    id_reptd[32];
+  } single[4];
+  struct twin {
+    unsigned short    io_space[128];
+    unsigned short    io_reptd[128];
+  } twin[2];
+} *ipic_space = (void *) 0xFFF58000;
+
+static volatile struct ipic_csr {
+  unsigned char     chip_id;
+  unsigned char     chip_rev;
+  unsigned char     res[2];
+  unsigned short    a_31_16_base;
+  unsigned short    b_31_16_base;
+  unsigned short    c_31_16_base;
+  unsigned short    d_31_16_base;
+  unsigned char     a_23_16_size;
+  unsigned char     b_23_16_size;
+  unsigned char     c_23_16_size;
+  unsigned char     d_23_16_size;
+  unsigned short    a_intr_cnt;
+  unsigned short    b_intr_cnt;
+  unsigned short    c_intr_cnt;
+  unsigned short    d_intr_cnt;
+} *ipic_csr = (void *) 0xFFFBC000;
+
+/*
+ *  Define the time limits for RTEMS Test Suite test durations.
+ *  Long test and short test duration limits are provided.  These
+ *  values are in seconds and need to be converted to ticks for the
+ *  application.
+ *
+ */
+
+#define MAX_LONG_TEST_DURATION       300 /* 5 minutes = 300 seconds */
+#define MAX_SHORT_TEST_DURATION      3   /* 3 seconds */
+
+/*
+ *  Define the interrupt mechanism for Time Test 27
+ *
+ *  NOTE: Not implemented
+ */
+
+#define MUST_WAIT_FOR_INTERRUPT 0
+
+#define Install_tm27_vector( handler )
+
+#define Cause_tm27_intr()
+
+#define Clear_tm27_intr()
+
+#define Lower_tm27_intr()
+
+/*
+ *  Simple spin delay in microsecond units for device drivers.
+ *  This is very dependent on the clock speed of the target.
+ */
+
+#define delay( microseconds ) \
+  { register rtems_unsigned32 _delay=(microseconds); \
+    register rtems_unsigned32 _tmp=123; \
+    asm volatile( "0: \
+                     nbcd      %0 ; \
+                     nbcd      %0 ; \
+                     dbf       %1,0b" \
+                  : "=d" (_tmp), "=d" (_delay) \
+                  : "0"  (_tmp), "1"  (_delay) ); \
+  }
+
+/* Constants */
+
+#ifdef 1626_INIT
+#undef EXTERN
+#define EXTERN
+#else
+#undef EXTERN
+#define EXTERN extern
+#endif
+
+/* miscellaneous stuff assumed to exist */
+
+extern rtems_configuration_table BSP_Configuration;
+
+extern m68k_isr     M68Kvec[];   /* vector table address */
+
+/* functions */
+
+void bsp_cleanup( void );
+
+m68k_isr set_vector(
+  rtems_isr_entry     handler,
+  rtems_vector_number vector,
+  int                 type
+);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+/* end of include file */

c/src/lib/libbsp/m68k/mvme162/include/coverhd.h

@@ -0,0 +1,104 @@
+/* coverhd.h
+ *
+ *  This include file has defines to represent the overhead associated
+ *  with calling a particular directive from C on this target.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#ifndef __COVERHD_h
+#define __COVERHD_h
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define CALLING_OVERHEAD_INITIALIZE_EXECUTIVE      2
+#define CALLING_OVERHEAD_SHUTDOWN_EXECUTIVE        1
+#define CALLING_OVERHEAD_TASK_CREATE               3
+#define CALLING_OVERHEAD_TASK_IDENT                2
+#define CALLING_OVERHEAD_TASK_START                2
+#define CALLING_OVERHEAD_TASK_RESTART              2
+#define CALLING_OVERHEAD_TASK_DELETE               1
+#define CALLING_OVERHEAD_TASK_SUSPEND              1
+#define CALLING_OVERHEAD_TASK_RESUME               2
+#define CALLING_OVERHEAD_TASK_SET_PRIORITY         2
+#define CALLING_OVERHEAD_TASK_MODE                 2
+#define CALLING_OVERHEAD_TASK_GET_NOTE             2
+#define CALLING_OVERHEAD_TASK_SET_NOTE             2
+#define CALLING_OVERHEAD_TASK_WAKE_WHEN            4
+#define CALLING_OVERHEAD_TASK_WAKE_AFTER           1
+#define CALLING_OVERHEAD_INTERRUPT_CATCH           2
+#define CALLING_OVERHEAD_CLOCK_GET                 4
+#define CALLING_OVERHEAD_CLOCK_SET                 4
+#define CALLING_OVERHEAD_CLOCK_TICK                1
+
+#define CALLING_OVERHEAD_TIMER_CREATE              2
+#define CALLING_OVERHEAD_TIMER_IDENT               1
+#define CALLING_OVERHEAD_TIMER_DELETE              2
+#define CALLING_OVERHEAD_TIMER_FIRE_AFTER          2
+#define CALLING_OVERHEAD_TIMER_FIRE_WHEN           5
+#define CALLING_OVERHEAD_TIMER_RESET               1
+#define CALLING_OVERHEAD_TIMER_CANCEL              1
+#define CALLING_OVERHEAD_SEMAPHORE_CREATE          2
+#define CALLING_OVERHEAD_SEMAPHORE_IDENT           1
+#define CALLING_OVERHEAD_SEMAPHORE_DELETE          2
+#define CALLING_OVERHEAD_SEMAPHORE_OBTAIN          2
+#define CALLING_OVERHEAD_SEMAPHORE_RELEASE         1
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_CREATE      2
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_IDENT       2
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_DELETE      1
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_SEND        2
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_URGENT      2
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_BROADCAST   2
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_RECEIVE     2
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_FLUSH       2
+
+#define CALLING_OVERHEAD_EVENT_SEND                2
+#define CALLING_OVERHEAD_EVENT_RECEIVE             2
+#define CALLING_OVERHEAD_SIGNAL_CATCH              2
+#define CALLING_OVERHEAD_SIGNAL_SEND               2
+#define CALLING_OVERHEAD_PARTITION_CREATE          3
+#define CALLING_OVERHEAD_PARTITION_IDENT           2
+#define CALLING_OVERHEAD_PARTITION_DELETE          2
+#define CALLING_OVERHEAD_PARTITION_GET_BUFFER      2
+#define CALLING_OVERHEAD_PARTITION_RETURN_BUFFER   2
+#define CALLING_OVERHEAD_REGION_CREATE             3
+#define CALLING_OVERHEAD_REGION_IDENT              2
+#define CALLING_OVERHEAD_REGION_DELETE             1
+#define CALLING_OVERHEAD_REGION_GET_SEGMENT        3
+#define CALLING_OVERHEAD_REGION_RETURN_SEGMENT     2
+#define CALLING_OVERHEAD_PORT_CREATE               3
+#define CALLING_OVERHEAD_PORT_IDENT                2
+#define CALLING_OVERHEAD_PORT_DELETE               2
+#define CALLING_OVERHEAD_PORT_EXTERNAL_TO_INTERNAL 2
+#define CALLING_OVERHEAD_PORT_INTERNAL_TO_EXTERNAL 2
+
+#define CALLING_OVERHEAD_IO_INITIALIZE             3
+#define CALLING_OVERHEAD_IO_OPEN                   2
+#define CALLING_OVERHEAD_IO_CLOSE                  2
+#define CALLING_OVERHEAD_IO_READ                   2
+#define CALLING_OVERHEAD_IO_WRITE                  2
+#define CALLING_OVERHEAD_IO_CONTROL                2
+#define CALLING_OVERHEAD_FATAL_ERROR_OCCURRED      1
+#define CALLING_OVERHEAD_RATE_MONOTONIC_CREATE     2
+#define CALLING_OVERHEAD_RATE_MONOTONIC_IDENT      2
+#define CALLING_OVERHEAD_RATE_MONOTONIC_DELETE     1
+#define CALLING_OVERHEAD_RATE_MONOTONIC_CANCEL     1
+#define CALLING_OVERHEAD_RATE_MONOTONIC_PERIOD     2
+#define CALLING_OVERHEAD_MULTIPROCESSING_ANNOUNCE  1
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+/* end of include file */

c/src/lib/libbsp/m68k/mvme162/startup/bspclean.c

@@ -0,0 +1,53 @@
+/*
+ *  This routine returns control to 162Bug.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *
+ *  Modifications of respective RTEMS file: COPYRIGHT (c) 1994.
+ *  EISCAT Scientific Association. M.Savitski
+ *
+ *  This material is a part of the MVME162 Board Support Package
+ *  for the RTEMS executive. Its licensing policies are those of the
+ *  RTEMS above.
+ *
+ *  $Id$
+ */
+
+#include <rtems.h>
+#include <bsp.h>
+#include <z8036.h>
+
+void bsp_return_to_monitor_trap()
+{
+  extern void start( void  );
+
+  lcsr->intr_ena = 0;               /* disable interrupts */
+  m68k_set_vbr(0xFFE00000);         /* restore 162Bug vectors */
+  asm volatile( "trap   #15"  );    /* trap to 162Bug */
+  asm volatile( ".short 0x63" );    /* return to 162Bug (.RETURN) */
+                                    /* restart program */
+  /*
+   *  This does not work on the 162....
+   */
+#if 0
+  {  register volatile void *start_addr;
+
+     start_addr = start;
+
+     asm volatile ( "jmp %0@" : "=a" (start_addr) : "0" (start_addr) );
+  }
+#endif
+}
+
+void bsp_cleanup( void )
+{
+   M68Kvec[ 45 ] = bsp_return_to_monitor_trap;   /* install handler */
+   asm volatile( "trap #13" );  /* insures SUPV mode */
+}

c/src/lib/libbsp/m68k/mvme162/startup/bspstart.c

@@ -0,0 +1,171 @@
+/*  bsp_start()
+ *
+ *  This routine starts the application.  It includes application,
+ *  board, and monitor specific initialization and configuration.
+ *  The generic CPU dependent initialization has been performed
+ *  before this routine is invoked.
+ *
+ *  INPUT:  NONE
+ *
+ *  OUTPUT: NONE
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  Modifications of respective RTEMS file: COPYRIGHT (c) 1994.
+ *  EISCAT Scientific Association. M.Savitski
+ *
+ *  This material is a part of the MVME162 Board Support Package
+ *  for the RTEMS executive. Its licensing policies are those of the
+ *  RTEMS above.
+ *
+ *  $Id$
+ */
+
+#include <rtems.h>
+#include <bsp.h>
+#include <libcsupport.h>
+#include <z8036.h>
+
+/*
+ *  The original table from the application and our copy of it with
+ *  some changes.
+ */
+
+extern rtems_configuration_table  Configuration;
+rtems_configuration_table  BSP_Configuration;
+
+rtems_cpu_table Cpu_table;
+
+/*      Initialize whatever libc we are using
+ *      called from postdriver hook
+ */
+
+void bsp_libc_init()
+{
+    extern int end;
+    rtems_unsigned32        heap_start;
+
+    heap_start = (rtems_unsigned32) &end;
+    if (heap_start & (CPU_ALIGNMENT-1))
+        heap_start = (heap_start + CPU_ALIGNMENT) & ~(CPU_ALIGNMENT-1);
+
+    RTEMS_Malloc_Initialize((void *) heap_start, 64 * 1024, 0);
+
+    /*
+     * Set up for the libc handling.
+     */
+
+    if (BSP_Configuration.ticks_per_timeslice > 0)
+        libc_init(1);                /* reentrant if possible */
+    else
+        libc_init(0);                /* non-reentrant */
+
+    /*
+     *  Initialize the stack bounds checker
+     */
+
+#ifdef STACK_CHECKER_ON
+    Stack_check_Initialize();
+#endif
+}
+
+int bsp_start(
+  int argc,
+  char **argv,
+  char **environp
+)
+{
+  m68k_isr *monitors_vector_table;
+  int       index;
+
+  /*
+   *  162Bug Vectors are at 0xFFE00000
+   */
+
+  monitors_vector_table = (m68k_isr *)0xFFE00000;
+
+  m68k_set_vbr( monitors_vector_table );
+
+  for ( index=2 ; index<=255 ; index++ )
+    M68Kvec[ index ] = monitors_vector_table[ 32 ];
+
+  M68Kvec[  2 ] = monitors_vector_table[  2 ];   /* bus error vector */
+  M68Kvec[  4 ] = monitors_vector_table[  4 ];   /* breakpoints vector */
+  M68Kvec[  9 ] = monitors_vector_table[  9 ];   /* trace vector */
+  M68Kvec[ 47 ] = monitors_vector_table[ 47 ];   /* system call vector */
+
+  m68k_set_vbr( &M68Kvec );
+
+  /*
+   *  You may wish to make VME access round-robin here, currently
+   *  we leave it as it is.
+   */
+
+  lcsr->vector_base = VECTOR_BASE;        /* set the vector base register */
+
+  m68k_enable_caching();
+
+  /*
+   *  we only use a hook to get the C library initialized.
+   */
+
+  Cpu_table.pretasking_hook = NULL;
+
+  Cpu_table.predriver_hook = bsp_libc_init;  /* RTEMS resources available */
+
+  Cpu_table.postdriver_hook = NULL;   /* Call our main() for constructors */
+
+  Cpu_table.idle_task = NULL;  /* do not override system IDLE task */
+
+  Cpu_table.do_zero_of_workspace = TRUE;
+
+  Cpu_table.interrupt_vector_table = (m68k_isr *) &M68Kvec;
+
+  Cpu_table.interrupt_stack_size = 4096;
+
+  Cpu_table.extra_system_initialization_stack = 0;
+
+  /*
+   *  Copy the table
+   */
+
+  BSP_Configuration = Configuration;
+
+  /*
+   * Add 1 region for the RTEMS Malloc
+   */
+
+  BSP_Configuration.maximum_regions++;
+
+  /*
+   * Add 1 extension for newlib libc
+   */
+
+#ifdef RTEMS_NEWLIB
+    BSP_Configuration.maximum_extensions++;
+#endif
+
+  /*
+   * Add another extension if using the stack checker
+   */
+
+#ifdef STACK_CHECKER_ON
+    BSP_Configuration.maximum_extensions++;
+#endif
+
+  BSP_Configuration.work_space_start = (void *)
+     (RAM_END - BSP_Configuration.work_space_size);
+
+  rtems_initialize_executive( &BSP_Configuration, &Cpu_table );
+  /* does not return */
+
+  bsp_cleanup();
+
+  return 0;
+}

c/src/lib/libbsp/m68k/mvme162/startup/linkcmds

@@ -0,0 +1,50 @@
+/*
+ *  This file contains directives for the GNU linker which are specific
+ *  to the Motorola MVME162 board.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  Modifications of respective RTEMS file: COPYRIGHT (c) 1994.
+ *  EISCAT Scientific Association. M.Savitski
+ *
+ *  This material is a part of the MVME162 Board Support Package
+ *  for the RTEMS executive. Its licensing policies are those of the
+ *  RTEMS above.
+ *
+ *  $Id$
+ */
+
+MEMORY
+        {
+        ram : org = 0x100000, l = 1M
+        }
+
+SECTIONS
+{
+        .text 0x100000 :
+        {
+        text_start = . ;
+        *(.text)
+        etext = ALIGN( 0x10 ) ;
+        }
+        .data ADDR( .text ) + SIZEOF( .text ):
+        {
+        data_start = . ;
+        *(.data)
+        edata = ALIGN( 0x10 ) ;
+        }
+        .bss ADDR( .data ) + SIZEOF( .data ):
+        {
+        bss_start = . ;
+        *(.bss)
+        *(COMMON)
+        end = . ;
+        _end = . ;
+        }
+}

c/src/lib/libbsp/m68k/mvme162/timer/timer.c

@@ -0,0 +1,91 @@
+/*  Timer_init()
+ *
+ *  This routine initializes the Tick Timer 1 on the MVME162 board.
+ *
+ *  Input parameters:  NONE
+ *
+ *  Output parameters:  NONE
+ *
+ *  NOTE: This routine will not work if the optimizer is enabled
+ *        for some compilers.  The multiple writes
+ *        may be optimized away.
+ *
+ *        It is important that the timer start/stop overhead be
+ *        determined when porting or modifying this code.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  Modifications of respective RTEMS file: COPYRIGHT (c) 1994.
+ *  EISCAT Scientific Association. M.Savitski
+ *
+ *  This material is a part of the MVME162 Board Support Package
+ *  for the RTEMS executive. Its licensing policies are those of the
+ *  RTEMS above.
+ *
+ *  $Id$
+ */
+
+
+#include <rtems.h>
+#include <bsp.h>
+
+/* Periodic tick interval */
+#define TICK_INTERVAL                                   0x10000
+#define TIMER_INT_LEVEL                         6
+
+int Ttimer_val;
+rtems_boolean Timer_driver_Find_average_overhead;
+
+rtems_isr timerisr();
+
+void Timer_initialize()
+{
+  (void) set_vector( timerisr, (VECTOR_BASE >> 28) * 0x10 + 0x8, 0 );
+
+  Ttimer_val = 0;                                    /* clear timer ISR count */
+  lcsr->vector_base = 0x67800000;                /* set vb, enable interrupts */
+  lcsr->to_ctl = 0xE7;                /* prescaler to 1 MHz (see Appendix A1) */
+  lcsr->timer_cmp_1 = TICK_INTERVAL;
+  lcsr->timer_cnt_1 = 0;                                     /* clear counter */
+  lcsr->board_ctl |= 7;        /* increment, reset-on-compare, clear-ovfl-cnt */
+
+  lcsr->intr_level[0] |= TIMER_INT_LEVEL;                    /* set int level */
+  lcsr->intr_ena |= 0x01000000;              /* enable tick timer 1 interrupt */
+}
+
+#define AVG_OVERHEAD      6  /* It typically takes 3.0 microseconds */
+                             /* (6 countdowns) to start/stop the timer. */
+#define LEAST_VALID       10 /* Don't trust a value lower than this */
+
+int Read_timer()
+{
+  unsigned long                 total;
+
+  total = (Ttimer_val * TICK_INTERVAL) + lcsr->timer_cnt_1;
+
+  if ( Timer_driver_Find_average_overhead == 1 )
+    return total;          /* in one-half microsecond units */
+
+  if ( total < LEAST_VALID )
+    return 0;            /* below timer resolution */
+
+  return (total-AVG_OVERHEAD);                  /* in musec units */
+}
+
+rtems_status_code Empty_function( void )
+{
+  return RTEMS_SUCCESSFUL;
+}
+
+void Set_find_average_overhead(
+  rtems_boolean find_flag
+)
+{
+  Timer_driver_Find_average_overhead = find_flag;
+}

c/src/lib/libbsp/m68k/mvme162/timer/timerisr.s

@@ -0,0 +1,46 @@
+/*  timer_isr()
+ *
+ *  This routine provides the ISR for the Z8036 timer on the MVME136
+ *  board.   The timer is set up to generate an interrupt at maximum
+ *  intervals.
+ *
+ *  Input parameters:  NONE
+ *
+ *  Output parameters:  NONE
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  Modifications of respective RTEMS file: COPYRIGHT (c) 1994.
+ *  EISCAT Scientific Association. M.Savitski
+ *
+ *  This material is a part of the MVME162 Board Support Package
+ *  for the RTEMS executive. Its licensing policies are those of the
+ *  RTEMS above.
+ *
+ *  $Id$
+ */
+
+#include "asm.h"
+
+BEGIN_CODE
+
+.set INTR_CLEAR_REG,      0xfff40074      | interrupt clear register
+.set RELOAD,              0x01000000      | clear tick 1 interrupt
+
+        PUBLIC (timerisr)
+SYM (timerisr):
+        move.l  a0, -(a7)                 | save a0
+        movea.l #INTR_CLEAR_REG, a0       | a0 = addr of cmd status reg
+        ori.l   #RELOAD, (a0)             | reload countdown
+        addq.l  #1, SYM (Ttimer_val)      | increment timer value
+        move.l  (a7)+, a0                 | restore a0
+        rte
+
+END_CODE
+END

c/src/lib/libbsp/m68k/mvme162/tools/sload.c

@@ -0,0 +1,542 @@
+/*
+ *
+ *        Copyright (c) 1994 by EISCAT Scientific Association.
+ *                        All Rights Reserved.
+ *                             M.Savitski
+ *
+ *     S-record code - courtesy of Kym Newbery
+ *     8918927y@lux.levels.unisa.edu.au
+ *
+ *     Loading S-records into the VMEbus memory.
+ *
+ *  Loads an executable in s-record format into the MVME dual-ported
+ *  memory and directs the MVME CPU to start execution.
+ *  VMEbus access is done via the FORCE CPU-2CE vmeplus driver in
+ *  read/write mode for loading and in mmap mode for accessing MVME registers.
+ *  See mvme162.h for #define's dependent on the MVME162 setup.
+ *
+ *  $Id$
+ *
+ */
+
+#include <stdio.h>
+#include <string.h>
+#include <ctype.h>
+
+
+#include <sys/types.h>
+#include <sys/fcntl.h>
+#include <sys/resource.h>
+#include <unistd.h>
+#include <sys/vme.h>
+#include <sys/mman.h>
+
+#include "../include/bsp.h"
+
+#define FALSE 0
+#define TRUE 1
+
+#define DATA19 0
+#define DATA28 1
+#define DATA37 3
+#define HEADER 4
+#define TERMINATOR 5
+#define NONE 6
+
+unsigned int ahdtoi(unsigned char digit);
+int issrec(char *str);
+int validrec(char *str);
+void hdr2str(char *sstr, char *pstr);
+unsigned long getaddr(char *str);
+unsigned int datasize(char *str);
+void usage (void);
+int MVMEControl(u_long entry, int reset, int go);
+
+unsigned int ahdtoi(unsigned char digit)
+/*       converts a hexadecimal char to an integer
+ *
+ *       entry        : digit = character to convert
+ *                    : 0..15 = result
+ *                    : -1    = char is not a digit
+ */
+{
+/* check digit */
+        if (!isxdigit(digit))
+                return(-1);
+
+        switch (toupper(digit)) {
+                case 'A' : return(0xA);
+                case 'B' : return(0xB);
+                case 'C' : return(0xC);
+                case 'D' : return(0xD);
+                case 'E' : return(0xE);
+                case 'F' : return(0xF);
+                default  : return(digit - 0x30);
+        }
+}
+
+int issrec(char *str)
+/*      attempts to identify the type of Srecord string passed
+ *
+ *       entry   : str =  pointer to null terminated string
+ *       returns : 0,1,2,3,5,7,8,9 for S0..S9 except S6 & S4
+ *               : -1 = invalid header or header not found
+ *                       : -2 = invalid header number
+ */
+{
+/* Check first character for S */
+        if ((isupper(str[0]) && (str[0] == 'S')) ||
+            (islower(str[0]) && (str[0] == 's')))
+        {
+        /* check for valid header number */
+                switch (str[1]) {
+                        case '0' : return 0;    /* header record */
+                        case '1' : return 1;    /* data record, 2byte addr */
+                        case '2' : return 2;    /*  "     "   , 3byte addr */
+                        case '3' : return 3;    /*  "     "   , 4byte addr */
+                        case '5' : return 5;    /* number of S1,S2,S3 blocks */
+                        case '7' : return 7;    /* S3 terminator */
+                        case '8' : return 8;    /* S2 terminator */
+                        case '9' : return 9;    /* S1 terminator */
+                        default  : return -2;   /* all others are invalid */
+                }
+        }
+        return(-1);
+}
+
+int validrec(char *str)
+/*      Tests for a valid srecord. tests checksum & for nondigit characters
+ *      doesn't rely on any other srecord routines.
+ *
+ *        entry   : str   =  pointer to null terminated string
+ *        returns : -1        =  srecord contains invalid characters
+ *                            : -2    =  srecord checksum is invalid
+ *                        : -3    =  srecord record length is invalid
+ *                : 0     =  srecord is valid
+ */
+{
+        int                                     cn = 1, rlen=0;
+        int                                     mchksum=0, rchksum=0;
+
+/* first check if there are any non-digit characters except S */
+        while (str[cn]!=0)
+                if (!isxdigit(str[cn++]))
+                        return(-1);
+
+/* test number of data bytes */
+        rlen = ahdtoi(str[2])* 0x10 + ahdtoi(str[3]);
+        if (((strlen(str)-4)/2U) != rlen) return(-3);
+
+/* get checksum from string */
+        rchksum = ahdtoi(str[rlen*2+2])*0x10 + ahdtoi(str[rlen*2+3]);
+             /* string chksum */
+
+/* now calculate my own checksum */
+        for (cn=2; cn <= rlen*2; )
+                mchksum += ahdtoi(str[cn++])*0x10 + ahdtoi(str[cn++]);
+        mchksum = ~mchksum & 0xFF;
+        if (mchksum != rchksum) return(-2); /* return -2 in not equal */
+
+/* return OK if we didn't fail any of these tests */
+        return(0);
+}
+
+void hdr2str(char *sstr, char *pstr)
+/*      converts header record (S0) string into a plain string
+ *
+ *      entry        : sstr = pointer to S0 string record
+ *      exit         : pstr = pointer to string long enough to hold string
+ *                              (caller must allocate enough space for string)
+ */
+{
+        int                     rlen, cn, pn=0;
+
+        rlen = ahdtoi(sstr[2])*0x10 + ahdtoi(sstr[3]);
+        for (cn=8; cn <= rlen*2; )
+                pstr[pn++] = ahdtoi(sstr[cn++])*0x10 + ahdtoi(sstr[cn++]);
+        pstr[pn]=0;
+}
+
+unsigned long getaddr(char *str)
+/*      returns the address of the srecord in str. assumes record is valid.
+ *
+ *      entry        : str = pointer to srecord string
+ *      exit         : address of data, word or long.
+ */
+{
+        unsigned long addr=0;
+
+        switch (issrec(str)) {
+                case 0 :
+                case 1 :
+                case 5 :
+                case 9 :
+                  addr = ahdtoi(str[4])*0x1000 + ahdtoi(str[5])*0x100
+                         + ahdtoi(str[6])*0x10 + ahdtoi(str[7]);
+                  return(addr);
+                case 2 :
+                case 8 :
+                  addr = ahdtoi(str[4])*0x100000 + ahdtoi(str[5])*0x10000
+                         + ahdtoi(str[6])*0x1000 + ahdtoi(str[7])*0x100
+                         + ahdtoi(str[8])*0x10 + ahdtoi(str[9]);
+                  return(addr);
+                case 3 :
+                case 7 :
+                  addr = ahdtoi(str[4])*0x10000000 + ahdtoi(str[5])*0x1000000
+                         + ahdtoi(str[6])*0x100000 + ahdtoi(str[7])*0x10000
+                         + ahdtoi(str[8])*0x1000 + ahdtoi(str[9])*0x100
+                         + ahdtoi(str[10])*0x10 + ahdtoi(str[11]);
+                  return(addr);
+                default : return(-1);
+        }
+}
+
+unsigned int datasize(char *str)
+/*
+ *    returns the number of data bytes in the srecord. assumes record is valid.
+ *
+ *      entry        : str = pointer to srecord string
+ *      exit         : number of bytes of data in the data field.
+ */
+{
+        unsigned int size=0;
+
+        switch (issrec(str)) {
+                case 0  :
+                case 1  :
+                case 5  :
+                case 7  :
+                case 8  :
+                case 9  : size = ahdtoi(str[2])*0x10 + ahdtoi(str[3]);
+                                                        return(size-3);
+                case 2  : size = ahdtoi(str[2])*0x10 + ahdtoi(str[3]);
+                                                        return(size-4);
+                case 3  : size = ahdtoi(str[2])*0x10 + ahdtoi(str[3]);
+                                                        return(size-5);
+                default : return(-1);
+        }
+}
+
+void usage (void)
+/*
+ *      prints correct usage on stdout
+ */
+{
+         printf("\nUSAGE :  sload [-v][-g][-r] [file]\n");
+         printf("  file is an s-record file\n");
+         printf("  -v for verbose summary of s-records loaded\n");
+         printf("  -g to start execution\n");
+         printf("  -r to reset MVME162\n\n");
+}
+
+int MVMEControl(u_long entry, int reset, int go)
+/*      Controls MVME-162 from other VME master:
+ *  if entry != 0, loads it as start address
+ *      if go != 0, starts program execution from entry
+ *      if reset != 0, resets mvme162's local bus
+ *  Depends upon #define'ed GROUP_BASE_ADDRESS and BOARD_BASE_ADDRESS
+ *      which in turn are set by the 162-BUG's ENV command.
+ */
+{
+        int          vme;
+        char         vmedev[32] = "/dev/vme16d32"; /* d32 is important !!!  */
+        u_long       pagesize;
+        struct gcsr *gcsr_map;
+
+        pagesize = sysconf(_SC_PAGESIZE);  /* mmap likes to be page-aligned */
+
+        if ((vme = open(vmedev, O_RDWR)) == -1) {
+          perror("open");
+          fprintf(stderr, "Cannot open vme as %s to access GCSR\n", vmedev);
+          return 1;
+        }
+
+/* "MAP_SHARED" is important here */
+        gcsr_map = (struct gcsr *)
+          mmap(0, 0x1000, PROT_WRITE|PROT_READ, MAP_SHARED,
+               vme, (u_long)gcsr_vme / pagesize * pagesize);
+        if (gcsr_map == (struct gcsr *) - 1) {
+          perror("mmap");
+          fprintf(stderr, "Cannot mmap() to remote bus address 0x%08X\n",
+                           (u_long)gcsr_vme / pagesize * pagesize);
+                return 1;
+        }
+
+/*
+ * use GCSR to start execution in MVME162
+ * adjust pointer to compensate for page alignement
+ */
+        gcsr_map = (struct gcsr *)((u_long)gcsr_map +
+                       (u_long)gcsr_vme % pagesize);
+
+        if (reset) {                           /* reset the local bus... */
+                gcsr_map->board_scr |= 0x80;
+        }
+        if (entry) {                           /* ...load start address... */
+                gcsr_map->gpr[0] = entry >> 16U;
+                gcsr_map->gpr[1] = entry & 0x0000FFFF;
+        }
+        if (go) {                              /* ... and kick it in the ass! */
+                gcsr_map->lmsig = 0x1;
+        }
+}
+
+/*=================================================================== */
+main(int argc, char *argv[])
+{
+        char       inpstr[256];
+        u_char     image[256];
+        char       hdrstr[64];
+        int        i, j, k, result, size, line=0, lastrec=0;
+        long       addr, tsize=0, naddr=0, blksize=0, blknum=1;
+        FILE       *in;
+        char       infile[256] = "";
+        char       vmedev[32] = "/dev/vme32d32";  /* Assume "/dev/vme32d32"  */
+        int        vme, verbose = 0, go = 0, reset = 0, havefile = 0;
+
+/*      Parse the command line */
+
+  --argc;
+
+  while (argv++, argc--) {
+        if (**argv != '-') {
+                strcpy(infile, *argv);
+                havefile = 1;
+    } else if (!strcmp(*argv, "-v")) {
+      verbose = 1;
+    } else if (!strcmp(*argv, "-g")) {
+      go = 1;
+    } else if (!strcmp(*argv, "-r")) {
+      reset = 1;
+/*    } else if (!strcmp(*argv, "-vme32")) { */
+/*      strcpy(vmedev, "/dev/vme32d32"); */
+/*    } else if (!strcmp(*argv, "-vme24")) { */
+/*      strcpy(vmedev, "/dev/vme24d32"); */
+/*    } else if (!strcmp(*argv, "-vme16")) { */
+/*      strcpy(vmedev, "/dev/vme16d32"); */
+    } else if (!strcmp(*argv, "-")) {
+        usage();
+        exit(0);
+    } else {
+        usage();
+        exit(0);
+    }
+  }
+
+  if (!havefile) {
+    if (!reset && !go) {
+      usage();
+    }
+    else {
+      MVMEControl(0, reset, go);
+    }
+    exit(0);
+  }
+
+  if ((in = fopen(infile, "r")) == NULL) {
+    perror("open");
+    fprintf(stderr, "Cannot open input file %s\n", infile);
+    exit(1);
+  }
+
+  if ((vme = open(vmedev, O_RDWR)) == -1) {
+    fprintf(stderr, "Cannot open vme as %s\n", vmedev);
+  }
+
+  while (fscanf(in, "%s", &inpstr) != EOF) {
+    line++;
+    if (validrec(inpstr) == 0) {
+      switch (issrec(inpstr)) {
+        case 0 :
+          hdr2str(inpstr, hdrstr);
+          if (verbose) printf("HEADER string = `%s'\n", hdrstr);
+          lastrec=HEADER;
+          break;
+        case 1 :
+          addr = getaddr(inpstr);
+          size = datasize(inpstr);
+          if (blksize == 0) {
+            blksize+=size;
+            naddr=addr+size;
+            if (verbose) printf("DATA\tS19\t$%04lX", addr);
+            lastrec=DATA19;
+          }
+          else if ((blksize!=0) && (addr==naddr)) {
+            blksize+=size;
+            naddr=addr+size;
+          }
+          else {
+            if (verbose) printf("\t$%04lX\t%lu", naddr-1, blksize);
+            if (verbose) printf("\t%d\n", blknum);
+            blknum+=1;
+            naddr=addr+size;
+            blksize=size;
+            if (verbose) printf("DATA\tS19\t$%04lX", addr);
+            lastrec=DATA19;
+          }
+          tsize += size;
+          if (vme == -1) break;
+          for (i = 0, j = 8, k = size; k-- > 0; i += 1, j += 2) {
+            image[i] = ahdtoi(inpstr[j])*0x10 + ahdtoi(inpstr[j+1]);
+          }
+          if (lseek(vme, addr, SEEK_SET) == -1) {
+            fprintf(stderr, "lseek() to vme address %08X failed\n", addr);
+          }
+          else {
+            if (write(vme, (u_char *)image, size) != size) {
+              fprintf(stderr, "Write to vme address %08X failed\n", addr);
+            }
+          }
+          break;
+        case 2 :
+          addr = getaddr(inpstr);
+          size = datasize(inpstr);
+          if (blksize == 0) {
+            blksize+=size;
+            naddr=addr+size;
+            if (verbose) printf("DATA\tS28\t$%06lX",addr);
+            lastrec=DATA28;
+          }
+          else if ((blksize!=0) && (addr==naddr)) {
+            blksize+=size;
+            naddr=addr+size;
+          }
+          else {
+            if (verbose) printf("\t$%06lX\t%lu",naddr-1,blksize);
+            if (verbose) printf("\t%d\n",blknum);
+            blknum+=1;
+            naddr=addr+size;
+            blksize=size;
+            if (verbose) printf("DATA\tS28\t$%06lX",addr);
+            lastrec=DATA28;
+          }
+          tsize += size;
+          if (vme == -1) break;
+          for (i = 0, j = 10, k = size; k-- > 0; i += 1, j += 2) {
+            image[i] = ahdtoi(inpstr[j])*0x10 + ahdtoi(inpstr[j+1]);
+          }
+          if (lseek(vme, addr, SEEK_SET) == -1) {
+            fprintf(stderr, "lseek() to vme address %08X failed\n", addr);
+          }
+          else {
+            if (write(vme, (u_char *)image, size) != size) {
+              fprintf(stderr, "Write to vme address %08X failed\n", addr);
+            }
+          }
+          break;
+        case 3 :
+          addr = getaddr(inpstr);
+          size = datasize(inpstr);
+          if (blksize == 0) {
+            blksize+=size;
+            naddr=addr+size;
+            if (verbose) printf("DATA\tS37\t$%08lX",addr);
+            lastrec=DATA37;
+          }
+          else if ((blksize!=0) && (addr==naddr)) {
+            blksize+=size;
+            naddr=addr+size;
+          }
+          else {
+            if (verbose) printf("\t$%08lX\t%lu",naddr-1,blksize);
+            if (verbose) printf("\t%d\n",blknum);
+            blknum+=1;
+            naddr=addr+size;
+            blksize=size;
+            if (verbose) printf("DATA\tS37\t$%08lX",addr);
+            lastrec=DATA37;
+          }
+          tsize += size;
+          if (vme == -1) break;
+          for (i = 0, j = 12, k = size; k-- > 0; i += 1, j += 2) {
+            image[i] = ahdtoi(inpstr[j])*0x10 + ahdtoi(inpstr[j+1]);
+          }
+          if (lseek(vme, addr, SEEK_SET) == -1) {
+            fprintf(stderr, "lseek() to vme address %08X failed\n", addr);
+          }
+          else {
+            if (write(vme, (u_char *)image, size) != size) {
+              fprintf(stderr, "Write to vme address %08X failed\n", addr);
+            }
+          }
+          break;
+        case 7 :
+          if (lastrec==DATA19){
+            if (verbose) printf("\t$%04lX\t%lu",naddr-1,blksize);
+          }
+          if (lastrec==DATA28){
+            if (verbose) printf("\t$%06lX\t%lu",naddr-1,blksize);
+          }
+          if (lastrec==DATA37){
+            if (verbose) printf("\t$%08lX\t%lu",naddr-1,blksize);
+          }
+          if (verbose) printf("\t%d\n",blknum);
+          addr = getaddr(inpstr);
+          if (verbose) printf("TERM\tS37");
+          printf("\nExecution address = $%08lX\n", addr);
+          lastrec=TERMINATOR;
+          break;
+        case 8 :
+          if (lastrec==DATA19){
+            if (verbose) printf("\t$%04lX\t%lu",naddr-1,blksize);
+          }
+          if (lastrec==DATA28){
+            if (verbose) printf("\t$%06lX\t%lu",naddr-1,blksize);
+          }
+          if (lastrec==DATA37){
+            if (verbose) printf("\t$%08lX\t%lu",naddr-1,blksize);
+          }
+          if (verbose) printf("\t%d\n",blknum);
+          addr = getaddr(inpstr);
+          if (verbose) printf("TERM\tS28");
+          printf("\nExecution address = $%06lX\n", addr);
+          lastrec=TERMINATOR;
+          break;
+        case 9 :
+          if (lastrec==DATA19){
+            if (verbose) printf("\t$%04lX\t%lu",naddr-1,blksize);
+          }
+          if (lastrec==DATA28){
+            if (verbose) printf("\t$%06lX\t%lu",naddr-1,blksize);
+          }
+          if (lastrec==DATA37){
+            if (verbose) printf("\t$%08lX\t%lu",naddr-1,blksize);
+          }
+          if (verbose) printf("\t%d\n",blknum);
+          addr = getaddr(inpstr);
+          if (verbose) printf("TERM\tS19");
+          printf("\nExecution address = $%04lX\n", addr);
+          lastrec=TERMINATOR;
+          break;
+        }
+      }
+      else {
+        printf("\nError on line %d. ",line);
+        switch (validrec(inpstr)) {
+          case -1 : {printf("SRecord contains invalid characters.\n"); break; }
+          case -2 : {printf("SRecord checksum is invalid.\n"); break;}
+          case -3 : {printf("SRecord length is invalid.\n"); break;}
+        }
+       exit(1);
+     }
+   }
+
+   if ((lastrec==DATA19) || (lastrec==DATA28) || (lastrec==DATA37)) {
+     if (lastrec==DATA19){
+       if (verbose) printf("\t$%04lX\t%lu",naddr-1,blksize);
+     }
+     if (lastrec==DATA28){
+       if (verbose) printf("\t$%06lX\t%lu",naddr-1,blksize);
+     }
+     if (lastrec==DATA37){
+       if (verbose) printf("\t$%08lX\t%lu",naddr-1,blksize);
+     }
+     if (verbose) printf("\t%d\n",blknum);
+     printf("ERROR: terminator record not found.\n");
+   }
+   else {
+     for (i = 0x000FFFF; i-- > 0;) ; /* mystique delay... */
+       MVMEControl(addr, reset, go);
+     }
+   if (verbose) printf("total data size = %lu bytes\n", tsize);
+}

c/src/lib/libbsp/no_cpu/no_bsp/README

@@ -0,0 +1,69 @@
+#
+#  $Id$
+#
+#  This is a sample hardware description file for a BSP.  This comment
+#  block does not have to appear in a real one.  The intention of this
+#  file is to provide a central place to look when searching for
+#  information about a board when starting a new BSP.  For example,
+#  you may want to find an existing timer driver for the chip you are
+#  using on your board.  It is easier to grep for the chip name in
+#  all of the HARDWARE files than to peruse the source tree.  Hopefully,
+#  making the HARDDWARE files accurate will also alleviate the common
+#  problem of not knowing anything about a board based on its BSP
+#  name.
+#
+#  NOTE:  If you have a class of peripheral chip on board which
+#         is not in this list please add it to this file so
+#         others will also use the same name.
+#
+#         Timer resolution is the way it is configured in this BSP.
+#         On a counting timer, this is the length of time which
+#         corresponds to 1 count.
+#
+
+BSP NAME:           fastsbc1
+BOARD:              Fasssst Computers, Fast SBC-1
+BUS:                SchoolBus
+CPU FAMILY:         i386
+CPU:                Intel Hexium
+COPROCESSORS:       Witch Hex87
+MODE:               32 bit mode
+
+DEBUG MONITOR:      HexBug
+
+PERIPHERALS
+===========
+TIMERS:             Intel i8254
+  RESOLUTION:         .0001 microseconds
+SERIAL PORTS:       Zilog Z8530 (with 2 ports)
+REAL-TIME CLOCK:    RTC-4
+DMA:                Intel i8259
+VIDEO:              none
+SCSI:               none
+NETWORKING:         none
+
+DRIVER INFORMATION
+==================
+CLOCK DRIVER:       RTC-4
+IOSUPP DRIVER:      Zilog Z8530 port A
+SHMSUPP:            polled and interrupts
+TIMER DRIVER:       Intel i8254
+TTY DRIVER:         stub only
+
+STDIO
+=====
+PORT:               Console port 0
+ELECTRICAL:         RS-232
+BAUD:               9600
+BITS PER CHARACTER: 8
+PARITY:             None
+STOP BITS:          1
+
+NOTES
+=====
+
+(1) 900 Mhz and 950 Mhz versions.
+
+(2) 1 Gb or 2 Gb RAM.
+
+(3) PC compatible if HexBug not enabled.

c/src/lib/libbsp/no_cpu/no_bsp/clock/ckinit.c

@@ -0,0 +1,143 @@
+/*  ckinit.c
+ *
+ *  This file provides a template for the clock device driver initialization.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include <stdlib.h>
+
+#include <rtems.h>
+#include <bsp.h>
+#include <clockdrv.h>
+
+/*
+ *  The interrupt vector number associated with the clock tick device
+ *  driver.
+ */
+
+#define CLOCK_VECTOR    4
+
+/*
+ *  Clock_driver_ticks is a monotonically increasing counter of the
+ *  number of clock ticks since the driver was initialized.
+ */
+volatile rtems_unsigned32 Clock_driver_ticks;
+
+/*
+ *  Clock_isrs is the number of clock ISRs until the next invocation of
+ *  the RTEMS clock tick routine.  The clock tick device driver
+ *  gets an interrupt once a millisecond and counts down until the
+ *  length of time between the user configured microseconds per tick
+ *  has passed.
+ */
+
+rtems_unsigned32 Clock_isrs;              /* ISRs until next tick */
+
+/*
+ *  The previous ISR on this clock tick interrupt vector.
+ */
+
+rtems_isr_entry  Old_ticker;
+
+/*
+ *  Clock_initialize
+ *
+ *  Device driver entry point for clock tick driver initialization.
+ */
+
+rtems_device_driver Clock_initialize(
+  rtems_device_major_number major,
+  rtems_device_minor_number minor,
+  void *pargp,
+  rtems_id tid,
+  rtems_unsigned32 *rval
+)
+{
+  Install_clock( Clock_isr );
+}
+
+/*
+ *  Reinstall_clock
+ *
+ *  Install a clock tick handler without reprogramming the chip.  This
+ *  is used by the polling shared memory device driver.
+ */
+
+void ReInstall_clock(
+  rtems_isr_entry clock_isr
+)
+{
+  rtems_unsigned32 isrlevel = 0;
+
+  /*
+   *  Disable interrupts and install the clock ISR vector using the
+   *  BSP dependent set_vector routine.  In the below example, the clock
+   *  ISR is on vector 4 and is an RTEMS interrupt.
+   */
+
+  rtems_interrupt_disable( isrlevel );
+   (void) set_vector( clock_isr, CLOCK_VECTOR, 1 );
+  rtems_interrupt_enable( isrlevel );
+}
+
+/*
+ *  Install_clock
+ *
+ *  Install a clock tick handler and reprograms the chip.  This
+ *  is used to initially establish the clock tick.
+ */
+
+void Install_clock(
+  rtems_isr_entry clock_isr
+)
+{
+  /*
+   *  Initialize the clock tick device driver variables
+   */
+
+  Clock_driver_ticks = 0;
+  Clock_isrs = BSP_Configuration.microseconds_per_tick / 1000;
+
+  /*
+   *  If ticks_per_timeslice is configured as non-zero, then the user
+   *  wants a clock tick.
+   */
+
+  if ( BSP_Configuration.ticks_per_timeslice ) {
+    Old_ticker = ( rtems_isr_entry ) set_vector( clock_isr, CLOCK_VECTOR, 1 );
+    /*
+     *  Hardware specific initialize goes here
+     */
+
+    /* XXX */
+  }
+
+  /*
+   *  Schedule the clock cleanup routine to execute if the application exits.
+   */
+
+  atexit( Clock_exit );
+}
+
+/*
+ *  Clean up before the application exits
+ */
+
+void Clock_exit( void )
+{
+  if ( BSP_Configuration.ticks_per_timeslice ) {
+
+    /* XXX: turn off the timer interrupts */
+
+    /* XXX: If necessary, restore the old vector */
+  }
+}