bsps/sparc: Remove set_vector() usage and implementation

Removed all uses and implementations of set_vector() function across ERC32,
LEON2, and LEON3 BSPs. Replaced with rtems_interrupt_handler_install() and
rtems_interrupt_entry_install().

- Added ERC32_Clear_and_unmask_interrupt() and LEON_Clear_and_unmask_interrupt()
  for unmasking logic previously in set_vector().
- Deleted set_vector() definitions and implementations in each BSP.
- Updated related obj.yml files.
- Replaced set_vector() with rtems_interrupt_catch() in shared/gnatcommon.c.
This commit is contained in:
Sunil-Hegde
2025-05-16 01:43:20 +05:30
committed by Sunil Hegde
parent 3e1a73d634
commit a899cdd57d
17 changed files with 250 additions and 298 deletions

View File

@@ -31,6 +31,7 @@
#define CONSOLE_UART_A_TRAP ERC32_TRAP_TYPE(ERC32_INTERRUPT_UART_A_RX_TX)
#define CONSOLE_UART_B_TRAP ERC32_TRAP_TYPE(ERC32_INTERRUPT_UART_B_RX_TX)
#define CONSOLE_UART_ERROR_TRAP ERC32_TRAP_TYPE(ERC32_INTERRUPT_UART_ERROR)
static uint8_t erc32_console_get_register(uintptr_t addr, uint8_t i)
{
@@ -47,39 +48,43 @@ static void erc32_console_set_register(uintptr_t addr, uint8_t i, uint8_t val)
static int erc32_console_first_open(int major, int minor, void *arg);
#if (CONSOLE_USE_INTERRUPTS)
static ssize_t erc32_console_write_support_int(
int minor, const char *buf, size_t len);
static ssize_t erc32_console_write_support_int(
int minor, const char *buf, size_t len);
static rtems_interrupt_entry erc32_UART_A;
static rtems_interrupt_entry erc32_UART_B;
static rtems_interrupt_entry erc32_UART_ERROR;
#else
int console_inbyte_nonblocking( int port );
static ssize_t erc32_console_write_support_polled(
int minor, const char *buf, size_t len);
int console_inbyte_nonblocking( int port );
static ssize_t erc32_console_write_support_polled(
int minor, const char *buf, size_t len);
#endif
static void erc32_console_initialize(int minor);
#if (CONSOLE_USE_INTERRUPTS)
const console_fns erc32_fns = {
libchip_serial_default_probe, /* deviceProbe */
erc32_console_first_open, /* deviceFirstOpen */
NULL, /* deviceLastClose */
NULL, /* deviceRead */
erc32_console_write_support_int, /* deviceWrite */
erc32_console_initialize, /* deviceInitialize */
NULL, /* deviceWritePolled */
NULL, /* deviceSetAttributes */
true /* deviceOutputUsesInterrupts */
};
const console_fns erc32_fns = {
libchip_serial_default_probe, /* deviceProbe */
erc32_console_first_open, /* deviceFirstOpen */
NULL, /* deviceLastClose */
NULL, /* deviceRead */
erc32_console_write_support_int, /* deviceWrite */
erc32_console_initialize, /* deviceInitialize */
NULL, /* deviceWritePolled */
NULL, /* deviceSetAttributes */
true /* deviceOutputUsesInterrupts */
};
#else
const console_fns erc32_fns = {
libchip_serial_default_probe, /* deviceProbe */
erc32_console_first_open, /* deviceFirstOpen */
NULL, /* deviceLastClose */
console_inbyte_nonblocking, /* deviceRead */
erc32_console_write_support_polled, /* deviceWrite */
erc32_console_initialize, /* deviceInitialize */
NULL, /* deviceWritePolled */
NULL, /* deviceSetAttributes */
false /* deviceOutputUsesInterrupts */
};
const console_fns erc32_fns = {
libchip_serial_default_probe, /* deviceProbe */
erc32_console_first_open, /* deviceFirstOpen */
NULL, /* deviceLastClose */
console_inbyte_nonblocking, /* deviceRead */
erc32_console_write_support_polled, /* deviceWrite */
erc32_console_initialize, /* deviceInitialize */
NULL, /* deviceWritePolled */
NULL, /* deviceSetAttributes */
false /* deviceOutputUsesInterrupts */
};
#endif
console_tbl Console_Configuration_Ports [] = {
@@ -148,7 +153,7 @@ static int erc32_console_first_open(int major, int minor, void *arg)
#if (CONSOLE_USE_INTERRUPTS)
static ssize_t erc32_console_write_support_int(
int minor, const char *buf, size_t len)
int minor, const char *buf, size_t len)
{
if (len > 0) {
console_data *cd = &Console_Port_Data[minor];
@@ -177,9 +182,7 @@ static ssize_t erc32_console_write_support_int(
return 0;
}
static void erc32_console_isr_error(
rtems_vector_number vector
)
static rtems_isr erc32_console_isr_error( void *vector )
{
int UStat;
@@ -198,9 +201,7 @@ static void erc32_console_isr_error(
ERC32_Clear_interrupt( ERC32_INTERRUPT_UART_ERROR );
}
static void erc32_console_isr_a(
rtems_vector_number vector
)
static rtems_isr erc32_console_isr_a( void *vector )
{
console_data *cd = &Console_Port_Data[0];
@@ -239,9 +240,7 @@ static void erc32_console_isr_a(
} while (ERC32_Is_interrupt_pending (ERC32_INTERRUPT_UART_A_RX_TX));
}
static void erc32_console_isr_b(
rtems_vector_number vector
)
static rtems_isr erc32_console_isr_b( void *vector )
{
console_data *cd = &Console_Port_Data[1];
@@ -300,17 +299,16 @@ static ssize_t erc32_console_write_support_polled(
#endif
/*
* Console Device Driver Entry Points
*
*/
static void erc32_console_initialize(
int minor
)
static void erc32_console_initialize( int minor )
{
console_data *cd = &Console_Port_Data [minor];
#if (CONSOLE_USE_INTERRUPTS)
static bool interrupts_installed = false;
#endif
cd->bActive = false;
cd->pDeviceContext = 0;
@@ -326,9 +324,47 @@ static void erc32_console_initialize(
* Initialize Hardware
*/
#if (CONSOLE_USE_INTERRUPTS)
set_vector(erc32_console_isr_a, CONSOLE_UART_A_TRAP, 1);
set_vector(erc32_console_isr_b, CONSOLE_UART_B_TRAP, 1);
set_vector(erc32_console_isr_error, CONSOLE_UART_ERROR_TRAP, 1);
if (!interrupts_installed) {
rtems_interrupt_entry_initialize(
&erc32_UART_A,
erc32_console_isr_a,
NULL,
"process UART A"
);
rtems_interrupt_entry_install(
ERC32_INTERRUPT_UART_A_RX_TX,
RTEMS_INTERRUPT_UNIQUE,
&erc32_UART_A
);
SPARC_Clear_and_unmask_interrupt(CONSOLE_UART_A_TRAP);
rtems_interrupt_entry_initialize(
&erc32_UART_B,
erc32_console_isr_b,
NULL,
"process UART B"
);
rtems_interrupt_entry_install(
ERC32_INTERRUPT_UART_B_RX_TX,
RTEMS_INTERRUPT_UNIQUE,
&erc32_UART_B
);
SPARC_Clear_and_unmask_interrupt(CONSOLE_UART_B_TRAP);
rtems_interrupt_entry_initialize(
&erc32_UART_ERROR,
erc32_console_isr_error,
NULL,
"process UART Error"
);
rtems_interrupt_entry_install(
ERC32_INTERRUPT_UART_ERROR,
RTEMS_INTERRUPT_UNIQUE,
&erc32_UART_ERROR
);
SPARC_Clear_and_unmask_interrupt(CONSOLE_UART_ERROR_TRAP);
interrupts_installed = true;
}
#endif
/* Clear any previous error flags */

View File

@@ -84,11 +84,7 @@ extern int end; /* last address in the program */
/* functions */
rtems_isr_entry set_vector( /* returns old vector */
rtems_isr_entry handler, /* isr routine */
rtems_vector_number vector, /* vector number */
int type /* RTEMS or RAW intr */
);
void SPARC_Clear_and_unmask_interrupt(rtems_vector_number vector);
void BSP_fatal_exit(uint32_t error);

View File

@@ -62,7 +62,14 @@
#define TM27_USE_VECTOR_HANDLER
#define Install_tm27_vector( handler ) \
set_vector( (handler), TEST_VECTOR, 1 );
rtems_interrupt_handler_install( \
TEST_VECTOR, \
"test tm27 interrupt", \
RTEMS_INTERRUPT_UNIQUE, \
handler, \
NULL \
); \
SPARC_Clear_and_unmask_interrupt(TEST_VECTOR);
#define Cause_tm27_intr() \
__asm__ volatile( "ta 0x10; nop " );

View File

@@ -66,7 +66,7 @@ void _CPU_SMP_Send_interrupt( uint32_t target_processor_index )
}
static rtems_isr bsp_inter_processor_interrupt(
rtems_vector_number vector
void *vector
)
{
_SMP_Inter_processor_interrupt_handler( _Per_CPU_Get() );
@@ -74,7 +74,21 @@ static rtems_isr bsp_inter_processor_interrupt(
static void erc32_install_inter_processor_interrupt( void )
{
set_vector( bsp_inter_processor_interrupt, IPI_VECTOR, 1 );
rtems_interrupt_entry erc32_handle_ipi;
rtems_interrupt_entry_initialize(
&erc32_handle_ipi,
bsp_inter_processor_interrupt,
NULL,
"process IPI Interrupt"
);
rtems_interrupt_entry_install(
IPI_VECTOR,
RTEMS_INTERRUPT_UNIQUE,
&erc32_handle_ipi
);
SPARC_Clear_and_unmask_interrupt(IPI_VECTOR);
}
RTEMS_SYSINIT_ITEM(

View File

@@ -1,61 +0,0 @@
/* set_vector
*
* This routine installs an interrupt vector on the SPARC simulator.
*
* INPUT PARAMETERS:
* handler - interrupt handler entry point
* vector - vector number
* type - 0 indicates raw hardware connect
* 1 indicates RTEMS interrupt connect
*
* OUTPUT PARAMETERS: NONE
*
* RETURNS:
* address of previous interrupt handler
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*
* Ported to ERC32 implementation of the SPARC by On-Line Applications
* Research Corporation (OAR) under contract to the European Space
* Agency (ESA).
*
* ERC32 modifications of respective RTEMS file: COPYRIGHT (c) 1995.
* European Space Agency.
*/
#include <bsp.h>
rtems_isr_entry set_vector( /* returns old vector */
rtems_isr_entry handler, /* isr routine */
rtems_vector_number vector, /* vector number */
int type /* RTEMS or RAW intr */
)
{
rtems_isr_entry previous_isr;
if ( type ) {
rtems_interrupt_catch( handler, vector, &previous_isr );
} else {
_CPU_ISR_install_raw_handler(
vector,
(void *)handler,
(void *)&previous_isr
);
}
if ( SPARC_IS_INTERRUPT_TRAP( vector ) ) {
uint32_t source;
source = SPARC_INTERRUPT_TRAP_TO_SOURCE( vector );
ERC32_Clear_interrupt( source );
ERC32_Unmask_interrupt( source );
}
return previous_isr;
}