forked from Imagelibrary/rtems
a899cdd57d
Removed all uses and implementations of set_vector() function across ERC32, LEON2, and LEON3 BSPs. Replaced with rtems_interrupt_handler_install() and rtems_interrupt_entry_install(). - Added ERC32_Clear_and_unmask_interrupt() and LEON_Clear_and_unmask_interrupt() for unmasking logic previously in set_vector(). - Deleted set_vector() definitions and implementations in each BSP. - Updated related obj.yml files. - Replaced set_vector() with rtems_interrupt_catch() in shared/gnatcommon.c.
374 lines
10 KiB
C
374 lines
10 KiB
C
/**
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* @file
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*
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* @brief Driver for serial ports on the ERC32.
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*/
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/*
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* Copyright (c) 2010 Tiemen Schut <T.Schut@sron.nl>
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rtems.org/license/LICENSE.
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*/
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#include <unistd.h>
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#include <termios.h>
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#include <stdlib.h>
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#include <rtems.h>
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#include <rtems/libio.h>
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#include <rtems/console.h>
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#include <rtems/termiostypes.h>
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#include <libchip/serial.h>
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#include <libchip/sersupp.h>
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#include <bsp.h>
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#include <bspopts.h>
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#define CONSOLE_BUF_SIZE (16)
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#define CONSOLE_UART_A_TRAP ERC32_TRAP_TYPE(ERC32_INTERRUPT_UART_A_RX_TX)
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#define CONSOLE_UART_B_TRAP ERC32_TRAP_TYPE(ERC32_INTERRUPT_UART_B_RX_TX)
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#define CONSOLE_UART_ERROR_TRAP ERC32_TRAP_TYPE(ERC32_INTERRUPT_UART_ERROR)
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static uint8_t erc32_console_get_register(uintptr_t addr, uint8_t i)
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{
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volatile uint32_t *reg = (volatile uint32_t *)addr;
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return (uint8_t) reg [i];
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}
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static void erc32_console_set_register(uintptr_t addr, uint8_t i, uint8_t val)
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{
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volatile uint32_t *reg = (volatile uint32_t *)addr;
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reg [i] = val;
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}
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static int erc32_console_first_open(int major, int minor, void *arg);
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#if (CONSOLE_USE_INTERRUPTS)
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static ssize_t erc32_console_write_support_int(
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int minor, const char *buf, size_t len);
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static rtems_interrupt_entry erc32_UART_A;
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static rtems_interrupt_entry erc32_UART_B;
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static rtems_interrupt_entry erc32_UART_ERROR;
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#else
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int console_inbyte_nonblocking( int port );
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static ssize_t erc32_console_write_support_polled(
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int minor, const char *buf, size_t len);
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#endif
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static void erc32_console_initialize(int minor);
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#if (CONSOLE_USE_INTERRUPTS)
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const console_fns erc32_fns = {
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libchip_serial_default_probe, /* deviceProbe */
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erc32_console_first_open, /* deviceFirstOpen */
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NULL, /* deviceLastClose */
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NULL, /* deviceRead */
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erc32_console_write_support_int, /* deviceWrite */
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erc32_console_initialize, /* deviceInitialize */
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NULL, /* deviceWritePolled */
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NULL, /* deviceSetAttributes */
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true /* deviceOutputUsesInterrupts */
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};
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#else
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const console_fns erc32_fns = {
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libchip_serial_default_probe, /* deviceProbe */
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erc32_console_first_open, /* deviceFirstOpen */
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NULL, /* deviceLastClose */
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console_inbyte_nonblocking, /* deviceRead */
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erc32_console_write_support_polled, /* deviceWrite */
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erc32_console_initialize, /* deviceInitialize */
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NULL, /* deviceWritePolled */
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NULL, /* deviceSetAttributes */
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false /* deviceOutputUsesInterrupts */
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};
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#endif
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console_tbl Console_Configuration_Ports [] = {
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{
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.sDeviceName = "/dev/console_a",
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.deviceType = SERIAL_CUSTOM,
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.pDeviceFns = &erc32_fns,
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.deviceProbe = NULL,
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.pDeviceFlow = NULL,
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.ulMargin = 16,
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.ulHysteresis = 8,
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.pDeviceParams = (void *) -1, /* could be baud rate */
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.ulCtrlPort1 = 0,
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.ulCtrlPort2 = 0,
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.ulDataPort = 0,
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.getRegister = erc32_console_get_register,
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.setRegister = erc32_console_set_register,
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.getData = NULL,
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.setData = NULL,
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.ulClock = 16,
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.ulIntVector = ERC32_INTERRUPT_UART_A_RX_TX
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},
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{
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.sDeviceName = "/dev/console_b",
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.deviceType = SERIAL_CUSTOM,
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.pDeviceFns = &erc32_fns,
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.deviceProbe = NULL,
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.pDeviceFlow = NULL,
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.ulMargin = 16,
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.ulHysteresis = 8,
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.pDeviceParams = (void *) -1, /* could be baud rate */
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.ulCtrlPort1 = 0,
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.ulCtrlPort2 = 0,
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.ulDataPort = 0,
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.getRegister = erc32_console_get_register,
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.setRegister = erc32_console_set_register,
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.getData = NULL,
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.setData = NULL,
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.ulClock = 16,
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.ulIntVector = ERC32_INTERRUPT_UART_B_RX_TX
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},
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};
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/* always exactly two uarts for erc32 */
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#define ERC32_UART_COUNT (2)
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unsigned long Console_Configuration_Count = ERC32_UART_COUNT;
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static int erc32_console_first_open(int major, int minor, void *arg)
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{
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/* Check minor number */
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if (minor < 0 || minor > 1) {
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return -1;
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}
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rtems_libio_open_close_args_t *oca = arg;
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struct rtems_termios_tty *tty = oca->iop->data1;
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console_tbl *ct = Console_Port_Tbl [minor];
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console_data *cd = &Console_Port_Data [minor];
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cd->termios_data = tty;
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rtems_termios_set_initial_baud(tty, (int32_t)ct->pDeviceParams);
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return 0;
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}
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#if (CONSOLE_USE_INTERRUPTS)
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static ssize_t erc32_console_write_support_int(
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int minor, const char *buf, size_t len)
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{
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if (len > 0) {
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console_data *cd = &Console_Port_Data[minor];
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int k = 0;
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if (minor == 0) { /* uart a */
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for (k = 0;
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k < len && (ERC32_MEC.UART_Status & ERC32_MEC_UART_STATUS_THEA);
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k ++) {
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ERC32_MEC.UART_Channel_A = (unsigned char)buf[k];
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}
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ERC32_Force_interrupt(ERC32_INTERRUPT_UART_A_RX_TX);
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} else { /* uart b */
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for (k = 0;
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k < len && (ERC32_MEC.UART_Status & ERC32_MEC_UART_STATUS_THEB);
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k ++) {
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ERC32_MEC.UART_Channel_B = (unsigned char)buf[k];
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}
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ERC32_Force_interrupt(ERC32_INTERRUPT_UART_B_RX_TX);
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}
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cd->pDeviceContext = (void *)k;
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cd->bActive = true;
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}
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return 0;
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}
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static rtems_isr erc32_console_isr_error( void *vector )
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{
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int UStat;
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UStat = ERC32_MEC.UART_Status;
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if (UStat & ERC32_MEC_UART_STATUS_ERRA) {
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ERC32_MEC.UART_Status = ERC32_MEC_UART_STATUS_CLRA;
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ERC32_MEC.Control = ERC32_MEC.Control;
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}
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if (UStat & ERC32_MEC_UART_STATUS_ERRB) {
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ERC32_MEC.UART_Status = ERC32_MEC_UART_STATUS_CLRB;
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ERC32_MEC.Control = ERC32_MEC.Control;
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}
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ERC32_Clear_interrupt( ERC32_INTERRUPT_UART_ERROR );
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}
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static rtems_isr erc32_console_isr_a( void *vector )
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{
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console_data *cd = &Console_Port_Data[0];
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/* check for error */
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if (ERC32_MEC.UART_Status & ERC32_MEC_UART_STATUS_ERRA) {
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ERC32_MEC.UART_Status = ERC32_MEC_UART_STATUS_CLRA;
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ERC32_MEC.Control = ERC32_MEC.Control;
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}
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do {
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int chars_to_dequeue = (int)cd->pDeviceContext;
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int rv = 0;
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int i = 0;
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char buf[CONSOLE_BUF_SIZE];
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/* enqueue received chars */
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while (i < CONSOLE_BUF_SIZE) {
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if (!(ERC32_MEC.UART_Status & ERC32_MEC_UART_STATUS_DRA))
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break;
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buf[i] = ERC32_MEC.UART_Channel_A;
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++i;
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}
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if ( i )
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rtems_termios_enqueue_raw_characters(cd->termios_data, buf, i);
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/* dequeue transmitted chars */
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if (ERC32_MEC.UART_Status & ERC32_MEC_UART_STATUS_THEA) {
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rv = rtems_termios_dequeue_characters(
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cd->termios_data, chars_to_dequeue);
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if ( !rv ) {
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cd->pDeviceContext = 0;
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cd->bActive = false;
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}
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ERC32_Clear_interrupt (ERC32_INTERRUPT_UART_A_RX_TX);
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}
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} while (ERC32_Is_interrupt_pending (ERC32_INTERRUPT_UART_A_RX_TX));
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}
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static rtems_isr erc32_console_isr_b( void *vector )
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{
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console_data *cd = &Console_Port_Data[1];
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/* check for error */
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if (ERC32_MEC.UART_Status & ERC32_MEC_UART_STATUS_ERRB) {
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ERC32_MEC.UART_Status = ERC32_MEC_UART_STATUS_CLRB;
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ERC32_MEC.Control = ERC32_MEC.Control;
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}
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do {
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int chars_to_dequeue = (int)cd->pDeviceContext;
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int rv = 0;
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int i = 0;
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char buf[CONSOLE_BUF_SIZE];
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/* enqueue received chars */
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while (i < CONSOLE_BUF_SIZE) {
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if (!(ERC32_MEC.UART_Status & ERC32_MEC_UART_STATUS_DRB))
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break;
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buf[i] = ERC32_MEC.UART_Channel_B;
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++i;
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}
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if ( i )
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rtems_termios_enqueue_raw_characters(cd->termios_data, buf, i);
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/* dequeue transmitted chars */
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if (ERC32_MEC.UART_Status & ERC32_MEC_UART_STATUS_THEB) {
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rv = rtems_termios_dequeue_characters(
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cd->termios_data, chars_to_dequeue);
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if ( !rv ) {
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cd->pDeviceContext = 0;
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cd->bActive = false;
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}
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ERC32_Clear_interrupt (ERC32_INTERRUPT_UART_B_RX_TX);
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}
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} while (ERC32_Is_interrupt_pending (ERC32_INTERRUPT_UART_B_RX_TX));
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}
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#else
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extern void console_outbyte_polled( int port, unsigned char ch );
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static ssize_t erc32_console_write_support_polled(
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int minor,
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const char *buf,
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size_t len
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)
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{
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int nwrite = 0;
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while (nwrite < len) {
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console_outbyte_polled( minor, *buf++ );
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nwrite++;
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}
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return nwrite;
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}
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#endif
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/*
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* Console Device Driver Entry Points
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*/
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static void erc32_console_initialize( int minor )
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{
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console_data *cd = &Console_Port_Data [minor];
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#if (CONSOLE_USE_INTERRUPTS)
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static bool interrupts_installed = false;
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#endif
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cd->bActive = false;
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cd->pDeviceContext = 0;
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/*
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* Initialize the Termios infrastructure. If Termios has already
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* been initialized by another device driver, then this call will
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* have no effect.
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*/
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rtems_termios_initialize();
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/*
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* Initialize Hardware
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*/
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#if (CONSOLE_USE_INTERRUPTS)
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if (!interrupts_installed) {
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rtems_interrupt_entry_initialize(
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&erc32_UART_A,
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erc32_console_isr_a,
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NULL,
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"process UART A"
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);
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rtems_interrupt_entry_install(
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ERC32_INTERRUPT_UART_A_RX_TX,
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RTEMS_INTERRUPT_UNIQUE,
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&erc32_UART_A
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);
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SPARC_Clear_and_unmask_interrupt(CONSOLE_UART_A_TRAP);
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rtems_interrupt_entry_initialize(
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&erc32_UART_B,
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erc32_console_isr_b,
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NULL,
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"process UART B"
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);
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rtems_interrupt_entry_install(
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ERC32_INTERRUPT_UART_B_RX_TX,
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RTEMS_INTERRUPT_UNIQUE,
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&erc32_UART_B
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);
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SPARC_Clear_and_unmask_interrupt(CONSOLE_UART_B_TRAP);
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rtems_interrupt_entry_initialize(
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&erc32_UART_ERROR,
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erc32_console_isr_error,
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NULL,
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"process UART Error"
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);
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rtems_interrupt_entry_install(
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ERC32_INTERRUPT_UART_ERROR,
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RTEMS_INTERRUPT_UNIQUE,
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&erc32_UART_ERROR
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);
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SPARC_Clear_and_unmask_interrupt(CONSOLE_UART_ERROR_TRAP);
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interrupts_installed = true;
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}
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#endif
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/* Clear any previous error flags */
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ERC32_MEC.UART_Status = ERC32_MEC_UART_STATUS_CLRA;
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ERC32_MEC.UART_Status = ERC32_MEC_UART_STATUS_CLRB;
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}
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