forked from Imagelibrary/rtems
Updates from Pedro Romano.
This commit is contained in:
@@ -41,9 +41,11 @@ SECTIONS
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*(.text)
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. = ALIGN (16);
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*(.eh_fram)
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*(.eh_frame)
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. = ALIGN (16);
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*(.gnu.linkonce.t*)
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/*
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* C++ constructors
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*/
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@@ -57,20 +59,22 @@ SECTIONS
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*(.dtors)
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LONG(0)
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__DTOR_END__ = .;
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_etext = ALIGN( 0x10 ) ;
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}
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.rodata ADDR( .text ) + SIZEOF( .text ):
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{
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_rodata_start = . ;
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*(.rodata)
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_erodata = ALIGN( 0x10 ) ;
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_etext = ALIGN( 0x10 ) ;
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}
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.data ADDR( .rodata ) + SIZEOF( .rodata ):
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.data ADDR( .text ) + SIZEOF( .text ):
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{
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_data_start = . ;
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*(.data)
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*(.gnu.linkonce.d*)
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*(.gcc_except_table)
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_edata = ALIGN( 0x10 ) ;
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}
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.bss ADDR( .data ) + SIZEOF( .data ):
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{
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_bss_start = . ;
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@@ -54,7 +54,7 @@ extern "C" {
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* ----------------------------------
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*/
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typedef volatile struct lcsr_regs {
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typedef volatile struct {
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unsigned long slave_adr[2];
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unsigned long slave_trn[2];
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unsigned long slave_ctl;
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@@ -86,7 +86,7 @@ typedef volatile struct lcsr_regs {
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#define lcsr ((lcsr_regs * const) 0xFFF40000)
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typedef volatile struct mcchip_regs {
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typedef volatile struct {
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unsigned char chipID;
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unsigned char chipREV;
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@@ -184,7 +184,7 @@ void char_put(int port, char ch);
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#define RX_DATA_AVAILABLE 0x01
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#define SCC_VECTOR 0x40
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typedef volatile struct scc_regs {
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typedef volatile struct {
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unsigned char pad1;
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volatile unsigned char csr;
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unsigned char pad2;
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@@ -209,7 +209,7 @@ typedef volatile struct scc_regs {
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* IO space and respond to address modifier codes $29 and $2D.
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* On FORCE CPU use address gcsr_vme and device /dev/vme16d32.
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*/
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typedef volatile struct gcsr_regs {
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typedef volatile struct {
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unsigned char chip_revision;
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unsigned char chip_id;
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unsigned char lmsig;
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