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2003-02-14 Joel Sherrill <joel@OARcorp.com>

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AMD a29k port declared obsolete.
	* a29k/.cvsignore, a29k/ChangeLog, a29k/Makefile.am, a29k/acinclude.m4,
	a29k/configure.ac, a29k/portsw/.cvsignore, a29k/portsw/ChangeLog,
	a29k/portsw/Makefile.am, a29k/portsw/README, a29k/portsw/bsp_specs,
	a29k/portsw/configure.ac, a29k/portsw/times,
	a29k/portsw/console/.cvsignore, a29k/portsw/console/Makefile.am,
	a29k/portsw/console/concntl.h, a29k/portsw/console/console.c,
	a29k/portsw/console/serial.c, a29k/portsw/console/serial.h,
	a29k/portsw/include/.cvsignore, a29k/portsw/include/Makefile.am,
	a29k/portsw/include/bsp.h, a29k/portsw/start/.cvsignore,
	a29k/portsw/start/Makefile.am, a29k/portsw/start/amd.ah,
	a29k/portsw/start/pswmacro.ah, a29k/portsw/start/register.S,
	a29k/portsw/start/register.ah, a29k/portsw/start/start.S,
	a29k/portsw/startup/.cvsignore, a29k/portsw/startup/Makefile.am,
	a29k/portsw/startup/bspclean.c, a29k/portsw/startup/bspstart.c,
	a29k/portsw/startup/linkcmds, a29k/portsw/startup/main.c,
	a29k/portsw/startup/ramlink, a29k/portsw/startup/romlink,
	a29k/portsw/startup/setvec.c, a29k/portsw/wrapup/.cvsignore,
	a29k/portsw/wrapup/Makefile.am: Removed.
This commit is contained in:
Joel Sherrill
2003-02-14 19:39:43 +00:00
parent a6f8daab36
commit a6ca1f3567
40 changed files with 22 additions and 3830 deletions
Download Patch File Download Diff File Expand all files Collapse all files

22
c/src/lib/libbsp/ChangeLog
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@@ -1,3 +1,25 @@
2003-02-14 Joel Sherrill <joel@OARcorp.com>
AMD a29k port declared obsolete.
* a29k/.cvsignore, a29k/ChangeLog, a29k/Makefile.am, a29k/acinclude.m4,
a29k/configure.ac, a29k/portsw/.cvsignore, a29k/portsw/ChangeLog,
a29k/portsw/Makefile.am, a29k/portsw/README, a29k/portsw/bsp_specs,
a29k/portsw/configure.ac, a29k/portsw/times,
a29k/portsw/console/.cvsignore, a29k/portsw/console/Makefile.am,
a29k/portsw/console/concntl.h, a29k/portsw/console/console.c,
a29k/portsw/console/serial.c, a29k/portsw/console/serial.h,
a29k/portsw/include/.cvsignore, a29k/portsw/include/Makefile.am,
a29k/portsw/include/bsp.h, a29k/portsw/start/.cvsignore,
a29k/portsw/start/Makefile.am, a29k/portsw/start/amd.ah,
a29k/portsw/start/pswmacro.ah, a29k/portsw/start/register.S,
a29k/portsw/start/register.ah, a29k/portsw/start/start.S,
a29k/portsw/startup/.cvsignore, a29k/portsw/startup/Makefile.am,
a29k/portsw/startup/bspclean.c, a29k/portsw/startup/bspstart.c,
a29k/portsw/startup/linkcmds, a29k/portsw/startup/main.c,
a29k/portsw/startup/ramlink, a29k/portsw/startup/romlink,
a29k/portsw/startup/setvec.c, a29k/portsw/wrapup/.cvsignore,
a29k/portsw/wrapup/Makefile.am: Removed.
2003-02-11 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* configure.ac: AM_INIT_AUTOMAKE([1.7.2]).

14
c/src/lib/libbsp/a29k/.cvsignore
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@@ -1,14 +0,0 @@
aclocal.m4
autom4te*.cache
config.cache
config.guess
config.log
config.status
config.sub
configure
depcomp
install-sh
Makefile
Makefile.in
missing
mkinstalldirs

60
c/src/lib/libbsp/a29k/ChangeLog
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@@ -1,60 +0,0 @@
2003-02-11 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* configure.ac: AM_INIT_AUTOMAKE([1.7.2]).
2003-02-11 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* configure.ac: AC_PREREQ(2.57).
2002-12-06 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* configure.ac: Remove RTEMS_CHECK_BSP_CACHE.
2002-10-21 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* .cvsignore: Reformat.
Add autom4te*cache.
Remove autom4te.cache.
2002-03-27 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* configure.ac:
AC_INIT(package,_RTEMS_VERSION,_RTEMS_BUGS).
AM_INIT_AUTOMAKE([no-define foreign 1.6]).
* Makefile.am: Remove AUTOMAKE_OPTIONS.
2001-10-11 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* .cvsignore: Add autom4te.cache for autoconf > 2.52.
* configure.in: Remove.
* configure.ac: New file, generated from configure.in by autoupdate.
2001-10-09 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* acinclude.m4: New file.
* configure.in: Use RTEMS_BSP_SUBDIR.
2000-11-09 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* Makefile.am: Use ... instead of RTEMS_TOPdir in ACLOCAL_AMFLAGS.
2000-11-02 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* Makefile.am: Switch to ACLOCAL_AMFLAGS = -I $(RTEMS_TOPdir)/aclocal.
2000-11-01 Joel Sherrill <joel@OARcorp.com>
* ChangeLog: Removed incorrectly placed entry.
2000-10-27 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* Makefile.am: ACLOCAL_AMFLAGS= -I $(RTEMS_TOPdir)/macros.
Switch to GNU canonicalization.
2000-09-25 Joel Sherrill <joel@OARcorp.com>
* ChangeLog: Entry added to wrong file and moved.
2000-08-10 Joel Sherrill <joel@OARcorp.com>
* ChangeLog: New file.

11
c/src/lib/libbsp/a29k/Makefile.am
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@@ -1,11 +0,0 @@
##
## $Id$
##
ACLOCAL_AMFLAGS = -I ../../../../../aclocal
# Descend into the $(RTEMS_BSP_FAMILY) directory
SUBDIRS = $(RTEMS_BSP_FAMILY)
include $(top_srcdir)/../../../../../automake/subdirs.am
include $(top_srcdir)/../../../../../automake/local.am

11
c/src/lib/libbsp/a29k/acinclude.m4
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@@ -1,11 +0,0 @@
# RTEMS_CHECK_BSPDIR(RTEMS_BSP)
AC_DEFUN([RTEMS_CHECK_BSPDIR],
[
RTEMS_BSP_ALIAS(ifelse([$1],,[${RTEMS_BSP}],[$1]),bspdir)
case "$bspdir" in
portsw )
AC_CONFIG_SUBDIRS([portsw]);;
*)
AC_MSG_ERROR([Invalid BSP]);;
esac
])

23
c/src/lib/libbsp/a29k/configure.ac
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@@ -1,23 +0,0 @@
## Process this file with autoconf to produce a configure script.
##
## $Id$
AC_PREREQ(2.57)
AC_INIT([rtems-c-src-lib-libbsp-a29k],[_RTEMS_VERSION],[rtems-bugs@OARcorp.com])
AC_CONFIG_SRCDIR([portsw])
RTEMS_TOP(../../../../..)
AC_CONFIG_AUX_DIR(../../../../..)
RTEMS_CANONICAL_TARGET_CPU
AM_INIT_AUTOMAKE([no-define foreign 1.7.2])
AM_MAINTAINER_MODE
RTEMS_ENV_RTEMSBSP
RTEMS_CHECK_CUSTOM_BSP(RTEMS_BSP)
RTEMS_PROJECT_ROOT
RTEMS_CHECK_BSPDIR([$RTEMS_BSP])
# Explicitly list all Makefiles here
AC_CONFIG_FILES([Makefile])
AC_OUTPUT

14
c/src/lib/libbsp/a29k/portsw/.cvsignore
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@@ -1,14 +0,0 @@
aclocal.m4
autom4te*.cache
config.cache
config.guess
config.log
config.status
config.sub
configure
depcomp
install-sh
Makefile
Makefile.in
missing
mkinstalldirs

181
c/src/lib/libbsp/a29k/portsw/ChangeLog
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@@ -1,181 +0,0 @@
2003-02-11 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* configure.ac: AM_INIT_AUTOMAKE([1.7.2]).
2003-02-11 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* configure.ac: AC_PREREQ(2.57).
2002-12-17 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* console/Makefile.am: Don't include @RTEMS_BSP@.cfg.
* start/Makefile.am: Don't include @RTEMS_BSP@.cfg.
* startup/Makefile.am: Don't include @RTEMS_BSP@.cfg.
2002-12-12 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* start/Makefile.am: Use install-data-local to install startfile.
2002-12-10 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* wrapup/Makefile.am: Don't include @RTEMS_BSP@.cfg.
2002-10-21 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* .cvsignore: Reformat.
Add autom4te*cache.
Remove autom4te.cache.
2002-08-21 Joel Sherrill <joel@OARcorp.com>
* bsp_specs: Added support for -nostdlibs.
2002-08-11 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* console/Makefile.am: Use .$(OBJEXT) instead of .o.
* start/Makefile.am: Use .$(OBJEXT) instead of .o.
* startup/Makefile.am: Use .$(OBJEXT) instead of .o.
* wrapup/Makefile.am: Use .$(OBJEXT) instead of .o.
2002-07-21 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* startup/Makefile.am: Reformat.
2002-07-20 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* start/Makefile.am: Eliminate PGM.
Add bsplib_DATA = $(PROJECT_RELEASE)/lib/start$(LIB_VARIANT).o.
2002-07-19 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* startup/Makefile.am: Add bsplib_DATA = linkcmds ramlink romlink.
2002-07-04 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* wrapup/Makefile.am: Eliminate TMPINSTALL_FILES.
Remove $(OBJS) from all-local.
2002-06-29 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* wrapup/Makefile.am: Remove preinstallation of libbsp.a,
2002-03-27 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* configure.ac:
AC_INIT(package,_RTEMS_VERSION,_RTEMS_BUGS).
AM_INIT_AUTOMAKE([no-define foreign 1.6]).
* console/Makefile.am: Remove AUTOMAKE_OPTIONS.
* Makefile.am: Remove AUTOMAKE_OPTIONS.
* include/Makefile.am: Remove AUTOMAKE_OPTIONS.
* start/Makefile.am: Remove AUTOMAKE_OPTIONS.
* startup/Makefile.am: Remove AUTOMAKE_OPTIONS.
* wrapup/Makefile.am: Remove AUTOMAKE_OPTIONS.
2001-12-22 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* bsp_specs: Replace -lrtemsall with -lrtemsbsp -lrtemscpu,
replace -lrtemsall_g with -lrtemsbsp_g -lrtemscpu_g.
2001-12-09 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* configure.ac: Add RTEMS_BSPOPTS_* for SERIAL_INPUT, HIF_INPUT,
SERIAL_OUTPUT, HIF_OUTPUT.
* console/console.c: Remove NO_BSP_INIT, SERIAL_INPUT, HIF_INPUT,
SERIAL_OUTPUT, HIF_OUTPUT, add #include <bsp.h>.
2001-11-30 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* configure.ac: Introduce RTEMS_BSP_CONFIGURE.
2001-10-11 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* .cvsignore: Add autom4te.cache for autoconf > 2.52.
* configure.in: Remove.
* configure.ac: New file, generated from configure.in by autoupdate.
2001-09-27 Joel Sherrill <joel@OARcorp.com>
* include/bsp.h: Renamed delay() to rtems_bsp_delay().
2001-09-27 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* include/Makefile.am: Use 'CLEANFILES ='.
* include/Makefile.am: Use 'TMPINSTALL_FILES ='.
2001-05-25 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* include/Makefile.am: Use *_HEADERS instead of *H_FILES, add
bspopts.h.
* include/.cvsignore: Add bspopts.h.
* include/bsp.h: Add bspopts.h.
* console/Makefile.am: Use *_HEADERS instead of H_FILES.
* configure.in: Add bspopts.h.
2001-05-10 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* configure.in: Use RTEMS_PROG_CC_FOR_TARGET([-ansi -fasm]).
2001-01-08 Joel Sherrill <joel@OARcorp.com>
* wrapup/Makefile.am: Remove warning missed in shmsupp removal.
2001-01-08 Joel Sherrill <joel@OARcorp.com>
* Shared memory support removed since it was non-functional.
* shmsupp/.cvsignore, shmsupp/Makefile.am, shmsupp/addrconv.c,
shmsupp/getcfg.c, shmsupp/lock.c, shmsupp/mpisr.c: Removed.
* configure.in, Makefile.am, wrapup/Makefile.am: Modified to
reflect above.
2000-11-09 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* Makefile.am: Use ... instead of RTEMS_TOPdir in ACLOCAL_AMFLAGS.
2000-11-02 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* Makefile.am: Switch to ACLOCAL_AMFLAGS = -I $(RTEMS_TOPdir)/aclocal.
2000-11-01 Joel Sherrill <joel@OARcorp.com>
* startup/bspstart.c: assoc.h, error.h, libio_.h, libio.h,
and libcsupport.h moved from libc to lib/include/rtems and
now must be referenced as <rtems/XXX.h>. Header file order
was cleaned up while doing this.
2000-10-27 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* Makefile.am: ACLOCAL_AMFLAGS= -I $(RTEMS_TOPdir)/macros.
Switch to GNU canonicalization.
2000-09-25 Joel Sherrill <joel@OARcorp.com>
* ChangeLog: Entry added to wrong file and moved.
2000-09-25 Joel Sherrill <joel@OARcorp.com>
* bsp_specs: Formatting more like other bsp_specs.
* include/bsp.h: CPU_CLOCK_RATE_MHZ not a real variable to
elimate need for including bsp.h in libcpu.
* startup/bspstart.c: Ditto.
* wrapup/Makefile.am: Did not list shmdr.
2000-09-22 Joel Sherrill <joel@OARcorp.com>
* start/crt0.S: Renamed to start/start.S.
* start/start.S: Formerly start/crt0.S.
* startup/linkcmds: New file. GNU linker script that is not
correct for the target board but links programs.
* bsp_specs: Use linkcmds.
* include/Makefile.am, start/Makefile.am startup/Makefile.am:
Now work.
* startup/bspstart.c, startup/setvec.c: "#if 0"'ed out references
to reoutines in assembly that are in turn "#if 0"'ed out.
2000-09-04 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* console/Makefile.am, shmsupp/Makefile.am, start/Makefile.am,
startup/Makefile.am, wrapup/Makefile.am: Include compile.am.
2000-08-10 Joel Sherrill <joel@OARcorp.com>
* ChangeLog: New file.

16
c/src/lib/libbsp/a29k/portsw/Makefile.am
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@@ -1,16 +0,0 @@
##
## $Id$
##
ACLOCAL_AMFLAGS = -I ../../../../../../aclocal
# wrapup is the one that actually builds and installs the library
# from the individual .rel files built in other directories
SUBDIRS = include start startup console wrapup
include $(top_srcdir)/../../bsp.am
EXTRA_DIST = bsp_specs times
include $(top_srcdir)/../../../../../../automake/subdirs.am
include $(top_srcdir)/../../../../../../automake/local.am

71
c/src/lib/libbsp/a29k/portsw/README
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@@ -1,71 +0,0 @@
#
# README,v 1.2 1995/05/31 16:56:03 joel Exp
#
# This is a sample hardware description file for a BSP. This comment
# block does not have to appear in a real one. The intention of this
# file is to provide a central place to look when searching for
# information about a board when starting a new BSP. For example,
# you may want to find an existing timer driver for the chip you are
# using on your board. It is easier to grep for the chip name in
# all of the HARDWARE files than to peruse the source tree. Hopefully,
# making the HARDDWARE files accurate will also alleviate the common
# problem of not knowing anything about a board based on its BSP
# name.
#
# NOTE: If you have a class of peripheral chip on board which
# is not in this list please add it to this file so
# others will also use the same name.
#
# Timer resolution is the way it is configured in this BSP.
# On a counting timer, this is the length of time which
# corresponds to 1 count.
#
# $Id$
BSP NAME: fastsbc1
BOARD: Fasssst Computers, Fast SBC-1
BUS: SchoolBus
CPU FAMILY: i386
CPU: Intel Hexium
COPROCESSORS: Witch Hex87
MODE: 32 bit mode
DEBUG MONITOR: HexBug
PERIPHERALS
===========
TIMERS: Intel i8254
RESOLUTION: .0001 microseconds
SERIAL PORTS: Zilog Z8530 (with 2 ports)
REAL-TIME CLOCK: RTC-4
DMA: Intel i8259
VIDEO: none
SCSI: none
NETWORKING: none
DRIVER INFORMATION
==================
CLOCK DRIVER: RTC-4
IOSUPP DRIVER: Zilog Z8530 port A
SHMSUPP: polled and interrupts
TIMER DRIVER: Intel i8254
TTY DRIVER: stub only
STDIO
=====
PORT: Console port 0
ELECTRICAL: RS-232
BAUD: 9600
BITS PER CHARACTER: 8
PARITY: None
STOP BITS: 1
NOTES
=====
(1) 900 Mhz and 950 Mhz versions.
(2) 1 Gb or 2 Gb RAM.
(3) PC compatible if HexBug not enabled.

24
c/src/lib/libbsp/a29k/portsw/bsp_specs
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@@ -1,24 +0,0 @@
# This is an untested dummy
%rename cpp old_cpp
%rename lib old_lib
%rename endfile old_endfile
%rename startfile old_startfile
%rename link old_link
*cpp:
%(old_cpp) %{qrtems: -D__embedded__} -Asystem(embedded)
*lib:
%{!qrtems: %(old_lib)} \
%{!nostdlib: %{qrtems: --start-group %{!qrtems_debug: -lrtemsbsp -lrtemscpu } %{qrtems_debug: -lrtemsbsp_g -lrtemscpu_g} \
-lc -lgcc --end-group \
%{!qnolinkcmds: -T linkcmds%s}}}
*startfile:
%{!qrtems: %(old_startfile)} %{!nostdlib: %{qrtems: \
%{!qrtems_debug: start.o%s} \
%{qrtems_debug: start_g.o%s}}}
*link:
%{!qrtems: %(old_link)} %{qrtems: -dc -dp -N -e _start}

41
c/src/lib/libbsp/a29k/portsw/configure.ac
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@@ -1,41 +0,0 @@
## Process this file with autoconf to produce a configure script.
##
## $Id$
AC_PREREQ(2.57)
AC_INIT([rtems-c-src-lib-libbsp-a29k-portsw],[_RTEMS_VERSION],[rtems-bugs@OARcorp.com])
AC_CONFIG_SRCDIR([bsp_specs])
RTEMS_TOP(../../../../../..)
AC_CONFIG_AUX_DIR(../../../../../..)
RTEMS_CANONICAL_TARGET_CPU
AM_INIT_AUTOMAKE([no-define foreign 1.7.2])
RTEMS_BSP_CONFIGURE
RTEMS_PROG_CC_FOR_TARGET([-ansi -fasm])
RTEMS_CANONICALIZE_TOOLS
/* only one of the "INPUT"-defines can be defined */
RTEMS_BSPOPTS_SET([SERIAL_INPUT],[*],[1])
RTEMS_BSPOPTS_HELP([SERIAL_INPUT],[use serial input])
RTEMS_BSPOPTS_SET([HIF_INPUT],[*],[])
RTEMS_BSPOPTS_HELP([HIF_INPUT],[use HIF input])
/* both of the following can be defined */
RTEMS_BSPOPTS_SET([SERIAL_OUTPUT],[*],[1])
RTEMS_BSPOPTS_HELP([SERIAL_OUTPUT],
[use serial console output])
RTEMS_BSPOPTS_SET([HIF_OUTPUT],[*],[])
RTEMS_BSPOPTS_HELP([HIF_OUTPUT],
[use HIF console output])
# Explicitly list all Makefiles here
AC_CONFIG_FILES([Makefile
console/Makefile
include/Makefile
start/Makefile
startup/Makefile
wrapup/Makefile])
AC_OUTPUT

2
c/src/lib/libbsp/a29k/portsw/console/.cvsignore
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@@ -1,2 +0,0 @@
Makefile
Makefile.in

41
c/src/lib/libbsp/a29k/portsw/console/Makefile.am
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@@ -1,41 +0,0 @@
##
## $Id$
##
PGM = $(ARCH)/console.rel
C_FILES = console.c serial.c
C_O_FILES = $(C_FILES:%.c=$(ARCH)/%.$(OBJEXT))
include_HEADERS = concntl.h
noinst_HEADERS = serial.h
OBJS = $(C_O_FILES)
include $(top_srcdir)/../../../../../../automake/compile.am
include $(top_srcdir)/../../../../../../automake/lib.am
#
# (OPTIONAL) Add local stuff here using +=
#
$(PGM): $(OBJS)
$(make-rel)
$(PROJECT_INCLUDE):
$(mkinstalldirs) $@
$(PROJECT_INCLUDE)/%.h: %.h
$(INSTALL_DATA) $< $@
# the .rel file built here will be put into libbsp.a by ../wrapup/Makefile
TMPINSTALL_FILES += $(PROJECT_INCLUDE) $(include_HEADERS:%=$(PROJECT_INCLUDE)/%)
all-local: $(ARCH) $(OBJS) $(PGM) $(TMPINSTALL_FILES)
.PRECIOUS: $(PGM)
EXTRA_DIST = concntl.h console.c serial.c serial.h
include $(top_srcdir)/../../../../../../automake/local.am

16
c/src/lib/libbsp/a29k/portsw/console/concntl.h
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@@ -1,16 +0,0 @@
/*
* $Id$
*/
typedef enum
{
CON_KBHIT,
CON_GET_RAW_BYTE,
CON_SEND_RAW_BYTE
} console_ioctl_t;
typedef struct
{
console_ioctl_t ioctl_type;
unsigned32 param;
} console_ioctl_request_t;

290
c/src/lib/libbsp/a29k/portsw/console/console.c
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@@ -1,290 +0,0 @@
/*
* This file contains the template for a console IO package.
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#include <bsp.h>
#if defined(SERIAL_INPUT) && defined(HIF_INPUT)
#error SERIAL_INPUT and HIF_INPUT cannot both be defined!!!
#endif
#include <rtems/libio.h>
#include "serial.h"
#include "concntl.h"
#ifndef lint
static char _sccsid[] = "@(#)console.c 09/12/96 1.13\n";
#endif
/* console_initialize
*
* This routine initializes the console IO driver.
*
* Input parameters: NONE
*
* Output parameters: NONE
*
* Return values:
*/
rtems_device_driver console_initialize(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
)
{
rtems_status_code status;
if ( arg )
{
if ( console_duartinit(minor,*(unsigned32*)arg) )
return RTEMS_INVALID_NUMBER;
}
else
{
if ( console_duartinit(1,9600) || console_duartinit(0,9600) )
{
return RTEMS_INVALID_NUMBER;
}
}
status = rtems_io_register_name(
"/dev/console",
major,
(rtems_device_minor_number) 0
);
if (status != RTEMS_SUCCESSFUL)
rtems_fatal_error_occurred(status);
return RTEMS_SUCCESSFUL;
}
/* is_character_ready
*
* This routine returns TRUE if a character is available.
*
* Input parameters: NONE
*
* Output parameters: NONE
*
* Return values:
*/
rtems_boolean is_character_ready(
char *ch
)
{
*ch = '\0'; /* return NULL for no particular reason */
return(TRUE);
}
/* inbyte
*
* This routine reads a character from the SOURCE.
*
* Input parameters: NONE
*
* Output parameters: NONE
*
* Return values:
* character read from SOURCE
*/
char inbyte( unsigned int minor )
{
/*
* If polling, wait until a character is available.
*/
#ifdef HIF_INPUT
char retch;
_read( 1, &retch, 1 );
return retch;
#endif
#ifdef SERIAL_INPUT
return console_sps_getc( minor );
#endif
}
/* outbyte
*
* This routine transmits a character out the SOURCE. It may support
* XON/XOFF flow control.
*
* Input parameters:
* ch - character to be transmitted
*
* Output parameters: NONE
*/
void outbyte( unsigned int minor,
char ch
)
{
/*
* If polling, wait for the transmitter to be ready.
* Check for flow control requests and process.
* Then output the character.
*/
#ifdef SERIAL_OUTPUT
console_sps_putc( minor, ch );
#endif
/*
* Carriage Return/New line translation.
*/
if ( ch == '\n' )
outbyte( minor, '\r' );
}
/*
* Open entry point
*/
rtems_device_driver console_open(
rtems_device_major_number major,
rtems_device_minor_number minor,
void * arg
)
{
return RTEMS_SUCCESSFUL;
}
/*
* Close entry point
*/
rtems_device_driver console_close(
rtems_device_major_number major,
rtems_device_minor_number minor,
void * arg
)
{
return RTEMS_SUCCESSFUL;
}
/*
* read bytes from the serial port. We only have stdin.
*/
rtems_device_driver console_read(
rtems_device_major_number major,
rtems_device_minor_number minor,
void * arg
)
{
rtems_libio_rw_args_t *rw_args;
unsigned8 *buffer;
unsigned32 maximum;
unsigned32 count = 0;
rw_args = (rtems_libio_rw_args_t *) arg;
buffer = rw_args->buffer;
maximum = rw_args->count;
for (count = 0; count < maximum; count++) {
buffer[ count ] = inbyte(minor);
if (buffer[ count ] == '\n' || buffer[ count ] == '\r') {
buffer[ count++ ] = '\n';
outbyte( minor, '\n' ); /* newline */
break;
}
else if (buffer[ count ] == '\b' && count > 0 )
{
outbyte( minor, '\b' ); /* move back one space */
outbyte( minor, ' ' ); /* erase the character */
outbyte( minor, '\b' ); /* move back one space */
count-=2;
}
else
outbyte( minor, buffer[ count ] ); /* echo the character */
}
rw_args->bytes_moved = count;
return (count > 0) ? RTEMS_SUCCESSFUL : RTEMS_UNSATISFIED;
}
/*
* write bytes to the serial port. Stdout and stderr are the same.
*/
rtems_device_driver console_write(
rtems_device_major_number major,
rtems_device_minor_number minor,
void * arg
)
{
int count;
int maximum;
rtems_libio_rw_args_t *rw_args;
unsigned8 *buffer;
rw_args = (rtems_libio_rw_args_t *) arg;
buffer = rw_args->buffer;
maximum = rw_args->count;
#ifdef HIF_OUTPUT
_write( 0, buffer, maximum );
#endif
#ifdef SERIAL_OUTPUT
for (count = 0; count < maximum; count++) {
if ( buffer[ count ] == '\n') {
outbyte(minor,'\r');
}
outbyte( minor,buffer[ count ] );
}
#endif
rw_args->bytes_moved = maximum;
return 0;
}
/*
* IO Control entry point
*/
rtems_device_driver console_control(
rtems_device_major_number major,
rtems_device_minor_number minor,
void * arg
)
{
if (!arg)
return RTEMS_INVALID_ADDRESS;
switch( ((console_ioctl_request_t *)arg)->ioctl_type )
{
case CON_KBHIT:
/* check if keyboard was hit */
((console_ioctl_request_t *)arg)->param = console_sps_kbhit(minor);
break;
case CON_GET_RAW_BYTE:
((console_ioctl_request_t *)arg)->param = inbyte(minor);
break;
case CON_SEND_RAW_BYTE:
outbyte(minor, ((console_ioctl_request_t *)arg)->param);
break;
default:
break;
}
return RTEMS_SUCCESSFUL;
}

217
c/src/lib/libbsp/a29k/portsw/console/serial.c
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@@ -1,217 +0,0 @@
/*
* $Id$
*/
#include "serial.h"
#include "rtems.h"
typedef unsigned char uchar ; /* Abbreviations */
typedef unsigned short ushort ;
typedef unsigned long ulong ;
#if 0
#define BAUDRate 9600 /* Fixed Uart baud rate */
#endif
#define SEND_WAIT 0x0100 /* Waiting to send character */
#define TDR(i)
/********************************************************************
*** 16552 specific DUART definitions.
*******************************************************************/
typedef struct uart_16552 DUART ;
#ifndef notdef
struct uart_16552
{
short u_short[8*2] ;
} ;
#define u_reg(n) u_short[2*(n)]
#else
struct uart_16552
{
int u_int[8] ;
} ;
#define u_reg(n) u_int[(n)]
#endif
#define u_tdr u_reg(0) /* Transmit Data Register (write) */
#define u_rdr u_reg(0) /* Receive Data Register (read) */
#define u_dlr0 u_reg(0) /* Divisor Latch Register (lsb) */
#define u_ier u_reg(1) /* Interrupt Enable Register */
#define u_dlr1 u_reg(1) /* Divisor Latch Register (msb) */
#define u_iir u_reg(2) /* Interrupt ID Register (read) */
#define u_fcr u_reg(2) /* FIFO Control Register (write) */
#define u_afr u_reg(2) /* Alternate Funct Reg (read/write) */
#define u_lcr u_reg(3) /* Line Control Register */
#define u_mcr u_reg(4) /* Modem Control Register */
#define u_lsr u_reg(5) /* Line Status Register */
#define u_msr u_reg(6) /* Modem Status Register */
#define u_spr u_reg(7) /* Scratch Pad Register */
#define uart1 ((volatile DUART *)0x90000380)
#define uart2 ((volatile DUART *)0x90000300)
#define NUM_UARTS 2
static volatile DUART * duart[NUM_UARTS] = { uart1, uart2 };
extern void display_msg(void);
/*extern int sprintf();*/
#define board_rev_reg ((volatile short *)0x90000080)
static unsigned int shift_val = 0;
/***********************************************************************
*** 16552 DUART initialization routine.
***********************************************************************/
int
console_duartinit(unsigned int uart_num, unsigned int BAUDRate)
{
register uchar tmp;
unsigned int board_rev = *board_rev_reg & 0xff;
switch( BAUDRate )
{
case 1200:
case 2400:
case 9600:
case 19200:
case 38400:
case 57600:
break;
default:
/* unknown baud rate */
return FALSE;
}
/* the board rev register should never be 0xff.
if it equals 0xff, assume that we're on old hardware
that needs all values shifted by 8. */
if ( board_rev == 0xff )
shift_val = 8;
else
shift_val = 0;
if ( uart_num >= NUM_UARTS )
return -1;
duart[uart_num]->u_lcr = 0x80<<shift_val ; /* Set DLAB bit to 1 */
duart[uart_num]->u_dlr0 = ((115200 / BAUDRate) >> 0)<<shift_val ; /* Set baud */
duart[uart_num]->u_dlr1 = ((115200 / BAUDRate) >> 8)<<shift_val ; /* rate */
duart[uart_num]->u_lcr = 0x03<<shift_val ; /* 8 bits, no parity, 1 stop */
duart[uart_num]->u_mcr = 0x0b<<shift_val ; /* Assert RTS, DTR & OUT2 */
duart[uart_num]->u_fcr = 0x00<<shift_val ; /* Clear 16552 FIFOs */
/* Is the following write of 0x01 needed? */
/* Let's try it without... */
duart[uart_num]->u_fcr = 0xc7<<shift_val ; /* Enable 16552 FIFOs */
duart[uart_num]->u_ier = 0x07<<shift_val ; /* Enable transmit/receive ints */
tmp = duart[uart_num]->u_lsr ; /* Re-arm interrupts */
tmp = duart[uart_num]->u_rdr ;
tmp = duart[uart_num]->u_msr ;
return(0);
}
/*------------ end of duartinit function ----------------*/
/***********************************************************************
*** Transmit character to host.
***********************************************************************/
int console_sps_putc(unsigned int uart_num, int ch)
{
register unsigned short stat;
if ( uart_num >= NUM_UARTS )
return -1;
/*
* Pause until there is room in the UART transmit
* buffer.
*/
do {
stat = duart[uart_num]->u_lsr>>shift_val;
} while (!(stat & 0x40));
/*
* Transmit data. (Junk)
*/
TDR(ch)
duart[uart_num]->u_tdr = ch<<shift_val ;
return ch;
}
/***********************************************************************
*** Read character from host.
***********************************************************************/
int console_sps_getc(unsigned int uart_num)
{
register unsigned short stat;
register int ch;
if ( uart_num >= NUM_UARTS )
return -1;
stat = duart[uart_num]->u_lsr>>shift_val;
while (!(stat & 0x01))
{
rtems_task_wake_after( RTEMS_YIELD_PROCESSOR );
stat = duart[uart_num]->u_lsr>>shift_val;
}
ch = duart[uart_num]->u_rdr>>shift_val;
return ch;
}
/***********************************************************************
*** check character from host.
***********************************************************************/
int console_sps_kbhit(unsigned int uart_num)
{
register unsigned short stat;
if ( uart_num >= NUM_UARTS )
return -1;
stat = duart[uart_num]->u_lsr>>shift_val;
return ((stat & 0x01));
}

8
c/src/lib/libbsp/a29k/portsw/console/serial.h
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@@ -1,8 +0,0 @@
/*
* $Id$
*/
int console_duartinit(unsigned int uart_num, unsigned int BAUDRate);
int console_sps_putc(unsigned int uart_num, int ch);
int console_sps_getc(unsigned int uart_num);
int console_sps_kbhit(unsigned int uart_num);

7
c/src/lib/libbsp/a29k/portsw/include/.cvsignore
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@@ -1,7 +0,0 @@
Makefile
Makefile.in
bspopts.h
bspopts.h.in
coverhd.h
stamp-h
stamp-h.in

22
c/src/lib/libbsp/a29k/portsw/include/Makefile.am
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@@ -1,22 +0,0 @@
##
## $Id$
##
include_HEADERS = bsp.h coverhd.h bspopts.h
$(PROJECT_INCLUDE):
$(mkinstalldirs) $@
$(PROJECT_INCLUDE)/%.h: %.h
$(INSTALL_DATA) $< $@
coverhd.h: $(top_srcdir)/../../shared/include/coverhd.h
$(INSTALL_DATA) $< $@
CLEANFILES = coverhd.h
TMPINSTALL_FILES = $(PROJECT_INCLUDE) $(include_HEADERS:%=$(PROJECT_INCLUDE)/%)
all-local: $(TMPINSTALL_FILES)
include $(top_srcdir)/../../../../../../automake/local.am

110
c/src/lib/libbsp/a29k/portsw/include/bsp.h
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@@ -1,110 +0,0 @@
/* bsp.h
*
* This include file contains all board IO definitions.
*
* XXX : put yours in here
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#ifndef __PORTSW_h
#define __PORTSW_h
#ifdef __cplusplus
extern "C" {
#endif
#include <bspopts.h>
#include <rtems.h>
#include <console.h>
#include <clockdrv.h>
/*
* confdefs.h overrides for this BSP:
* - number of termios serial ports (defaults to 1)
* - Interrupt stack space is not minimum if defined.
*/
/* #define CONFIGURE_NUMBER_OF_TERMIOS_PORTS 2 */
#define CONFIGURE_INTERRUPT_STACK_MEMORY (4 * 1024)
/*
* Define the time limits for RTEMS Test Suite test durations.
* Long test and short test duration limits are provided. These
* values are in seconds and need to be converted to ticks for the
* application.
*
*/
#define MAX_LONG_TEST_DURATION 300 /* 5 minutes = 300 seconds */
#define MAX_SHORT_TEST_DURATION 3 /* 3 seconds */
/*
* Stuff for Time Test 27
*/
#define MUST_WAIT_FOR_INTERRUPT 0
#define Install_tm27_vector( handler ) set_vector( (handler), 0, 1 )
#define Cause_tm27_intr()
#define Clear_tm27_intr()
#define Lower_tm27_intr()
/*
* Simple spin delay in microsecond units for device drivers.
* This is very dependent on the clock speed of the target.
*/
#define rtems_bsp_delay( microseconds ) \
{ \
}
/* Constants */
/* #define CPU_CLOCK_RATE_MHZ 25*/
#define RAM_START 0
#define RAM_END 0x100000
/* miscellaneous stuff assumed to exist */
extern rtems_configuration_table BSP_Configuration;
/*
* Device Driver Table Entries
*/
/*
* NOTE: Use the standard Console driver entry
*/
/*
* NOTE: Use the standard Clock driver entry
*/
/* functions */
void bsp_cleanup( void );
no_cpu_isr_entry set_vector( /* returns old vector */
rtems_isr_entry handler, /* isr routine */
rtems_vector_number vector, /* vector number */
int type /* RTEMS or RAW intr */
);
#ifdef __cplusplus
}
#endif
#endif
/* end of include file */

2
c/src/lib/libbsp/a29k/portsw/start/.cvsignore
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@@ -1,2 +0,0 @@
Makefile
Makefile.in

32
c/src/lib/libbsp/a29k/portsw/start/Makefile.am
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@@ -1,32 +0,0 @@
##
## $Id$
##
S_FILES = start.S register.S
S_O_FILES = $(S_FILES:%.S=$(ARCH)/%.$(OBJEXT))
OBJS = $(S_O_FILES)
include $(top_srcdir)/../../../../../../automake/compile.am
include $(top_srcdir)/../../../../../../automake/lib.am
#
# (OPTIONAL) Add local stuff here using +=
#
install-data-local: $(PROJECT_RELEASE)/lib/start$(LIB_VARIANT).$(OBJEXT)
@$(mkinstalldirs) $(DESTDIR)$(bsplibdir)
$(INSTALL_DATA) $< $(DESTDIR)$(bsplibdir)
$(PROJECT_RELEASE)/lib/start$(LIB_VARIANT).$(OBJEXT): $(ARCH)/start.$(OBJEXT)
$(INSTALL_DATA) $< $@
TMPINSTALL_FILES += $(PROJECT_RELEASE)/lib/start$(LIB_VARIANT).$(OBJEXT)
all-local: $(ARCH) $(OBJS) $(ARCH)/start.$(OBJEXT) $(TMPINSTALL_FILES)
.PRECIOUS: $(ARCH)/start.$(OBJEXT)
EXTRA_DIST = amd.ah start.S pswmacro.ah register.S register.ah
include $(top_srcdir)/../../../../../../automake/local.am

517
c/src/lib/libbsp/a29k/portsw/start/amd.ah
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@@ -1,517 +0,0 @@
; /* @(#)amd.ah 1.1 96/05/23 08:56:58, TEI */
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Initialization values for registers after RESET
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; /* $Id$ */
;
;* File information and includes.
.file "amd.ah"
.ident "@(#)amd.ah 1.1 96/05/23 08:56:58, TEI"
;
;* AMD PROCESSOR SPECIFIC VALUES...
;
;
;* Processor revision levels...
;
; PRL values: 31-28 27-24
; Am29000 0 x
; Am29005 1 x
; Am29050 2 x
; Am29035 3 x
; Am29030 4 x
; Am29200 5 x
; Am29205 5 1x
; Am29240 6 0
; Manx 7 0
; Cougar 8 0
.equ AM29000_PRL, 0x00
.equ AM29005_PRL, 0x10
.equ AM29050_PRL, 0x20
.equ AM29035_PRL, 0x30
.equ AM29030_PRL, 0x40
.equ AM29200_PRL, 0x50
.equ AM29205_PRL, 0x58
.equ AM29240_PRL, 0x60
.equ AM29040_PRL, 0x70
.equ MANX_PRL, 0x70
.equ COUGAR_PRL, 0x80
;
;* data structures sizes.
;
.equ CFGINFO_SIZE, 16*4
.equ PGMINFO_SIZE, 16*4
.equ VARARGS_SPACE, 16*4
.equ WINDOWSIZE, 0x80
;
;* Am29027 Mode registers
;
.equ Am29027Mode1, 0x0fc00820
.equ Am29027Mode2, 0x00001375
;* Processor Based Equates and Defines
.equ SIG_SYNC, -1
.equ ENABLE, (SM)
.equ DISABLE, (ENABLE | DI | DA)
.equ DISABLE_FZ, (FZ | ENABLE | DI | DA)
.equ CLR_TRAP, (FZ | DA)
.equ InitOPS, (TD | SM | (3<<IMShift) | DI | DA)
.equ InitCPS, (TD | SM | (0<<IMShift) | DI | DA)
.equ InitCPS1, (TD | SM | (0<<IMShift) | DI )
.equ CPS_TMR, (SM | (0<<IMShift) | DI)
.equ CPS_INT0, (TD | SM | (0<<IMShift))
.equ CPS_TMRINT0, (SM | (0<<IMShift))
.equ InitCFG, 0x0
.equ InitRBP, (B0|B1|B2|B3|B4|B5)
.equ TMC_VALUE, 0xFFFFFF
.equ TMR_VALUE, (IE | TMC_VALUE)
;* 29205 specific (internal) peripheral initialization constants.
; Current Processor Status (CPS) Register.
; Old Processor Status Register (OPS).
.equ DA, 0x00001
.equ DI, 0x00002
.equ IMShift,0x2
.equ SM, 0x00010
.equ PI, 0x00020
.equ PD, 0x00040
.equ WM, 0x00080
.equ RE, 0x00100
.equ LK, 0x00200
.equ FZ, 0x00400
.equ TU, 0x00800
.equ TP, 0x01000
.equ TE, 0x02000
.equ IP, 0x04000
.equ CA, 0x08000
.equ MM, 0x10000
.equ TD, 0x20000
; Configuration Register (CFG)
.equ CD, 0x01
.equ CP, 0x02
.equ BO, 0x04
.equ RV, 0x08
.equ VF, 0x10
.equ DW, 0x20
.equ CO, 0x40
.equ EE, 0x80
.equ IDShift, 8
.equ CFG_ID, 0x100
.equ ILShift, 9
.equ CFG_ILMask, 0x600
.equ DDShift, 11
.equ CFG_DD, 0x800
.equ DLShift, 12
.equ CFG_DLMask, 0x3000
.equ PCEShift, 14
.equ CFG_PCE, 0x4000
.equ PMBShift, 16
.equ D16, 0x8000
.equ TBOShift, 23
.equ PRLShift, 24
; Channel Control Register (CHC)
.equ CV, 0x1
.equ NN, 0x2
.equ TRShift, 2
.equ TF, 0x400
.equ PER, 0x800
.equ LA, 0x1000
.equ ST, 0x2000
.equ ML, 0x4000
.equ LS, 0x8000
.equ CRShift, 16
.equ CNTLShift, 24
.equ CEShift, 31
.equ WBERShift, 31
; Register Bank Protect (RBP)
.equ B0, 0x1
.equ B1, 0x2
.equ B2, 0x4
.equ B3, 0x8
.equ B4, 0x10
.equ B5, 0x20
.equ B6, 0x40
.equ B7, 0x80
.equ B8, 0x100
.equ B9, 0x200
.equ B10, 0x400
.equ B11, 0x800
.equ B12, 0x1000
.equ B13, 0x2000
.equ B14, 0x4000
.equ B15, 0x8000
; Timer Counter
.equ TCVMask, 0xffffff
; Timer Reload Register
.equ IE, 0x1000000
.equ IN, 0x2000000
.equ OV, 0x4000000
.equ TRVMAsk, 0xffffff
; MMU Configuration
.equ PSShift, 8
.equ PS0Shift, 8
.equ PS1Shift, 12
; LRU Recommendation (LRU)
.equ LRUMask, 0xff
; Reason Vector (RSN)
.equ RSNMask, 0xff
; Region Mapping Address (RMA0 | RMA1)
.equ PBAMask,0xffff
.equ VBAShift, 16
; Region Mapping Control (RMC0 | RMC1)
.equ TIDMask, 0xff
.equ RMC_UE, 0x100
.equ RMC_UW, 0x200
.equ RMC_UR, 0x400
.equ RMC_SE, 0x800
.equ RMC_SW, 0x1000
.equ RMC_SR, 0x2000
.equ RMC_VE, 0x4000
.equ RMC_IO, 0x10000
.equ RGSShift, 17
.equ RMC_PGMShift, 22
; Instruction breakpoint Control (IBC0 | IBC1)
.equ BPIDMask, 0xff
.equ BTE, 0x100
.equ BRM, 0x200
.equ IBC_BSY, 0x400
.equ BEN, 0x800
.equ BHO, 0x1000
; Cache Data Register (CDR)
.equ CDR_US, 0x1
.equ P, 0x2
.equ CDR_V, 0x4
.equ IATAGShift, 20
; Cache Interface Register (CIR)
.equ CPTRShift, 2
.equ CIR_RW, 0x1000000
.equ FSELShift, 28
; Indirect Pointer A, B, C (IPA, IPB, IPC)
.equ IPShift, 2
; ALU Status (ALU)
.equ FCMask, 0x1F
.equ BPShift, 5
.equ C, 0x80
.equ Z, 0x100
.equ N, 0x200
.equ ALU_V, 0x400
.equ DF, 0x800
; Byte Pointer
.equ BPMask, 0x3
; Load/Store Count Remaining (CR)
.equ CRMask, 0xff
; Floating Point Environment (FPE)
.equ NM, 0x1
.equ RM, 0x2
.equ VM, 0x4
.equ UM, 0x8
.equ XM, 0x10
.equ DM, 0x20
.equ FRMShift, 6
.equ FF, 0x100
.equ ACFShift, 9
; Integer Environment (INTE)
.equ MO, 0x1
.equ DO, 0x2
; Floating Point Status (FPS)
.equ NS, 0x1
.equ RS, 0x2
.equ VS, 0x4
.equ FPS_US, 0x8
.equ XS, 0x10
.equ DS, 0x20
.equ NT, 0x100
.equ RT, 0x200
.equ VT, 0x400
.equ UT, 0x800
.equ XT, 0x1000
.equ DT, 0x2000
; Exception Opcode (EXOP)
.equ IOPMask, 0xff
; TLB Entry Word 0
; .equ TIDMask, 0xff already defined above
.equ TLB_UE, 0x100
.equ TLB_UW, 0x200
.equ TLB_UR, 0x400
.equ TLB_SE, 0x800
.equ TLB_SW, 0x1000
.equ TLB_SR, 0x2000
.equ TLB_VE, 0x4000
.equ VTAGShift, 15
; TLB Entry Word 1
.equ TLB_IO, 0x1
.equ U, 0x2
.equ TLB_PGMShift, 6
.equ RPNShift, 10
; Am29200 ROM Control bits.
.equ RMCT_DW0Shift, 29
.equ RMCT_DW1Shift, 21
.equ RMCT_DW2Shift, 13
.equ RMCT_DW3Shift, 5
; Am29200 DRAM Control bits.
.equ DW3, (1<<18)
.equ DW2, (1<<22)
.equ DW1, (1<<26)
.equ DW0, (1<<30)
; Internal peripheral address assignments.
.equ RMCT, 0x80000000
.equ RMCF, 0x80000004
.equ DRCT, 0x80000008
.equ DRCF, 0x8000000C
.equ DRM0, 0x80000010
.equ DRM1, 0x80000014
.equ DRM2, 0x80000018
.equ DRM3, 0x8000001C
.equ PIACT0, 0x80000020
.equ PIACT1, 0x80000020
.equ ICT, 0x80000028
.equ DMCT0, 0x80000030
.equ DMAD0, 0x80000034
.ifdef revA
.equ TAD0, 0x80000036
.equ TCN0, 0x8000003A
.else
.equ TAD0, 0x80000070 ; default
.equ TCN0, 0x8000003C ; default
.endif
.equ DMCN0, 0x80000038
.equ DMCT1, 0x80000040
.equ DMAD1, 0x80000044
.equ DMCN1, 0x80000048
.equ SPCT, 0x80000080
.equ SPST, 0x80000084
.equ SPTH, 0x80000088
.equ SPRB, 0x8000008C
.equ BAUD, 0x80000090
.equ PPCT, 0x800000C0
.equ PPST, 0x800000C1
.equ PPDT, 0x800000C4
.equ POCT, 0x800000D0
.equ PIN, 0x800000D4
.equ POUT, 0x800000D8
.equ POEN, 0x800000DC
.equ VCT, 0x800000E0
.equ TOP, 0x800000E4
.equ SIDE, 0x800000E8
.equ VDT, 0x800000EC
; Interrupt Controller Register bits.
.equ TXDI, (1<<5)
.equ RXDI, (1<<6)
.equ RXSI, (1<<7)
.equ PPI, (1<<11)
.equ DMA1I, (1<<13)
.equ DMA0I, (1<<14)
.equ IOPIMask, (0xFF<<16)
.equ VDI, (1<<27)
.equ ICT200_I, (TXDI|RXDI|RXSI|PPI|DMA1I|DMA0I|IOPIMask|VDI)
.equ ICT205_I, (TXDI|RXDI|RXSI|PPI|DMA1I|DMA0I|IOPIMask|VDI)
; Serial port Initialization bits
.equ NO_PARITY, 0
; SPST bits
.equ THREShift, 22
;* REGISTER Addresses
.equ ROMCntlRegAddr, 0x80000000
.equ ROMCfgRegAddr, 0x80000004
.equ DRAMCntlRegAddr, 0x80000008
.equ DRAMCfgRegAddr, 0x8000000C
.equ DRAMMap0RegAddr, 0x80000010
.equ DRAMMap1RegAddr, 0x80000014
.equ DRAMMap2RegAddr, 0x80000018
.equ DRAMMap3RegAddr, 0x8000001C
.equ PIACntl0RegAddr, 0x80000020
.equ PIACntl1RegAddr, 0x80000024
.equ INTRCntlRegAddr, 0x80000028
.equ DMACntl0RegAddr, 0x80000030
.equ DMACntl1RegAddr, 0x80000040
.equ SERPortCntlRegAddr, 0x80000080
.equ SERPortStatRegAddr, 0x80000084
.equ SERPortTHLDRegAddr, 0x80000088
.equ SERPortRbufRegAddr, 0x8000008C
.equ SERPortBaudRegAddr, 0x80000090
.equ PARPortCntlRegAddr, 0x800000C0
.equ PIOCntlRegAddr, 0x800000D0
.equ PIOInpRegAddr, 0x800000D4
.equ PIOOutRegAddr, 0x800000D8
.equ PIOOutEnaRegAddr, 0x800000DC
.equ VCTCntlRegAddr, 0x800000E0
;
;* Control constants
;
;* AM29030 Timer related constants.
.equ TMR_IE, 0x01000000
.equ TMR_IN, 0x02000000
.equ TMR_OV, 0x04000000
.equ TMC_INITCNT, 1613
;
;* System initialization values.
;
.equ __os_version, 0x0001 ;
.equ STACKSize, 0x8000 ;
.equ PGMExecMode, 0x0000 ;
.equ TSTCK_OFST, 28 * 4
.equ CSTCK_OFST, 29 * 4
.equ TMSTCK_OFST, 30 * 4
.equ CMSTCK_OFST, 31 * 4
.equ CTXSW_OK, 0xA55A ; ctx switch ok
.set NV_STARTOFST, 0x20 ; 32 bytes
.set NV_BAUDOFST, 0x00 ; 00 bytes
.set reg_cir, 29
.set reg_cdr, 30
.equ MSG_BUFSIZE, 0x1000 ; serial buffer size
.equ ILLOPTRAP, 0
.equ UATRAP, 1
.equ PVTRAP, 5
.equ UITLBMISSTRAP, 8
.equ UDTLBMISSTRAP, 9
.equ TIMERTRAP, 14
.equ TRACETRAP, 15
.equ XLINXTRAP, 16
.equ SERIALTRAP, 17
.equ SLOWTMRTRAP, 18
.equ PORTTRAP, 19
.equ SVSCTRAP, 80
.equ SVSCTRAP1, 81
.equ V_CACHETRAP, 66 ;
.equ V_SETSERVICE, 67 ;

442
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@@ -1,442 +0,0 @@
; /* @(#)pswmacro.ah 1.1 96/05/23 08:56:58, TEI */
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; macros: Do_install and init_TLB
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; /* $Id$ */
;* File information and includes.
.file "macro.ah"
.ident "@(#)pswmacro.ah 1.1 96/05/23 08:56:58, TEI"
.macro CONST32, RegName, RegValue
const RegName, RegValue
consth RegName, RegValue
.endm
.macro CONSTX, RegName, RegValue
.if (RegValue) <= 0x0000ffff
const RegName, RegValue
.else
const RegName, RegValue
consth RegName, RegValue
.endif
.endm
.macro PRODEV, RegName
srl RegName, RegName, 24
.endm
;
;* MACRO TO INSTALL VECTOR TABLE ENTRIES
;
;* Assumes vector table address in v0
.macro _setvec, trapnum, trapaddr
mfsr v0, vab ;
const v2, trapnum ;
sll v1, v2, 2 ;
add v1, v1, v0 ; v0 has location of vector tab
const v2, trapaddr ;
consth v2, trapaddr ;
store 0, 0, v2, v1 ;
nop ;
.endm
.macro syscall, name
const tav, HIF_@name ;
asneq V_SYSCALL, gr1, gr1 ;
nop ;
nop ;
.endm
;* MACRO TO INSTALL VECTOR TABLE ENTRIES
.macro Do_Install, V_Number, V_Address
const lr4, V_Address
consth lr4, V_Address
const lr3, V_Number * 4
consth lr3, V_Number * 4
call lr0, V_Install
nop
.endm
.macro Do_InstallX, V_Number, V_Address
const lr4, V_Address
consth lr4, V_Address
const lr3, V_Number * 4
consth lr3, V_Number * 4
call lr0, V_InstallX
nop
.endm
; push a register onto the stack
.macro pushreg, reg, sp
sub sp, sp, 4 ; adjust stack pointer
store 0, 0, reg, sp ; push register
.endm
.macro push, sp, reg
sub sp, sp, 4
store 0, 0, reg, sp
.endm
; pop the register from stack
.macro popreg, reg, sp
load 0, 0, reg, sp ; pop register
add sp, sp, 4 ; adjust stack pointer
.endm
.macro pop, reg, sp
load 0, 0, reg, sp
add sp, sp, 4
.endm
; push a special register onto stack
.macro pushspcl, spcl, tmpreg, sp
sub sp, sp, 4 ; adjust stack pointer
mfsr tmpreg, spcl ; get spcl reg
store 0, 0, tmpreg, sp ; push onto stack
.endm
.macro pushsr, sp, reg, sreg
mfsr reg, sreg
sub sp, sp, 4
store 0, 0, reg, sp
.endm
; pop a special register from stack
.macro popspcl, spcl, tmpreg, sp
load 0, 0, tmpreg, sp ; pop from stack
add sp, sp, 4 ; adjust stack pointer
mtsr spcl, tmpreg ; set spcl reg
.endm
.macro popsr, sreg, reg, sp
load 0, 0, reg, sp
add sp, sp, 4
mtsr sreg, reg
.endm
;
; save freeze mode registers on memory stack.
;
.macro SaveFZState, tmp1, tmp2
; save freeze mode registers.
pushspcl pc0, tmp1, msp
pushspcl pc1, tmp1, msp
pushspcl alu, tmp1, msp
pushspcl cha, tmp1, msp
pushspcl chd, tmp1, msp
pushspcl chc, tmp1, msp
pushspcl ops, tmp1, msp
; turn freeze off
const tmp2, FZ
mfsr tmp1, cps
andn tmp1, tmp1, tmp2
mtsr cps, tmp1
.endm
; restore freeze mode registers from memory stack.
.macro RestoreFZState, tmp1, tmp2
; turn freeze on
const tmp2, (FZ|DI|DA)
mfsr tmp1, cps
or tmp1, tmp1, tmp2
mtsr cps, tmp1
; restore freeze mode registers.
popspcl ops, tmp1, msp
popspcl chc, tmp1, msp
popspcl chd, tmp1, msp
popspcl cha, tmp1, msp
popspcl alu, tmp1, msp
popspcl pc1, tmp1, msp
popspcl pc0, tmp1, msp
.endm
;
;*
;
.equ WS, 512 ; window size
.equ RALLOC, 4 * 4 ; stack alloc for C
.equ SIGCTX_UM_SIZE, 40 * 4 ;
.equ SIGCTX_RFB, (38) * 4 ; user mode saved
.equ SIGCTX_SM_SIZE, 12 * 4 ;
.equ SIGCTX_SIG, (11)*4 + SIGCTX_UM_SIZE ;
.equ SIGCTX_GR1, (10)*4 + SIGCTX_UM_SIZE ;
.equ SIGCTX_RAB, (9)*4 + SIGCTX_UM_SIZE ;
.equ SIGCTX_PC0, (8)*4 + SIGCTX_UM_SIZE ;
.equ SIGCTX_PC1, (7)*4 + SIGCTX_UM_SIZE ;
.equ SIGCTX_PC2, (6)*4 + SIGCTX_UM_SIZE ;
.equ SIGCTX_CHC, (3)*4 + SIGCTX_UM_SIZE ;
.equ SIGCTX_OPS, (1)*4 + SIGCTX_UM_SIZE ;
.equ SIGCTX_TAV, (0)*4 + SIGCTX_UM_SIZE ;
.macro sup_sv
add it2, trapreg, 0 ; transfer signal #
sub msp, msp, 4 ;
store 0, 0, it2, msp ; save signal number
sub msp, msp, 4 ; push gr1
store 0, 0, gr1, msp ;
sub msp, msp, 4 ; push rab
store 0, 0, rab, msp ;
const it0, WS ; Window size
sub rab, rfb, it0 ; set rab = rfb-512
pushsr msp, it0, PC0 ; save program counter0
pushsr msp, it0, PC1 ; save program counter1
pushsr msp, it0, PC2 ; save program counter2
pushsr msp, it0, CHA ; save channel address
pushsr msp, it0, CHD ; save channel data
pushsr msp, it0, CHC ; save channel control
pushsr msp, it0, ALU ; save alu
pushsr msp, it0, OPS ; save ops
sub msp, msp, 4 ;
store 0, 0, tav, msp ; push tav
mtsrim chc, 0 ; no loadm/storem
mfsr it0, ops ; get ops value
const it1, (TD | DI) ; disable interrupts
consth it1, (TD | DI) ; disable interrupts
or it0, it0, it1 ; set bits
mtsr ops, it0 ; set new ops
const it0, sigcode ; signal handler
consth it0, sigcode ; signal handler
mtsr pc1, it0 ; store pc1
add it1, it0, 4 ; next addr
mtsr pc0, it1 ; store pc1 location
iret ; return
nop ; ALIGN
.endm
.macro sig_return
mfsr it0, cps ; get processor status
const it1, FZ|DA ; Freeze + traps disable
or it0, it0, it1 ; to set FZ+DA
mtsr cps, it0 ; in freeze mode
load 0, 0, tav, msp ; restore tav
add msp, msp, 4 ;
popsr OPS,it0, msp ;
popsr ALU,it0, msp ;
popsr CHC,it0, msp ;
popsr CHD,it0, msp ;
popsr CHA,it0, msp ;
popsr PC2,it0, msp ;
popsr PC1,it0, msp ;
popsr PC0,it0, msp ;
load 0, 0, rab, msp ;
add msp, msp, 4 ;
load 0, 0, it0, msp ;
add gr1, it0, 0 ; pop rsp
add msp, msp, 8 ; discount signal #
iret
.endm
.macro repair_R_stack
add v0, msp, SIGCTX_GR1 ; interrupted gr1
load 0, 0, v2, v0 ;
add v0, msp, SIGCTX_RFB ;
load 0, 0, v3, v0 ; interupted rfb
const v1, WS ;
sub v1, v3, v1 ; rfb-512
cpltu v0, v2, v1 ; test gr1 < rfb-512
jmpf v0, $1 ;
add gr1, rab, 0 ;
add v2, v1, 0 ; set LB = rfb-512
$1:
;* if gr1 < rfb-512 yes LB = rfb-512 signalled during spill
;* if no, LB=gr1 interrupted cache < 126 registers
cpleu v0, v2, rfb ; test LB<=rfb
jmpf v0, $2 ;
nop ;
add v2, rfb, 0 ;
$2:
cpeq v0, v3, rfb ; fill rfb->'rfb
jmpt v0, $3 ; if rfb==rfb'
const tav, (0x80<<2) ; prepare for fill
or tav, tav, v2 ;
mtsr IPA, tav ; IPA=LA<<2
sub tav, v3, gr98 ; cache fill LA->rfb
srl tav, tav, 2 ; convert to words
sub tav, tav, 1 ;
mtsr cr, tav ;
loadm 0, 0, gr0, v2 ; fill from LA->rfb
$3:
add rfb, v3, 0 ; move rfb upto 'rfb
sub rab, v1, 0 ; assign rab to rfb-512
add v0, msp, SIGCTX_GR1 ;
load 0, 0, v2, v0 ; v0 = interrupted gr1
add gr1, v2, 0 ; move gr1 upto 'gr1
nop ;
.endm
.macro repair_regs
mtsrim cr, 29 - 1 ; to restore locals
loadm 0, 0, v0, msp ;
add msp, msp, 29*4 ;
popsr Q, tav, msp ;
popsr IPC, tav, msp ;
popsr IPB, tav, msp ;
popsr IPA, tav, msp ;
pop FPStat3, msp ; floating point regs
pop FPStat2, msp ; floating point regs
pop FPStat1, msp ; floating point regs
pop FPStat0, msp ; floating point regs
add msp, msp, 3*4 ; R-stack repaired
.endm
;
;*HIF related...
;
; send the message in bufaddr to Montip.
.macro SendMessageToMontip, bufaddr
const lr2, bufaddr
$1:
call lr0, _msg_send
consth lr2, bufaddr
cpeq gr96, gr96, 0
jmpf gr96, $1
const lr2, bufaddr
.endm
; build a HIF_CALL message in bufaddr to send to montip.
.macro BuildHIFCALLMsg, bufaddr, tmp1, tmp2
const tmp1, bufaddr
consth tmp1, bufaddr
const tmp2, HIF_CALL_MSGCODE
store 0, 0, tmp2, tmp1 ; msg code
add tmp1, tmp1, 4
const tmp2, HIF_CALL_MSGLEN
store 0, 0, tmp2, tmp1 ; msg len
add tmp1, tmp1, 4
store 0, 0, gr121, tmp1 ; service number
add tmp1, tmp1, 4
store 0, 0, lr2, tmp1 ; lr2
add tmp1, tmp1, 4
store 0, 0, lr3, tmp1 ; lr3
add tmp1, tmp1, 4
store 0, 0, lr4, tmp1 ; lr4
.endm
;
;*
;* All the funky AMD style macros go in here...simply for
;* compatility
;
;
.macro IMPORT, symbol
.extern symbol
.endm
.macro GLOBAL, symbol
.global symbol
.endm
.macro USESECT, name, type
.sect name, type
.use name
.endm
.macro SECTION, name, type
.sect name, type
.endm
.macro FUNC, fname, lineno
.global fname
fname:
.endm
.macro ENDFUNC, fname, lineno
.endm
;*************************************LONG
.macro LONG, varname
varname:
.block 4
.endm
;*************************************UNSIGNED LONG
.macro ULONG, varname
varname:
.block 4
.endm
;*************************************SHORT
.macro SHORT, varname
varname:
.block 2
.endm
;*************************************CHAR
.macro CHAR, varname
varname:
.block 1
.endm
;*************************************LONGARRAY
.macro LONGARRAY, name, count
name:
.block count*4
.endm
;*************************************SHORTARRAY
.macro SHORTARRAY, name, count
name:
.block count*2
.endm
;*************************************CHARARRAY
.macro CHARARRAY, name, count
name:
.block count
.endm
;*************************************VOID_FPTR
.macro VOID_FPTR, name
name:
.block 4
.endm

393
c/src/lib/libbsp/a29k/portsw/start/register.S
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@@ -1,393 +0,0 @@
; /* @(#)register.s 1.1 96/05/23 08:57:34, TEI */
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Register Definitions and Usage Conventions
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; /* $Id$ */
;
;* File information and includes.
.file "c_register.s"
.ident "@(#)register.s 1.1 96/05/23 08:57:34, TEI\n"
; Basic guidelines for register distribution and usage are derived from
; the AMD application notes. It would be best to stick with the conventions
; laid out by AMD.
; Application Note: Context Switching with 29000 Processor By Daniel Mann.
;
;*************************************************************************
;
;
; Rule 1:
; Gr1 is used as a pointer to the register stack
; Lr1 is used as frame pointer
;
.reg regsp, gr1 ; Register Stack Pointer
.reg fp, lr1 ; frame pointer
.equ Rrsp, &regsp
.equ Rfp, &fp
.global Rrsp, Rfp
;
;*************************************************************************
;
;
; Gr2-Gr63 are not implemented in silicon
;
;
;*************************************************************************
;
;
; Rule 2:
; The registers GR64-GR95 are dedicated for operating system use.
;
; The register range GR64-GR95 i.e 32 Registers is furthur sub-divided as
; follows...
; gr64-gr67 interrupt handlers.
; gr68-gr71 OS temporaries I
; gr72-gr79 OS temporaries II
; gr80-gr95 OS statics. Dedicated throughout the operation of a program.
;
; 32 Registers for Operating System Use.
;
;
; Assigning Names to Interrupt Handlers Registers.
;
.reg OSint0, gr64
.reg OSint1, gr65
.reg OSint2, gr66
.reg OSint3, gr67
.equ ROSint0, &OSint0
.equ ROSint1, &OSint1
.equ ROSint2, &OSint2
.equ ROSint3, &OSint3
.global ROSint0, ROSint1, ROSint2, ROSint3
.reg TrapReg, gr64 ; trap register
.reg trapreg, gr64 ; trapreg
.equ RTrapReg, &TrapReg
.equ Rtrapreg, &trapreg
.global RTrapReg, Rtrapreg
;
; Assigning Names to Scratch/Temporary Registers.
;
.reg OStmp0, gr68
.reg OStmp1, gr69
.reg OStmp2, gr70
.reg OStmp3, gr71
.reg OStmp4, gr72
.reg OStmp5, gr73
.reg OStmp6, gr74
.reg OStmp7, gr75
.reg OStmp8, gr76
.reg OStmp9, gr77
.reg OStmp10, gr78
.reg OStmp11, gr79
.equ ROStmp0, &OStmp0
.equ ROStmp1, &OStmp1
.equ ROStmp2, &OStmp2
.equ ROStmp3, &OStmp3
.equ ROStmp4, &OStmp4
.equ ROStmp5, &OStmp5
.equ ROStmp6, &OStmp6
.equ ROStmp7, &OStmp7
.equ ROStmp8, &OStmp8
.equ ROStmp9, &OStmp9
.equ ROStmp10, &OStmp10
.equ ROStmp11, &OStmp11
.global ROStmp0, ROStmp1, ROStmp2, ROStmp3
.global ROStmp4, ROStmp5, ROStmp6, ROStmp7
.global ROStmp8, ROStmp9, ROStmp10, ROStmp11
;
; Assigning Names to Statics/Permanent Registers.
;
.reg OSsta0, gr80 ; Spill Address Register
.reg OSsta1, gr81 ; Fill Address Register
.reg OSsta2, gr82 ; Signal Address Register
.reg OSsta3, gr83 ; pcb Register
.reg OSsta4, gr84 ;
.reg OSsta5, gr85 ;
.reg OSsta6, gr86 ;
.reg OSsta7, gr87 ;
.reg OSsta8, gr88 ;
.reg OSsta9, gr89 ;
.reg OSsta10, gr90 ;
.reg OSsta11, gr91 ;
.reg OSsta12, gr92 ;
.reg OSsta13, gr93 ;
.reg OSsta14, gr94 ;
.reg OSsta15, gr95 ;
;
; Round 2 of Name Assignments
;
;
; Assignment of Specific Use oriented names to statics.
;
.reg SpillAddrReg, gr80
.reg FillAddrReg, gr81
.reg SignalAddrReg, gr82
.reg pcb, gr83
.reg etx, gr80
.reg ety, gr81
.reg etz, gr82
.reg etc, gr83
;*
.reg TimerExt, gr84
.reg TimerUtil, gr85
;*
.reg LEDReg, gr86
.reg ERRReg, gr87
.reg eta, gr86
.reg etb, gr87
;*
;* The following registers are used by switching code
.reg et0, gr88
.reg et1, gr89
.reg et2, gr90
.reg et3, gr91
.reg et4, gr92
.reg et5, gr93
.reg et6, gr94
.reg et7, gr95
; The floating point trap handlers need a few static registers
.reg FPStat0, gr88
.reg FPStat1, gr89
.reg FPStat2, gr90
.reg FPStat3, gr91
; The following registers are used temporarily during diagnostics.
.reg XLINXReg, gr92
.reg VMBCReg, gr93
.reg UARTReg, gr94
.reg ETHERReg, gr95
;*
;;*
.reg heapptr, gr90
.reg ArgvPtr, gr91
;;*
;
;* Preparing to export Register Names for the Linkers benefit.
;
.equ RSpillAddrReg, &SpillAddrReg
.equ RFillAddrReg, &FillAddrReg
.equ RSignalAddrReg, &SignalAddrReg
.equ Rpcb, &pcb
.equ Retx, &etx
.equ Rety, &ety
.equ Retz, &etz
.equ Reta, &eta
.equ Retb, &etb
.equ Retc, &etc
.equ RTimerExt, &TimerExt
.equ RTimerUtil, &TimerUtil
.equ RLEDReg, &LEDReg
.equ RERRReg, &ERRReg
.equ Ret0, &et0
.equ Ret1, &et1
.equ Ret2, &et2
.equ Ret3, &et3
.equ RFPStat0, &FPStat0
.equ RFPStat1, &FPStat1
.equ RFPStat2, &FPStat2
.equ RFPStat3, &FPStat3
.equ Rheapptr, &heapptr
.equ RHeapPtr, &heapptr
.equ RArgvPtr, &ArgvPtr
.equ Ret4, &et4
.equ Ret5, &et5
.equ Ret6, &et6
.equ Ret7, &et7
.equ RXLINXReg, &XLINXReg
.equ RVMBCReg, &VMBCReg
.equ RUARTReg, &UARTReg
.equ RETHERReg, &ETHERReg
.global RSpillAddrReg, RFillAddrReg, RSignalAddrReg
.global Rpcb, Retc
.global RTimerExt, RTimerUtil, RLEDReg, RERRReg
.global Ret0, Ret1, Ret2, Ret3, Ret4, Ret5, Ret6, Ret7, Reta, Retb
.global Retx, Rety, Retz
.global RFPStat0, RFPStat1, RFPStat2, RFPStat3
.global Rheapptr, RHeapPtr, RArgvPtr
.global RXLINXReg, RVMBCReg, RUARTReg, RETHERReg
;
;*************************************************************************
;
;
; Rule 3:
; Gr96-Gr127 Compiler & Programmer use registers.
; 32 Registers for Compiler & Programmer use
;
; 16 Registers for Compiler Use.
;
;
; Compiler Temporaries and Function Return Values
;
.reg v0, gr96 ; First word of Return Value
.reg v1, gr97
.reg v2, gr98
.reg v3, gr99
.reg v4, gr100
.reg v5, gr101
.reg v6, gr102
.reg v7, gr103
.reg v8, gr104
.reg v9, gr105
.reg v10, gr106
.reg v11, gr107
.reg v12, gr108
.reg v13, gr109
.reg v14, gr110
.reg v15, gr111
.equ Rv0, &v0
.equ Rv1, &v1
.equ Rv2, &v2
.equ Rv3, &v3
.equ Rv4, &v4
.equ Rv5, &v5
.equ Rv6, &v6
.equ Rv7, &v7
.equ Rv8, &v8
.equ Rv9, &v9
.equ Rv10, &v10
.equ Rv11, &v11
.equ Rv12, &v12
.equ Rv13, &v13
.equ Rv14, &v14
.equ Rv15, &v15
.global Rv0, Rv1, Rv2, Rv3, Rv4, Rv5, Rv6, Rv7, Rv8, Rv9
.global Rv10, Rv11, Rv12, Rv13, Rv14, Rv15
;
; User Process Statics Registers
;
.reg rp0, gr112 ; Reserved for Programmer, #0
.reg rp1, gr113 ; Reserved for Programmer, #1
.reg rp2, gr114 ; Reserved for Programmer, #2
.reg rp3, gr115 ; Reserved for Programmer, #3
.equ Rrp0, &rp0
.equ Rrp1, &rp1
.equ Rrp2, &rp2
.equ Rrp3, &rp3
.global Rrp0, Rrp1, Rrp2, Rrp3
;
; Compiler Temporaries II
;
.reg tv0, gr116 ;
.reg tv1, gr117 ;
.reg tv2, gr118 ;
.reg tv3, gr119 ;
.reg tv4, gr120 ;
.equ Rtv0, &tv0 ;
.equ Rtv1, &tv1 ;
.equ Rtv2, &tv2 ;
.equ Rtv3, &tv3 ;
.equ Rtv4, &tv4 ;
.global Rtv0, Rtv1, Rtv2, Rtv3, Rtv4
;
; Special pointers and registers for handlers and stack operations.
;
.reg tav, gr121 ; Temp, Arg for Trap Handlers
.reg tpc, gr122 ; Temp, Ret PC for Trap Handlers
.reg lrp, gr123 ; Large Return Pointer
.reg slp, gr124 ; Static Link Pointer
.reg msp, gr125 ; Memory Stack Pointer
.reg rab, gr126 ; Register Allocate Bound
.reg rfb, gr127 ; Register Free Bound
.equ Rtav, &tav
.equ Rtpc, &tpc
.equ Rlrp, &lrp
.equ Rslp, &slp
.equ Rmsp, &msp
.equ Rrab, &rab
.equ Rrfb, &rfb
.global Rtav, Rtpc, Rlrp, Rslp, Rmsp, Rrab, Rrfb

214
c/src/lib/libbsp/a29k/portsw/start/register.ah
View File

@@ -1,214 +0,0 @@
; /* @(#)register.ah 1.1 96/05/23 08:56:57, TEI */
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; naming of various registers
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; /* $Id$ */
;* File information and includes.
.file "register.ah"
.ident "@(#)register.ah 1.1 96/05/23 08:56:57, TEI\n"
;* Register Stack pointer and frame pointer registers.
.extern Rrsp, Rfp
.reg regsp, %%Rrsp
.reg fp, %%Rfp
.extern RTrapReg
.extern Rtrapreg
.reg TrapReg, %%RTrapReg
.reg trapreg, %%Rtrapreg
;* Operating system Interrupt handler registers (gr64-gr67)
.extern ROSint0, ROSint1, ROSint2, ROSint3
.reg OSint0, %%ROSint0
.reg OSint1, %%ROSint1
.reg OSint2, %%ROSint2
.reg OSint3, %%ROSint3
.reg it0, %%ROSint0
.reg it1, %%ROSint1
.reg it2, %%ROSint2
.reg it3, %%ROSint3
;* Operating system temporary (or scratch) registers (gr68-gr79)
.extern ROStmp0, ROStmp1, ROStmp2, ROStmp3
.extern ROStmp4, ROStmp5, ROStmp6, ROStmp7
.extern ROStmp8, ROStmp9, ROStmp10, ROStmp11
.reg OStmp0, %%ROStmp0
.reg OStmp1, %%ROStmp1
.reg OStmp2, %%ROStmp2
.reg OStmp3, %%ROStmp3
.reg OStmp4, %%ROStmp4
.reg OStmp5, %%ROStmp5
.reg OStmp6, %%ROStmp6
.reg OStmp7, %%ROStmp7
.reg OStmp8, %%ROStmp8
.reg OStmp9, %%ROStmp9
.reg OStmp10, %%ROStmp10
.reg OStmp11, %%ROStmp11
.reg kt0, %%ROStmp0
.reg kt1, %%ROStmp1
.reg kt2, %%ROStmp2
.reg kt3, %%ROStmp3
.reg kt4, %%ROStmp4
.reg kt5, %%ROStmp5
.reg kt6, %%ROStmp6
.reg kt7, %%ROStmp7
.reg kt8, %%ROStmp8
.reg kt9, %%ROStmp9
.reg kt10, %%ROStmp10
.reg kt11, %%ROStmp11
.reg TempReg0, %%ROSint0
.reg TempReg1, %%ROSint1
.reg TempReg2, %%ROSint2
.reg TempReg3, %%ROSint3
.reg TempReg4, %%ROStmp0
.reg TempReg5, %%ROStmp1
.reg TempReg6, %%ROStmp2
.reg TempReg7, %%ROStmp3
.reg TempReg8, %%ROStmp4
.reg TempReg9, %%ROStmp5
.reg TempReg10, %%ROStmp6
.reg TempReg11, %%ROStmp7
.reg TempReg12, %%ROStmp8
.reg TempReg13, %%ROStmp9
.reg TempReg14, %%ROStmp10
.reg TempReg15, %%ROStmp11
;* Assigned static registers
.extern RSpillAddrReg, RFillAddrReg, RSignalAddrReg
.extern Rpcb, Retc
.extern RTimerExt, RTimerUtil, RLEDReg, RERRReg
.extern Ret0, Ret1, Ret2, Ret3, Ret4, Ret5, Ret6, Ret7, Reta, Retb
.extern Retx, Rety, Retz
.reg SpillAddrReg, %%RSpillAddrReg
.reg FillAddrReg, %%RFillAddrReg
.reg SignalAddrReg, %%RSignalAddrReg
.reg pcb, %%Rpcb
.reg etx, %%Retx
.reg ety, %%Rety
.reg etz, %%Retz
.reg eta, %%Reta
.reg etb, %%Retb
.reg etc, %%Retc
.reg TimerExt, %%RTimerExt
.reg TimerUtil, %%RTimerUtil
.reg LEDReg, %%RLEDReg
.reg ERRReg, %%RERRReg
.reg et0, %%Ret0
.reg et1, %%Ret1
.reg et2, %%Ret2
.reg et3, %%Ret3
.reg et4, %%Ret4
.reg et5, %%Ret5
.reg et6, %%Ret6
.reg et7, %%Ret7
;
.equ SCB1REG_NUM, 88
.reg SCB1REG_PTR, %%Ret0
; The floating point trap handlers need a few static registers
.extern RFPStat0, RFPStat1, RFPStat2, RFPStat3
.extern Rheapptr, RHeapPtr, RArgvPtr
.reg FPStat0, %%RFPStat0
.reg FPStat1, %%RFPStat1
.reg FPStat2, %%RFPStat2
.reg FPStat3, %%RFPStat3
.reg heapptr, %%Rheapptr
.reg HeapPtr, %%RHeapPtr
.reg ArgvPtr, %%RArgvPtr
.extern RXLINXReg, RVMBCReg, RUARTReg, RETHERReg
.reg XLINXReg, %%RXLINXReg
.reg VMBCReg, %%RVMBCReg
.reg UARTReg, %%RUARTReg
.reg ETHERReg, %%RXLINXReg
;* Compiler and programmer registers. (gr96-gr127)
.extern Rv0, Rv1, Rv2, Rv3, Rv4, Rv5, Rv6, Rv7, Rv8, Rv9
.extern Rv10, Rv11, Rv12, Rv13, Rv14, Rv15
.reg v0, %%Rv0
.reg v1, %%Rv1
.reg v2, %%Rv2
.reg v3, %%Rv3
.reg v4, %%Rv4
.reg v5, %%Rv5
.reg v6, %%Rv6
.reg v7, %%Rv7
.reg v8, %%Rv8
.reg v9, %%Rv9
.reg v10, %%Rv10
.reg v11, %%Rv11
.reg v12, %%Rv12
.reg v13, %%Rv13
.reg v14, %%Rv14
.reg v15, %%Rv15
.extern Rtv0, Rtv1, Rtv2, Rtv3, Rtv4
.reg tv0, %%Rtv0
.reg tv1, %%Rtv1
.reg tv2, %%Rtv2
.reg tv3, %%Rtv3
.reg tv4, %%Rtv4
; ****************************************************************************
; For uatrap
; register definitions -- since this trap handler must allow for
; nested traps and interrupts such as TLB miss, protection violation,
; or Data Access Exception, and these trap handlers use the shared
; Temp registers, we must maintain our own that are safe over user-
; mode loads and stores. The following must be assigned global
; registers which are not used in INTR[0-3], TRAP[0-1], TLB miss,
; TLB protection violation, or data exception trap handlers.
; .reg cha_cpy, OStmp4 ; copy of CHA
; .reg chd_cpy, OStmp5 ; copy of CHD
; .reg chc_cpy, OStmp6 ; copy of CHC
; .reg LTemp0, OStmp7 ; local temp 0
; .reg LTemp1, OStmp8 ; local temp 1
; ****************************************************************************

292
c/src/lib/libbsp/a29k/portsw/start/start.S
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@@ -1,292 +0,0 @@
; @(#)crt0.s 1.3 96/05/31 14:40:27, AMD
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright 1988, 1989, 1990 Advanced Micro Devices, Inc.
;
; This software is the property of Advanced Micro Devices, Inc (AMD) which
; specifically grants the user the right to modify, use and distribute this
; software provided this notice is not removed or altered. All other rights
; are reserved by AMD.
;
; AMD MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS
; SOFTWARE. IN NO EVENT SHALL AMD BE LIABLE FOR INCIDENTAL OR CONSEQUENTIAL
; DAMAGES IN CONNECTION WITH OR ARISING FROM THE FURNISHING, PERFORMANCE, OR
; USE OF THIS SOFTWARE.
;
; So that all may benefit from your experience, please report any problems
; or suggestions about this software to the 29K Technical Support Center at
; 800-29-29-AMD (800-292-9263) in the USA, or 0800-89-1131 in the UK, or
; 0031-11-1129 in Japan, toll free. The direct dial number is 512-462-4118.
;
; Advanced Micro Devices, Inc.
; 29K Support Products
; Mail Stop 573
; 5900 E. Ben White Blvd.
; Austin, TX 78741
; 800-292-9263
;
; /* $Id$ */
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
.file "crt0.s"
; crt0.s version 3.3-0
;
; This module gets control from the OS.
; It saves away the Am29027 Mode register settings and
; then sets up the pointers to the resident spill and fill
; trap handlers. It then establishes argv and argc for passing
; to main. It then calls _main. If main returns, it calls _exit.
;
; void = start( );
; NOTE - not C callable (no lead underscore)
;
#if 0
#include <sysmac.h>
#endif
;
;
.extern V_SPILL, V_FILL
; .comm __29027Mode, 8 ; A shadow of the mode register
.comm __LibInit, 4
.text
.extern _main, _exit, _atexit
.word 0 ; Terminating tag word
.global start
start:
#if 0
sub gr1, gr1, 6 * 4
asgeu V_SPILL, gr1, rab ; better not ever happen
add lr1, gr1, 6 * 4
;
; Save the initial value of the Am29027 Mode register
;
; If your system does not enter crt0 with value for Am29027 Mode
; register in gr96 and gr97, and also the coprocessor is active
; uncomment the next 4 instructions.
;
; const gr96, 0xfc00820
; consth gr96, 0xfc00820
; const gr97, 0x1375
; store 1, 3, gr96, gr97
;
; const gr98, __29027Mode
; consth gr98, __29027Mode
; store 0, 0, gr96, gr98
; add gr98, gr98, 4
; store 0, 0, gr97, gr98
;
; Now call the system to setup the spill and fill trap handlers
;
const lr3, spill
consth lr3, spill
const lr2, V_SPILL
syscall setvec
const lr3, fill
consth lr3, fill
const lr2, V_FILL
syscall setvec
;
; atexit(_fini)
;
; const lr0, _atexit
; consth lr0, _atexit
; const lr2,__fini
; calli lr0,lr0
; consth lr2,__fini
;
; Now call _init
;
; const lr0, __init
; consth lr0, __init
; calli lr0,lr0
; nop
;
; Get the argv base address and calculate argc.
;
syscall getargs
add lr3, v0, 0 ; argv
add lr4, v0, 0
constn lr2, -1
argcloop: ; scan for NULL terminator
load 0, 0, gr97, lr4
add lr4, lr4, 4
cpeq gr97, gr97, 0
jmpf gr97, argcloop
add lr2, lr2, 1
;
; Now call LibInit, if there is one. To aid runtime libraries
; that need to do some startup initialization, we have created
; a bss variable called LibInit. If the library does not need
; any run-time initialization, the variable is still 0. If the
; library does need run-time initialization, the library will
; contain a definition like
; void (*_LibInit)(void) = LibInitFunction;
; The linker will match up our bss LibInit with this data LibInit
; and the variable will not be 0. This results in the LibInit routine
; being called via the calli instruction below.
;
const lr0, __LibInit
consth lr0, __LibInit
load 0, 0, lr0, lr0
cpeq gr96, lr0, 0
jmpt gr96, NoLibInit
nop
calli lr0, lr0
nop
NoLibInit:
;
; Call RAMInit to initialize the data memory.
;
; The following code segment was used to create the two flavors of the
; run-time initialization routines (crt0_1.o, and crt0_2.o) as described
; in the Users Manual. If osboot is used to create a stand-alone
; application, or the call to RAMInit is made in the start-up routine,
; then the following is not needed.
;
; .ifdef ROM_LOAD
; .extern RAMInit
;
; const lr0, RAMInit
; consth lr0, RAMInit
; calli gr96, lr0
; nop
; .else
; nop
; nop
; nop
; nop
; .endif
;
; Uncomment the following .comm, if you ARE NOT using osboot as released
; with the High C 29K product, AND plan to use the romcoff utility to
; move code and/or data sections to ROM.
;
; .comm RAMInit, 4
;
; Furthermore, if the above is uncommented, then use the following logic
; to call the RAMInit function, if needed.
;
; const lr0, RAMInit
; consth lr0, RAMInit
; load 0, 0, gr96, lr0
; cpeq gr96, gr96, 0 ; nothing there?
; jmpt gr96, endRAMInit ; yes, nothing to init
; nop
; calli gr96, lr0 ; no, then instruction found
; nop ; execute function.
;
;
; call main, passing it 2 arguments. main( argc, argv )
;
const lr0, _main
consth lr0, _main
calli lr0, lr0
nop
;
; call exit
;
const lr0, _exit
consth lr0, _exit
calli lr0, lr0
add lr2, gr96, 0
;
; Should never get here, but just in case
;
loop:
syscall exit
jmp loop
nop
.sbttl "Spill and Fill trap handlers"
.eject
;
; SPILL, FILL trap handlers
;
; Note that these Spill and Fill trap handlers allow the OS to
; assume that the only registers of use are between gr1 and rfb.
; Therefore, if the OS desires to, it may simply preserve from
; lr0 for (rfb-gr1)/4 registers when doing a context save.
;
;
; Here is the spill handler
;
; spill registers from [*gr1..*rab)
; and move rab downto where gr1 points
;
; rab must change before rfb for signals to work
;
; On entry: rfb - rab = windowsize, gr1 < rab
; Near the end: rfb - rab > windowsize, gr1 == rab
; On exit: rfb - rab = windowsize, gr1 == rab
;
.global spill
spill:
sub tav, rab, gr1 ; tav = number of bytes to spill
srl tav, tav, 2 ; change byte count to word count
sub tav, tav, 1 ; make count zero based
mtsr CR, tav ; set Count Remaining register
sub tav, rab, gr1
sub tav, rfb, tav ; pull down free bound and save it in rab
add rab, gr1, 0 ; first pull down allocate bound
storem 0, 0, lr0, tav ; store lr0..lr(tav) into rfb
jmpi tpc ; return...
add rfb, tav, 0
;
; Here is the fill handler
;
; fill registers from [*rfb..*lr1)
; and move rfb upto where lr1 points.
;
; rab must change before rfb for signals to work
;
; On entry: rfb - rab = windowsize, lr1 > rfb
; Near the end: rfb - rab < windowsize, lr1 == rab + windowsize
; On exit: rfb - rab = windowsize, lr1 == rfb
;
.global fill
fill:
const tav, 0x80 << 2
or tav, tav, rfb ; tav = ((rfb>>2) | 0x80)<<2 == [rfb]<<2
mtsr IPA, tav ; ipa = [rfb]<<2 == 1st reg to fill
; gr0 is now the first reg to fill
sub tav, lr1, rfb ; tav = number of bytes to fill
add rab, rab, tav ; push up allocate bound
srl tav, tav, 2 ; change byte count to word count
sub tav, tav, 1 ; make count zero based
mtsr CR, tav ; set Count Remaining register
loadm 0, 0, gr0, rfb ; load registers
jmpi tpc ; return...
add rfb, lr1, 0 ; ... first pushing up free bound
;
; The __init function
;
; .sect .init,text
; .use .init
; .global __init
;__init:
; sub gr1,gr1,16
; asgeu V_SPILL,gr1,gr126
; add lr1,gr1,24
;
;
; The __fini function
;
; .sect .fini,text
; .use .fini
; .global __fini
;__fini:
; sub gr1,gr1,16
; asgeu V_SPILL,gr1,gr126
; add lr1,gr1,24
;
#endif
.end

2
c/src/lib/libbsp/a29k/portsw/startup/.cvsignore
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@@ -1,2 +0,0 @@
Makefile
Makefile.in

47
c/src/lib/libbsp/a29k/portsw/startup/Makefile.am
View File

@@ -1,47 +0,0 @@
##
## $Id$
##
VPATH = @srcdir@:@srcdir@/../../../shared
PGM = $(ARCH)/startup.rel
C_FILES = bspclean.c bsplibc.c bsppost.c bspstart.c bootcard.c main.c sbrk.c \
setvec.c gnatinstallhandler.c
C_O_FILES = $(C_FILES:%.c=$(ARCH)/%.$(OBJEXT))
OBJS = $(C_O_FILES)
include $(top_srcdir)/../../../../../../automake/compile.am
include $(top_srcdir)/../../../../../../automake/lib.am
#
# (OPTIONAL) Add local stuff here using +=
#
$(PGM): $(OBJS)
$(make-rel)
bsplib_DATA = linkcmds ramlink romlink
$(PROJECT_RELEASE)/lib/linkcmds: linkcmds
$(INSTALL_DATA) $< $@
$(PROJECT_RELEASE)/lib/ramlink: ramlink
$(INSTALL_DATA) $< $@
$(PROJECT_RELEASE)/lib/romlink: romlink
$(INSTALL_DATA) $< $@
# the .rel file built here will be put into libbsp.a by ../wrapup/Makefile
TMPINSTALL_FILES += $(PROJECT_RELEASE)/lib/ramlink
TMPINSTALL_FILES += $(PROJECT_RELEASE)/lib/linkcmds
TMPINSTALL_FILES += $(PROJECT_RELEASE)/lib/romlink
all-local: $(ARCH) $(OBJS) $(PGM) $(TMPINSTALL_FILES)
.PRECIOUS: $(PGM)
EXTRA_DIST = bspclean.c bspstart.c main.c ramlink romlink setvec.c
include $(top_srcdir)/../../../../../../automake/local.am

29
c/src/lib/libbsp/a29k/portsw/startup/bspclean.c
View File

@@ -1,29 +0,0 @@
/* bsp_cleanup()
*
* This routine normally is part of start.s and usually returns
* control to a monitor.
*
* INPUT: NONE
*
* OUTPUT: NONE
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#include <rtems.h>
#include <bsp.h>
#ifndef lint
static char _sccsid[] = "@(#)bspclean.c 04/08/96 1.1\n";
#endif
void bsp_cleanup( void )
{
}

177
c/src/lib/libbsp/a29k/portsw/startup/bspstart.c
View File

@@ -1,177 +0,0 @@
/*
* This routine starts the application. It includes application,
* board, and monitor specific initialization and configuration.
* The generic CPU dependent initialization has been performed
* before this routine is invoked.
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#include <string.h>
#include <bsp.h>
#include <rtems/libio.h>
#include <rtems/libcsupport.h>
#ifndef lint
static char _sccsid[] = "@(#)bspstart.c 09/11/96 1.15\n";
#endif
int CPU_CLOCK_RATE_MHZ = 25;
/*
* The original table from the application and our copy of it with
* some changes.
*/
extern rtems_configuration_table Configuration;
rtems_configuration_table BSP_Configuration;
rtems_cpu_table Cpu_table;
char *rtems_progname;
/* Initialize whatever libc we are using
* called from postdriver hook
*/
#define HEAP_BLOCK_SIZE (16 * 1024)
rtems_unsigned32 heap_size = 0;
rtems_unsigned32 heap_start;
/*
* Use the shared implementations of the following routines
*/
void bsp_postdriver_hook(void);
void bsp_libc_init( void *, unsigned32, int );
/*
* Function: bsp_pretasking_hook
* Created: 95/03/10
*
* Description:
* BSP pretasking hook. Called just before drivers are initialized.
* Used to setup libc and install any BSP extensions.
*
* NOTES:
* Must not use libc (to do io) from here, since drivers are
* not yet initialized.
*
*/
void bsp_pretasking_hook(void)
{
/* allocate a maximum of 2 megabytes for the heap */
heap_size = 2 * 1024 * 1024;
/* allocate all remaining memory to the heap */
do {
heap_size -= HEAP_BLOCK_SIZE;
/* JRS just to link 9/22/2000 */
#if 0
heap_start = _sysalloc( heap_size );
#else
heap_start = 0;
#endif
} while ( !heap_start );
if (!heap_start)
rtems_fatal_error_occurred( heap_size );
if (heap_start & (CPU_ALIGNMENT-1))
heap_start = (heap_start + CPU_ALIGNMENT) & ~(CPU_ALIGNMENT-1);
bsp_libc_init((void *) heap_start, heap_size, 0);
#ifdef RTEMS_DEBUG
rtems_debug_enable( RTEMS_DEBUG_ALL_MASK );
#endif
}
/*
* bsp_start
*
* This routine does the bulk of the system initialization.
*/
int bsp_start(
int argc,
char **argv,
char **environp
)
{
if ((argc > 0) && argv && argv[0])
rtems_progname = argv[0];
else
rtems_progname = "RTEMS";
/* set the PIA0 register wait states */
*(volatile unsigned32 *)0x80000020 = 0x04080000;
/*
* Allocate the memory for the RTEMS Work Space. This can come from
* a variety of places: hard coded address, malloc'ed from outside
* RTEMS world (e.g. simulator or primitive memory manager), or (as
* typically done by stock BSPs) by subtracting the required amount
* of work space from the last physical address on the CPU board.
*/
/*
* Need to "allocate" the memory for the RTEMS Workspace and
* tell the RTEMS configuration where it is. This memory is
* not malloc'ed. It is just "pulled from the air".
*/
/* JRS just to link 9/22/2000 */
#if 0
BSP_Configuration.work_space_start = _sysalloc( BSP_Configuration.work_space_size + 512 );
#else
BSP_Configuration.work_space_start = 0;
#endif
if (!BSP_Configuration.work_space_start)
rtems_fatal_error_occurred( BSP_Configuration.work_space_size );
BSP_Configuration.work_space_start = (void *) ((unsigned int)((char *)BSP_Configuration.work_space_start + CPU_ALIGNMENT) & ~(CPU_ALIGNMENT-1));
/*
* initialize the CPU table for this BSP
*/
Cpu_table.pretasking_hook = bsp_pretasking_hook; /* init libc, etc. */
Cpu_table.postdriver_hook = bsp_postdriver_hook;
Cpu_table.interrupt_stack_size = CONFIGURE_INTERRUPT_STACK_MEMORY;
/* JRS just to link 9/22/2000 */
#if 0
_settrap( 109,&a29k_enable_sup);
_settrap( 110,&a29k_disable_sup);
_settrap( 111,&a29k_enable_all_sup);
_settrap( 112,&a29k_disable_all_sup);
_settrap( 106,&a29k_context_switch_sup);
_settrap( 107,&a29k_context_restore_sup);
_settrap( 108,&a29k_context_save_sup);
_settrap( 105,&a29k_sigdfl_sup);
#endif
/*
* Start RTEMS
*/
rtems_initialize_executive( &BSP_Configuration, &Cpu_table );
bsp_cleanup();
return 0;
}

34
c/src/lib/libbsp/a29k/portsw/startup/linkcmds
View File

@@ -1,34 +0,0 @@
OUTPUT_FORMAT("coff-a29k-big")
SEARCH_DIR(/opt/a29k-rtems/a29k-rtems/lib);
SECTIONS
{
.text : {
*(.text)
__etext = .;
__CTOR_LIST__ = .;
LONG((__CTOR_END__ - __CTOR_LIST__) / 4 - 2)
*(.ctors)
LONG(0)
__CTOR_END__ = .;
__DTOR_LIST__ = .;
LONG((__DTOR_END__ - __DTOR_LIST__) / 4 - 2)
*(.dtors)
LONG(0)
__DTOR_END__ = .;
*(.lit)
*(.shdata)
}
.shbss SIZEOF(.text) + ADDR(.text) : {
*(.shbss)
}
.data : {
*(.data)
__edata = .;
}
.bss SIZEOF(.data) + ADDR(.data) :
{
*(.bss)
*(COMMON)
__end = ALIGN(0x8);
}
}

38
c/src/lib/libbsp/a29k/portsw/startup/main.c
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@@ -1,38 +0,0 @@
/* main()
*
* This is the entry point for the application. It calls
* the bsp_start routine to the actual dirty work.
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#include <rtems.h>
#include <bsp.h>
#ifndef lint
static char _sccsid[] = "@(#)main.c 06/30/96 1.2\n";
#endif
int main(
int argc,
char **argv,
char **environp
)
{
bsp_start( argc, argv, environp );
/*
* May be able to return to the "crt/start.s" code but also
* may not be able to. Do something here which is board dependent.
*/
_exit(0);
rtems_fatal_error_occurred( 0 );
}

11
c/src/lib/libbsp/a29k/portsw/startup/ramlink
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@@ -1,11 +0,0 @@
;@(#)ez030.cmd 1.1 93/04/06 20:00:10, Copyright 1993 AMD.
;Linker command file header for EZ-030 evaluation board.
;Usage: ld29 -c .../29k/lib/ez030.cmd -o ...
; -or-
; hc29 -cmdez030.cmd ...
;
; $Id$
;
ALIGN .text=8192
ALIGN .data=8192
ORDER .text=0x40005000,!text,!data,!lit,!bss

146
c/src/lib/libbsp/a29k/portsw/startup/romlink
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@@ -1,146 +0,0 @@
;
; $Id$
;
;#{
;# SCCS INFORMATION:
;# SID = @(#)sa29200.lnk 4.1; DLU=95/09/14-11:05:57
;# Q = @(#) Copyright (C) 1995 Advanced Micro Devices, Inc.
;# Module Type = @(#) OSBOOT/DBG_CORE absolute liker file (AMD-EPD-29K, AMIR)
;# SCCS Path = %P\%
;# SCCS File = %F\%
;# FileName = sa29200.lnk
;# SCCS ID = 4.1
;# Date Update = 14 Sep 1995, (DLU=95/09/14-11:05:57)
;# Date Extract = 12 Oct 1995, (DLE=95/10/12-16:27:31)
;#}
; @(#)sa29200.lnk 3.6 94/08/22 11:58:54, Srini, AMD.
; This is the linker command file used to bind the inrementally linked
; osboot.o module to a memory map. This also defines some link-time constants
; used in the code. These constants are genral for all 29K family members.
; You only need to customize, if necessary, the definitions that affect
; your target processor, and leave the rest alone.
; The default values in this file are for binding osboot.o for use with
; SA29200 stand-alone board with the -29200/-29205 option.
;
; Order the code segments according to the memory map structure.
; The defaul OSBOOT has only .text and .bss sections. You need to ORDER
; other sections of your applications that are not included below.
; We use separate ORDER statements below to distinguish the two memory
; regions used. The text section is bound to ROM memory region, and the
; data region to RAM memory space.
; MAKE SURE to order the BSS section at the very end. This is because the
; BSS section size could get adjusted after linking with raminit.o (produced
; by romcoff utility) or other initialization routines. This change in size
; could affect the offsets used by the program to refer to the remaining data
; sections that follow BSS.
ALIGN ProcInit=16
ORDER Reset=0x0
ORDER ProcInit,OsbText,.text,!text
ORDER .lit,!lit
ORDER vectable=0x40000000
ORDER msg_data=0x40000400
ORDER .data,!data
ORDER OsbBss,dbg_030,dbg_bss,cfg_bss,.bss,!bss
ORDER HeapBase
ORDER .comment
; For Stand-Alone application out of ROM use the ORDER statements below:
; For Stand-Alone application out of RAM use the ORDER statement below:
;ORDER Reset=0x40010000,ProcInit,OsbText,.text,!text,.lit,!lit,.data,!data,msg_data,dbg_dat,.bss,!bss,HeapBase,.comment
;
; definitions of link time constants used in code.
;
; Definition of the initial value of CPS register.
; The value below is for an Am29200 processor. It sets TU, SM,DI, DA,IM fields
; bits in the register. You may modify it to suit your target environment.
; Like, changing the IM field for instance. IM is 0x11 by default enabling
; all INTR[0-3] lines.
;public _init_CPS=0x87F
public _init_CPS=0x20813
;public _init_CPS=0x2081F
;public _init_CPS=0x081F
; Define the memory map in general values. The code - except for simulators -
; configures the external RAM at run-time and updates the DMemSize value.
; DMemStart and DMemSize are the most important values below. DMemStart is
; used to initialize the vector base address register (VAB). And DMemSize
; is used to find the highest addressable data memory to place the register
; and memory stacks. Remember, DMemSize is configured at run-time for hardware
; targets and updated.
public VectorBaseAddress=0x40000000
public IMemStart=0x0000000
public IMemSize=0xfffff
public DMemStart=0x40000000
#public DMemStart=0x100000
public DMemSize=0xfffff
#public DMemSize=0x17ffff
#public DMemSize=0x3fffffff
public RMemStart=0x0
public RMemSize=0xfffff
public EnableDRAMSizing=1
;
; For the 29K Microcontrollers, you need to define the ROM Control register
; value (RMCT_VALUE), the ROM Configuration register value (RMCF_VALUE), and
; the DRAM Control register value (DRCT_VALUE) based on DMemSize specified
; above. This could be overwritten in software targets such as the simulator.
; ROM and RAM Control registers. ROM COnfiguration. (not valid for Am2900X,
; Am29050, and Am2903X processors)
; The DRAM REFRATE value (in DRCT) must be specified here. To disable
; DRAM refreshing (on a system with no DRAM), set REFRATE field in DRCT
; to zero. Otherwise, set it to the desired frequency. The default is 0xFF
; The default values in this file are for Am2920X processors.
;public RMCT_VALUE=0x03030303
;public DRCT_VALUE=0x888800FF
;public RMCF_VALUE=0x00f8f8f8
;
public RMCT_VALUE=0x4a424300
public DRCT_VALUE=0xccc000f0
public RMCF_VALUE=0x011121ff
;
;
; Execute trap handlers from ROM? If your trap handlers are in ROM space,
; then set _TRAPINROM to TWO (0x2). It is used to modify the tarp vector
; address installed to set the R bit when fetched. If the trap handlers in
; ROM or if there is no ROM-space (no RE bit in CPS), set _TRAPINROM to ZERO.
; The default in this file is for SA29200 board and _TRAPINROM is set to ZERO.
public _TRAPINROM=0
;
; Define the processor clock frequencies. These values are used by the HIF
; kernel to provide some HIF services.
public TicksPerMillisecond=16000
public ClockFrequency=16000000
;
; There are some C functions which are not leaf functions. However, they are
; no expected to spill or fill registers. We ensure that by setting up a
; pseudo register stack before calling those functions. The code generated
; for those functions however do have the prologue and epilogue which refer
; to the symbols V_SPILL and V_FILL. The linker does not know about these
; symbols. So we define it here so that it does not complain.
; If you use the hc29 compiler driver to link the objects it will warn that
; the definitions here are already internally defined. You
; can use hc29 with -nocrt0 option to do the linking for linear memory spaces.
; public V_SPILL=64
; public V_FILL=65
;
; Set the UART debug/monitor port serial communications baud rate.
;
public UCLK=32000000
; INITBAUD defines the cold start baud rate. This is the baud rate
; the monitor would use when powered up. This can be overridden by
; defining BAUDRATE on the assembler/compiler command line.
public INITBAUD=9600
;
; Is there a SCC 8530 on the target?
; If there is an 8530 SC on target, define the symbols below appropriately.
; The routines in scc8530.s use these values to access the registers of
; SCC and program it. The default values are for EZ030 target.
; Baudrate can be specified on the command-line to override the default
; baud rate defined in scc8530.s.
; scc channel A control
;public SCC8530_CHA_CONTROL=0xC0000007
; scc channel B control
;public SCC8530_CHB_CONTROL=0xC0000003
; scc channel A data
;public SCC8530_CHA_DATA=0xC000000F
; scc channel B data
;public SCC8530_CHB_DATA=0xC000000B
; scc baud clock generator
;public SCC8530_BAUD_CLK_ENBL=3

53
c/src/lib/libbsp/a29k/portsw/startup/setvec.c
View File

@@ -1,53 +0,0 @@
/* set_vector
*
* This routine installs an interrupt vector on the target Board/CPU.
* This routine is allowed to be as board dependent as necessary.
*
* INPUT:
* handler - interrupt handler entry point
* vector - vector number
* type - 0 indicates raw hardware connect
* 1 indicates RTEMS interrupt connect
*
* RETURNS:
* address of previous interrupt handler
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#include <rtems.h>
#include <bsp.h>
#ifndef lint
static char _sccsid[] = "@(#)setvec.c 06/30/96 1.2\n";
#endif
no_cpu_isr_entry set_vector( /* returns old vector */
rtems_isr_entry handler, /* isr routine */
rtems_vector_number vector, /* vector number */
int type /* RTEMS or RAW intr */
)
{
no_cpu_isr_entry previous_isr;
if ( type )
rtems_interrupt_catch( handler, vector, (rtems_isr_entry *) &previous_isr );
else {
/* XXX: install non-RTEMS ISR as "raw" interupt */
/* JRS just to link 9/22/2000 */
#if 0
_settrap( vector, handler );
#else
;
#endif
}
return previous_isr;
}

195
c/src/lib/libbsp/a29k/portsw/times
View File

@@ -1,195 +0,0 @@
#
# Timing Test Suite Results for the NO_BSP
#
# NOTE: This is just a template. The times are irrelevant since this BSP
# can only be compiled -- not executed.
#
# $Id$
#
Board:
CPU: include coprocessor if applicable
Clock Speed:
Memory Configuration: SRAM, DRAM, cache, etc
Wait States:
Times Reported in: cycles, microseconds, etc
Timer Source: Count Down Timer, on-CPU cycle counter, etc
Column X:
Column Y:
# DESCRIPTION A B
== ================================================================= ==== ====
1 rtems_semaphore_create 20
rtems_semaphore_delete 21
rtems_semaphore_obtain: available 15
rtems_semaphore_obtain: not available -- NO_WAIT 15
rtems_semaphore_release: no waiting tasks 16
2 rtems_semaphore_obtain: not available -- caller blocks 62
3 rtems_semaphore_release: task readied -- preempts caller 55
4 rtems_task_restart: blocked task -- preempts caller 77
rtems_task_restart: ready task -- preempts caller 70
rtems_semaphore_release: task readied -- returns to caller 25
rtems_task_create 57
rtems_task_start 31
rtems_task_restart: suspended task -- returns to caller 36
rtems_task_delete: suspended task 47
rtems_task_restart: ready task -- returns to caller 37
rtems_task_restart: blocked task -- returns to caller 46
rtems_task_delete: blocked task 50
5 rtems_task_suspend: calling task 51
rtems_task_resume: task readied -- preempts caller 49
6 rtems_task_restart: calling task 59
rtems_task_suspend: returns to caller 18
rtems_task_resume: task readied -- returns to caller 19
rtems_task_delete: ready task 50
7 rtems_task_restart: suspended task -- preempts caller 70
8 rtems_task_set_priority: obtain current priority 12
rtems_task_set_priority: returns to caller 27
rtems_task_mode: obtain current mode 5
rtems_task_mode: no reschedule 5
rtems_task_mode: reschedule -- returns to caller 8
rtems_task_mode: reschedule -- preempts caller 39
rtems_task_set_note 13
rtems_task_get_note 13
rtems_clock_set 33
rtems_clock_get 3
9 rtems_message_queue_create 110
rtems_message_queue_send: no waiting tasks 37
rtems_message_queue_urgent: no waiting tasks 37
rtems_message_queue_receive: available 31
rtems_message_queue_flush: no messages flushed 12
rtems_message_queue_flush: messages flushed 16
rtems_message_queue_delete 26
10 rtems_message_queue_receive: not available -- NO_WAIT 15
rtems_message_queue_receive: not available -- caller blocks 62
11 rtems_message_queue_send: task readied -- preempts caller 72
12 rtems_message_queue_send: task readied -- returns to caller 39
13 rtems_message_queue_urgent: task readied -- preempts caller 72
14 rtems_message_queue_urgent: task readied -- returns to caller 39
15 rtems_event_receive: obtain current events 1
rtems_event_receive: not available -- NO_WAIT 12
rtems_event_receive: not available -- caller blocks 56
rtems_event_send: no task readied 12
rtems_event_receive: available 12
rtems_event_send: task readied -- returns to caller 24
16 rtems_event_send: task readied -- preempts caller 55
17 rtems_task_set_priority: preempts caller 62
18 rtems_task_delete: calling task 83
19 rtems_signal_catch 9
rtems_signal_send: returns to caller 15
rtems_signal_send: signal to self 18
exit ASR overhead: returns to calling task 22
exit ASR overhead: returns to preempting task 49
20 rtems_partition_create 35
rtems_region_create 23
rtems_partition_get_buffer: available 15
rtems_partition_get_buffer: not available 13
rtems_partition_return_buffer 18
rtems_partition_delete 16
rtems_region_get_segment: available 22
rtems_region_get_segment: not available -- NO_WAIT 21
rtems_region_return_segment: no waiting tasks 19
rtems_region_get_segment: not available -- caller blocks 64
rtems_region_return_segment: task readied -- preempts caller 74
rtems_region_return_segment: task readied -- returns to caller 44
rtems_region_delete 16
rtems_io_initialize 2
rtems_io_open 1
rtems_io_close 1
rtems_io_read 1
rtems_io_write 1
rtems_io_control 1
21 rtems_task_ident 149
rtems_message_queue_ident 145
rtems_semaphore_ident 156
rtems_partition_ident 145
rtems_region_ident 148
rtems_port_ident 145
rtems_timer_ident 145
rtems_rate_monotonic_ident 145
22 rtems_message_queue_broadcast: task readied -- returns to caller 42
rtems_message_queue_broadcast: no waiting tasks 17
rtems_message_queue_broadcast: task readied -- preempts caller 78
23 rtems_timer_create 14
rtems_timer_fire_after: inactive 22
rtems_timer_fire_after: active 24
rtems_timer_cancel: active 15
rtems_timer_cancel: inactive 13
rtems_timer_reset: inactive 21
rtems_timer_reset: active 23
rtems_timer_fire_when: inactive 34
rtems_timer_fire_when: active 34
rtems_timer_delete: active 19
rtems_timer_delete: inactive 17
rtems_task_wake_when 69
24 rtems_task_wake_after: yield -- returns to caller 9
rtems_task_wake_after: yields -- preempts caller 45
25 rtems_clock_tick 4
26 _ISR_Disable 0
_ISR_Flash 1
_ISR_Enable 1
_Thread_Disable_dispatch 0
_Thread_Enable_dispatch 7
_Thread_Set_state 11
_Thread_Disptach (NO FP) 31
context switch: no floating point contexts 21
context switch: self 10
context switch: to another task 10
context switch: restore 1st FP task 25
fp context switch: save idle, restore idle 31
fp context switch: save idle, restore initialized 19
fp context switch: save initialized, restore initialized 20
_Thread_Resume 7
_Thread_Unblock 7
_Thread_Ready 9
_Thread_Get 4
_Semaphore_Get 2
_Thread_Get: invalid id 0
27 interrupt entry overhead: returns to interrupted task 6
interrupt exit overhead: returns to interrupted task 6
interrupt entry overhead: returns to nested interrupt 6
interrupt exit overhead: returns to nested interrupt 5
interrupt entry overhead: returns to preempting task 7
interrupt exit overhead: returns to preempting task 36
28 rtems_port_create 16
rtems_port_external_to_internal 11
rtems_port_internal_to_external 11
rtems_port_delete 16
29 rtems_rate_monotonic_create 15
rtems_rate_monotonic_period: initiate period -- returns to caller 21
rtems_rate_monotonic_period: obtain status 13
rtems_rate_monotonic_cancel 16
rtems_rate_monotonic_delete: inactive 18
rtems_rate_monotonic_delete: active 20
rtems_rate_monotonic_period: conclude periods -- caller blocks 53

2
c/src/lib/libbsp/a29k/portsw/wrapup/.cvsignore
View File

@@ -1,2 +0,0 @@
Makefile
Makefile.in

25
c/src/lib/libbsp/a29k/portsw/wrapup/Makefile.am
View File

@@ -1,25 +0,0 @@
##
## $Id$
##
BSP_FILES = startup console iic ethernet flash nvram
CPU_FILES = clock timer
# bummer; have to use $foreach since % pattern subst rules only replace 1x
OBJS = $(foreach piece, $(BSP_FILES), $(wildcard ../$(piece)/$(ARCH)/*.$(OBJEXT))) \
$(foreach piece, $(CPU_FILES), ../../../../libcpu/$(RTEMS_CPU)/$(piece)/$(ARCH)/$(piece).rel)
LIB = $(ARCH)/libbsp.a
include $(top_srcdir)/../../../../../../automake/compile.am
include $(top_srcdir)/../../../../../../automake/lib.am
#
# (OPTIONAL) Add local stuff here using +=
#
$(LIB): $(OBJS)
$(make-library)
all-local: $(ARCH) $(LIB)
include $(top_srcdir)/../../../../../../automake/local.am