forked from Imagelibrary/rtems
2001-05-22 Greg Menke <gregory.menke@gsfc.nasa.gov>
* Assisted in design and debug by Joel Sherrill <joel@OARcorp.com>. * clock/clockdrv.c, console/conscfg.c: Corrected. * include/bsp.h: Support for tm27 and addition of CPU_CLOCK_RATE. * startup/bspstart.c: Properly set initial status register and pending interrupts. * timer/timer.c: Works now.
This commit is contained in:
@@ -1,3 +1,12 @@
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2001-05-22 Greg Menke <gregory.menke@gsfc.nasa.gov>
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* Assisted in design and debug by Joel Sherrill <joel@OARcorp.com>.
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* clock/clockdrv.c, console/conscfg.c: Corrected.
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* include/bsp.h: Support for tm27 and addition of CPU_CLOCK_RATE.
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* startup/bspstart.c: Properly set initial status register and
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pending interrupts.
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* timer/timer.c: Works now.
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2001-05-10 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
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* configure.in: Use RTEMS_PROG_CC_FOR_TARGET([-ansi -fasm]).
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@@ -23,14 +23,16 @@
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#define CLOCK_VECTOR MONGOOSEV_IRQ_TIMER1
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#endif
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/* reset Timeout (TO) bit */
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#define Clock_driver_support_at_tick() \
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MONGOOSEV_WRITE_REGISTER( \
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CLOCK_BASE, \
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MONGOOSEV_TIMER_CONTROL_REGISTER, \
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(MONGOOSEV_TIMER_CONTROL_COUNTER_ENABLE | \
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MONGOOSEV_TIMER_CONTROL_INTERRUPT_ENABLE) \
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);
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do { \
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MONGOOSEV_WRITE_REGISTER( CLOCK_BASE, MONGOOSEV_TIMER_CONTROL_REGISTER, \
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(MONGOOSEV_TIMER_CONTROL_COUNTER_ENABLE | MONGOOSEV_TIMER_CONTROL_INTERRUPT_ENABLE)); \
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} while(0)
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#define Clock_driver_support_install_isr( _new, _old ) \
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do { \
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@@ -38,20 +40,12 @@
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} while(0)
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extern int ClockRate;
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#define CLICKS (((unsigned32) &ClockRate) / 1000000 )
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#define Clock_driver_support_initialize_hardware() \
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do { \
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unsigned32 _clicks; \
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_clicks = CLICKS * rtems_configuration_get_microseconds_per_tick(); \
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MONGOOSEV_WRITE_REGISTER( \
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CLOCK_BASE, \
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MONGOOSEV_TIMER_INITIAL_COUNTER_REGISTER, \
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_clicks \
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); \
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do { \
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unsigned32 _clicks = CPU_CLOCK_RATE_MHZ * rtems_configuration_get_microseconds_per_tick(); \
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MONGOOSEV_WRITE_REGISTER( CLOCK_BASE, MONGOOSEV_TIMER_INITIAL_COUNTER_REGISTER, _clicks ); \
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Clock_driver_support_at_tick(); \
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} while(0)
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} while(0)
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#define Clock_driver_support_shutdown_hardware() \
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MONGOOSEV_WRITE_REGISTER( CLOCK_BASE, MONGOOSEV_TIMER_CONTROL_REGISTER, 0 )
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@@ -18,14 +18,14 @@
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#include <libchip/serial.h>
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#include <libchip/mg5uart.h>
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#if (CONSOLE_USE_INTERRUPTS)
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/* #define CONSOLE_USE_INTERRUPTS */
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#ifdef CONSOLE_USE_INTERRUPTS
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#define MG5UART_FUNCTIONS &mg5uart_fns
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#else
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#define MG5UART_FUNCTIONS &mg5uart_fns_polled
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#endif
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extern int ClockRate;
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#define CLOCK_RATE (unsigned32) &ClockRate
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console_tbl Console_Port_Tbl[] = {
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{
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@@ -91,5 +91,3 @@ void GENMG5_output_char(char c) { write( 2, &c, 1 ); }
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BSP_output_char_function_type BSP_output_char = GENMG5_output_char;
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BSP_polling_getchar_function_type BSP_poll_char = NULL;
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@@ -26,6 +26,34 @@ extern "C" {
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#include <clockdrv.h>
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#include <libcpu/mongoose-v.h>
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#ifndef CPU_CLOCK_RATE
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#define CLOCK_RATE 12000000
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#endif
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#define CPU_CLOCK_RATE_HZ CLOCK_RATE
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#define CPU_CLOCK_RATE_MHZ (CLOCK_RATE/1000000)
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/*
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* Useful defines set here so we can avoid duplicating them all over
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* creation.
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*
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*/
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/*
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* assertSoftwareInt defined in vectorisrs.c the prototype is here so
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* userspace code can get to it directly.
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* */
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extern void assertSoftwareInterrupt(unsigned32);
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/*
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* Define the time limits for RTEMS Test Suite test durations.
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* Long test and short test duration limits are provided. These
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@@ -44,23 +72,28 @@ extern "C" {
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*
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*/
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#define CLOCK_VECTOR MONGOOSEV_IRQ_TIMER1
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#define MUST_WAIT_FOR_INTERRUPT 1
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#if 0
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#if 1
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#define Install_tm27_vector( handler ) \
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(void) set_vector( handler, MONGOOSEV_IRQ_SOFTWARE_1, 1 ); \
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(void) set_vector( handler, MONGOOSEV_IRQ_SOFTWARE_1, 1 );
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#define Cause_tm27_intr() \
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asm volatile ( "syscall 0x01" : : );
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#define CLOCK_VECTOR MONGOOSEV_IRQ_TMR0
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#define Cause_tm27_intr() assertSoftwareInterrupt(0);
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#define Clear_tm27_intr()
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#define Lower_tm27_intr()
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#else
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#define Install_tm27_vector( handler ) \
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(void) set_vector( handler, MONGOOSEV_IRQ_TMR0, 1 ); \
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(void) set_vector( handler, MONGOOSEV_IRQ_TIMER1, 1 );
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#define Cause_tm27_intr() \
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do { \
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@@ -68,7 +101,6 @@ extern "C" {
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} while(0)
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#define Clear_tm27_intr()
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#define Lower_tm27_intr()
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#endif
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@@ -21,6 +21,8 @@
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#include <rtems/libcsupport.h>
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#include <libcpu/mongoose-v.h>
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/*
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* The original table from the application and our copy of it with
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* some changes.
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@@ -57,18 +59,22 @@ void bsp_libc_init( void *, unsigned32, int );
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void bsp_pretasking_hook(void)
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{
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extern int HeapBase;
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extern int HeapSize;
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extern int HeapBase;
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extern int HeapSize;
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void *heapStart = &HeapBase;
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unsigned long heapSize = (unsigned long)&HeapSize;
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unsigned long ramSpace;
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bsp_libc_init(heapStart, (unsigned32) heapSize, 0);
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#ifdef RTEMS_DEBUG
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rtems_debug_enable( RTEMS_DEBUG_ALL_MASK );
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#endif
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}
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/*
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* bsp_start
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*
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@@ -79,33 +85,65 @@ void bsp_start( void )
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{
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extern int _end;
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extern int WorkspaceBase;
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extern int _RamSize, _RamBase;
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int ram_left;
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ram_left = (unsigned32) &_RamSize -
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(unsigned32)&WorkspaceBase - (unsigned32) &_RamBase;
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/* Configure Number of Register Caches */
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Cpu_table.pretasking_hook = bsp_pretasking_hook; /* init libc, etc. */
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Cpu_table.postdriver_hook = bsp_postdriver_hook;
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Cpu_table.interrupt_stack_size = 4096;
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if ( BSP_Configuration.work_space_size > ram_left )
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_sys_exit( 1 );
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/* HACK -- tied to value linkcmds */
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if ( BSP_Configuration.work_space_size >(4096*1024) )
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_sys_exit( 1 );
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BSP_Configuration.work_space_start = (void *) &WorkspaceBase;
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/* Clear all pending peripheral interrupts and mask them. */
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MONGOOSEV_WRITE( MONGOOSEV_PERIPHERAL_FUNCTION_INTERRUPT_CAUSE_REGISTER, 0 );
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MONGOOSEV_WRITE( MONGOOSEV_WATCHDOG, 0xA0 );
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/* reset the config register & clear any pending peripheral interrupts */
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MONGOOSEV_WRITE( MONGOOSEV_PERIPHERAL_COMMAND_REGISTER, 0 );
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MONGOOSEV_WRITE( MONGOOSEV_PERIPHERAL_COMMAND_REGISTER, MONGOOSEV_UART_CMD_RESET_BOTH_PORTS );
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MONGOOSEV_WRITE( MONGOOSEV_PERIPHERAL_COMMAND_REGISTER, 0 );
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/* reset both timers */
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MONGOOSEV_WRITE_REGISTER( MONGOOSEV_TIMER1_BASE, MONGOOSEV_TIMER_INITIAL_COUNTER_REGISTER, 0xffffffff );
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MONGOOSEV_WRITE_REGISTER( MONGOOSEV_TIMER1_BASE, MONGOOSEV_TIMER_CONTROL_REGISTER, 0);
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MONGOOSEV_WRITE_REGISTER( MONGOOSEV_TIMER2_BASE, MONGOOSEV_TIMER_INITIAL_COUNTER_REGISTER, 0xffffffff );
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MONGOOSEV_WRITE_REGISTER( MONGOOSEV_TIMER2_BASE, MONGOOSEV_TIMER_CONTROL_REGISTER, 0);
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MONGOOSEV_WRITE( MONGOOSEV_PERIPHERAL_FUNCTION_INTERRUPT_MASK_REGISTER, 0 );
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MONGOOSEV_WRITE( MONGOOSEV_PERIPHERAL_STATUS_REGISTER, 0xffffffff );
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/*
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* Enable coprocessors.
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* Disable external interrupts.
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* Enable software interrupts.
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*/
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/* clear any writable bits in the cause register */
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mips_set_cause( 0 );
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mips_set_sr( (SR_CU0 | SR_CU1 | SR_IBIT1 | SR_IBIT2) );
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/*all interrupts unmasked but globally off. depend on the IRC to take care of things */
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mips_set_sr( (SR_CU0 | SR_CU1 | 0xff00) );
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mips_install_isr_entries();
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}
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void clear_cache( void *address, size_t n )
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{
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}
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/* Structure filled in by get_mem_info. Only the size field is
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actually used (to clear bss), so the others aren't even filled in. */
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struct s_mem
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{
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unsigned int size;
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unsigned int icsize;
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unsigned int dcsize;
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};
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void
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get_mem_info (mem)
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struct s_mem *mem;
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{
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mem->size = 0x1000000; /* XXX figure out something here */
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}
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@@ -37,20 +37,21 @@ void Timer_initialize()
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* the compare register is set to the maximum value.
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*/
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MONGOOSEV_WRITE_REGISTER(
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TIMER_BASE,
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MONGOOSEV_TIMER_INITIAL_COUNTER_REGISTER,
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0xffffffff
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);
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MONGOOSEV_WRITE_REGISTER(
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TIMER_BASE,
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MONGOOSEV_TIMER_CONTROL_REGISTER,
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MONGOOSEV_TIMER_CONTROL_COUNTER_ENABLE
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);
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MONGOOSEV_WRITE_REGISTER( TIMER_BASE, MONGOOSEV_TIMER_CONTROL_REGISTER, 0);
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MONGOOSEV_WRITE_REGISTER( TIMER_BASE,
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MONGOOSEV_TIMER_INITIAL_COUNTER_REGISTER,
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0xffffffff );
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MONGOOSEV_WRITE_REGISTER( TIMER_BASE,
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MONGOOSEV_TIMER_CONTROL_REGISTER,
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MONGOOSEV_TIMER_CONTROL_COUNTER_ENABLE );
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}
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#define AVG_OVERHEAD 0 /* It typically takes N instructions */
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/* to start/stop the timer. */
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#define LEAST_VALID 1 /* Don't trust a value lower than this */
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/* mongoose-v can count cycles. :) */
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#include <bspIo.h>
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@@ -61,13 +62,16 @@ int Read_timer()
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rtems_unsigned32 total;
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rtems_unsigned32 tcr;
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clicks = MONGOOSEV_READ_REGISTER(
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TIMER_BASE,
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MONGOOSEV_TIMER_INITIAL_COUNTER_REGISTER
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);
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clicks = MONGOOSEV_READ_REGISTER( TIMER_BASE,
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MONGOOSEV_TIMER_INITIAL_COUNTER_REGISTER );
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total = 0xffffffff - clicks;
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tcr = MONGOOSEV_READ_REGISTER( TIMER_BASE, MONGOOSEV_TIMER_CONTROL_REGISTER );
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MONGOOSEV_WRITE_REGISTER( TIMER_BASE,
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MONGOOSEV_TIMER_CONTROL_REGISTER,
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0 );
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if ( tcr & MONGOOSEV_TIMER_CONTROL_TIMEOUT )
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printk( "MG5 timer overran\n" );
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@@ -77,7 +81,7 @@ int Read_timer()
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if ( total < LEAST_VALID )
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return 0; /* below timer resolution */
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return total - AVG_OVERHEAD;
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return (total - AVG_OVERHEAD) / CPU_CLOCK_RATE_MHZ;
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}
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rtems_status_code Empty_function( void )
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@@ -91,3 +95,6 @@ void Set_find_average_overhead(
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{
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Timer_driver_Find_average_overhead = find_flag;
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}
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/* eof */
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